linux/drivers/gpu
Ville Syrjälä 4cdaba1bb0 drm/i915: Reoder BDW+ EU/slice fuse bits
We customarily define the bits of a register in big endian
order. Reorder the BDW+ fuse bits to match.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250211231941.22769-11-ville.syrjala@linux.intel.com
2025-03-04 15:39:37 +01:00
..
drm drm/i915: Reoder BDW+ EU/slice fuse bits 2025-03-04 15:39:37 +01:00
host1x
ipu-v3
trace
vga
Makefile