linux/drivers/phy
Stephan Gerhold 6cb8c1f957 phy: qcom: qmp-pcie: Fix PHY initialization when powered down by firmware
Commit 0cc22f5a86 ("phy: qcom: qmp-pcie: Add PHY register retention
support") added support for using the "no_csr" reset to skip configuration
of the PHY if the init sequence was already applied by the boot firmware.
The expectation is that the PHY is only turned on/off by using the "no_csr"
reset, instead of powering it down and re-programming it after a full
reset.

The boot firmware on X1E does not fully conform to this expectation: If the
PCIe3 link fails to come up (e.g. because no PCIe card is inserted), the
firmware powers down the PHY using the QPHY_PCS_POWER_DOWN_CONTROL
register. The QPHY_START_CTRL register is kept as-is, so the driver assumes
the PHY is already initialized and skips the configuration/power up
sequence. The PHY won't come up again without clearing the
QPHY_PCS_POWER_DOWN_CONTROL, so eventually initialization fails:

  qcom-qmp-pcie-phy 1be0000.phy: phy initialization timed-out
  phy phy-1be0000.phy.0: phy poweron failed --> -110
  qcom-pcie 1bd0000.pcie: cannot initialize host
  qcom-pcie 1bd0000.pcie: probe with driver qcom-pcie failed with error -110

This can be reliably reproduced on the X1E CRD, QCP and Devkit when no card
is inserted for PCIe3.

Fix this by checking the QPHY_PCS_POWER_DOWN_CONTROL register in addition
to QPHY_START_CTRL. If the PHY is powered down with the register, it
doesn't conform to the expectations for using the "no_csr" reset, so we
fully re-initialize with the normal reset sequence.

Also check the register more carefully to ensure all of the bits we expect
are actually set. A simple !!(readl()) is not enough, because the PHY might
be only partially set up with some of the expected bits set.

Cc: stable@vger.kernel.org
Fixes: 0cc22f5a86 ("phy: qcom: qmp-pcie: Add PHY register retention support")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821-phy-qcom-qmp-pcie-nocsr-fix-v3-1-4898db0cc07c@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-09-01 22:29:20 +05:30
..
allwinner power: supply: core: rename power_supply_get_by_phandle to power_supply_get_by_reference 2025-06-22 02:04:30 +02:00
amlogic phy: amlogic: phy-meson-axg-pcie: Fix PHY creation order in axg-pcie probe 2025-04-11 17:07:15 +05:30
broadcom phy: drop probe registration printks 2025-06-16 22:54:21 +05:30
cadence phy: cadence-torrent: Add PCIe multilink + USB with same SSC register config for 100 MHz refclk 2025-06-16 22:37:19 +05:30
freescale phy: freescale: fsl-samsung-hdmi: Improve LUT search for best clock 2025-05-14 12:15:51 +01:00
hisilicon phy: HiSilicon: Don't use "proxy" headers 2024-12-08 21:36:59 +05:30
ingenic
intel phy: Switch back to struct platform_driver::remove() 2024-10-17 20:33:03 +05:30
lantiq
marvell phy: drop probe registration printks 2025-06-16 22:54:21 +05:30
mediatek phy: mediatek: tphy: Cleanup and document slew calibration 2025-06-26 16:33:42 -07:00
microchip phy: PHY_LAN966X_SERDES should depend on SOC_LAN966 || MCHP_LAN966X_PCI 2025-02-14 18:04:57 +05:30
motorola phy: mapphone-mdm6600: use gpiod_multi_set_value_cansleep 2025-02-17 14:27:34 +01:00
mscc
nuvoton phy: nuvoton: add new driver for the Nuvoton MA35 SoC USB 2.0 PHY 2024-08-29 23:52:37 +05:30
qualcomm phy: qcom: qmp-pcie: Fix PHY initialization when powered down by firmware 2025-09-01 22:29:20 +05:30
ralink
realtek USB / Thunderbolt (USB4) changes for 6.13-rc1 2024-11-29 11:19:31 -08:00
renesas phy-for-6.16 2025-06-05 08:20:21 -07:00
rockchip phy: rockchip-pcie: Properly disable TEST_WRITE strobe signal 2025-07-22 17:58:45 +05:30
samsung phy: exynos-mipi-video: correct cam0 sysreg property name for exynos7870 2025-07-22 18:44:51 +05:30
socionext
st phy: drop probe registration printks 2025-06-16 22:54:21 +05:30
starfive phy: starfive: jh7110-usb: Fix USB 2.0 host occasional detection failure 2025-05-14 09:45:12 +01:00
sunplus
tegra phy: tegra: xusb: fix device and OF node leak at probe 2025-08-12 21:30:00 +05:30
ti phy: ti: gmii-sel: Always write the RGMII ID setting 2025-09-01 22:00:58 +05:30
xilinx phy-zynqmp: Postpone getting clock rate until actually needed 2025-05-14 09:48:01 +01:00
Kconfig phy: phy-snps-eusb2: add support for exynos2200 2025-05-14 11:43:38 +01:00
Makefile phy: move phy-qcom-snps-eusb2 out of its vendor sub-directory 2025-05-14 11:43:37 +01:00
phy-airoha-pcie-regs.h phy: airoha: Fix REG_CSR_2L_RX{0,1}_REV0 definitions 2024-10-17 20:52:48 +05:30
phy-airoha-pcie.c phy: airoha: Fix REG_CSR_2L_JCPLL_SDM_HREN config in airoha_pcie_phy_init_ssc_jcpll() 2024-10-17 20:52:48 +05:30
phy-can-transceiver.c phy: can-transceiver: Re-instate "mux-states" property presence check 2025-04-11 17:00:15 +05:30
phy-core-mipi-dphy.c
phy-core.c phy: use per-PHY lockdep keys 2025-06-15 21:19:08 +05:30
phy-lgm-usb.c phy: Switch back to struct platform_driver::remove() 2024-10-17 20:33:03 +05:30
phy-lpc18xx-usb-otg.c
phy-nxp-ptn3222.c phy: add NXP PTN3222 eUSB2 to USB2 redriver 2024-10-17 20:48:27 +05:30
phy-pistachio-usb.c
phy-snps-eusb2.c phy-for-6.17 2025-08-01 12:31:50 -07:00
phy-xgene.c