Conor Dooley f4e700fd94 riscv: dts: microchip: remove unused pcie clocks ... The PCIe root port in the designs that ship with the PolarBerry and M100PFSEVP are connected via one, not two Fabric Interface Controllers (FIC). The one at 0x20_0000_0000 is fic0, so remove the fic1 clocks from the dt node. The same clock provides both, so this is harmless but inaccurate. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2022-11-17 19:22:44 +00:00
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Makefile	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-icicle-kit-fabric.dtsi	riscv: dts: microchip: fix the icicle's #pwm-cells	2022-11-14 22:16:03 +00:00
mpfs-icicle-kit.dts	riscv: dts: microchip: fix memory node unit address for icicle	2022-10-31 19:47:07 +00:00
mpfs-m100pfs-fabric.dtsi	riscv: dts: microchip: remove unused pcie clocks	2022-11-17 19:22:44 +00:00
mpfs-m100pfsevp.dts	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-polarberry-fabric.dtsi	riscv: dts: microchip: remove unused pcie clocks	2022-11-17 19:22:44 +00:00
mpfs-polarberry.dts	riscv: dts: microchip: mpfs: remove bogus card-detect-delay	2022-08-23 22:15:54 +01:00
mpfs-sev-kit-fabric.dtsi	riscv: dts: microchip: remove pcie node from the sev kit	2022-11-17 19:21:15 +00:00
mpfs-sev-kit.dts	riscv: dts: microchip: add sevkit device tree	2022-09-27 18:53:58 +01:00
mpfs.dtsi	riscv: dts: microchip: add the mpfs' fabric clock control	2022-10-19 17:32:44 +01:00