linux/drivers/soc/tegra
Jon Hunter e8014b2c83 soc/tegra: pmc: Add IO pads for Tegra264
Populate the IO pads and pins for Tegra264. Tegra264 has internal 1.8V
and 0.6V regulators that must be enabled when selecting the 1.8V mode
for the sdmmc1-hv IO pad. To support this a new 'ena_1v8' member is
added to the 'tegra_io_pad_vctrl' structure to populate the bits that
need to be set to enable these internal regulators. Although this is
enabling 1.8V (bit 1) and 0.6V (bit 2) regulators, it is simply called
'ena_1v8' because these are both enabled for 1.8V operation. Note that
these internal regulators are disabled when not using 1.8V mode.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-03-28 01:02:39 +01:00
..
cbb soc/tegra: cbb: Fix cross-fabric target timeout lookup 2026-03-27 15:30:54 +01:00
fuse Convert 'alloc_obj' family to use the new default GFP_KERNEL argument 2026-02-21 17:09:51 -08:00
Kconfig soc/tegra: Add Tegra238 Kconfig symbol 2026-03-25 10:47:50 +01:00
Makefile
ari-tegra186.c
common.c soc/tegra: common: Add Tegra114 support to devm_tegra_core_dev_init_opp_table 2026-03-28 01:02:38 +01:00
flowctrl.c
pmc.c soc/tegra: pmc: Add IO pads for Tegra264 2026-03-28 01:02:39 +01:00
regulators-tegra20.c
regulators-tegra30.c