mirror of https://github.com/torvalds/linux.git
4e6d24a309
Add cacheinfo support for OpenRISC. Currently, a few CPU cache attributes pertaining to OpenRISC processors are exposed along with other unrelated CPU attributes in the procfs file system (/proc/cpuinfo). However, a few cache attributes remain unexposed. Provide a mechanism that the generic cacheinfo infrastructure can employ to expose these attributes via the sysfs file system. These attributes can then be exposed in /sys/devices/system/cpu/cpuX/cache/indexN. Move the implementation to pull cache attributes from the processor's registers from arch/openrisc/kernel/setup.c with a few modifications. This implementation is based on similar work done for MIPS and LoongArch. Link: https://raw.githubusercontent.com/openrisc/doc/master/openrisc-arch-1.4-rev0.pdf Signed-off-by: Sahil Siddiq <sahilcdq0@gmail.com> Signed-off-by: Stafford Horne <shorne@gmail.com> |
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| .. | ||
| .gitignore | ||
| Makefile | ||
| Makefile.syscalls | ||
| asm-offsets.c | ||
| cacheinfo.c | ||
| dma.c | ||
| entry.S | ||
| head.S | ||
| irq.c | ||
| module.c | ||
| or32_ksyms.c | ||
| process.c | ||
| prom.c | ||
| ptrace.c | ||
| setup.c | ||
| signal.c | ||
| smp.c | ||
| stacktrace.c | ||
| sync-timer.c | ||
| sys_call_table.c | ||
| time.c | ||
| traps.c | ||
| unwinder.c | ||
| vmlinux.h | ||
| vmlinux.lds.S | ||