mirror of https://github.com/torvalds/linux.git
130 lines
3.1 KiB
YAML
130 lines
3.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/eswin,eic7700-eth.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Eswin EIC7700 SOC Eth Controller
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maintainers:
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- Shuang Liang <liangshuang@eswincomputing.com>
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- Zhi Li <lizhi2@eswincomputing.com>
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- Shangjuan Wei <weishangjuan@eswincomputing.com>
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description:
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Platform glue layer implementation for STMMAC Ethernet driver.
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select:
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properties:
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compatible:
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contains:
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enum:
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- eswin,eic7700-qos-eth
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required:
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- compatible
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allOf:
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- $ref: snps,dwmac.yaml#
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properties:
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compatible:
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items:
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- const: eswin,eic7700-qos-eth
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- const: snps,dwmac-5.20
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-names:
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const: macirq
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clocks:
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items:
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- description: AXI clock
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- description: Configuration clock
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- description: GMAC main clock
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- description: Tx clock
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clock-names:
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items:
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- const: axi
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- const: cfg
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- const: stmmaceth
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- const: tx
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: stmmaceth
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rx-internal-delay-ps:
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enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
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tx-internal-delay-ps:
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enum: [0, 200, 600, 1200, 1600, 1800, 2000, 2200, 2400]
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eswin,hsp-sp-csr:
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description:
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HSP CSR is to control and get status of different high-speed peripherals
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(such as Ethernet, USB, SATA, etc.) via register, which can tune
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board-level's parameters of PHY, etc.
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: Phandle to HSP(High-Speed Peripheral) device
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- description: Offset of phy control register for internal
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or external clock selection
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- description: Offset of AXI clock controller Low-Power request
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register
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- description: Offset of register controlling TX/RX clock delay
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- interrupt-names
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- phy-mode
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- resets
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- reset-names
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- rx-internal-delay-ps
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- tx-internal-delay-ps
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- eswin,hsp-sp-csr
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unevaluatedProperties: false
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examples:
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- |
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ethernet@50400000 {
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compatible = "eswin,eic7700-qos-eth", "snps,dwmac-5.20";
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reg = <0x50400000 0x10000>;
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clocks = <&d0_clock 186>, <&d0_clock 171>, <&d0_clock 40>,
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<&d0_clock 193>;
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clock-names = "axi", "cfg", "stmmaceth", "tx";
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interrupt-parent = <&plic>;
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interrupts = <61>;
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interrupt-names = "macirq";
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phy-mode = "rgmii-id";
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phy-handle = <&phy0>;
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resets = <&reset 95>;
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reset-names = "stmmaceth";
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rx-internal-delay-ps = <200>;
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tx-internal-delay-ps = <200>;
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eswin,hsp-sp-csr = <&hsp_sp_csr 0x100 0x108 0x118>;
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snps,axi-config = <&stmmac_axi_setup>;
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snps,aal;
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snps,fixed-burst;
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snps,tso;
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stmmac_axi_setup: stmmac-axi-config {
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snps,blen = <0 0 0 0 16 8 4>;
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snps,rd_osr_lmt = <2>;
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snps,wr_osr_lmt = <2>;
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};
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};
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