linux/arch/x86/mm
Dave Hansen 94a17f2dc9 x86/mm: Disable INVLPGB when PTI is enabled
PTI uses separate ASIDs (aka. PCIDs) for kernel and user address
spaces. When the kernel needs to flush the user address space, it
just sets a bit in a bitmap and then flushes the entire PCID on
the next switch to userspace.

This bitmap is a single 'unsigned long' which is plenty for all 6
dynamic ASIDs. But, unfortunately, the INVLPGB support brings along a
bunch more user ASIDs, as many as ~2k more. The bitmap can't address
that many.

Fortunately, the bitmap is only needed for PTI and all the CPUs
with INVLPGB are AMD CPUs that aren't vulnerable to Meltdown and
don't need PTI. The only way someone can run into an issue in
practice is by booting with pti=on on a newer AMD CPU.

Disable INVLPGB if PTI is enabled. Avoid overrunning the small
bitmap.

Note: this will be fixed up properly by making the bitmap bigger.
For now, just avoid the mostly theoretical bug.

Fixes: 4afeb0ed17 ("x86/mm: Enable broadcast TLB invalidation for multi-threaded processes")
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Rik van Riel <riel@surriel.com>
Cc:stable@vger.kernel.org
Link: https://lore.kernel.org/all/20250610222420.E8CBF472%40davehans-spike.ostc.intel.com
2025-06-17 15:36:57 -07:00
..
pat x86/mm/pat: don't collapse pages without PSE set 2025-06-11 11:20:51 +02:00
Makefile Move the x86 page fault tracepoints to generic code, because 2025-05-26 21:18:59 -07:00
amdtopology.c
cpu_entry_area.c
debug_pagetables.c
dump_pagetables.c
extable.c
fault.c Move the x86 page fault tracepoints to generic code, because 2025-05-26 21:18:59 -07:00
hugetlbpage.c
ident_map.c
init.c x86/mm/64: Make 5-level paging support unconditional 2025-05-17 10:38:16 +02:00
init_32.c Revert "mm/execmem: Unify early execmem_cache behaviour" 2025-06-11 11:20:52 +02:00
init_64.c Revert "mm/execmem: Unify early execmem_cache behaviour" 2025-06-11 11:20:52 +02:00
iomap_32.c
ioremap.c mm, x86: use for_each_valid_pfn() from __ioremap_check_ram() 2025-05-12 23:50:44 -07:00
kasan_init_64.c
kaslr.c
kmmio.c
kmsan_shadow.c
maccess.c
mem_encrypt.c
mem_encrypt_amd.c
mem_encrypt_boot.S
mm_internal.h
mmap.c
mmio-mod.c
numa.c Merge branch 'x86/mm' into x86/core, to resolve conflicts 2025-05-13 10:39:22 +02:00
pf_in.c
pf_in.h
pgprot.c
pgtable.c - The 11 patch series "Add folio_mk_pte()" from Matthew Wilcox 2025-05-31 15:44:16 -07:00
pgtable_32.c
physaddr.c
physaddr.h
pkeys.c
pti.c x86/mm: Disable INVLPGB when PTI is enabled 2025-06-17 15:36:57 -07:00
srat.c
testmmiotrace.c
tlb.c Merge branch 'x86/msr' into x86/core, to resolve conflicts 2025-05-13 10:42:06 +02:00