linux/arch/riscv/kernel
Anup Patel 6a1ce99dc4
RISC-V: Don't enable all interrupts in trap_init()
Historically, we have been enabling all interrupts for each
HART in trap_init(). Ideally, we should only enable M-mode
interrupts for M-mode kernel and S-mode interrupts for S-mode
kernel in trap_init().

Currently, we get suprious S-mode interrupts on Kendryte K210
board running M-mode NO-MMU kernel because we are enabling all
interrupts in trap_init(). To fix this, we only enable software
and external interrupt in trap_init(). In future, trap_init()
will only enable software interrupt and PLIC driver will enable
external interrupt using CPU notifiers.

Fixes: a4c3733d32 ("riscv: abstract out CSR names for supervisor vs machine mode")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Palmer Dabbelt <palmerdabbelt@google.com> [QMEU virt machine with SMP]
[Palmer: Move the Fixes up to a newer commit]
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-02-18 10:34:04 -08:00
..
vdso riscv: delete temporary files 2020-01-18 13:22:13 -08:00
.gitignore
Makefile
asm-offsets.c
cacheinfo.c
clint.c
cpu.c
cpufeature.c
entry.S Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2020-01-28 10:07:09 -08:00
fpu.S
ftrace.c riscv: ftrace: correct the condition logic in function graph tracer 2020-01-03 00:56:37 -08:00
head.S riscv: set pmp configuration if kernel is running in M-mode 2020-02-18 09:41:24 -08:00
head.h
irq.c riscv: prefix IRQ_ macro names with an RV_ namespace 2020-01-04 21:48:59 -08:00
mcount-dyn.S
mcount.S
module-sections.c
module.c
module.lds
perf_callchain.c
perf_event.c
perf_regs.c
process.c riscv: Implement copy_thread_tls 2020-01-07 13:31:23 +01:00
ptrace.c
reset.c
riscv_ksyms.c riscv: Add KASAN support 2020-01-22 13:09:58 -08:00
sbi.c
setup.c RISC-V Patches for the 5.6 Merge Window, Part 1 2020-01-31 11:23:29 -08:00
signal.c
smp.c
smpboot.c
stacktrace.c
sys_riscv.c
syscall_table.c
time.c
traps.c RISC-V: Don't enable all interrupts in trap_init() 2020-02-18 10:34:04 -08:00
vdso.c
vmlinux.lds.S riscv: Add KASAN support 2020-01-22 13:09:58 -08:00