mirror of https://github.com/torvalds/linux.git
2d99a7ec25
[Why] Currently, the clk manager matches SocVoltage with voltage from fused settings (dfPstate clock table). And then corresponding clocks are selected. However in certain situations, this leads to clk manager not including at least one entry with highest supported clock setting. [How] Update the clk manager to include at least one entry with highest supported clock setting. Reviewed-by: Pavle Kotarac <pavle.kotarac@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Swapnil Patel <Swapnil.Patel@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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|---|---|---|
| .. | ||
| dce60 | ||
| dce100 | ||
| dce110 | ||
| dce112 | ||
| dce120 | ||
| dcn10 | ||
| dcn20 | ||
| dcn21 | ||
| dcn30 | ||
| dcn31 | ||
| dcn32 | ||
| dcn201 | ||
| dcn301 | ||
| dcn314 | ||
| dcn315 | ||
| dcn316 | ||
| Makefile | ||
| clk_mgr.c | ||