Charlie Jenkins 3582ce0d7c riscv: selftests: Fix vsetivli args for clang ... Clang does not support implicit LMUL in the vset* instruction sequences. Introduce an explicit LMUL in the vsetivli instruction. Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> Fixes: 9d5328eeb1 ("riscv: selftests: Add signal handling vector tests") Link: https://lore.kernel.org/r/20240702-fix_sigreturn_test-v1-1-485f88a80612@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2024-07-03 13:04:54 -07:00
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hwprobe	riscv: selftests: Add hwprobe binaries to .gitignore	2024-05-22 16:12:51 -07:00
mm	Merge patch series "riscv: mm: Extend mappable memory up to hint address"	2024-03-15 10:17:34 -07:00
sigreturn	riscv: selftests: Fix vsetivli args for clang	2024-07-03 13:04:54 -07:00
vector	Merge patch series "tools: selftests: riscv: Fix compiler warnings"	2024-01-11 08:02:55 -08:00
Makefile	riscv: selftests: Add signal handling vector tests	2024-05-22 16:12:57 -07:00