Krzysztof Kozlowski 0699018b41 drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify saving ... Add bitfields for PHY_CMN_CLK_CFG0 and PHY_CMN_CLK_CFG1 registers to avoid hard-coding bit masks and shifts and make the code a bit more readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/638324/ Link: https://lore.kernel.org/r/20250219-drm-msm-phy-pll-cfg-reg-v5-2-d28973fa513a@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>		2025-02-26 12:15:49 +02:00
..
phy	drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify saving	2025-02-26 12:15:49 +02:00
dsi.c	Get rid of 'remove_new' relic from platform driver struct	2024-12-01 15:12:43 -08:00
dsi.h	drm/msm/dsi: parse vsync source from device tree	2024-06-24 19:41:05 +03:00
dsi_cfg.c	drm/msm/dsi: Add support for SM6150	2024-12-15 14:37:20 +02:00
dsi_cfg.h	drm/msm/dsi: Add support for SM6150	2024-12-15 14:37:20 +02:00
dsi_host.c	drm/msm/dsi: Add check for devm_kstrdup()	2025-02-26 12:15:49 +02:00
dsi_manager.c	drm/msm/dsi: Set PHY usescase (and mode) before registering DSI host	2025-02-26 12:15:49 +02:00