mirror of https://github.com/torvalds/linux.git
18aecc2b64
This support was partially present in the existing code (look for "__tilegx__" ifdefs) but with this change you can build a working kernel using the TILE-Gx toolchain and ARCH=tilegx. Most of these files are new, generally adding a foo_64.c file where previously there was just a foo_32.c file. The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx, using the existing SRCARCH mechanism in the top-level Makefile. Changes to existing files: - <asm/bitops.h> and <asm/bitops_32.h> changed to factor the include of <asm-generic/bitops/non-atomic.h> in the common header. - <asm/compat.h> and arch/tile/kernel/compat.c changed to remove the "const" markers I had put on compat_sys_execve() when trying to match some recent similar changes to the non-compat execve. It turns out the compat version wasn't "upgraded" to use const. - <asm/opcode-tile_64.h> and <asm/opcode_constants_64.h> were previously included accidentally, with the 32-bit contents. Now they have the proper 64-bit contents. Finally, I had to hack the existing hacky drivers/input/input-compat.h to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64). Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> [drivers/input] |
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| .. | ||
| Makefile | ||
| atomic_32.c | ||
| atomic_asm_32.S | ||
| cacheflush.c | ||
| checksum.c | ||
| cpumask.c | ||
| delay.c | ||
| exports.c | ||
| memchr_32.c | ||
| memchr_64.c | ||
| memcpy_32.S | ||
| memcpy_64.c | ||
| memcpy_tile64.c | ||
| memcpy_user_64.c | ||
| memmove.c | ||
| memset_32.c | ||
| memset_64.c | ||
| spinlock_32.c | ||
| spinlock_64.c | ||
| spinlock_common.h | ||
| strchr_32.c | ||
| strchr_64.c | ||
| strlen_32.c | ||
| strlen_64.c | ||
| uaccess.c | ||
| usercopy_32.S | ||
| usercopy_64.S | ||