mirror of https://github.com/torvalds/linux.git
a7195a3d67
Correct the Mode Control Register (MODCTRL) offset for RZ/N MIIC.
According to the R-IN Engine and Ethernet Peripherals Manual (Rev.1.30)
[0], Table 10.1 "Ethernet Accessory Register List", MODCTRL is at offset
0x8, not 0x20 as previously defined.
Offset 0x20 actually maps to the Port Trigger Control Register (PTCTRL),
which controls PTP_MODE[3:0] and RGMII_CLKSEL[4]. Using this incorrect
definition prevented the driver from configuring the SW_MODE[4:0] bits
in MODCTRL, which control the internal connection of Ethernet ports. As
a result, the MIIC could not be switched into the correct mode, leading
to link setup failures and non-functional Ethernet ports on affected
systems.
[0] https://www.renesas.com/en/document/mah/rzn1d-group-rzn1s-group-rzn1l-group-users-manual-r-engine-and-ethernet-peripherals?r=1054571
Fixes:
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| pcs-lynx.c | ||
| pcs-mtk-lynxi.c | ||
| pcs-rzn1-miic.c | ||
| pcs-xpcs-nxp.c | ||
| pcs-xpcs-plat.c | ||
| pcs-xpcs-wx.c | ||
| pcs-xpcs.c | ||
| pcs-xpcs.h | ||