linux/drivers/clk/tegra
Stephen Boyd 112104e2b7
Merge branch 'clk-determine-rate' into clk-next
* clk-determine-rate: (120 commits)
  clk: microchip: core: remove duplicate roclk_determine_rate()
  clk: nxp: Fix pll0 rate check condition in LPC18xx CGU driver
  clk: scmi: migrate round_rate() to determine_rate()
  clk: ti: fapll: convert from round_rate() to determine_rate()
  clk: ti: dra7-atl: convert from round_rate() to determine_rate()
  clk: ti: divider: convert from round_rate() to determine_rate()
  clk: ti: composite: convert from round_rate() to determine_rate()
  clk: ti: dpll: convert from round_rate() to determine_rate()
  clk: ti: dpll: change error return from ~0 to -EINVAL
  clk: ti: dpll: remove round_rate() in favor of determine_rate()
  clk: tegra: tegra210-emc: convert from round_rate() to determine_rate()
  clk: tegra: super: convert from round_rate() to determine_rate()
  clk: tegra: pll: convert from round_rate() to determine_rate()
  clk: tegra: periph: divider: convert from round_rate() to determine_rate()
  clk: tegra: divider: convert from round_rate() to determine_rate()
  clk: tegra: audio-sync: convert from round_rate() to determine_rate()
  clk: fixed-factor: drop round_rate() clk ops
  clk: divider: remove round_rate() in favor of determine_rate()
  clk: visconti: pll: convert from round_rate() to determine_rate()
  clk: versatile: vexpress-osc: convert from round_rate() to determine_rate()
  ...
2025-10-06 13:02:50 -05:00
..
Kconfig clk: tegra: dfll: Add CVB tables for Tegra114 2025-09-14 08:23:28 +02:00
Makefile
clk-audio-sync.c clk: tegra: audio-sync: convert from round_rate() to determine_rate() 2025-09-08 12:50:34 -04:00
clk-bpmp.c clk: tegra: do not overallocate memory for bpmp clocks 2025-09-21 13:09:12 -07:00
clk-device.c
clk-dfll.c clk: tegra: Remove redundant semicolons 2025-08-14 13:25:25 -07:00
clk-dfll.h
clk-divider.c clk: tegra: divider: convert from round_rate() to determine_rate() 2025-09-08 12:50:38 -04:00
clk-id.h
clk-periph-fixed.c
clk-periph-gate.c
clk-periph.c clk: tegra: periph: divider: convert from round_rate() to determine_rate() 2025-09-08 12:50:41 -04:00
clk-pll-out.c
clk-pll.c clk: tegra: pll: convert from round_rate() to determine_rate() 2025-09-08 12:50:44 -04:00
clk-sdmmc-mux.c
clk-super.c clk: tegra: super: convert from round_rate() to determine_rate() 2025-09-08 12:50:47 -04:00
clk-tegra-audio.c
clk-tegra-fixed.c
clk-tegra-periph.c
clk-tegra-super-cclk.c
clk-tegra-super-gen4.c
clk-tegra20-emc.c
clk-tegra20.c
clk-tegra30.c dt-bindings: clock: tegra30: Add IDs for CSI pad clocks 2025-09-11 18:03:10 +02:00
clk-tegra114.c clk: tegra: Add DFLL DVCO reset control for Tegra114 2025-09-11 18:29:48 +02:00
clk-tegra124-dfll-fcpu.c clk: tegra: dfll: Add CVB tables for Tegra114 2025-09-14 08:23:28 +02:00
clk-tegra124-emc.c
clk-tegra124.c
clk-tegra210-emc.c clk: tegra: tegra210-emc: convert from round_rate() to determine_rate() 2025-09-08 12:50:51 -04:00
clk-tegra210.c clk: Fix typos 2025-07-26 23:49:18 -07:00
clk-utils.c
clk.c
clk.h clk: tegra: Add DFLL DVCO reset control for Tegra114 2025-09-11 18:29:48 +02:00
cvb.c
cvb.h