Conor Dooley 561add0da6 riscv: dts: microchip: convert isa detection to new properties ... Convert the PolarFire SoC devicetrees to use the new properties "riscv,isa-base" & "riscv,isa-extensions". For compatibility with other projects, "riscv,isa" remains. Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2023-10-15 13:16:05 +01:00
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Makefile	Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"	2023-01-25 11:09:32 +00:00
mpfs-icicle-kit-fabric.dtsi	riscv: dts: microchip: fix the icicle's #pwm-cells	2022-11-14 22:16:03 +00:00
mpfs-icicle-kit.dts	riscv: dts: microchip: fix memory node unit address for icicle	2022-10-31 19:47:07 +00:00
mpfs-m100pfs-fabric.dtsi	riscv: dts: microchip: remove unused pcie clocks	2022-11-17 19:22:44 +00:00
mpfs-m100pfsevp.dts	riscv: dts: microchip: add a devicetree for aries' m100pfsevp	2022-09-27 18:53:58 +01:00
mpfs-polarberry-fabric.dtsi	riscv: dts: microchip: remove unused pcie clocks	2022-11-17 19:22:44 +00:00
mpfs-polarberry.dts	riscv: dts: microchip: mpfs: remove bogus card-detect-delay	2022-08-23 22:15:54 +01:00
mpfs-sev-kit-fabric.dtsi	riscv: dts: microchip: remove pcie node from the sev kit	2022-11-17 19:21:15 +00:00
mpfs-sev-kit.dts	riscv: dts: microchip: add sevkit device tree	2022-09-27 18:53:58 +01:00
mpfs-tysom-m-fabric.dtsi	riscv: dts: microchip: add the Aldec TySoM's devicetree	2023-01-25 11:05:31 +00:00
mpfs-tysom-m.dts	riscv: dts: microchip: add the Aldec TySoM's devicetree	2023-01-25 11:05:31 +00:00
mpfs.dtsi	riscv: dts: microchip: convert isa detection to new properties	2023-10-15 13:16:05 +01:00