linux/arch/powerpc/sysdev
Cédric Le Goater 6f779e1d35 powerpc/xive: Discard disabled interrupts in get_irqchip_state()
When an interrupt is passed through, the KVM XIVE device calls the
set_vcpu_affinity() handler which raises the P bit to mask the
interrupt and to catch any in-flight interrupts while routing the
interrupt to the guest.

On the guest side, drivers (like some Intels) can request at probe
time some MSIs and call synchronize_irq() to check that there are no
in flight interrupts. This will call the XIVE get_irqchip_state()
handler which will always return true as the interrupt P bit has been
set on the host side and lock the CPU in an infinite loop.

Fix that by discarding disabled interrupts in get_irqchip_state().

Fixes: da15c03b04 ("powerpc/xive: Implement get_irqchip_state method for XIVE to fix shutdown race")
Cc: stable@vger.kernel.org #v5.4+
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Tested-by: seeteena <s1seetee@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20211011070203.99726-1-clg@kaod.org
2021-10-13 16:38:55 +11:00
..
ge
xics powerpc/xics: Set the IRQ chip data for the ICS native backend 2021-09-15 22:05:53 +10:00
xive powerpc/xive: Discard disabled interrupts in get_irqchip_state() 2021-10-13 16:38:55 +11:00
6xx-suspend.S
Kconfig
Makefile
cpm2.c
cpm2_pic.c
cpm2_pic.h
cpm_common.c
cpm_gpio.c
dart.h
dart_iommu.c
dcr-low.S
dcr.c
ehv_pic.c
fsl_85xx_cache_ctlr.h
fsl_85xx_cache_sram.c
fsl_85xx_l2ctlr.c
fsl_gtm.c
fsl_lbc.c
fsl_mpic_err.c
fsl_mpic_timer_wakeup.c
fsl_msi.c
fsl_msi.h
fsl_pci.c
fsl_pci.h
fsl_pmc.c
fsl_rcpm.c
fsl_rio.c powerpc: Refactor verification of MSR_RI 2021-08-26 21:21:07 +10:00
fsl_rio.h
fsl_rmu.c
fsl_soc.c
fsl_soc.h
grackle.c
i8259.c
indirect_pci.c
ipic.c
ipic.h
mmio_nvram.c
mpc5xxx_clocks.c
mpic.c
mpic.h
mpic_msgr.c
mpic_msi.c
mpic_timer.c
mpic_u3msi.c
msi_bitmap.c
of_rtc.c
pmi.c
rtc_cmos_setup.c
tsi108_dev.c
tsi108_pci.c
udbg_memcons.c