linux/drivers/gpu/drm/amd/display/dc/inc
Qili Lu f5a972dfe3 drm/amd/display: fix dccg root clock optimization related hang
[Why]
enable dpp rcg before we disable dppclk in hw_init cause system
hang/reboot

[How]
we remove dccg rcg related code from init into a separate function and
call it after we init pipe

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Qili Lu <qili.lu@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-09-06 17:41:07 -04:00
..
hw drm/amd/display: fix dccg root clock optimization related hang 2024-09-06 17:41:07 -04:00
bw_fixed.h
clock_source.h drm/amd/display: Refactor input mode programming for DIG FIFO 2024-05-08 14:57:04 -04:00
compressor.h
core_status.h
core_types.h drm/amd/display: Export additional FAMS2 global configuration options from DML 2024-07-23 17:07:12 -04:00
custom_float.h
dce_calcs.h
dcn_calc_math.h
dcn_calcs.h drm/amd/display: Includes adjustments 2024-04-09 22:07:09 -04:00
link.h drm/amd/display: Extend PSRSU residency mode 2024-06-14 15:20:40 -04:00
link_enc_cfg.h
link_hwss.h
reg_helper.h
resource.h drm/amd/display: Update HPO I/O When Handling Link Retrain Automation Request 2024-08-20 22:14:13 -04:00
vm_helper.h