mirror of https://github.com/torvalds/linux.git
LoongArch maintains cache coherency in hardware, but its WUC attribute (Weak-ordered UnCached, which is similar to WC) is out of the scope of cache coherency machanism. This means WUC can only used for write-only memory regions. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> |
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| .. | ||
| Makefile | ||
| ttm_agp_backend.c | ||
| ttm_bo.c | ||
| ttm_bo_util.c | ||
| ttm_bo_vm.c | ||
| ttm_device.c | ||
| ttm_execbuf_util.c | ||
| ttm_module.c | ||
| ttm_module.h | ||
| ttm_pool.c | ||
| ttm_range_manager.c | ||
| ttm_resource.c | ||
| ttm_sys_manager.c | ||
| ttm_tt.c | ||