mirror of https://github.com/torvalds/linux.git
c3bb8d4f5d
Currently, PL4 and MSR-based RAPL PMU support are detected using separate CPU ID tables (pl4_support_ids and pmu_support_ids) in the MSR driver probe path. This creates a maintenance burden since adding a new CPU requires updates in two places: the rapl_ids table and one or both of these capability tables. Consolidate PL4 and PMU capability information directly into struct rapl_defaults by adding msr_pl4_support and msr_pmu_support flags. This allows per-CPU capability to be expressed in a single place alongside other per-CPU defaults, eliminating the duplicate CPU ID tables entirely. No functional changes are intended. Co-developed-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Zhang Rui <rui.zhang@intel.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Link: https://patch.msgid.link/20260331211950.3329932-8-sathyanarayanan.kuppuswamy@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| arm_scmi_powercap.c | ||
| dtpm.c | ||
| dtpm_cpu.c | ||
| dtpm_devfreq.c | ||
| dtpm_subsys.h | ||
| idle_inject.c | ||
| intel_rapl_common.c | ||
| intel_rapl_msr.c | ||
| intel_rapl_tpmi.c | ||
| powercap_sys.c | ||