mirror of https://github.com/torvalds/linux.git
303 lines
8.3 KiB
Rust
303 lines
8.3 KiB
Rust
// SPDX-License-Identifier: GPL-2.0
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use kernel::{
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device,
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devres::Devres,
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fmt,
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pci,
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prelude::*,
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sync::Arc, //
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};
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use crate::{
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driver::Bar0,
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falcon::{
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gsp::Gsp as GspFalcon,
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sec2::Sec2 as Sec2Falcon,
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Falcon, //
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},
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fb::SysmemFlush,
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gfw,
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gsp::Gsp,
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regs,
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};
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macro_rules! define_chipset {
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({ $($variant:ident = $value:expr),* $(,)* }) =>
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{
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/// Enum representation of the GPU chipset.
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#[derive(fmt::Debug, Copy, Clone, PartialOrd, Ord, PartialEq, Eq)]
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pub(crate) enum Chipset {
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$($variant = $value),*,
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}
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impl Chipset {
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pub(crate) const ALL: &'static [Chipset] = &[
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$( Chipset::$variant, )*
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];
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::kernel::macros::paste!(
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/// Returns the name of this chipset, in lowercase.
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///
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/// # Examples
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///
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/// ```
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/// let chipset = Chipset::GA102;
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/// assert_eq!(chipset.name(), "ga102");
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/// ```
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pub(crate) const fn name(&self) -> &'static str {
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match *self {
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$(
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Chipset::$variant => stringify!([<$variant:lower>]),
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)*
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}
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}
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);
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}
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// TODO[FPRI]: replace with something like derive(FromPrimitive)
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impl TryFrom<u32> for Chipset {
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type Error = kernel::error::Error;
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fn try_from(value: u32) -> Result<Self, Self::Error> {
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match value {
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$( $value => Ok(Chipset::$variant), )*
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_ => Err(ENODEV),
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}
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}
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}
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}
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}
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define_chipset!({
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// Turing
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TU102 = 0x162,
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TU104 = 0x164,
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TU106 = 0x166,
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TU117 = 0x167,
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TU116 = 0x168,
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// Ampere
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GA100 = 0x170,
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GA102 = 0x172,
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GA103 = 0x173,
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GA104 = 0x174,
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GA106 = 0x176,
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GA107 = 0x177,
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// Ada
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AD102 = 0x192,
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AD103 = 0x193,
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AD104 = 0x194,
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AD106 = 0x196,
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AD107 = 0x197,
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});
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impl Chipset {
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pub(crate) fn arch(&self) -> Architecture {
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match self {
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Self::TU102 | Self::TU104 | Self::TU106 | Self::TU117 | Self::TU116 => {
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Architecture::Turing
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}
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Self::GA100 | Self::GA102 | Self::GA103 | Self::GA104 | Self::GA106 | Self::GA107 => {
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Architecture::Ampere
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}
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Self::AD102 | Self::AD103 | Self::AD104 | Self::AD106 | Self::AD107 => {
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Architecture::Ada
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}
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}
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}
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}
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// TODO
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//
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// The resulting strings are used to generate firmware paths, hence the
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// generated strings have to be stable.
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//
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// Hence, replace with something like strum_macros derive(Display).
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//
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// For now, redirect to fmt::Debug for convenience.
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impl fmt::Display for Chipset {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(f, "{self:?}")
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}
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}
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/// Enum representation of the GPU generation.
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///
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/// TODO: remove the `Default` trait implementation, and the `#[default]`
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/// attribute, once the register!() macro (which creates Architecture items) no
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/// longer requires it for read-only fields.
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#[derive(fmt::Debug, Default, Copy, Clone)]
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#[repr(u8)]
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pub(crate) enum Architecture {
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#[default]
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Turing = 0x16,
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Ampere = 0x17,
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Ada = 0x19,
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}
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impl TryFrom<u8> for Architecture {
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type Error = Error;
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fn try_from(value: u8) -> Result<Self> {
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match value {
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0x16 => Ok(Self::Turing),
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0x17 => Ok(Self::Ampere),
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0x19 => Ok(Self::Ada),
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_ => Err(ENODEV),
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}
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}
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}
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impl From<Architecture> for u8 {
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fn from(value: Architecture) -> Self {
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// CAST: `Architecture` is `repr(u8)`, so this cast is always lossless.
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value as u8
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}
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}
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pub(crate) struct Revision {
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major: u8,
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minor: u8,
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}
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impl From<regs::NV_PMC_BOOT_42> for Revision {
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fn from(boot0: regs::NV_PMC_BOOT_42) -> Self {
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Self {
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major: boot0.major_revision(),
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minor: boot0.minor_revision(),
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}
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}
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}
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impl fmt::Display for Revision {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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write!(f, "{:x}.{:x}", self.major, self.minor)
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}
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}
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/// Structure holding a basic description of the GPU: `Chipset` and `Revision`.
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pub(crate) struct Spec {
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chipset: Chipset,
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revision: Revision,
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}
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impl Spec {
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fn new(dev: &device::Device, bar: &Bar0) -> Result<Spec> {
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// Some brief notes about boot0 and boot42, in chronological order:
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//
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// NV04 through NV50:
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//
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// Not supported by Nova. boot0 is necessary and sufficient to identify these GPUs.
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// boot42 may not even exist on some of these GPUs.
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//
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// Fermi through Volta:
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//
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// Not supported by Nova. boot0 is still sufficient to identify these GPUs, but boot42
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// is also guaranteed to be both present and accurate.
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//
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// Turing and later:
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//
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// Supported by Nova. Identified by first checking boot0 to ensure that the GPU is not
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// from an earlier (pre-Fermi) era, and then using boot42 to precisely identify the GPU.
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// Somewhere in the Rubin timeframe, boot0 will no longer have space to add new GPU IDs.
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let boot0 = regs::NV_PMC_BOOT_0::read(bar);
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if boot0.is_older_than_fermi() {
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return Err(ENODEV);
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}
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let boot42 = regs::NV_PMC_BOOT_42::read(bar);
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Spec::try_from(boot42).inspect_err(|_| {
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dev_err!(dev, "Unsupported chipset: {}\n", boot42);
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})
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}
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}
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impl TryFrom<regs::NV_PMC_BOOT_42> for Spec {
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type Error = Error;
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fn try_from(boot42: regs::NV_PMC_BOOT_42) -> Result<Self> {
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Ok(Self {
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chipset: boot42.chipset()?,
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revision: boot42.into(),
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})
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}
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}
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impl fmt::Display for Spec {
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fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
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f.write_fmt(fmt!(
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"Chipset: {}, Architecture: {:?}, Revision: {}",
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self.chipset,
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self.chipset.arch(),
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self.revision
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))
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}
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}
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/// Structure holding the resources required to operate the GPU.
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#[pin_data]
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pub(crate) struct Gpu {
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spec: Spec,
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/// MMIO mapping of PCI BAR 0
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bar: Arc<Devres<Bar0>>,
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/// System memory page required for flushing all pending GPU-side memory writes done through
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/// PCIE into system memory, via sysmembar (A GPU-initiated HW memory-barrier operation).
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sysmem_flush: SysmemFlush,
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/// GSP falcon instance, used for GSP boot up and cleanup.
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gsp_falcon: Falcon<GspFalcon>,
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/// SEC2 falcon instance, used for GSP boot up and cleanup.
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sec2_falcon: Falcon<Sec2Falcon>,
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/// GSP runtime data. Temporarily an empty placeholder.
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#[pin]
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gsp: Gsp,
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}
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impl Gpu {
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pub(crate) fn new<'a>(
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pdev: &'a pci::Device<device::Bound>,
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devres_bar: Arc<Devres<Bar0>>,
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bar: &'a Bar0,
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) -> impl PinInit<Self, Error> + 'a {
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try_pin_init!(Self {
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spec: Spec::new(pdev.as_ref(), bar).inspect(|spec| {
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dev_info!(pdev.as_ref(),"NVIDIA ({})\n", spec);
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})?,
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// We must wait for GFW_BOOT completion before doing any significant setup on the GPU.
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_: {
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gfw::wait_gfw_boot_completion(bar)
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.inspect_err(|_| dev_err!(pdev.as_ref(), "GFW boot did not complete"))?;
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},
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sysmem_flush: SysmemFlush::register(pdev.as_ref(), bar, spec.chipset)?,
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gsp_falcon: Falcon::new(
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pdev.as_ref(),
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spec.chipset,
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)
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.inspect(|falcon| falcon.clear_swgen0_intr(bar))?,
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sec2_falcon: Falcon::new(pdev.as_ref(), spec.chipset)?,
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gsp <- Gsp::new(pdev)?,
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_: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon)? },
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bar: devres_bar,
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})
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}
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/// Called when the corresponding [`Device`](device::Device) is unbound.
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///
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/// Note: This method must only be called from `Driver::unbind`.
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pub(crate) fn unbind(&self, dev: &device::Device<device::Core>) {
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kernel::warn_on!(self
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.bar
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.access(dev)
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.inspect(|bar| self.sysmem_flush.unregister(bar))
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.is_err());
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}
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}
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