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3 Commits

Author SHA1 Message Date
Stanley.Yang 4c4a891496 drm/amdgpu: Register aqua vanjaram vcn poison irq 
Register aqua vanjaram vcn poison irq, add vcn poison handle.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-05-22 12:01:24 -04:00
Lijo Lazar 0b9647d40e drm/amdgpu: Add offset normalization in VCN v5.0.1 
VCN v5.0.1 also will need register offset normalization. Reuse the logic
from VCN v4.0.3. Also, avoid HDP flush similar to VCN v4.0.3

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2025-03-05 10:37:35 -05:00
James Zhu b889ef4ac9 drm/amdgpu/vcn: add vcn support for VCN4_0_3 
Add vcn support for VCN4_0_3.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:41:27 -04:00