mirror of https://github.com/torvalds/linux.git
257 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Rob Herring
|
8d665693c2 |
dt-bindings: interrupt-controller: arm,gic: Fix schema errors in example
Validating the examples against the schema have a few errors: arm,gic.example.dt.yaml: 'ranges' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+' arm,gic.example.dt.yaml: #address-cells:0:0: 2 is not one of [0, 1] arm,gic.example.dt.yaml: #size-cells:0:0: 1 was expected 'ranges' is valid, but missing from the schema, so add it. The reg addresses and sizes don't match the schema requirements and the example template. We could just override the example template to use 64-bit addresses, but there's not really any value showing that in the example. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> |
|
Mauro Carvalho Chehab
|
dfab99544c |
dt: fix refs that were renamed to json with the same file name
These files were converted to json-schema, but the references weren't
renamed.
Fixes:
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Linus Torvalds
|
d9351ea14d |
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull IRQ chip updates from Ingo Molnar:
"A late irqchips update:
- New TI INTR/INTA set of drivers
- Rewrite of the stm32mp1-exti driver as a platform driver
- Update the IOMMU MSI mapping API to be RT friendly
- A number of cleanups and other low impact fixes"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits)
iommu/dma-iommu: Remove iommu_dma_map_msi_msg()
irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg()
irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg()
irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg()
irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg()
iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts
genirq/msi: Add a new field in msi_desc to store an IOMMU cookie
arm64: arch_k3: Enable interrupt controller drivers
irqchip/ti-sci-inta: Add msi domain support
soc: ti: Add MSI domain bus support for Interrupt Aggregator
irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver
dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings
irqchip/ti-sci-intr: Add support for Interrupt Router driver
dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
gpio: thunderx: Use the default parent apis for {request,release}_resources
genirq: Introduce irq_chip_{request,release}_resource_parent() apis
firmware: ti_sci: Add helper apis to manage resources
firmware: ti_sci: Add RM mapping table for am654
firmware: ti_sci: Add support for IRQ management
firmware: ti_sci: Add support for RM core ops
...
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Linus Torvalds
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e8a1d70117 |
ARM: Device-tree updates
Besides new bindings and additional descriptions of hardware blocks for
various SoCs and boards, the main new contents here is:
SoCs:
- Intel Agilex (SoCFPGA)
- NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus)
New boards:
- Allwinner:
+ RerVision H3-DVK (H3)
+ Oceanic 5205 5inMFD (H6)
+ Beelink GS2 (H6)
+ Orange Pi 3 (H6)
- Rockchip:
+ Orange Pi RK3399
+ Nanopi NEO4
+ Veyron-Mighty Chromebook variant
- Amlogic:
+ SEI Robotics SEI510
- ST Micro:
+ stm32mp157a discovery1
+ stm32mp157c discovery2
- NXP:
+ Eckelmann ci4x10 (i.MX6DL)
+ i.MX8MM EVK (i.MX8MM)
+ ZII i.MX7 RPU2 (i.MX7)
+ ZII SPB4 (VF610)
+ Zii Ultra (i.MX8M)
+ TQ TQMa7S (i.MX7Solo)
+ TQ TQMa7D (i.MX7Dual)
+ Kobo Aura (i.MX50)
+ Menlosystems M53 (i.MX53)j
- Nvidia:
+ Jetson Nano (Tegra T210)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Device-tree updates from Olof Johansson:
"Besides new bindings and additional descriptions of hardware blocks
for various SoCs and boards, the main new contents here is:
SoCs:
- Intel Agilex (SoCFPGA)
- NXP i.MX8MM (Quad Cortex-A53 with media/graphics focus)
New boards:
- Allwinner:
+ RerVision H3-DVK (H3)
+ Oceanic 5205 5inMFD (H6)
+ Beelink GS2 (H6)
+ Orange Pi 3 (H6)
- Rockchip:
+ Orange Pi RK3399
+ Nanopi NEO4
+ Veyron-Mighty Chromebook variant
- Amlogic:
+ SEI Robotics SEI510
- ST Micro:
+ stm32mp157a discovery1
+ stm32mp157c discovery2
- NXP:
+ Eckelmann ci4x10 (i.MX6DL)
+ i.MX8MM EVK (i.MX8MM)
+ ZII i.MX7 RPU2 (i.MX7)
+ ZII SPB4 (VF610)
+ Zii Ultra (i.MX8M)
+ TQ TQMa7S (i.MX7Solo)
+ TQ TQMa7D (i.MX7Dual)
+ Kobo Aura (i.MX50)
+ Menlosystems M53 (i.MX53)j
- Nvidia:
+ Jetson Nano (Tegra T210)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (593 commits)
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
arm64: dts: bitmain: Add pinctrl support for BM1880 SoC
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
arm64: dts: bitmain: Add GPIO support for BM1880 SoC
ARM: dts: gemini: Indent DIR-685 partition table
dt-bindings: hwmon (pwm-fan) Remove dead "cooling-*-state" properties
ARM: dts: qcom-apq8064: Set 'cxo_board' as ref clock of the DSI PHY
arm64: dts: msm8998: thermal: Restrict thermal zone name length to under 20
arm64: dts: msm8998: thermal: Fix number of supported sensors
arm64: dts: msm8998-mtp: thermal: Remove skin and battery thermal zones
arm64: dts: exynos: Move fixed-clocks out of soc
arm64: dts: exynos: Move pmu and timer nodes out of soc
ARM: dts: s5pv210: Fix camera clock provider on Goni board
ARM: dts: exynos: Properly override node to use MDMA0 on Universal C210
ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
ARM: dts: exynos: Remove unneeded address/size cells from fixed-clock on Exynos3250
ARM: dts: exynos: Move pmu and timer nodes out of soc
arm64: dts: rockchip: fix IO domain voltage setting of APIO5 on rockpro64
arm64: dts: db820c: Add sound card support
arm64: dts: apq8096-db820c: Add HDMI display support
...
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Linus Torvalds
|
22c58fd70c |
ARM: SoC platform updates
SoC updates, mostly refactorings and cleanups of old legacy platforms.
Major themes this release:
- Conversion of ixp4xx to a modern platform (drivers, DT, bindings)
- Moving some of the ep93xx headers around to get it closer to multiplatform enabled.
- Cleanups of Davinci
This tag also contains a few patches that were queued up as fixes before
5.1 but I didn't get sent in before release.
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform updates from Olof Johansson:
"SoC updates, mostly refactorings and cleanups of old legacy platforms.
Major themes this release:
- Conversion of ixp4xx to a modern platform (drivers, DT, bindings)
- Moving some of the ep93xx headers around to get it closer to
multiplatform enabled.
- Cleanups of Davinci
This also contains a few patches that were queued up as fixes before
5.1 but I didn't get sent in before release"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits)
ARM: debug-ll: add default address for digicolor
ARM: u300: regulator: add MODULE_LICENSE()
ARM: ep93xx: move private headers out of mach/*
ARM: ep93xx: move pinctrl interfaces into include/linux/soc
ARM: ep93xx: keypad: stop using mach/platform.h
ARM: ep93xx: move network platform data to separate header
ARM: stm32: add AMBA support for stm32 family
MAINTAINERS: update arch/arm/mach-davinci
ARM: rockchip: add missing of_node_put in rockchip_smp_prepare_pmu
ARM: dts: Add queue manager and NPE to the IXP4xx DTSI
soc: ixp4xx: qmgr: Add DT probe code
soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr
soc: ixp4xx: npe: Add DT probe code
soc: ixp4xx: Add DT bindings for IXP4xx NPE
soc: ixp4xx: qmgr: Pass resources
soc: ixp4xx: Remove unused functions
soc: ixp4xx: Uninline several functions
soc: ixp4xx: npe: Pass addresses as resources
ARM: ixp4xx: Turn the QMGR into a platform device
ARM: ixp4xx: Turn the NPE into a platform device
...
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Lokesh Vutla
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accaf1fbfb |
dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings
Add the DT binding documentation for Interrupt Aggregator driver. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Lokesh Vutla
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67d2075ad6 |
dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
Add the DT binding documentation for Interrupt router driver. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Olof Johansson
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1895ef4ef2 |
This modernizes the IXP4xx platform and adds initial Device Tree
Support. We migrate to MULTI_IRQ_HANDLER, bumps the IRQs to offset 16, converts to SPARSE_IRQ, then we add proper subsystem drivers in each subsystem for irqchip, GPIO and clocksource and switch over to using these new drivers. Next we modernize the NPE and QMGR drivers and push them down into drivers/soc. This has been tested on the IXP4xx NSLU2 and the Gateworks GW2358-4. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcvxsRAAoJEEEQszewGV1zZE8QAIrpxZGGKUv7o/NrtR2J8CLR jl7cm8Rx+TVlowEz4Un2erhMEFEIp91DeKsN76fBaAszmogbuck1u+ZiArpL7u12 sJzYwQUqyCuGFQbiOIu1PyYCCGebVvZYvYjoEDzt5GOp5rCNh6xsP9eDQe7F8ZgE 60iKiLEp+U3VQXB7+/KdvIpVVM2V7wJyKHtKkZVsTEH0iKsTy6yormBZc3r/a1Ka 7fZDLC6KLtaQ95YpqL+L/ZZNickj/J2wqnVuh4GrzsJ5m9GphoUfD2X3jtuQyjo/ VlHy7mEmWAvS68lQXNibXLi9h8tNr9XApRDH/snoLRq4KKM8P30OgZMc28IWBqwZ CqbxfN9++ffZBt5udY3Jfdsj3lgDOMjBzvfIJpQxLbFCfTaQWtBZ5KaILGdcCuFH TdCUT5tS/G7XUlsAkFQc1ubseYl3PmGgBrTh6N150hNH45xsuniaBUv/RgltA7ZY Q437ctUs5IySPOm3dPzgHQwqC1TN/LuHX3fbQwcgj792iZhn5hExazmgLYGwzy/l vLM9izG7NerZQgpspaUq1jeCPVVCsZ2q/n8vWD7beBLWTo7bZhg0uLXQOwR/9ITc B5vC0h9Fe9O732ZZY5FgJXYgUkQ9fRjN/lMv6RWgPlc6/r8eQZ+OimAprpmB96Gu 2IfYAFI4lZDS/nJL9FmF =0U95 -----END PGP SIGNATURE----- Merge tag 'ixp4xx-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/soc This modernizes the IXP4xx platform and adds initial Device Tree Support. We migrate to MULTI_IRQ_HANDLER, bumps the IRQs to offset 16, converts to SPARSE_IRQ, then we add proper subsystem drivers in each subsystem for irqchip, GPIO and clocksource and switch over to using these new drivers. Next we modernize the NPE and QMGR drivers and push them down into drivers/soc. This has been tested on the IXP4xx NSLU2 and the Gateworks GW2358-4. * tag 'ixp4xx-for-armsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: (31 commits) ARM: dts: Add queue manager and NPE to the IXP4xx DTSI soc: ixp4xx: qmgr: Add DT probe code soc: ixp4xx: qmgr: Add DT bindings for IXP4xx qmgr soc: ixp4xx: npe: Add DT probe code soc: ixp4xx: Add DT bindings for IXP4xx NPE soc: ixp4xx: qmgr: Pass resources soc: ixp4xx: Remove unused functions soc: ixp4xx: Uninline several functions soc: ixp4xx: npe: Pass addresses as resources ARM: ixp4xx: Turn the QMGR into a platform device ARM: ixp4xx: Turn the NPE into a platform device ARM: ixp4xx: Move IXP4xx QMGR and NPE headers ARM: ixp4xx: Move NPE and QMGR to drivers/soc ARM: dts: Add some initial IXP4xx device trees ARM: ixp4xx: Add device tree boot support ARM: ixp4xx: Add DT bindings gpio: ixp4xx: Add OF probing support gpio: ixp4xx: Add DT bindings clocksource/drivers/ixp4xx: Add OF initialization support clocksource/drivers/ixp4xx: Add DT bindings ... Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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ad88400145 |
mt8173:
- use assinged-clocks and assigned-clock-parents - fix compatible for SoC to a72 - add pmu nodes mt8183: - add sysirq binding - add pinctrl dt header file mt7629: - update bindings description fo sysirq, uart and scpsys mt8516: - add binding description for watchdog, timer, uart and sysirq -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAly/N3cXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MgsQ/+PJskV7y1fW26XPg/fu7EkzMZ fxEfgvHncadJGz10B9UF4t5+B+WW3HyY1kklzOhVsBSk3psMCYIu/J09MSPFtAgX yZ8Xeo8inwKakOwn3jY4a8sloilNFaJX5zJZLVLWHMoBPMugvy2ROBquMxFHdM7r yde6ZoKxR0XPyRr1abbma8cmGS2UZA9pD9Vakawk34NcmADKNwwtl23LXAitevCR xfa8Ln0vsRUpz9JZSQ32yYGnE4OsxkOFn8dwtiKlKd8wzxExGRU+8E5kVZlX9P3f oe5EsRW+3whCEzF+rW9udjAOeYrdDBckR3vsho34TVWOkdGpunj/duvNOLLKD0sl +mzEty+tWDEc6IK0aEJT6SK87WfLOLIOYIWLA2eSd3kjoB48XmxQ+WUB2ogAgZzQ AsUWjGKwbse1xKjMTV1A8AJsDLN8lMwURyVmaSjA3HOhC3BC2X25XGBQ+srogSzj U6h128D5OKiXqp+n2EwCmfX+NKlWgT6IPENgRiaALfahGelWhpdhKRMF5v4jOgXO 6ev/djagiqpLz4zIO7RnisbdqcObhxRobWOwmnHBa6BkdHxs+8EH7X8jnVXoIN2/ 43plOEn7Wt7sMBdRdzrSM6m7PaRn1ttefHq4YQx2TaNJj3AGBYwS7rCCVlwtgXck HtYZ4FCkNeqOhTq7/EY= =KVpr -----END PGP SIGNATURE----- Merge tag 'v5.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt8173: - use assinged-clocks and assigned-clock-parents - fix compatible for SoC to a72 - add pmu nodes mt8183: - add sysirq binding - add pinctrl dt header file mt7629: - update bindings description fo sysirq, uart and scpsys mt8516: - add binding description for watchdog, timer, uart and sysirq * tag 'v5.1-next-dts64' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: arm64: dts: mt8173: add pmu nodes for mt8173 arm64: dts: mt8173: correct cpu type of cpu2 and cpu3 to cortex-a72 dt-bindings: irq: mtk,sysirq: add support for MT8516 dt-bindings: serial: mtk-uart: add support for MT8516 dt-bindings: timer: mtk-timer: add support for MT8516 dt-bindings: wdog: mtk-wdt: add support for MT851 dt-bindings: soc: fix a typo for MT7623A dt-bindings: mediatek: update bindings for MT7629 SoC arm64: dts: mt8183: add pinctrl file dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183 arm64: dts: Using standard CCF interface to set vcodec clk Signed-off-by: Olof Johansson <olof@lixom.net> |
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Linus Walleij
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167c6b5ece |
irqchip: ixp4xx: Add DT bindings
This adds device tree bindings for the IXP4xx interrupt controller. It's a standard 2-cell controller. Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Fabien Parent
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6969706399 |
dt-bindings: irq: mtk,sysirq: add support for MT8516
Add binding documentation of mediatek,sysirq for MT8516 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Ryder Lee
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c4fcbf1186 |
dt-bindings: mediatek: update bindings for MT7629 SoC
This updates bindings for MT7629 SoC, which includes very basic items such as system timer, UART, sysirq and scpsys unit. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Erin Lo
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df8c9581e2 |
dt-bindings: mtk-sysirq: Add compatible for Mediatek MT8183
This adds dt-binding documentation of SYSIRQ for Mediatek MT8183 SoC Platform. Signed-off-by: Erin Lo <erin.lo@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Rob Herring
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99838f011a |
dt-bindings: Require child nodes type to be 'object'
A node is always an object (aka a dictionary), so make that explicit for child node schemas. A meta-schema update will enforce having 'type' specified. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Rob Herring <robh@kernel.org> |
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Thomas Gleixner
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3ce8461f45 |
irqchip updates for 5.1, take #2
- irqsteer error handling fix - GICv3 range coalescing fix - stm32 coprocessor coexistence fixes - mbigen MSI teardown fix - non-DT secondary GIC infrastructure removed - various cleanups (brcmstb-l2, mmp) - new DT bindings (r8a774c0) -----BEGIN PGP SIGNATURE----- iQJJBAABCgAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAlyTciIVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDHbUP/1ndbJE6O5S24YqbeffNc3dr6hka zyYpzY63KtS39TWxrLmZJlXkMecSXlY4QN3FqZd+g81p+E5zUlZ+PklqFYG6pBSj 6lHsXp4Bo20IAKJTG+4g9K3Am+i3FNoglB2ROPLF4A6pAVvyDWJL0CXCwHG8gLsS NbjDIQpcKRFOGO4qdsTNRYjEVaadShz7koLeQQJ8w/Cnraq8u7ETtAq7irmYv/c6 PX0MUfl12FtqsGZR+xC5th1PYBq5I7E/BsGNnABf9dREpUD4b0IgFV2yPg0r+mMd rSU7OZXWv+JLsQuK4FvHdlM1w7d/g5awG67Mt84eScU4LxjVV68MWtsj0WtNpIOp sCiQZ9tifBz1C2K/6iXoRLEYbrzUFOyGQX9AZXKoXqCB4eu1ZUKT7zeTtFYxIdPO jc9vGT2v7zlKsEpuj5BJEsNSRUJcGZgC7CQvJTxYWLbu7henpPkh6nf/PkbrDKIB HtuSygju1YzMH4imvZoVuhB60Bii6ZExVy6a4STYcUJu+Qj8/kyF6sHuZv4YMUnm yKGcXxAQE2C2SdYfGl2u0JradMB4kPU1+2uA7uOq/kTxcm30nGJ/YcYYEL/BaXt9 Clg7WNiTSB6NOrYLhPYOfGa1NwniFTvZWeo9C61o4gslNLukXG885U9swo+NXPYq UlJduzmQ0kDJ00ne =SBUi -----END PGP SIGNATURE----- Merge tag 'irqchip-5.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip updates for 5.1 from Marc Zyngier: - irqsteer error handling fix - GICv3 range coalescing fix - stm32 coprocessor coexistence fixes - mbigen MSI teardown fix - non-DT secondary GIC infrastructure removed - various cleanups (brcmstb-l2, mmp) - new DT bindings (r8a774c0) |
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Fabrizio Castro
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24105bf4d1 |
dt-bindings: irqchip: renesas-irqc: Document r8a774c0 support
Document RZ/G2E (R8A774C0) SoC bindings. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Linus Torvalds
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065b6c4c91 |
Devicetree updates for v5.1:
- Fix a unittest failure on UML. Preparation for converting to kunit test framework. - Add annotations to dtx_diff output - Fix unittest reporting of expected error - Move DMA configuration for virtual devices into the driver that needs it (s5p-mfc) - Vendor prefixes for feiyang and techstar - Convert ARM GIC, GICv3, and L2x0 to DT schema - Add r8a7778/9 HSCIF serial bindings -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAlyC0hoQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhwzMdD/93737AUFqQNfMXlsrZs/OS9dGTQdYtuFOw Z2643O1l5QTPAleBqQWVGpxph67pQf3uZ+7zAsknJkweysMaDG1Ej22sFnyIM+Hh +IeLBYOtB7hd6FSCX40apT6Jlw2KG7Lqk0JvXVv7yXJRptsf7R6oUw8GoxxUBbsp 4fL1IwuAyq3TrMtGETl7MW4QJma9A8zo9ngQSiRQr9yflROmE1dXjge+KPHOsTRr 9PU6NSgsuUG0eBw9stL4bDZwXXGb3sEcXaItY5A37JTI6bLgPuk8cA4lp+gTL5RK 77uGs8rbe8WqFPWeMmDwRdbSDasb52NDfGBG5Dj7n7tHVP7rubyA1XK3fVK5udjZ hHhQa0G5gLBnd9/7Je8udkvwH9ef/BjnHp1KFOBrCMLCgYX+QZQZUNwuTI5/l6E3 A/dOo6JG+rshtI3P3Up69XOu1KMhacNVu/TTHVGkUeq5vf+iKr1BYu2VsVIHdQh7 hdJ6syheq3qHBAOOuB5Z+yyFzwh1w98gpqlG8lUSYjnochej4YSgNTMef9vhdWZg vTdP/XNnYvH9XTqxSAhfIxUWeaggrngYQCQhci8F57DskKkPKeyFhxo7ODGD4bI6 hXcUgk2OtEF2Sgk+X9XCtI5vJXuXvGxmlpZpdUe7LiVE3CnOwfFxvLfIhpw+2AIp /7S2Khwnsg== =CnTd -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: - Fix a unittest failure on UML. Preparation for converting to kunit test framework. - Add annotations to dtx_diff output - Fix unittest reporting of expected error - Move DMA configuration for virtual devices into the driver that needs it (s5p-mfc) - Vendor prefixes for feiyang and techstar - Convert ARM GIC, GICv3, and L2x0 to DT schema - Add r8a7778/9 HSCIF serial bindings * tag 'devicetree-for-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: unittest: unflatten device tree on UML when testing dt-bindings: Add vendor prefix for feiyang dt-bindings: Add vendor prefix for techstar dt-bindings: display: add missing semicolon in example of: mark early_init_dt_alloc_reserved_memory_arch static of: add dtc annotations functionality to dtx_diff of: unittest: add caution to function header comment of: unittest: remove report of expected error dt-bindings: interrupt-controller: Convert ARM GICv3 to json-schema dt-bindings: interrupt-controller: Convert ARM GIC to json-schema dt-bindings: arm: l2x0: Convert L2 cache to json-schema media: s5p-mfc: Fix memdev DMA configuration dt-bindings: serial: sh-sci: Document r8a7778/9 HSCIF bindings |
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Linus Torvalds
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6ad63dec9c |
ARM: SoC device tree updates for 5.1
This is a smaller update than the past few times, but with just over
500 non-merge changesets still dwarfes the rest of the SoC tree.
Three new SoC platforms get added, each one a follow-up to an existing
product, and added here in combination with a reference platform:
- Renesas RZ/A2M (R7S9210) 32-bit Cortex-A9 Real-time imaging processor
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza2m.html
- Renesas RZ/G2E (r8a774c0) 64-bit Cortex-A53 SoC "for
Rich Graphics Applications".
https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rzg/rzg2e.html
- NXP i.MX8QuadXPlus 64-bit Cortex-A35 SoC
https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/i.mx-applications-processors/i.mx-8-processors/i.mx-8x-family-arm-cortex-a35-3d-graphics-4k-video-dsp-error-correcting-code-on-ddr:i.MX8X
These are actual commercial products we now support with an in-kernel
device tree source file:
- Bosch Guardian is a product made by Bosch Power
Tools GmbH, based on the Texas Instruments AM335x chip
- Winterland IceBoard is a Texas Instruments AM3874 based
machine used in telescopes at the south pole and elsewhere, see commit
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Aisheng Dong
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e482c01dc7 |
dt-bindings: irq: imx-irqsteer: Add multi output interrupts support
One irqsteer channel can support up to 8 output interrupts. Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: devicetree@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Aisheng Dong
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e12ba23254 |
dt-binding: irq: imx-irqsteer: Use irq number instead of group number
Not all 64 interrupts may be used in one group. e.g. most irqsteer in imx8qxp and imx8qm subsystems supports only 32 interrupts. As the IP integration parameters are Channel number and interrupts number, let's use fsl,irqs-num to represents how many interrupts supported by this irqsteer channel. Note this will break the compatibility of old binding. As the original fsl,irq-groups was born out of a misunderstanding of the HW config options and we are not aware of any users of the current binding. And the old binding was just published in recent months, so it's worth to change now to avoid confusing in the future. Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: devicetree@vger.kernel.org Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Arnd Bergmann
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f7d488be48 |
mt7623:
add cooling mask to all CPUs add compatible to sysirq binding -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlxd1V0XHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00OGww/9Fma+4OGoHtgn0z5Z+cfQ//mw oaUxV8C7IxONQAriQ4KPOmyi6AGnvuGu0iuQSmzW+ueDK4HNfU92BuNNBJSyW9PO Vs/nsP6QZJTtpG/aUpmuYrG0iwpk8y1TuLQTQ19Txtnwy5ryaMt3xqU+7v9pPv4j vF8mZ9BUJ6JEX6so5xM1zHZLNvV2y1rQ3rYR9TeUfTAJnH/n4Qme/ZR/3zSICgGO Q++f3w9hXlwEFxQdeYUoQohj41ih9KlgZo1uXOI7QDMMFg8PzIkzj14rDDNsIkRD Yaq3oN3qFx8JzB+mNAa4WWsCHHtqSoLBlr3hc1YKSbn5gCctyJaI4LNuhu2J8WCq YNqk7LesuxwD/Hr5yzuqYL2pJjLA6Bwjw6pyJxQOzZJJ6m2RyuWwmMT0BgcnaU1j 1o7MafEnskbus/to4TQ0Sbq0EkOf7YElABII59/JR42t1779aclQ+KjwQNSB+KkY kssqdCJ6ATKFr+2FCwZN92zi7U4M2NBffJj/jj0t5oEZC0ZZYoq31MEgK6iwzMEP XdOdoOOw8IGxl/RnoQq8bNdX8ca9K5UCw/kSGN6OGwA1bFzfbp3nKEBBdlVpMYqF IMVJRsIFbqx5Xn64gMXhwWByEFCz0jsT1BexDy0K4a0SjC0O7pzWj8zs4xD0H1Y/ XkSPcBe07hOmkdFTA60= =bcQS -----END PGP SIGNATURE----- Merge tag 'v5.0-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt mt7623: - add cooling mask to all CPUs - add compatible to sysirq binding * tag 'v5.0-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: interrupt-controller: update bindings for MT7623 ARM: dts: mt7623: Add all CPUs in cooling maps Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Jiaxun Yang
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3bdd7f7433 |
dt-bindings: interrupt-controller: loongson ls1x intc
Dt-bindings doc about Loongson-1 interrupt controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Rob Herring
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36c79bc7ef |
dt-bindings: interrupt-controller: Convert ARM GICv3 to json-schema
Convert the ARM GICv3 binding document to DT schema format using json-schema. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> |
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Rob Herring
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66ed144f14 |
dt-bindings: interrupt-controller: Convert ARM GIC to json-schema
Convert the ARM GIC binding document to DT schema format using json-schema. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> |
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Ryder Lee
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60b71a239b |
dt-bindings: interrupt-controller: update bindings for MT7623
This adds missing bindings for MT7623 sysirq. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Otto Sabart
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8217724eb7 |
doc: bindings: fix bad reference to ARM CPU bindings
The primecell.txt and cpus.txt files were converted into YAML. This patch updates old references with new ones. Fixes: |
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Linus Torvalds
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030672aea8 |
Merge tag 'devicetree-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull Devicetree updates from Rob Herring:
"The biggest highlight here is the start of using json-schema for DT
bindings. Being able to validate bindings has been discussed for years
with little progress.
- Initial support for DT bindings using json-schema language. This is
the start of converting DT bindings from free-form text to a
structured format.
- Reworking of initrd address initialization. This moves to using the
phys address instead of virt addr in the DT parsing code. This
rework was motivated by CONFIG_DEV_BLK_INITRD causing unnecessary
rebuilding of lots of files.
- Fix stale phandle entries in phandle cache
- DT overlay validation improvements. This exposed several memory
leak bugs which have been fixed.
- Use node name and device_type helper functions in DT code
- Last remaining conversions to using %pOFn printk specifier instead
of device_node.name directly
- Create new common RTC binding doc and move all trivial RTC devices
out of trivial-devices.txt.
- New bindings for Freescale MAG3110 magnetometer, Cadence Sierra
PHY, and Xen shared memory
- Update dtc to upstream version v1.4.7-57-gf267e674d145"
* tag 'devicetree-for-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (68 commits)
of: __of_detach_node() - remove node from phandle cache
of: of_node_get()/of_node_put() nodes held in phandle cache
gpio-omap.txt: add reg and interrupts properties
dt-bindings: mrvl,intc: fix a trivial typo
dt-bindings: iio: magnetometer: add dt-bindings for freescale mag3110
dt-bindings: Convert trivial-devices.txt to json-schema
dt-bindings: arm: mrvl: amend Browstone compatible string
dt-bindings: arm: Convert Tegra board/soc bindings to json-schema
dt-bindings: arm: Convert ZTE board/soc bindings to json-schema
dt-bindings: arm: Add missing Xilinx boards
dt-bindings: arm: Convert Xilinx board/soc bindings to json-schema
dt-bindings: arm: Convert VIA board/soc bindings to json-schema
dt-bindings: arm: Convert ST STi board/soc bindings to json-schema
dt-bindings: arm: Convert SPEAr board/soc bindings to json-schema
dt-bindings: arm: Convert CSR SiRF board/soc bindings to json-schema
dt-bindings: arm: Convert QCom board/soc bindings to json-schema
dt-bindings: arm: Convert TI nspire board/soc bindings to json-schema
dt-bindings: arm: Convert TI davinci board/soc bindings to json-schema
dt-bindings: arm: Convert Calxeda board/soc bindings to json-schema
dt-bindings: arm: Convert Altera board/soc bindings to json-schema
...
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Lubomir Rintel
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485773d3c5 |
dt-bindings: mrvl,intc: fix a trivial typo
s/whold/whole/. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Signed-off-by: Rob Herring <robh@kernel.org> |
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Benjamin Gaignard
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897898a694 |
dt-bindings: interrupt-controller: stm32: Document hwlock properties
Add hwlocks as optional property Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Lucas Stach
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ff63495eff |
dt-bindings/irq: Add binding for Freescale IRQSTEER multiplexer
This adds the DT binding for the Freescale IRQSTEER interrupt multiplexer found in the i.MX8 familiy SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Srinivas Kandagatla
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7c813152cf |
dt-bindings/gic-v3: Add msm8996 compatible string
Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor. There are many devices out there with this restriction in place and there has been no update to this firmware since last few years, making those devices totally unusable for upstream development. IIDR register value conflicts with other SoCs, using compatible seems to be the only way to apply quirks required for msm8996 based SoCs. Without this quirk many qcom SoCs (atleast 3 that I know) are unable to boot mainline. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Mesih Kilinc
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a15b743908 |
dt-bindings: interrupt-controller: Add suniv interrupt-controller
Add compatible string for Alwinner suniv F1C100s SoC interrupt controller which is stripped version of sun4i Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Manivannan Sadhasivam
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cdf6179630 |
dt-bindings: interrupt-controller: Document RDA8810PL intc
Document interrupt controller in RDA Micro RDA8810PL SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Linus Torvalds
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ac43507589 |
This tag contains the Linux port for C-SKY(csky) based on linux-4.19
Release, which has been through 10 rounds of review on mailing list. We almost got the Acked-by/Reviewed-by of all patches except "Process management and Signal", but all've been tested. Here is the LTP-20180118 test report: ----------------------------------------------- Total Tests: 1298 Total Skipped Tests: 281 Total Failures: 10 Kernel Version: 4.19.0+ Machine Architecture: csky Hostname: buildroot ----------------------------------------------- This patchset adds architecture support to Linux for C-SKY's 32-bit embedded There are two ABI versions with several CPU cores in this patchset: ABIv1: 610 (16-bit instruction, 32-bit data path, VIPT Cache ...) ABIv2: 807 810 860 (16/32-bit variable length instruction, PIPT Cache, SMP ...) More information: http://en.c-sky.com The development repo: https://github.com/c-sky/csky-linux ABI Documentation: https://github.com/c-sky/csky-doc Here is the pre-built cross compiler for fast test from our CI: https://gitlab.com/c-sky/buildroot/-/jobs/101608095/artifacts/file/output/images/csky_toolchain_qemu_csky_ck807f_4.18_glibc_defconfig_482b221e52908be1c9b2ccb444255e1562bb7025.tar.xz We use buildroot as our CI-test enviornment. "LTP, Lmbench ..." will be tested for every commit. See here for more details: https://gitlab.com/c-sky/buildroot/pipelines We'll continouslly improve csky subsystem in future. Changes in v10: - Remove duplicated headers in asm/Kbuild and uapi/asm/Kbuild. - Change to (__NR_arch_specific_syscall + 1) in unistd.h. - Drop dword access for get_user_size patch. - Involve the interrupt controller drivers after got Reviewed-by. Changes in v9: - Remove unused code in smp.c and use per_cpu for ipi_data. - Fixup r15 register access in abiv1/alignment.c. - Improve the changelog comment in commit-msg. Changes in v8: - Pass make allmodconfig. - Implement abiv1 get_user_dword(). - Remove set_irq_mapping() used by driver in smp.c. Changes in v7: - Use checkpatch.pl to check all patches and fixup as possible. - Remove github.com/c-sky print in bootup. - Give a return in DMA_ATTR_NON_CONSISTENT in csky_dma_alloc_atomic(). - Remove the NSIGXXX in fpu.c and use force_sig_fault() in fpu.c. - Remove irq.h and add it in asm/Kbuild. - Use byteswap helpers in abiv1/bswapXi.c. - Fixup arch_sync_dma() only with one page problem. Changes in v6: - use asm-generic/bitops/atomic.h for all in asm/bitops.h - fix flush_cache_range and tlb_start_vma - fix compile error with include linux/bug.h in cmpxchg.h - improve the comment Changes in v5: - remove redundant smp_mb operations in spinlock.h - add commit message for dt-bindings docs - add CPUHP_AP_CSKY_TIMER_STARTING in hotplug.h for csky_mptimer - add COMPILE_TEST for timer-gx6605s Kconfig - seperate csky two interrupt controllers with 2 patches - add MAINTAINERS patch for csky - move IPI_IRQ into csky_mptimer, fixup irq_mapping problem - coding convension Changes in v4: - cleanup defconfig - use ksys_ in syscall.c - remove wrong comment in vdso.c - Use GENERIC_IRQ_MULTI_HANDLER - optimize the memset.c - fixup dts warnings - remove big-endian in byteorder.h Changes in v3: dc560f1 csky: change to EM_CSKY 252 for elf.h 2ac3ddf csky: remove gx6605s.dts af00b8c csky: add defconfig and qemu.dts 6c87efb csky: remove the deprecate name. f6dda39 csky: add dt-bindings doc. d9f02a8 csky: remove KERNEL_VERSION in upstream branch 7bd663c csky: Use kernel/dma/noncoherent.c 1544c09 csky: bugfix emmc hang up LINS-976 e963271 csky: cleanup include/asm/Kbuild cd267ba csky: remove CSKY_DEBUG_INFO 78950da csky: remove dcache invalid. 13fe51d csky: remove csum_ipv6_magic(), use generic one. a7372db csky: bugfix CK810 access twice error. 1bb7c69 csky: bugfix add gcc asm memory for barrier. 5ea3257 csky: add -msoft-float instead of -mfloat-abi=soft. 38b037d csky: bugfix losing cache flush range. ab5e8c4 csky: Add ticket-spinlock and qrwlock support. c9aaec5 csky: rename cskyksyms.c to libgcc_ksyms.c 28c5e48 csky: avoid the MB on failure: trylock f929c97 csky: bugfix idly4 may cause exception. 09dc496 csky: Use GENERIC_ASHLDI3/ASHRDI3 etc 6ecc99d csky: optimize smp boot code. 16f50df csky: asm/bug.h simple implement. 0ba532a csky: csky asm/atomic.h added. df66947 csky: asm/compat.h added |
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Guo Ren
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2347e7e1ae |
dt-bindings: interrupt-controller: C-SKY APB intc
- Dt-bindings doc about C-SKY apb bus interrupt controller. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Rob Herring <robh@kernel.org> |
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Guo Ren
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3fe5d5bd2d |
dt-bindings: interrupt-controller: C-SKY SMP intc
Dt-bindings doc about C-SKY Multi-processors interrupt controller. Changelog: - Should be: '#interrupt-cells' not 'interrupt-cells' Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Rob Herring <robh@kernel.org> |
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Miquel Raynal
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079f453200 |
dt-bindings/interrupt-controller: Add documentation for Marvell SEI controller
Describe the System Error Interrupt (SEI) controller. It aggregates two types of interrupts, wired and MSIs from respectively the AP and the CPs, into a single SPI interrupt. Suggested-by: Haim Boot <hayim@marvell.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Miquel Raynal
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548ce8156f |
dt-bindings/interrupt-controller: Update Marvell ICU bindings
Change the documentation to reflect the new bindings used for Marvell ICU. This involves describing each interrupt group as a subnode of the ICU node. Each of them having their own compatible. The DT binding documentation still documents the legacy binding, where there was a single node with no subnode. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Miquel Raynal
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018ea8475b |
dt-bindings/interrupt-controller: Fix Marvell ICU length in the example
ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the specification). Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Biju Das
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0c4cb97d4e |
dt-bindings: irqchip: renesas-irqc: Document r8a7744 support
Document RZ/G1N (R8A7744) SoC bindings. Reviewed-by: Chris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Geert Uytterhoeven
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339794e36d |
dt-bindings: irqchip: renesas-irqc: Document R-Car E3 support
Document support for the Interrupt Controller for External Devices (INTC-EX) in the Renesas E3 (r8a77990) SoC. No driver update is needed. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Palmer Dabbelt
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11f65ad111
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dt-bindings: riscv,cpu-intc: Cleanups from a missed review
I managed to miss one of Rob's code reviews on the mailing list
<http://lists.infradead.org/pipermail/linux-riscv/2018-August/001139.html>.
The patch has already been merged, so I'm submitting a fixup.
Sorry!
Fixes:
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Linus Torvalds
|
de3750351c |
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq update from Thomas Gleixner:
"A small set of updats/fixes for the irq subsystem:
- Allow GICv3 interrupts to be configured as wake-up sources to
enable wakeup from suspend
- Make the error handling of the STM32 irqchip init function work
- A set of small cleanups and improvements"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/gic-v3: Allow interrupt to be configured as wake-up sources
irqchip/tango: Set irq handler and data in one go
dt-bindings: irqchip: renesas-irqc: Document r8a774a1 support
irqchip/s3c24xx: Remove unneeded comparison of unsigned long to 0
irqchip/stm32: Fix init error handling
irqchip/bcm7038-l1: Hide cpu offline callback when building for !SMP
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Thomas Gleixner
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20b420dc42 |
irqchip updates for 4.19, take #2
- bcm7038: compilation fix for !SMP - stm32: fix teardown on probe error - s3c24xx: fix compilation warning - renesas-irqc: r8a774a1 support - tango: chained irq setup simplification - gic-v3: allow wake-up sources -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEn9UcU+C1Yxj9lZw9I9DQutE9ekMFAluAC8YVHG1hcmMuenlu Z2llckBhcm0uY29tAAoJECPQ0LrRPXpDsvgP/1LWT1TS/mnxhfo71yueEI75X3Ju ZKQ8Za5o6nbu2CvwedEOtPVfAqp5Mg3wNJZKiN4H0db3dxftzqqp7ZQ1P7ZtheZC 69k0DKXQKN2BXURX3zDHhYA86kjrRcUEJfjF8Wi8Pe1UjrO4lm7fQZEVg9SiSigx TxFOakeSlHZqrC0DwEj5P7RpyAQhqb/7ygg9TNjlNgda8F98RmUNm38nEUj+IbPK UySYnHTe02Z5nD/9K+piB8gFgpTIfQlhWPA/kgODlsCJUuUY18RkB0CZzRuUBv3a 58qqpopuvH1jEVqWi3ffXr6m1kPF7Ys8GACC0laH2QgArT5OSGet9Hn7Edo5qh1p UPdvJEpuIsgQc1nPEcw84h1SGYg2lEtY0ZR4FdDnh3QQ45Kbkhx0HWLM/14YU/wI jutiUAZ7BstdlRwzmjNWwcW2pjhE3/FDBUTifQb/qvh4MEM9Mi4Jr3XARSTuW8o5 zZXmm47sOomuDl8RyIKvPuQRhmnN0ix86dba0bMIMYx2G9dRjb51o9gfN1nY/E6C bWayUZNmSaMAPi+xXBSw+O9mIqg2mwlLzq4EIKMHRUyMBqNL3mFIaefgT5yOLgMG 98Co+VLgpnp7eraAmHJWLrdf4QhiMD+cHkOD41s5eu0E+BGKLWS/cZdROa4jvucs 1JzPGTd0o4PHd5vV =Mr5O -----END PGP SIGNATURE----- Merge tag 'irqchip-4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent Pull irqchip updates for 4.19, take #2 from Marc Zyngier: - bcm7038: compilation fix for !SMP - stm32: fix teardown on probe error - s3c24xx: fix compilation warning - renesas-irqc: r8a774a1 support - tango: chained irq setup simplification - gic-v3: allow wake-up sources |
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Fabrizio Castro
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ad0926f05b |
dt-bindings: irqchip: renesas-irqc: Document r8a774a1 support
Document RZ/G2M (R8A774A1) SoC bindings. Reviewed-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
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Linus Torvalds
|
1009aa1205 |
RISC-V Updates for the 4.19 Merge Window
This tag contains some major improvements to the RISC-V port, including
the necessary interrupt controller and timer support to actually make it
to userspace. Support for three devices has been added:
* Support for the ISA-mandated timers on RISC-V systems.
* Support for the ISA-mandated first-level interrupt controller on
RISC-V systems, which is handled as part of our core arch code because
it's very small and tightly tied to the ISA.
* Support for SiFive's platform-level interrupt controller, which talks
to the actual devices.
In addition to these new devices, there are a handful of cleanups all
over the RISC-V tree:
* Build fixes for various configurations
* A fix to the vDSO build's makefile so it respects CFLAGS.
* The addition of __lshrti3, a libgcc derived function necessary for
some 32-bit configurations.
* !SMP && PERF_EVENTS
* Cleanups to the arch code to remove the remnants of old versions of
the drivers that were just properly submitted.
* Some dead code from the timer driver, most of which wasn't ever
even compiled.
* Cleanups of some interrupt #defines, which are now local to the
interrupt handling code.
* Fixes to ptrace(), which while not being sufficient to fully make GDB
work are at least sufficient to get simple GDB tasks to work.
* Early printk support via RISC-V's architecturally mandated SBI console
device.
* A fix to our early debug trap handler to ensure it's always aligned.
These patches have all been through a fairly extensive review process,
but as this enables a whole pile of functionality (ie, userspace) I'm
confident we'll need to submit a few more patches. The only concrete
issues I know about are the sys_riscv_flush_icache patches, but as I
managed to screw those up on Friday I figured it'd be best to let them
bake another week.
This tag boots a Fedora root filesystem on QEMU's master branch for me,
and before this morning's rebase (from 4.18-rc8 to 4.18) it booted on
the HiFive Unleashed.
Thanks to Christoph Hellwig and the other guys at WD for getting the new
drivers in shape!
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Merge tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux
Pull RISC-V updates from Palmer Dabbelt:
"This contains some major improvements to the RISC-V port, including
the necessary interrupt controller and timer support to actually make
it to userspace. Support for three devices has been added:
- the ISA-mandated timers on RISC-V systems.
- the ISA-mandated first-level interrupt controller on RISC-V
systems, which is handled as part of our core arch code because
it's very small and tightly tied to the ISA.
- SiFive's platform-level interrupt controller, which talks to the
actual devices.
In addition to these new devices, there are a handful of cleanups all
over the RISC-V tree:
- build fixes for various configurations:
* A fix to the vDSO build's makefile so it respects CFLAGS.
* The addition of __lshrti3, a libgcc derived function necessary
for some 32-bit configurations.
* !SMP && PERF_EVENTS
- Cleanups to the arch code to remove the remnants of old versions of
the drivers that were just properly submitted.
* Some dead code from the timer driver, most of which wasn't ever
even compiled.
* Cleanups of some interrupt #defines, which are now local to the
interrupt handling code.
- Fixes to ptrace(), which while not being sufficient to fully make
GDB work are at least sufficient to get simple GDB tasks to work.
- Early printk support via RISC-V's architecturally mandated SBI
console device.
- A fix to our early debug trap handler to ensure it's always
aligned.
These patches have all been through a fairly extensive review process,
but as this enables a whole pile of functionality (ie, userspace) I'm
confident we'll need to submit a few more patches. The only concrete
issues I know about are the sys_riscv_flush_icache patches, but as I
managed to screw those up on Friday I figured it'd be best to let them
bake another week.
This tag boots a Fedora root filesystem on QEMU's master branch for
me, and before this morning's rebase (from 4.18-rc8 to 4.18) it booted
on the HiFive Unleashed.
Thanks to Christoph Hellwig and the other guys at WD for getting the
new drivers in shape!"
* tag 'riscv-for-linus-4.19-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux:
dt-bindings: interrupt-controller: SiFive Plaform Level Interrupt Controller
dt-bindings: interrupt-controller: RISC-V local interrupt controller
RISC-V: Fix !CONFIG_SMP compilation error
irqchip: add a SiFive PLIC driver
RISC-V: Add the directive for alignment of stvec's value
clocksource: new RISC-V SBI timer driver
RISC-V: implement low-level interrupt handling
RISC-V: add a definition for the SIE SEIE bit
RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h
RISC-V: simplify software interrupt / IPI code
RISC-V: remove timer leftovers
RISC-V: Add early printk support via the SBI console
RISC-V: Don't increment sepc after breakpoint.
RISC-V: implement __lshrti3.
RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSO
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Linus Torvalds
|
336722eb9d |
TTY/Serial driver patches for 4.19-rc1
Here is the big tty and serial driver pull request for 4.19-rc1. It's not all that big, just a number of small serial driver updates and fixes, along with some better vt handling for unicode characters for those using braille terminals. Full details are in the shortlog. All of these patches have been in linux-next for a long time with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW3g/5Q8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynZDwCdETeD4sIqt06hXeG4ADiVORb3gLgAnjJTbl9Y reffAFDRWrwD42SvTi1X =7tX/ -----END PGP SIGNATURE----- Merge tag 'tty-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty Pull tty/serial driver updates from Greg KH: "Here is the big tty and serial driver pull request for 4.19-rc1. It's not all that big, just a number of small serial driver updates and fixes, along with some better vt handling for unicode characters for those using braille terminals. All of these patches have been in linux-next for a long time with no reported issues" * tag 'tty-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (73 commits) tty: serial: 8250: Revert NXP SC16C2552 workaround serial: 8250_exar: Read INT0 from slave device, too tty: rocket: Fix possible buffer overwrite on register_PCI serial: 8250_dw: Add ACPI support for uart on Broadcom SoC serial: 8250_dw: always set baud rate in dw8250_set_termios dt-bindings: serial: Add binding for uartlite tty: serial: uartlite: Add support for suspend and resume tty: serial: uartlite: Add clock adaptation tty: serial: uartlite: Add structure for private data serial: sh-sci: Improve support for separate TEI and DRI interrupts serial: sh-sci: Remove SCIx_RZ_SCIFA_REGTYPE serial: sh-sci: Allow for compressed SCIF address serial: sh-sci: Improve interrupts description serial: 8250: Use cached port name directly in messages serial: 8250_exar: Drop unused variable in pci_xr17v35x_setup() vt: drop unused struct vt_struct vt: avoid a VLA in the unicode screen scroll function vt: add /dev/vcsu* to devices.txt vt: coherence validation code for the unicode screen buffer vt: selection: take screen contents from uniscr if available ... |
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Linus Torvalds
|
4d88e3d249 |
Devicetree updates for 4.19:
- Remove an obsolete hack for PPC32 longtrail systems - Make of_io_request_and_map() "name" arg optional - Add vendor prefixes for bitmain, Asus, and Y Soft - Remove 'interrupt-parent' from bindings as it is implicit - New properties for wm8994 audio codec - Add 'clocks' property support to SRAM binding - Add binding for ASPEED coprocessor interrupt controller - Various binding spelling and link fixes -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAltxnZgQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw3kvD/4lNU3vfYZMKUUeY5w8Kt/EJiXOcVM0E4rV xnzg4udgApkfZToYwnjwx42WI8QcCRF7axObodtRkgdxS8fT0nemGO7Mppwxe0Yl zdYcGX+Y3bcZamjdEFfX2kt9C0ZalY/QnAYhlUWtT+1vXpsStvAOZddyTwP1l3Q+ +oujpS6xjIFtgVFrFclEiKzBuoVBYSznuWZBqfNMCIaGn3VnCdBLoYbx/NEqPsU2 AyPlWN8GquTtZJJMO0/VUGZGOrCnc1ZBADoza/YYPVzkMog1OJEJPxRRx5e5ddbR HVRzmWiTwDOVq56MKhk+1FELsbBb3h6yKMKZY/jkbNhzm7pu0S1UKdCf1FpPsXcQ 1op6ryTpzfLF4PlKdRACcUH6HqEWoW4UVqiH5F2TWTvBMTb0Nqo3yHVobN0xwHTU shgboQlSnTOdnOkXLMFCnDxzbpfGjZgJwXZAmrpz/z+ZOEPps70BXKl75tp7qQ35 8hMNZMZu1UWsd/qoIxbzUJMg2jG7KASSYPTPjgAPXieESiKIdJd8A8t/Qxvgq3f7 6SK+azqvQK1c6PtsTxxMp8JemR/Ih32CIwzaxSIaxmUwci+uX4tsyT406e4O8cJW qCrEbEjy/5hKqbCS3/kP7hXtPdlHJSDgRn7vqjhgLyDyO8xzHXgbyPU1Q3+LEXI4 BpNil+NSXQ== =AV4E -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: - Remove an obsolete hack for PPC32 longtrail systems - Make of_io_request_and_map() "name" arg optional - Add vendor prefixes for bitmain, Asus, and Y Soft - Remove 'interrupt-parent' from bindings as it is implicit - New properties for wm8994 audio codec - Add 'clocks' property support to SRAM binding - Add binding for ASPEED coprocessor interrupt controller - Various binding spelling and link fixes * tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: Documentation: remove dynamic-resolution-notes reference to non-existent file dt-bindings: Add Y Soft Corporation vendor prefix of/fdt: Remove PPC32 longtrail hack in memory scan dt-bindings: remove 'interrupt-parent' from bindings pinctrl: tegra: fix spelling in devicetree binding document usb: dwc3: rockchip: Fix PHY documentation links. dt-bindings: sound: wm8994: document wlf,csnaddr-pd property dt-bindings: sound: wm8994: document wlf,spkmode-pu property dt-bindings: sram: Add 'clocks' as an optional property dt-bindings: Add vendor prefix for AsusTek Computer Inc. dt-bindings: misc: ASPEED coprocessor interrupt controller dt-bindings: gpio: pca953x: Document interrupts, update example drivers/of: Make of_io_request_and_map() "name" argument optional dt-bindings: Add bitmain vendor prefix Documentation: devicetree: tilcdc: fix spelling mistake "suppors" -> "supports" |
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Linus Torvalds
|
d0daaeaf60 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull genirq updates from Thomas Gleixner:
"The irq departement provides:
- A synchronization fix for free_irq() to synchronize just the
removed interrupt thread on shared interrupt lines.
- Consolidate the multi low level interrupt entry handling and mvoe
it to the generic code instead of adding yet another copy for
RISC-V
- Refactoring of the ARM LPI allocator and LPI exposure to the
hypervisor
- Yet another interrupt chip driver for the JZ4725B SoC
- Speed up for /proc/interrupts as people seem to love reading this
file with high frequency
- Miscellaneous fixes and updates"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (23 commits)
irqchip/gic-v3-its: Make its_lock a raw_spin_lock_t
genirq/irqchip: Remove MULTI_IRQ_HANDLER as it's now obselete
openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER
arm64: Use the new GENERIC_IRQ_MULTI_HANDLER
ARM: Convert to GENERIC_IRQ_MULTI_HANDLER
irqchip: Port the ARM IRQ drivers to GENERIC_IRQ_MULTI_HANDLER
irqchip/gic-v3-its: Reduce minimum LPI allocation to 1 for PCI devices
dt-bindings: irqchip: renesas-irqc: Document r8a77980 support
dt-bindings: irqchip: renesas-irqc: Document r8a77470 support
irqchip/ingenic: Add support for the JZ4725B SoC
irqchip/stm32: Add exti0 translation for stm32mp1
genirq: Remove redundant NULL pointer check in __free_irq()
irqchip/gic-v3-its: Honor hypervisor enforced LPI range
irqchip/gic-v3: Expose GICD_TYPER in the rdist structure
irqchip/gic-v3-its: Drop chunk allocation compatibility
irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
irqchip/gic-v3-its: Use full range of LPIs
irqchip/gic-v3-its: Refactor LPI allocator
genirq: Synchronize only with single thread on free_irq()
genirq: Update code comments wrt recycled thread_mask
...
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Palmer Dabbelt
|
627672cf43
|
dt-bindings: interrupt-controller: SiFive Plaform Level Interrupt Controller
Add documentation for the SiFive implementation of the RISC-V Platform Level Interrupt Controller (PLIC). The PLIC connects global interrupt sources to the local interrupt controller on each hart. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com> [hch: various fixes and updates] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> |