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Author SHA1 Message Date
Ingo Molnar 241771ef01 performance counters: x86 support 
Implement performance counters for x86 Intel CPUs.

It's simplified right now: the PERFMON CPU feature is assumed,
which is available in Core2 and later Intel CPUs.

The design is flexible to be extended to more CPU types as well.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
 2008-12-08 15:47:15 +01:00
Hiroshi Shimamoto 4217458daf x86: signal: change type of paramter for sys_rt_sigreturn() 
Impact: cleanup on 32-bit

Peter pointed this parameter can be changed.

Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
 2008-12-08 15:21:35 +01:00
Hiroshi Shimamoto 5ceb40da9b x86: signal: unify signal_{32|64}.c 
Impact: cleanup

Unify signal_{32|64}.c! Mechanic unification - the two
files are the same.

Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
 2008-11-26 05:11:56 +01:00