Just a few documentation updates from the community.
- Device tree documentation conversion from txt to yaml.
- Documentation addition to help users getting started with initramfs
on OpenRISC.
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Merge tag 'for-linus' of https://github.com/openrisc/linux
Pull OpenRISC updates from Stafford Horne:
"Just a few documentation updates from the community:
- Device tree documentation conversion from txt to yaml
- Documentation addition to help users getting started with initramfs
on OpenRISC
* tag 'for-linus' of https://github.com/openrisc/linux:
dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema
dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema
Documentation:openrisc: Add build instructions with initramfs
The Sophgo SG2044 SoC is their second generation server chip
with 64 cores, following the SG2042.
In addition, there are minor updates for the cv180x SoCs.
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Merge tag 'soc-newsoc-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull sophgo SoC devicetree updates from Arnd Bergmann:
"The Sophgo SG2044 SoC is their second generation server chip with 64
cores, following the SG2042.
In addition, there are minor updates for the cv180x SoCs"
* tag 'soc-newsoc-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX
riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10
dt-bindings: riscv: sophgo: Add SG2044 compatible string
dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC
dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi
riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt number
riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi
riscv: dts: sophgo: Move riscv cpu definition to a separate file
riscv: dts: sophgo: Move all soc specific device into soc dtsi file
riscv: sophgo: dts: Add spi controller for SG2042
riscv: dts: sophgo: sg2042: add pinctrl support
There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straig reuses of the existing
chip in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently
a low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2 family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets.
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Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are 11 newly supported SoCs, but these are all either new
variants of existing designs, or straight reuses of the existing chip
in a new package:
- RK3562 is a new chip based on the old Cortex-A53 core, apparently a
low-cost version of the Cortex-A55 based RK3568/RK3566.
- NXP i.MX94 is a minor variation of i.MX93/i.MX95 with a different
set of on-chip peripherals.
- Renesas RZ/V2N (R9A09G056) is a new member of the larger RZ/V2
family
- Amlogic S6/S7/S7D
- Samsung Exynos7870 is an older chip similar to Exynos7885
- WonderMedia wm8950 is a minor variation on the wm8850 chip
- Amlogic s805y is almost idential to s805x
- Allwinner A523 is similar to A527 and T527
- Qualcomm MSM8926 is a variant of MSM8226
- Qualcomm Snapdragon X1P42100 is related to R1E80100
There are also 65 boards, including reference designs for the chips
above, this includes
- 12 new boards based on TI K3 series chips, most of them from
Toradex
- 10 devices using Rockchips RK35xx and PX30 chips
- 2 phones and 2 laptops based on Qualcomm Snapdragon designs
- 10 NXP i.MX8/i.MX9 boards, mostly for embedded/industrial uses
- 3 Samsung Galaxy phones based on Exynos7870
- 5 Allwinner based boards using a variety of ARMv8 chips
- 9 32-bit machines, each based on a different SoC family
Aside from the new hardware, there is the usual set of cleanups and
newly added hardware support on existing machines, for a total of 965
devicetree changesets"
* tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (956 commits)
MAINTAINERS, mailmap: update Sven Peter's email address
arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency
arm64: dts: nuvoton: Add pinctrl
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
arm64: dts: blaize-blzp1600: Enable GPIO support
dt-bindings: clock: socfpga: convert to yaml
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
...
DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()
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Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use
of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()"
* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
dt-bindings: timer: Add fsl,vf610-pit.yaml
dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
dt-bindings: arm/cpus: Allow 2 power-domains entries
dt-bindings: usb: dwc3-xilinx: allow dma-coherent
media: dt-bindings: sony,imx219: Allow props from video-interface-devices
dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
dt-bindings: trivial-devices: Add VZ89TE to trivial
media: dt-bindings: renesas,vsp1: add top-level constraints
media: dt-bindings: renesas,fcp: add top-level constraints
dt-bindings: trivial-devices: Add Maxim max30208
dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
...
- Convert the generic interrupt chip to lock guards to remove copy &
pasta boilerplate code and gotos.
- A new driver fot the interrupt controller in the EcoNet EN751221 MIPS SoC.
- Extend the SG2042-MSI driver to support the new SG2044 SoC
- Updates and cleanups for the (ancient) VT8500 driver
- Improve the scalability of the ARM GICV4.1 ITS driver by utilizing node
local copies a VM's interrupt translation table when possible. This
results in a 12% reduction of VM IPI latency in certain workloads.
- The usual cleanups and improvements all over the place
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Merge tag 'irq-drivers-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq controller updates from Thomas Gleixner:
"Update for interrupt chip drivers:
- Convert the generic interrupt chip to lock guards to remove copy &
pasta boilerplate code and gotos.
- A new driver fot the interrupt controller in the EcoNet EN751221
MIPS SoC.
- Extend the SG2042-MSI driver to support the new SG2044 SoC
- Updates and cleanups for the (ancient) VT8500 driver
- Improve the scalability of the ARM GICV4.1 ITS driver by utilizing
node local copies a VM's interrupt translation table when possible.
This results in a 12% reduction of VM IPI latency in certain
workloads.
- The usual cleanups and improvements all over the place"
* tag 'irq-drivers-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
irqchip/irq-pruss-intc: Simplify chained interrupt handler setup
irqchip/gic-v4.1: Use local 4_1 ITS to generate VSGI
irqchip/econet-en751221: Switch to of_fwnode_handle()
irqchip/irq-vt8500: Switch to irq_domain_create_*()
irqchip/econet-en751221: Switch to irq_domain_create_linear()
irqchip/irq-vt8500: Use fewer global variables and add error handling
irqchip/irq-vt8500: Use a dedicated chained handler function
irqchip/irq-vt8500: Don't require 8 interrupts from a chained controller
irqchip/irq-vt8500: Drop redundant copy of the device node pointer
irqchip/irq-vt8500: Split up ack/mask functions
irqchip/sg2042-msi: Fix wrong type cast in sg2044_msi_irq_ack()
irqchip/sg2042-msi: Add the Sophgo SG2044 MSI interrupt controller
irqchip/sg2042-msi: Introduce configurable chipinfo for SG2042
irqchip/sg2042-msi: Rename functions and data structures to be SG2042 agnostic
dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controller
genirq/generic-chip: Fix incorrect lock guard conversions
genirq/generic-chip: Remove unused lock wrappers
irqchip: Convert generic irqchip locking to guards
gpio: mvebu: Convert generic irqchip locking to guard()
ARM: orion/gpio:: Convert generic irqchip locking to guard()
...
The SG2044 implement a standard T-HEAD C900 PLIC, which is
already supported by the kernel.
Add compatible string for Sophgo SG2044 plic.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250413223507.46480-5-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
As SG2044 also implements an enhanced ACLINT as SG2042, add necessary
compatible string for SG2044 SoC.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250413223507.46480-4-inochiama@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
Convert the TI OMAP2/3 interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
"ti,intc-size" property isn't actually used with "ti,omap2-intc", so the
2 bindings can be combined.
Link: https://lore.kernel.org/r/20250505144917.1294150-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TI Wakeup Generator interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144913.1293967-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TI Keystone 2 interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144908.1293785-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TS-4800 FPGA interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144856.1293370-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the SPEAr3xx Shared interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144851.1293180-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Synopsys DW-APB interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144842.1292840-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the ARC-HS incore interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144834.1292666-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the ARC-HS Interrupt Distribution Unit interrupt controller
binding to schema format. It's a straight-forward conversion of the
typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144830.1292495-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Qualcomm Atheros ath79 Misc interrupt controller binding to
schema format.
Adjust the compatible values to match what's actually in use.
Link: https://lore.kernel.org/r/20250505144821.1292151-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Marvell On-Die Message interrupt controller binding to
schema format.
Drop the 'interrupt-controller' property which isn't relevant for an MSI
controller.
Link: https://lore.kernel.org/r/20250505144727.1290271-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Marvell ICU interrupt controller to DT schema format.
Add the missing addressing properties to read and translate child node
addresses.
Drop the legacy binding description and example.
Link: https://lore.kernel.org/r/20250505144524.1285795-1-robh@kernel.org
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Marvell SEI interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144749.1290862-1-robh@kernel.org
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Marvell 7K/8K PIC interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144715.1289866-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TI-NSPIRE interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
'#interrupt-cells' was missing from the property list, but used in the
example, so add it.
Link: https://lore.kernel.org/r/20250505144711.1289677-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the J-Core advanced interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144707.1289503-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the ImgTec Powerdown Controller (PDC) interrupt controller
binding to schema format. It's a straight-forward conversion of the
typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144703.1289335-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Google Goldfish PIC interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144658.1289158-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the EZchip NPS interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144649.1288786-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the C-SKY Multi-processor interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Link: https://lore.kernel.org/r/20250505144640.1288458-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the C-SKY APB interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144636.1288261-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Cirrus EP7209 interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144631.1288086-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Broadcom BCM6345 interrupt controller binding to schema
format.
The old schema indicated SoC specific compatibles should be present, but
there are none in use. So drop them.
The most number of CPUs on any platform seems to be 2, so document that
as the maximum.
Link: https://lore.kernel.org/r/20250505144622.1287712-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Amazon FIC interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144548.1286525-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Amazaon Alpine MSIX controller binding to schema format.
Drop the interrupt-controller property as the MSIX controller doesn't
provide interrupts. The interrupt-parent property is required in this
case for custom MSI mapping properties.
Link: https://lore.kernel.org/r/20250505144543.1286351-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Abilis TB10x interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144534.1286092-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Microchip PIC32 interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250505144754.1291072-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Open PIC interrupt controller binding to schema format.
While the Linux kernel supports the "open-pic" compatible, that's not
used in any upstream .dts file. It used for "device_type" though. Add
"fsl,mpic" compatible which was not documented.
Link: https://lore.kernel.org/r/20250505144809.1291619-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Xtensa interrupt controller bindings to DT schema. Both only
vary by the compatible string, so combine them into 1 schema doc.
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Link: https://lore.kernel.org/r/20250505144626.1287879-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the TI Common Platform interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20250505144903.1293558-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Aspeed SCU interrupt controller binding to schema format.
It's a straight-forward conversion of the typical interrupt controller.
Link: https://lore.kernel.org/r/20250505144613.1287360-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Aspeed I2C interrupt controller binding to schema format.
Drop the "#address-cells" and "#size-cells" as they are unused and
incorrect anyways.
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250505144605.1287121-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Faraday FTINTC010 interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250505144654.1288979-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Arm Versatile FPGA interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250505144558.1286889-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Marvell Orion bridge interrupt controller binding to schema
format.
marvell,orion-intc is already covered by mrvl,intc.yaml schema, so it
can be dropped.
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250505144743.1290672-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Broadcom BCM2835 ARMCTRL interrupt controller binding to
schema format. It's a straight-forward conversion of the typical
interrupt controller.
Link: https://lore.kernel.org/r/20250505144618.1287539-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the Conexant Digicolor interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
Acked-by: Baruch Siach <baruch@tkos.co.il>
Link: https://lore.kernel.org/r/20250505144644.1288617-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
While altr,msi-controller is used with PCI, it is not a PCI host bridge
and is just an MSI provider. Move it with other MSI providers in the
'interrupt-controller' directory.
Acked-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250507154253.1593870-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Convert the legacy interrupt controller (LIC) and APBDMA controller
device tree bindings from freeform text to dt-schema.
Document the ASUS Transformer Pad TF300TL compatible string and add
missing compatible strings for newer generations of the Tegra CEC.
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Merge tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
Device tree bindings updates for v6.16-rc1
Convert the legacy interrupt controller (LIC) and APBDMA controller
device tree bindings from freeform text to dt-schema.
Document the ASUS Transformer Pad TF300TL compatible string and add
missing compatible strings for newer generations of the Tegra CEC.
* tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
media: dt-bindings: Document Tegra186 and Tegra194 cec
dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL
dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers
dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema
dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema
Link: https://lore.kernel.org/r/20250509212604.2849901-1-treding@nvidia.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert the NVIDIA Legacy interrupt controller binding to schema
format. It's a straight-forward conversion of the typical interrupt
controller.
All the possible compatibles were not documented, so add the ones in
use.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250505144759.1291261-1-robh@kernel.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
Linus Torvalds
Inochi Amaoto
Rob Herring (Arm)
Arnd Bergmann