mirror of https://github.com/torvalds/linux.git
602 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
|
ac7473a179 |
Updates for the interrupt subsystem:
- Core:
- Provide a new mechanism to create interrupt domains. The existing
interfaces have already too many parameters and it's a pain to expand
any of this for new required functionality.
The new function takes a pointer to a data structure as argument. The
data structure combines all existing parameters and allows for easy
extension.
The first extension for this is to handle the instantiation of
generic interrupt chips at the core level and to allow drivers to
provide extra init/exit callbacks.
This is necessary to do the full interrupt chip initialization before
the new domain is published, so that concurrent usage sites won't see
a half initialized interrupt domain. Similar problems exist on
teardown.
This has turned out to be a real problem due to the deferred and
parallel probing which was added in recent years.
Handling this at the core level allows to remove quite some accrued
boilerplate code in existing drivers and avoids horrible workarounds
at the driver level.
- The usual small improvements all over the place
- Drivers
- Add support for LAN966x OIC and RZ/Five SoC
- Split the STM ExtI driver into a microcontroller and a SMP version to
allow building the latter as a module for multi-platform kernels.
- Enable MSI support for Armada 370XP on platforms which do not support
IPIs.
- The usual small fixes and enhancements all over the place.
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Merge tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt subsystem updates from Thomas Gleixner:
"Core:
- Provide a new mechanism to create interrupt domains. The existing
interfaces have already too many parameters and it's a pain to
expand any of this for new required functionality.
The new function takes a pointer to a data structure as argument.
The data structure combines all existing parameters and allows for
easy extension.
The first extension for this is to handle the instantiation of
generic interrupt chips at the core level and to allow drivers to
provide extra init/exit callbacks.
This is necessary to do the full interrupt chip initialization
before the new domain is published, so that concurrent usage sites
won't see a half initialized interrupt domain. Similar problems
exist on teardown.
This has turned out to be a real problem due to the deferred and
parallel probing which was added in recent years.
Handling this at the core level allows to remove quite some accrued
boilerplate code in existing drivers and avoids horrible
workarounds at the driver level.
- The usual small improvements all over the place
Drivers:
- Add support for LAN966x OIC and RZ/Five SoC
- Split the STM ExtI driver into a microcontroller and a SMP version
to allow building the latter as a module for multi-platform
kernels
- Enable MSI support for Armada 370XP on platforms which do not
support IPIs
- The usual small fixes and enhancements all over the place"
* tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
irqdomain: Fix the kernel-doc and plug it into Documentation
genirq: Set IRQF_COND_ONESHOT in request_irq()
irqchip/imx-irqsteer: Handle runtime power management correctly
irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info()
irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND
irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued
irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock
irqchip/gic-v4: Always configure affinity on VPE activation
Revert "irqchip/dw-apb-ictl: Support building as module"
Revert "Loongarch: Support loongarch avec"
arm64: Kconfig: Allow build irq-stm32mp-exti driver as module
ARM: stm32: Allow build irq-stm32mp-exti driver as module
irqchip/stm32mp-exti: Allow building as module
irqchip/stm32mp-exti: Rename internal symbols
irqchip/stm32-exti: Split MCU and MPU code
arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms
ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a
irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI
irqchip/dw-apb-ictl: Support building as module
irqchip/riscv-aplic: Simplify the initialization code
...
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Linus Torvalds
|
f557af081d |
RISC-V Patches for the 6.11 Merge Window, Part 1
* Support for various new ISA extensions:
* The Zve32[xf] and Zve64[xfd] sub-extensios of the vector
extension.
* Zimop and Zcmop for may-be-operations.
* The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension.
* Zawrs,
* riscv,cpu-intc is now dtschema.
* A handful of performance improvements and cleanups to text patching.
* Support for memory hot{,un}plug
* The highest user-allocatable virtual address is now visible in
hwprobe.
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Merge tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt:
- Support for various new ISA extensions:
* The Zve32[xf] and Zve64[xfd] sub-extensios of the vector
extension
* Zimop and Zcmop for may-be-operations
* The Zca, Zcf, Zcd and Zcb sub-extensions of the C extension
* Zawrs
- riscv,cpu-intc is now dtschema
- A handful of performance improvements and cleanups to text patching
- Support for memory hot{,un}plug
- The highest user-allocatable virtual address is now visible in
hwprobe
* tag 'riscv-for-linus-6.11-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (58 commits)
riscv: lib: relax assembly constraints in hweight
riscv: set trap vector earlier
KVM: riscv: selftests: Add Zawrs extension to get-reg-list test
KVM: riscv: Support guest wrs.nto
riscv: hwprobe: export Zawrs ISA extension
riscv: Add Zawrs support for spinlocks
dt-bindings: riscv: Add Zawrs ISA extension description
riscv: Provide a definition for 'pause'
riscv: hwprobe: export highest virtual userspace address
riscv: Improve sbi_ecall() code generation by reordering arguments
riscv: Add tracepoints for SBI calls and returns
riscv: Optimize crc32 with Zbc extension
riscv: Enable DAX VMEMMAP optimization
riscv: mm: Add support for ZONE_DEVICE
virtio-mem: Enable virtio-mem for RISC-V
riscv: Enable memory hotplugging for RISC-V
riscv: mm: Take memory hotplug read-lock during kernel page table dump
riscv: mm: Add memory hotplugging support
riscv: mm: Add pfn_to_kaddr() implementation
riscv: mm: Refactor create_linear_mapping_range() for memory hot add
...
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Linus Torvalds
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d2be38b9a5 |
- added support for Realtek RTL9302C
- added support for Mobileye EyeQ6H - added support for Mobileye EyeQ OLB system controller - improved r4k clocksource - added mode for emulating ieee754 NAN2008 - rework for BMIPS CBR address handling - fixes for Loongson 2K1000 - defconfig updates - cleanups and fixes -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmabf5oaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHAYOQ//dgWc6RDS5vWKt14goHoR m3Qt63oHuxfGJsPCHdAqD4bAjxMa1eaRzbfXZ/cMrCSHsUo6bth8dmqFCDMjjWMT ifcCOCwXOf32NUTdm4mNLrKVUvCNeWUN6It8XBBF9r7seogvJPDpDZlEWUzYwfDE 6e7MaaFIEMZN2Q5OAjb6PozTI0gQ3p3UAHVdvN4Z9jJxkYPzRqVostcFUL9M9iU6 7OwGypIdZVSzB+6J6k0yv4rqNDei92SmlLjBD1+GK6uLdJG0JXiWn/XEMxOLyRP9 kKyfpjCwOgAfbTnMoo1N2n1jkP1BqyAPHvGqF2HGpi5mFRW1i25WdcwvF/jImyes yQ/gLKt/y3sOqfssayDvK9acRkp0KQltpPfvWxBXM464+8+gKCdYPZ7+81AbXAiL Qx+bVVdE3HSoO9T06/b0Lpudue7eNU+jlaO8MLH778heT+5k+mlI/H0Ep7M5U7qO 5V9xWlvLpceTa/gJ1cc9bUI5MG/2x+imw7COUcnv+wsWBJ3pGX4Jhwwe2hUn7ixd 0lhrSrQi1ILkFd8gL2REoJ520RNUVfR8yDn7mNuYV1++zlGVb7EAt67v/J6Y1p8l 9aQP/587oZvLAN2IBlovSzqvc6tHZlK6hO9d+ktqJood5NOjOWEGfT0RCm0eqiFF Er6qaWxjROZO1kiGjzo7v+4= =/6JH -----END PGP SIGNATURE----- Merge tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - add support for Realtek RTL9302C - add support for Mobileye EyeQ6H - add support for Mobileye EyeQ OLB system controller - improve r4k clocksource - add mode for emulating ieee754 NAN2008 - rework for BMIPS CBR address handling - fixes for Loongson 2K1000 - defconfig updates - cleanups and fixes * tag 'mips_6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (58 commits) MIPS: config: Add ip30_defconfig MIPS: config: lemote2f: Regenerate defconfig MIPS: config: generic: Add board-litex MIPS: config: Enable MSA and virtualization for MIPS64R6 MIPS: Fix fallback march for SB1 mips: dts: realtek: Add RTL9302C board mips: generic: add fdt fixup for Realtek reference board mips: select REALTEK_OTTO_TIMER for Realtek platforms dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc dt-bindings: mips: realtek: Add rtl930x-soc compatible dt-bindings: vendor-prefixes: Add Cameo Communications mips: dts: realtek: add device_type property to cpu node mips: dts: realtek: use "serial" instead of "uart" in node name MIPS: Implement ieee754 NAN2008 emulation mode MIPS: lantiq: improve USB initialization MIPS: GIC: Generate redirect block accessors MIPS: CPS: Add a couple of multi-cluster utility functions MIPS: Octeron: remove source file executable bit MAINTAINERS: Mobileye: add OLB drivers and dt-bindings MIPS: mobileye: eyeq5: add OLB system-controller node ... |
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Linus Torvalds
|
0ffb8a4c96 |
Devicetree updates for v6.11:
DT Bindings:
- Convert and add a bunch of IBM FSI related bindings
- Add a new schema listing legacy compatibles which will (probably)
never be documented. This will silence various checks warning about
them.
- Add bindings for Sierra Wireless mangOH Green SPI IoT interface, new
Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75 GPI
DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and CSI-2
blocks
- Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema
- Drop obsolete stericsson,abx500.txt
DT core:
- Update dtc to upstream version v1.7.0-93-g1df7b047fe43
- Add support to run DT validation on DTs with applied overlays
- Add helper for creating boolean properties in dynamic nodes and use
that for dynamic PCI nodes
- Clean-up early parsing of '#{address,size}-cells'
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Merge tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert and add a bunch of IBM FSI related bindings
- Add a new schema listing legacy compatibles which will (probably)
never be documented. This will silence various checks warning about
them.
- Add bindings for Sierra Wireless mangOH Green SPI IoT interface,
new Arm 2024 Cortex and Neoverse CPUs, QCom sc8180x PDC, QCom SDX75
GPI DMA, imx8mp/imx8qxp fsl,irqsteer, and Renesas RZ/G2UL CRU and
CSI-2 blocks
- Convert Spreadtrum sprd-timer, FSL cpm_qe, FSL fsl,ls-scfg-msi, FSL
q(b)man-*, FSL qoriq-mc, and img,pdc-wdt bindings to DT schema
- Drop obsolete stericsson,abx500.txt
DT core:
- Update dtc to upstream version v1.7.0-93-g1df7b047fe43
- Add support to run DT validation on DTs with applied overlays
- Add helper for creating boolean properties in dynamic nodes and use
that for dynamic PCI nodes
- Clean-up early parsing of '#{address,size}-cells'"
* tag 'devicetree-for-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits)
dt-bindings: timer: sprd-timer: convert to YAML
dt-bindings: incomplete-devices: document devices without bindings
dt-bindings: trivial-devices: document the Sierra Wireless mangOH Green SPI IoT interface
scripts/dtc: Update to upstream version v1.7.0-93-g1df7b047fe43
dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node
dt-bindings: soc: fsl: cpm_qe: convert to yaml format
dt-bindings: i2c: i2c-fsi: Convert to json-schema
dt-bindings: fsi: Document the FSI Hub Controller
dt-bindings: fsi: Document the AST2700 FSI controller
dt-bindings: fsi: ast2600-fsi-master: Convert to json-schema
dt-bindings: fsi: ibm,i2cr-fsi-master: Reference common FSI controller
dt-bindings: fsi: Document the FSI controller common properties
dt-bindings: fsi: Document the IBM SBEFIFO engine
dt-bindings: fsi: p9-occ: Convert to json-schema
dt-bindings: fsi: Document the IBM SCOM engine
dt-bindings: fsi: fsi2spi: Document SPI controller child nodes
dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
dt-bindings: soc: fsl: Convert q(b)man-* to yaml format
dt-bindings: misc: fsl,qoriq-mc: convert to yaml format
dt-bindings: drop stale Anson Huang from maintainers
...
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Chris Packham
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371c358d52 |
dt-bindings: interrupt-controller: realtek,rtl-intc: Add rtl9300-intc
Add a compatible string for the interrupt controller found on the rtl930x SoCs. The interrupt controller has registers for VPE1 so these are added as a second reg cell. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
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Frank Li
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c184d44a13 |
dt-bindings: interrupt-controller: convert fsl,ls-scfg-msi to yaml
Convert device tree binding fsl,ls-scfg-msi to yaml format. Additional changes: - Include gic.h and use predefined macro in example. - Remove label in example. - Change node name to interrupt-controller in example. - Fix error in example. - ls1046a allow 4 irqs, other platform only 1 irq. - Add $ref: msi-controller.yaml - Add #msi-cells. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240627144207.4003708-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Bjorn Andersson
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e69956584d |
dt-bindings: interrupt-controller: qcom,pdc: Add sc8180x PDC
The SC8180X platform has a PDC block, add a compatible for this. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240525-sc8180x-pdc-binding-compatible-v1-1-17031c85ed69@quicinc.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Alexander Stein
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d8d301a1d2 |
dt-bindings: interrupt-controller: fsl,irqsteer: Add imx8mp/imx8qxp support
Some SoC like i.MX8MP or i.MX8QXP use a power-domain for this IP. Add SoC-specific compatibles, which also requires a power-domain. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240528071141.92003-2-alexander.stein@ew.tq-group.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Arnd Bergmann
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07fd5cc010 |
i.MX DT bindings for 6.11:
- Add compatible string for various new boards - Drop Li Yang as maintainer for bindings as his email bounces -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmaDrjkUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM7C2wf9EEob++3U7fCtNiXlRDeNfDC4AqCz 2uak9/agAzHYXiePe9NbgY2DIwxaFj6CzjaXWp4TLQpp+663sG7A5YFvD7uhEwMM 5PFnK1O6UdKUc7uPYv3mAC7KZSB6i3jUjIGH+kYx7XFf33xppTMHU2jet91N60NW a148jUz+ZEK6aFCmj1PbvFbDeq4gBuAx60ghET8ka0q2MYt7ZCfHc4exJAJNrAZo zoQxYEcaSykN2xcsVqbZV4BpgJFQoi0AuLDOz9TnbYcIH6RuTS9IolL3P/70b+qG AdNWy6bX8gNNQqN/kThOKn/Gx+p3DQPwX6pDgrUZq3/WwGThlNqzvcI8WQ== =BZhu -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaL9yoACgkQYKtH/8kJ UiciYw//f2L9U/cXxecTF6cFB5EfvPxx/RbPHQikmDf/NQByJ4etJkNO4RoW7Wi5 6hnxL+twtldK4x2IwP1SES6VIbdQiwfjNADPhk8iR9spdZoYVGMksxOQlrEjjlPs kE/9Pnp/TsCONjGRWvLY5OsJtYjF3HuJR9U2yEVeqlhjexmaBVXCmjkVaagUlppC 4unKFtJ8skrwMInDDj5i6OHdyJPH0pvFHEvsWcDSuAm6tCExqJeuXcX7/ViV9xuM NBT83f5hI/89CQShzx2Zvm9z20UIaqtnKRaK6WZ9CtdrLRuBj2IxwlBU9226DsF/ UZOFKYHU9UEJglQMYOaQvDmQeTD2U5pAy7qyZUYVmreLsy9JTM9ciEZ92VK7f1OQ Z2604n6hGVy/FcOjYRhknRCx3oTzdjopEeryY0XHTbW2SBGkjBaG9jc+dJbYImvM 4nKZLy/9L++v2dlBBChw8JxWZ6R9qSPkRUkPf0oicPETfPVBcT7r6JnVAHRrkMHf P5xiGk2SFA7fRvbk5i5JsQ3tha4dSSUVVe6f5wr9LkYLDjGYeOe0yyrypx2dG/VC gZsBfr6DXIMmlRONgieWWBW2HI4ecLjI05CN/4duQO3/3uBXgMZV4VPnjt5Ohn2k O8ZhkYDbIg+K+v8kgJ9ehuoyDCtIcLqJUgxTZ9pnltyXjAYslJQ= =9rI6 -----END PGP SIGNATURE----- Merge tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX DT bindings for 6.11: - Add compatible string for various new boards - Drop Li Yang as maintainer for bindings as his email bounces * tag 'imx-bindings-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: fsl: document Kontron SMARC-sAMX6i boards dt-bindings: arm: add MBa8MP-RAS314 SBC dt-bindings: arm: fsl: add i.MX93 9x9 QSB board dt-bindings: arm: fsl: add i.MX95 19x19 EVK board dt-bindings: arm: fsl: Document Compulab IOT-GATE-iMX8 dt-bindings: Drop Li Yang as maintainer for all bindings Link: https://lore.kernel.org/r/20240702142153.413061-2-shawnguo2@yeah.net Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
Marek Behún
|
f7e642bcd6
|
dt-bindings: interrupt-controller: convert marvell,mpic binding to YAML
Convert the marvell,mpic device-tree binding to YAML. Add myself as maintainer. Signed-off-by: Marek Behún <kabel@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240624145355.8034-3-kabel@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
Kanak Shilledar
|
9ff141042a
|
dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema
Convert the RISC-V Hart-Level Interrupt Controller (HLIC) to newer DT schema, Created DT schema based on the .txt file which had `compatible`, `#interrupt-cells` and `interrupt-controller` as required properties. Changes made with respect to original file: - Changed the example to just use interrupt-controller instead of using the whole cpu block - Changed the example compatible string. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Kanak Shilledar <kanakshilledar@gmail.com> Link: https://lore.kernel.org/r/20240615021507.122035-2-kanakshilledar@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
|
Herve Codina
|
17972a5f1b |
dt-bindings: interrupt-controller: Add support for Microchip LAN966x OIC
The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240614173232.1184015-22-herve.codina@bootlin.com |
|
Michael Walle
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7cedaa390b |
dt-bindings: Drop Li Yang as maintainer for all bindings
Remove Li Yang from all device tree bindings because mails to this
address are bouncing.
Commit
|
|
Lad Prabhakar
|
372487b295 |
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/Five SoC
Document RZ/Five (R9A07G043F) IRQC bindings. The IRQC block on the RZ/Five SoC is almost identical to the one found on the RZ/G2L SoC, with the only difference being that it has additional mask control registers for NMI/IRQ/TINT. Hence new compatible string "renesas,r9a07g043f-irqc" is added for RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240604173710.534132-2-prabhakar.mahadev-lad.rj@bp.renesas.com |
|
|
Linus Torvalds
|
06f054b1fe |
Devicetree for v6.10:
DT Bindings:
- Convert samsung,exynos5-dp, atmel,lcdc, aspeed,ast2400-wdt bindings to
schemas
- Add bindings for Allwinner H616 NMI controller, Renesas r8a779g0 irqc,
Renesas R-Car V4M TMU and CMT timers, Freescale S32G3 linflexuart, and
Mediatek MT7988 XHCI
- Add 'reg' constraints on DSI and SPI display panels
- More dropping of unnecessary quotes in schemas
- Use full paths rather than relative paths in schema $refs
- Drop redundant storing of phandle for reserved memory
DT Core:
- Use scope based cleanups for kfree() and of_node_put()
- Track interrupt-map and power-supplies for fw_devlink
- Add buffer overflow check in of_modalias()
- Add and use __of_prop_free() helper for freeing struct property
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Merge tag 'devicetree-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert samsung,exynos5-dp, atmel,lcdc, aspeed,ast2400-wdt bindings
to schemas
- Add bindings for Allwinner H616 NMI controller, Renesas r8a779g0
irqc, Renesas R-Car V4M TMU and CMT timers, Freescale S32G3
linflexuart, and Mediatek MT7988 XHCI
- Add 'reg' constraints on DSI and SPI display panels
- More dropping of unnecessary quotes in schemas
- Use full paths rather than relative paths in schema $refs
- Drop redundant storing of phandle for reserved memory
DT Core:
- Use scope based cleanups for kfree() and of_node_put()
- Track interrupt-map and power-supplies for fw_devlink
- Add buffer overflow check in of_modalias()
- Add and use __of_prop_free() helper for freeing struct property"
* tag 'devicetree-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (25 commits)
of: property: Add fw_devlink support for interrupt-map property
dt-bindings: display: panel: constrain 'reg' in DSI panels
dt-bindings: display: panel: constrain 'reg' in SPI panels
dt-bindings: display: samsung,ams495qa01: add missing SPI properties ref
dt-bindings: Use full path to other schemas
dt-bindings: PCI: qcom,pcie-sm8350: Drop redundant 'oneOf' sub-schema
of: module: add buffer overflow check in of_modalias()
dt-bindings: PCI: microchip: increase number of items in ranges property
dt-bindings: Drop unnecessary quotes on keys
dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop unnecessary quotes
of: property: Use scope based cleanup on port_node
of: reserved_mem: Remove the use of phandle from the reserved_mem APIs
of: property: fw_devlink: Add support for "power-supplies" binding
dt-bindings: watchdog: aspeed,ast2400-wdt: Convert to DT schema
dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller
dt-bindings: interrupt-controller: renesas,irqc: Add r8a779g0 support
dt-bindings: timer: renesas,tmu: Add R-Car V4M support
dt-bindings: timer: renesas,cmt: Add R-Car V4M support
of: Use scope based of_node_put() cleanups
of: Use scope based kfree() cleanups
...
|
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Rob Herring (Arm)
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27db752673 |
dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: Drop unnecessary quotes
Drop unnecessary quotes which aren't needed in yaml. This is checked by yamllint, but this case was excluded due to the comma and yamllint's mishandling of some cases with commas. That's now fixed in yamllint 1.34. Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20240426195404.2771046-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Chris Morgan
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d47bca77bf |
dt-bindings: irq: sun7i-nmi: Add binding for the H616 NMI controller
Add binding for the H616 NMI controller. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240418181615.1370179-2-macroalpha82@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Geert Uytterhoeven
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ee29291188 |
dt-bindings: interrupt-controller: renesas,irqc: Add r8a779g0 support
Document support for the Interrupt Controller for External Devices (INT-EX) in the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/264cffccfbb1f92657420f5f869236b06a97d958.1713280616.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) <robh@kernel.org> |
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Antonio Borneo
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e9c17d91e6 |
dt-bindings: interrupt-controller: stm32-exti: Add irq mapping to parent
The mapping of EXTI events to its parent interrupt controller is both SoC and instance dependent. The current implementation requires adding a new mapping table to the driver's code and a new compatible for each new EXTI instance. To avoid that use the interrupts-extended property to list, for each EXTI event, the associated parent interrupt. Co-developed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240415134926.1254428-3-antonio.borneo@foss.st.com |
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Anup Patel
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3b806a5a1a |
dt-bindings: interrupt-controller: Add RISC-V advanced PLIC
Add DT bindings document for RISC-V advanced platform level interrupt controller (APLIC) defined by the RISC-V advanced interrupt architecture (AIA) specification. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Björn Töpel <bjorn@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Link: https://lore.kernel.org/r/20240307140307.646078-6-apatel@ventanamicro.com |
|
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Anup Patel
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0151a8db49 |
dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller
Add DT bindings document for the RISC-V incoming MSI controller (IMSIC) defined by the RISC-V advanced interrupt architecture (AIA) specification. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Björn Töpel <bjorn@rivosinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Björn Töpel <bjorn@rivosinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240307140307.646078-2-apatel@ventanamicro.com |
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Linus Torvalds
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ab522e1478 |
Devicetree updates for v6.9:
DT core:
- Add cleanup.h based auto release of struct device_node pointers via
__free marking and new for_each_child_of_node_scoped() iterator to use
it.
- Always create a base skeleton DT when CONFIG_OF is enabled. This
supports several usecases of adding DT data on non-DT booted systems.
- Move around some /reserved-memory code in preparation for further
improvements
- Add a stub for_each_property_of_node() for !OF
- Adjust the printk levels on some messages
- Fix __be32 sparse warning
- Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
(currently orphaned)
- Add Saravana Kannan and drop Frank Rowand as DT maintainers
DT bindings:
- Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
xlnx,sd-fec to DT schemas
- Add existing, but undocumented fsl,imx-anatop binding
- Add bunch of undocumented vendor prefixes used in compatible strings
- Drop obsolete brcm,bcm2835-pm-wdt binding
- Drop obsolete i2c.txt which as been replaced with schema in dtschema
- Add DPS310 device and sort trivial-devices.yaml
- Enable undocumented compatible checks on DT binding examples
- More QCom maintainer fixes/updates
- Updates to writing-schema.rst and DT submitting-patches.rst to cover
some frequent review comments
- Clean-up SPDX tags to use 'OR' rather than 'or'
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Merge tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Add cleanup.h based auto release of struct device_node pointers via
__free marking and new for_each_child_of_node_scoped() iterator to
use it.
- Always create a base skeleton DT when CONFIG_OF is enabled. This
supports several usecases of adding DT data on non-DT booted
systems.
- Move around some /reserved-memory code in preparation for further
improvements
- Add a stub for_each_property_of_node() for !OF
- Adjust the printk levels on some messages
- Fix __be32 sparse warning
- Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
(currently orphaned)
- Add Saravana Kannan and drop Frank Rowand as DT maintainers
DT bindings:
- Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
xlnx,sd-fec to DT schemas
- Add existing, but undocumented fsl,imx-anatop binding
- Add bunch of undocumented vendor prefixes used in compatible
strings
- Drop obsolete brcm,bcm2835-pm-wdt binding
- Drop obsolete i2c.txt which as been replaced with schema in
dtschema
- Add DPS310 device and sort trivial-devices.yaml
- Enable undocumented compatible checks on DT binding examples
- More QCom maintainer fixes/updates
- Updates to writing-schema.rst and DT submitting-patches.rst to
cover some frequent review comments
- Clean-up SPDX tags to use 'OR' rather than 'or'"
* tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators
of: unittest: Use for_each_child_of_node_scoped()
of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling
of: Add cleanup.h based auto release via __free(device_node) markings
of: Move all FDT reserved-memory handling into of_reserved_mem.c
of: Add KUnit test to confirm DTB is loaded
of: unittest: treat missing of_root as error instead of fixing up
x86/of: Unconditionally call unflatten_and_copy_device_tree()
um: Unconditionally call unflatten_device_tree()
of: Create of_root if no dtb provided by firmware
of: Always unflatten in unflatten_and_copy_device_tree()
dt-bindings: timer: mediatek: Convert to json-schema
dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support
soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage
dt-bindings: fsl-imx-sdma: fix HDMI audio index
dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6
dt-bindings: soc: imx: fsl,imx-anatop: add binding
dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML
dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML
of: make for_each_property_of_node() available to to !OF
...
|
|
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Frank Li
|
4d4f986d29 |
dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support
Enable the power-domains property for the fsl,intmux node. This addition accommodates i.MX8QXP, i.MX8QM, and i.MX8DXL, which utilize the power-domains property. Incorporating this eliminates DTB_CHECK errors in relevant device tree source files. Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240229200911.712572-1-Frank.Li@nxp.com Signed-off-by: Rob Herring <robh@kernel.org> |
|
Dharma Balasubiramani
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aaef9cdc4b |
dt-bindings: interrupt-controller: Convert Atmel AIC to json-schema
Convert the Atmel AIC binding document to DT schema format using json-schema. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240222090738.41628-1-dharma.b@microchip.com Signed-off-by: Rob Herring <robh@kernel.org> |
|
Changhuang Liang
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d8c56cea72 |
dt-bindings: interrupt-controller: Add starfive,jh8100-intc
StarFive SoCs like the JH8100 use a interrupt controller. Add a binding for it. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240226055025.1669223-2-changhuang.liang@starfivetech.com |
|
Huqiang Qin
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4a0705bb83 |
dt-bindings: interrupt-controller: Add support for Amlogic-T7 SoCs
Update dt-binding document for GPIO interrupt controller of Amlogic-T7 SoCs. Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240222074640.1866284-2-huqiang.qin@amlogic.com |
|
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Lad Prabhakar
|
392703b6a1 |
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Update interrupts
All the RZ/G2L and alike SoC's (listed below) have ECCRAM0/1 interrupts
supported by the IRQC block, reflect the same in DT binding doc.
- R9A07G043U - RZ/G2UL
- R9A07G044L/R9A07G044LC - RZ/{G2L,G2LC}
- R9A07G054 - RZ/V2L
- R9A08G045 - RZ/G3S
For the RZ/G3S SoC ("R9A08G045") ECCRAM0/1 interrupts combined into single
interrupt so we just use the below to represent them:
- ec7tie1-0
- ec7tie2-0
- ec7tiovf-0
Previously, it was assumed that BUS-error and ECCRAM0/1 error interrupts
were only supported by RZ/G2UL ("R9A07G043U") and RZ/G3S ("R9A08G045")
SoCs. However, in reality, all RZ/G2L and similar SoCs (listed above)
support these interrupts. Therefore, mark the 'interrupt-names' property
as required for all the SoCs and update the example node in the binding
document.
Fixes:
|
|
Rafał Miłecki
|
517fd64735 |
dt-bindings: interrupt-controller: convert MediaTek sysirq to the json-schema
This helps validating DTS files. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240123060804.32254-1-zajec5@gmail.com Signed-off-by: Rob Herring <robh@kernel.org> |
|
|
Linus Torvalds
|
24fdd51899 |
LoongArch changes for v6.8
1, Raise minimum clang version to 18.0.0; 2, Enable initial Rust support for LoongArch; 3, Add built-in dtb support for LoongArch; 4, Use generic interface to support crashkernel=X,[high,low]; 5, Some bug fixes and other small changes; 6, Update the default config file. -----BEGIN PGP SIGNATURE----- iQJKBAABCAA0FiEEzOlt8mkP+tbeiYy5AoYrw/LiJnoFAmWnW9cWHGNoZW5odWFj YWlAa2VybmVsLm9yZwAKCRAChivD8uImel3CD/0Wnd2VOhoPubJkCXd+v7SdPDFB +BlkevAdmKQXkxNVXHRwfirsEBnUdQTfSN/5hMd69ZWUTayYq3WFxOcaPs27AAyn cXmGAzxfCjanSj+zxK8Gcmef5kppx3PRSbFdnWgc42Povu0xTOH3M31HXx5WXGtv hZK439DspNGHlF1Bsbs3J8xbS76jc/HDZAqnIjLuefQUaWM8nhsYxJIwVeGKUX1T IyEgBwhHhsY9ho/86yk8VXgordAN4dnMVmAHbR63HqjLo/8sck4IiPNxWKFCHex8 vgxp0zGxfBBts284EfSofDQHrSrrWl4+e2fW2QJ81BBDSS0wPCs4TAnzH+x9X7Wb MJuh8WIJqhfXdPFxs5fdnUeykEm1V/oWFfkWORk4jbQkpY9aZbk/iv6uxsmRhmhv 2WPWvjF+7B2zSXtMcjgm71ymb/nU95W2FZO02GlwTnbGJRKA2xLkjn9rCXoHWjd3 IlxgIgZJ1vkPvFPS/sbekaTUEG+6/qTPGGa2Ol3Q5ZTTLk9serfDa8ay1xCZeOny +fRBgLsuQAOGO2pvxfXjs+uvboZNUHeKrAi7XeR61GcbNpQDkjuwNJXQMiMQ+f66 jWM6H+hV+6sQ/W43KVrGCyBqTX4J9PSN/gX/Cq0PL74Yheop6neYXZTl5uDNYDe9 WYxiS9j/FoYgj8lxYQ== =GzFR -----END PGP SIGNATURE----- Merge tag 'loongarch-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson Pull LoongArch updates from Huacai Chen: - Raise minimum clang version to 18.0.0 - Enable initial Rust support for LoongArch - Add built-in dtb support for LoongArch - Use generic interface to support crashkernel=X,[high,low] - Some bug fixes and other small changes - Update the default config file. * tag 'loongarch-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (22 commits) MAINTAINERS: Add BPF JIT for LOONGARCH entry LoongArch: Update Loongson-3 default config file LoongArch: BPF: Prevent out-of-bounds memory access LoongArch: BPF: Support 64-bit pointers to kfuncs LoongArch: Fix definition of ftrace_regs_set_instruction_pointer() LoongArch: Use generic interface to support crashkernel=X,[high,low] LoongArch: Fix and simplify fcsr initialization on execve() LoongArch: Let cores_io_master cover the largest NR_CPUS LoongArch: Change SHMLBA from SZ_64K to PAGE_SIZE LoongArch: Add a missing call to efi_esrt_init() LoongArch: Parsing CPU-related information from DTS LoongArch: dts: DeviceTree for Loongson-2K2000 LoongArch: dts: DeviceTree for Loongson-2K1000 LoongArch: dts: DeviceTree for Loongson-2K0500 LoongArch: Allow device trees be built into the kernel dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for interrupt-names dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for reg-names dt-bindings: loongarch: Add Loongson SoC boards compatibles dt-bindings: loongarch: Add CPU bindings for LoongArch LoongArch: Enable initial Rust support ... |
|
Binbin Zhou
|
db8ce24070 |
dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for interrupt-names
The Loongson-2K0500/2K1000 CPUs have 64 interrupt sources as inputs, and
a route-mapped node handles up to 32 interrupt sources, so two liointc
nodes are defined in dts{i}.
Of course, we have to make sure that the routing outputs ("intx") of the
two nodes do not conflict, i.e. "int0" can only be used as a routing
output for one of them. Therefore, "interrupt-names" should be defined
as "pattern".
In addition, since "interrupt-names" and "interrupts" are one-to-one
correspondence, we pass it to get the corresponding interrupt number in
the driver. Setting it to "required" does not break ABI, because it is
already logically represented as "required".
This fixes dtbs_check warning:
DTC_CHK arch/loongarch/boot/dts/loongson-2k0500-ref.dtb
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11440: interrupt-names:0: 'int0' was expected
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11440: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
DTC_CHK arch/loongarch/boot/dts/loongson-2k1000-ref.dtb
arch/loongarch/boot/dts/loongson-2k1000-ref.dtb: interrupt-controller@1fe01440: interrupt-names:0: 'int0' was expected
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
arch/loongarch/boot/dts/loongson-2k1000-ref.dtb: interrupt-controller@1fe01440: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
|
|
|
Binbin Zhou
|
aaeebb3ea4 |
dt-bindings: interrupt-controller: loongson,liointc: Fix dtbs_check warning for reg-names
As we know, the Loongson-2K0500 is a single-core CPU, and the core1-
related register (isr1) does not exist. So "reg" and "reg-names" should
be set to "minItems 2"(main nad isr0).
This fixes dtbs_check warning:
DTC_CHK arch/loongarch/boot/dts/loongson-2k0500-ref.dtb
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: reg-names: ['main', 'isr0'] is too short
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: Unevaluated properties are not allowed ('reg-names' was unexpected)
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11400: reg: [[0, 534844416, 0, 64], [0, 534843456, 0, 8]] is too short
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
arch/loongarch/boot/dts/loongson-2k0500-ref.dtb: interrupt-controller@1fe11440: reg-names: ['main', 'isr0'] is too short
From schema: Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
|
|
|
Linus Torvalds
|
38814330fe |
Devicetree for v6.8:
- Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings to schemas - Improvements in Samsung GPU schemas - A few more cases of dropping unneeded quotes in schemas - Merge QCom idle-states txt binding into common idle-states schema - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain Controller - Add NXP i.mx8dl to SCU PD - Add synaptics r63353 panel controller - Clarify the wording around the use of 'wakeup-source' property - Add a DTS coding style doc - Add smi vendor prefix - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel tree - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present - Fix double free in of_parse_phandle_with_args_map() - A couple of kerneldoc fixes -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmWhWgYACgkQ+vtdtY28 YcPHeA//f6xoTczQDavkfVcl+9vfR6uLXAq/sDj0t3qiEbRuBG15dAzGZJGI8Pro 7T9+6wFRS89lwS8qd1wJvoDTlIxcZebvBapzNp3e0XSis98f89qqqDnfxilKgPau QF+mAlQ2tEZoHYUQIGXbjyq9X8GqQ3KGibkfowmdh5NFw5ORWaz9d0Fmiank620a gpH/jCZFBmboWlnKbJKUV8yjna/T8XCPqWUGcPst3ByTNEWToAMInpL4SOaw80dn WdAyZGS8K9GDwrvwdjIFUipcLGXk2kQLQhlOIm9wP/qdpoLfzdLuK96njiqv8PP/ /pDJrtDcGNkFi5327OQXoYB+UhDiouQJWSVKphZiwPuW/xpbpEkC00bZztZ6tMOl qilXuAbDwb+1cjI9HO95w/SDbCppISvXDslJuLFhyLA/FBmMewe8ypuh6vm7JMoe MKSfkjDEyBdKEp1iySyVKxVfIa4Ph7jR9B8bDGOaF0/bpzsB5e51pPH0oc9lLv8L No+AKQnyijruj6F+LVhIimgKLN6zuFqfgOgVshGYbEhAVbbT4cBx4NHGFXqL+6DP FedBjqi0mdIECF+F8FcfKpO80Pi+1bxjgLPYt5d67y+nZUIEe2xJUOdp07f80cHQ Qo0L0h9UVI8pKrWBbtQXeeAMG9l4SMwriazoAzudvUk9Hlh3LWk= =5zC/ -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Convert FPGA bridge, all TPMs (finally), and Rockchip HDMI bindings to schemas - Improvements in Samsung GPU schemas - A few more cases of dropping unneeded quotes in schemas - Merge QCom idle-states txt binding into common idle-states schema - Add X1E80100, SM8650, SM8650, and SDX75 SoCs to QCom Power Domain Controller - Add NXP i.mx8dl to SCU PD - Add synaptics r63353 panel controller - Clarify the wording around the use of 'wakeup-source' property - Add a DTS coding style doc - Add smi vendor prefix - Fix DT_SCHEMA_FILES incorrect matching of paths outside the kernel tree - Disable sysfb (e.g. EFI FB) when simple-framebuffer node is present - Fix double free in of_parse_phandle_with_args_map() - A couple of kerneldoc fixes * tag 'devicetree-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (37 commits) of: unittest: Fix of_count_phandle_with_args() expected value message dt-bindings: fpga: altera: Convert bridge bindings to yaml dt-bindings: fpga: Convert bridge binding to yaml dt-bindings: vendor-prefixes: Add smi dt-bindings: power: Clarify wording for wakeup-source property of: Fix double free in of_parse_phandle_with_args_map dt-bindings: ignore paths outside kernel for DT_SCHEMA_FILES drivers: of: Fixed kernel doc warning dt-bindings: tpm: Document Microsoft fTPM bindings dt-bindings: tpm: Convert IBM vTPM bindings to DT schema dt-bindings: tpm: Convert Google Cr50 bindings to DT schema dt-bindings: tpm: Consolidate TCG TIS bindings dt-bindings: display: rockchip,inno-hdmi: Document RK3128 compatible dt-bindings: arm: Add remote etm dt-binding dt-bindings: mmc: sdhci-pxa: Fix 'regs' typo media: dt-bindings: samsung,s5p-mfc: Fix iommu properties schemas dt-bindings: display: panel: Add synaptics r63353 panel controller dt-bindings: arm: merge qcom,idle-state with idle-state dt-bindings: drm: rockchip: convert inno_hdmi-rockchip.txt to yaml dt-bindings: cache: qcom,llcc: correct QDU1000 reg entries ... |
|
|
Linus Torvalds
|
c4101e5597 |
SoC: DT changes for 6.8
There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
the Rockchips rv1109 and Sopgho CV1812H are just minor variations of
already supported chips.
The other six new SoCs are all part of existing arm64 families, but
are somewhat more interesting:
- Samsung ExynosAutov920 is an automotive chip, and the first one
we support based on the Cortex-A78AE core with lockstep mode.
- Google gs101 (Tensor G1) is the chip used in a number of Pixel phones,
and is grouped with Samsung Exynos here since it is based on the same
SoC design, sharing most of its IP blocks with that series.
- MediaTek MT8188 is a new chip used for mid-range tablets and Chromebooks,
using two Cortex-A78 cores where the older MT8195 had four of them.
- Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range
phone SoC and the first supported chip based on Cortex-X4, Cortex-A720
and Cortex-A520.
- Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest
Laptop chip using the custom Oryon cores.
- Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on
Cortex-A76 and Cortex-A55
In terms of boards, we have
- Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto
G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs.
- Multiple Rockchips mobile gaming systems (Anbernic RG351V,
Powkiddy RK2023, Powkiddy X55) along with the Sonoff iHost Smart
Home Hub and a few Rockchips SBCs
- Some ComXpress boards based on Marvell CN913x, which is the
follow-up to Armada 7xxx/8xxx.
- Six new industrial/embedded boards based on NXP i.MX8 and i.MX9
- Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer.
- Toradex Verdin AM62 Mallow carrier for TI AM62
- Huashan Pi board based on the SophGo CV1812H RISC-V chip
- Two boards based on Allwinner H616/H618
- A number of reference boards for various added SoCs from Qualcomm,
Mediatek, Google, Samsung, NXP and Spreadtrum
As usual, there are cleanups and warning fixes across all platforms as
well as added features for several of them.
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Merge tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC DT updates from Arnd Bergmann:
"There is one new SoC for each 32-bit Arm and 64-bit RISC-V, but both
the Rockchips rv1109 and Sopgho CV1812H are just minor variations of
already supported chips.
The other six new SoCs are all part of existing arm64 families, but
are somewhat more interesting:
- Samsung ExynosAutov920 is an automotive chip, and the first one we
support based on the Cortex-A78AE core with lockstep mode.
- Google gs101 (Tensor G1) is the chip used in a number of Pixel
phones, and is grouped with Samsung Exynos here since it is based
on the same SoC design, sharing most of its IP blocks with that
series.
- MediaTek MT8188 is a new chip used for mid-range tablets and
Chromebooks, using two Cortex-A78 cores where the older MT8195 had
four of them.
- Qualcomm SM8650 (Snapdragon 8 Gen 3) is their current top range
phone SoC and the first supported chip based on Cortex-X4,
Cortex-A720 and Cortex-A520.
- Qualcomm X1E80100 (Snapdragon X Elite) in turn is the latest Laptop
chip using the custom Oryon cores.
- Unisoc UMS9620 (Tanggula 7 series) is a 5G phone SoC based on
Cortex-A76 and Cortex-A55
In terms of boards, we have
- Five old Microsoft Lumia phones, the HTC One Mini 2, Motorola Moto
G 4G, and Huawei Honor 5X/GR5, all based on Snapdragon SoCs.
- Multiple Rockchips mobile gaming systems (Anbernic RG351V, Powkiddy
RK2023, Powkiddy X55) along with the Sonoff iHost Smart Home Hub
and a few Rockchips SBCs
- Some ComXpress boards based on Marvell CN913x, which is the
follow-up to Armada 7xxx/8xxx.
- Six new industrial/embedded boards based on NXP i.MX8 and i.MX9
- Mediatek MT8183 based Chromebooks from Lenovo, Asus and Acer.
- Toradex Verdin AM62 Mallow carrier for TI AM62
- Huashan Pi board based on the SophGo CV1812H RISC-V chip
- Two boards based on Allwinner H616/H618
- A number of reference boards for various added SoCs from Qualcomm,
Mediatek, Google, Samsung, NXP and Spreadtrum
As usual, there are cleanups and warning fixes across all platforms as
well as added features for several of them"
* tag 'soc-dt-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (857 commits)
ARM: dts: usr8200: Fix phy registers
arm64: dts: intel: minor whitespace cleanup around '='
arm64: dts: socfpga: agilex: drop redundant status
arm64: dts: socfpga: agilex: add unit address to soc node
arm64: dts: socfpga: agilex: move firmware out of soc node
arm64: dts: socfpga: agilex: move FPGA region out of soc node
arm64: dts: socfpga: agilex: align pin-controller name with bindings
arm64: dts: socfpga: stratix10_swvp: drop unsupported DW MSHC properties
arm64: dts: socfpga: stratix10_socdk: align NAND chip name with bindings
arm64: dts: socfpga: stratix10: add unit address to soc node
arm64: dts: socfpga: stratix10: move firmware out of soc node
arm64: dts: socfpga: stratix10: move FPGA region out of soc node
arm64: dts: socfpga: stratix10: align pincfg nodes with bindings
arm64: dts: socfpga: stratix10: add clock-names to DWC2 USB
arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
ARM: dts: socfpga: align NAND controller name with bindings
ARM: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
arm64: dts: rockchip: Fix led pinctrl of lubancat 1
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on nanopc-t6
arm64: dts: rockchip: correct gpio_pwrctrl1 typo on rock-5b
...
|
|
|
Linus Torvalds
|
0bdf0621f8 |
IRQ subsystem changes for v6.8:
Drivers:
- Add support for the IA55 interrupt controller on RZ/G3S SoC's
- Update/fix the Qualcom MPM Interrupt Controller driver's
register enumeration within the somewhat exotic "RPM Message RAM"
MMIO-mapped shared memory region that is used for other purposes
as well.
- Clean up the Xtensa built-in Programmable Interrupt Controller
driver (xtensa-pic) a bit.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq subsystem updates from Ingo Molnar:
- Add support for the IA55 interrupt controller on RZ/G3S SoC's
- Update/fix the Qualcom MPM Interrupt Controller driver's register
enumeration within the somewhat exotic "RPM Message RAM" MMIO-mapped
shared memory region that is used for other purposes as well
- Clean up the Xtensa built-in Programmable Interrupt Controller driver
(xtensa-pic) a bit
* tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/irq-xtensa-pic: Clean up
irqchip/qcom-mpm: Support passing a slice of SRAM as reg space
dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
irqchip/renesas-rzg2l: Add support for suspend to RAM
irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register's index
irqchip/renesas-rzg2l: Implement restriction when writing ISCR register
irqchip/renesas-rzg2l: Document structure members
irqchip/renesas-rzg2l: Align struct member names to tabs
irqchip/renesas-rzg2l: Use tabs instead of spaces
|
|
Konrad Dybcio
|
ca596295f4 |
dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle
Due to the wild nature of the Qualcomm RPM Message RAM, the kernel can't really use 'reg' to point to the MPM's slice of Message RAM without cutting into an already-defined RPM MSG RAM node used for GLINK and SMEM. Document passing the register space as a slice of SRAM through the qcom,rpm-msg-ram property. This also makes 'reg' deprecated. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c@linaro.org |
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Claudiu Beznea
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1cf0697a24 |
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
Document the RZ/G3S (R9108G045) interrupt controller. This has few extra functionalities compared with RZ/G2UL but the already existing driver can still be used. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231120111820.87398-9-claudiu.beznea.uj@bp.renesas.com |
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Linus Torvalds
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d5c0b60145 |
Devicetree fixes for v6.7, take 1:
- Fix dt-extract-compatibles for builds with in tree build directory - Drop Xinlei Lee <xinlei.lee@mediatek.com> bouncing email - Fix the of_reconfig_get_state_change() return value documentation - Add missing #power-domain-cells property to QCom MPM - Fix warnings in i.MX LCDIF and adi,adv7533 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmVw93wACgkQ+vtdtY28 YcM6yQ/9F7BXsgx/QSkvrBUB0yx7LqO7fD8daDyYm6YQm36LzTfLvi/m+AlycPXL O6JuW05+/aS2wIpjRnnUuaGeuHIMrIkYIG0BN/evonsqWFc6qwokr/0VOFJaz1wR sj1A0M2pKsBBEzq4Nd0BdmRLj04EfOzQzjll0rtRdk+TvNbbK6OnZ4XXQjBEgStz J/F5PR6tFkdSCaZicpCjkP3Y77Wdt1hH7zWPnZ8IMyykiPGqKjL8FlmpvX2ujG+E vrHwPEHrMHomZ9l07ybHpve/LIA1P0xlUuv3u59dfFRxLYE3QZJwfZA8eVbt4z3z UcAfwcfdQbvU6Pz7uENpsI7hYhMGO9a+kRHV8X9gSEdUO4lu7ZW+z4/OunD13eeQ gJF+GInvzhVPbK9ufwe1CixtTy1rhN0RapiloMQmQmx5/y3T1RpWqhIOraxYR/QM aIGXDlAS5djoeErcqvkrsHYeJw9K99hL9q58xi4TC3jhiwLFYl4YqY7g+Tjoenmu 4+jsJkTkEjVOVPrjv7d1Z69iP878IvR6EHJrhxBTdE3eWJU9yR7icllzt/3SHaHJ 39zXVTWU/0OLhhU5NTg3j9AN4EhFJnRCSdLpOQ8btZNLgYdJ0qO2P8EZJdkf4QpA WjpeTRJiRoo2LbrQ85JUTiALxhWqArMaDiEPeDf55hyrq6M81Ck= =+lyN -----END PGP SIGNATURE----- Merge tag 'devicetree-fixes-for-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix dt-extract-compatibles for builds with in tree build directory - Drop Xinlei Lee <xinlei.lee@mediatek.com> bouncing email - Fix the of_reconfig_get_state_change() return value documentation - Add missing #power-domain-cells property to QCom MPM - Fix warnings in i.MX LCDIF and adi,adv7533 * tag 'devicetree-fixes-for-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: display: adi,adv75xx: Document #sound-dai-cells dt-bindings: lcdif: Properly describe the i.MX23 interrupts dt-bindings: interrupt-controller: Allow #power-domain-cells of: dynamic: Fix of_reconfig_get_state_change() return value documentation dt-bindings: display: mediatek: dsi: remove Xinlei's mail dt: dt-extract-compatibles: Don't follow symlinks when walking tree |
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Konrad Dybcio
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c0a2755ace |
dt-bindings: interrupt-controller: Allow #power-domain-cells
MPM provides a single genpd. Allow #power-domain-cells = <0>.
Fixes:
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Conor Dooley
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637cb4b61b |
Merge patch series "Add Huashan Pi board support"
Inochi Amaoto <inochiama@outlook.com> says: Huashan Pi board is an embedded development platform based on the CV1812H chip. Add minimal device tree files for this board. Currently, it can boot to a basic shell. NOTE: this series is based on the Jisheng's Milk-V Duo patch. Link: https://en.sophgo.com/product/introduce/huashan.html Link: https://en.sophgo.com/product/introduce/cv181xH.html Link: https://lore.kernel.org/linux-riscv/20231006121449.721-1-jszhang@kernel.org/ Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Inochi Amaoto
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21a34e63af |
dt-bindings: interrupt-controller: Add SOPHGO CV1812H plic
Add compatible string for SOPHGO CV1812H plic. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Krzysztof Kozlowski
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e185a24eea |
dt-bindings: correct white-spaces in examples
Use only one and exactly one space around '=' in DTS example. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Serge Semin <fancer.lancer@gmail.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for-iio Acked-by: Stephen Boyd <sboyd@kernel.org> Link: https://lore.kernel.org/r/20231124092121.16866-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Sibi Sankar
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daa9249408 |
dt-bindings: interrupt-controller: qcom,pdc: document pdc on X1E80100
The X1E80100 SoC includes a PDC, document it. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231124100608.29964-6-quic_sibis@quicinc.com Signed-off-by: Rob Herring <robh@kernel.org> |
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Neil Armstrong
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c1c647f604 |
dt-bindings: qcom,pdc: document the SM8650 Power Domain Controller
Document the Power Domain Controller on the SM8650 Platform. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231025-topic-sm8650-upstream-bindings-pdc-v1-1-42f62cc9858c@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Rohit Agarwal
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ca41ae8f44 |
dt-bindings: interrupt-controller: Add SDX75 PDC compatible
Add device tree bindings for PDC on SDX75 SOC. Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231117082829.609882-1-quic_rohiagar@quicinc.com Signed-off-by: Rob Herring <robh@kernel.org> |
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Abel Vesa
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6767b6f4b4 |
dt-bindings: qcom,pdc: Add compatible for SM8550
Document the compatible for SM8550 PDC. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> Link: https://lore.kernel.org/r/20231103224304.764730-1-quic_eberman@quicinc.com Signed-off-by: Rob Herring <robh@kernel.org> |
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Linus Torvalds
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c035f0268b |
SoC DT updates for v6.7
There are a couple new SoCs that are supported for the first time:
- AMD Pensando Elba is a data processing unit based on Cortex-A72
CPU cores
- Sophgo makes RISC-V based chips, and we now support the CV1800B
chip used in the milkv-duo board and the massive sg2042 chip in the
milkv-pioneer, a 64-core developer workstation.
- Qualcomm Snapdragon 720G (sm7125) is a close relative of
Snapdragon 7c and gets added with some Xiaomi phones
- Renesas gains support for the R8A779F4 (R-Car S4-8) automotive
SoC and the RZ/G3S (R9A08G045) embedded SoC.
There are also a bunch of newly supported machines that use
already supported chips. On the 32-bit side, we have:
- USRobotics USR8200 is a NAS/Firewall/router based on the ancient
Intel IXP4xx platform
- A couple of machines based on the NXP i.MX5 and i.MX6 platforms
- One machine each for Allwinner V3s, Aspeed AST2600, Microchip
sama5d29 and ST STM32mp157
The other ones all use arm64 cores on chips from allwinner,
amlogic, freescale, mediatek, qualcomm and rockchip.
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Merge tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC DT updates from Arnd Bergmann:
"There are a couple new SoCs that are supported for the first time:
- AMD Pensando Elba is a data processing unit based on Cortex-A72 CPU
cores
- Sophgo makes RISC-V based chips, and we now support the CV1800B
chip used in the milkv-duo board and the massive sg2042 chip in the
milkv-pioneer, a 64-core developer workstation.
- Qualcomm Snapdragon 720G (sm7125) is a close relative of Snapdragon
7c and gets added with some Xiaomi phones
- Renesas gains support for the R8A779F4 (R-Car S4-8) automotive SoC
and the RZ/G3S (R9A08G045) embedded SoC.
There are also a bunch of newly supported machines that use already
supported chips. On the 32-bit side, we have:
- USRobotics USR8200 is a NAS/Firewall/router based on the ancient
Intel IXP4xx platform
- A couple of machines based on the NXP i.MX5 and i.MX6 platforms
- One machine each for Allwinner V3s, Aspeed AST2600, Microchip
sama5d29 and ST STM32mp157
The other ones all use arm64 cores on chips from allwinner, amlogic,
freescale, mediatek, qualcomm and rockchip"
* tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (641 commits)
ARM: dts: BCM5301X: Set switch ports for Linksys EA9200
ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000 CPU ports
ARM: dts: BCM5301X: Explicitly disable unused switch CPU ports
ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ / MIT
ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U
arm64: dts: socionext: add missing cache properties
riscv: dts: thead: convert isa detection to new properties
arm64: dts: Update cache properties for socionext
arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports
arm64: dts: ti: k3-am654-icssg2: add ICSSG2 Ethernet support
arm64: dts: ti: k3-am65-main: Add ICSSG IEP nodes
arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM
arm64: dts: ti: k3-am62p: Add nodes for more IPs
arm64: dts: rockchip: Add Turing RK1 SoM support
dt-bindings: arm: rockchip: Add Turing RK1
dt-bindings: vendor-prefixes: add turing
arm64: dts: rockchip: Add DFI to rk3588s
arm64: dts: rockchip: Add DFI to rk356x
arm64: dts: rockchip: Always enable DFI on rk3399
...
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Linus Torvalds
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8bc9e65151 |
Devicetree updates for 6.7:
- Add a kselftest to check for unprobed DT devices - Fix address translation for some 3 address cells cases - Refactor firmware node refcounting for AMBA bus - Add bindings for qcom,sm4450-pdc, Qualcomm Kryo 465 CPU, and Freescale QMC HDLC - Add Marantec vendor prefix - Convert qcom,pm8921-keypad, cnxt,cx92755-wdt, da9062-wdt, and atmel,at91rm9200-wdt bindings to DT schema - Several additionalProperties/unevaluatedProperties on child node schemas fixes - Drop reserved-memory bindings which now live in dtschema project - Fix a reference to rockchip,inno-usb2phy.yaml - Remove backlight nodes from display panel examples - Expand example for using DT_SCHEMA_FILES - Merge simple LVDS panel bindings to one binding doc -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmVBdEoACgkQ+vtdtY28 YcObKw//ZkdPTh8t2m4ZH0kGSzcFGx1RiRxOOwVW9UTLovGDsxHixxu/j/9kerQw LHQH2UntlpmZhfIGgqlDf6QrPIuCAFLKTlx0+G2upq4TfHWUEOGcGCracDs65zJa XleEDw9Kt37fiVMUH/i+0mKTm98f+Zb//7IReSzGYtKW1alIr8TAUds26SbBckQ+ /KClOJXuJmsqIWi3cJm3j59rzsSUcnLPR/GHEa03grazZXZ1MNHeaGB3+xZmSKMu 0rhJrBX3PICxFx7FZevZFcHR4S4BQWmste72GTPZi+Htb3CtgjJFkzRdutoPByF7 sSaLhs7f2msfcXhlgw2QoK3Wb2m33cZ+TaESXxx4YmVs/pRMD7kPGfODk7qf+vvJ kPN+bPh2THlp/L8x7S5EeqH+8NqJzXrdLf7CSUnOmkF/0GZ7/Id3Wt0rpoQeXLs3 gi/v3K6qDyBKJ8cqEudftXMiYFcmSQJMvOA3x97j2J5iDAYltNFwI30hE07uXFhz WpNt/6wM8JLtQfL1IiMiL2I++0tEA4zCc8/aLfwcl6IkAjbP8KTGxtw3gFcyGaqt jzJQXr0j2xrfN6M/g55xXpPhN7R+2NaeiDETlDF9NggadrwnV7Nn9FFxASSXNomD BQU0jIECDo946NJv7/vw7RKxDJuzNdmqp54QZwoMlUPdxJgMw6g= =JCj5 -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add a kselftest to check for unprobed DT devices - Fix address translation for some 3 address cells cases - Refactor firmware node refcounting for AMBA bus - Add bindings for qcom,sm4450-pdc, Qualcomm Kryo 465 CPU, and Freescale QMC HDLC - Add Marantec vendor prefix - Convert qcom,pm8921-keypad, cnxt,cx92755-wdt, da9062-wdt, and atmel,at91rm9200-wdt bindings to DT schema - Several additionalProperties/unevaluatedProperties on child node schemas fixes - Drop reserved-memory bindings which now live in dtschema project - Fix a reference to rockchip,inno-usb2phy.yaml - Remove backlight nodes from display panel examples - Expand example for using DT_SCHEMA_FILES - Merge simple LVDS panel bindings to one binding doc * tag 'devicetree-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (34 commits) dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add 'additionalProperties: false' in child nodes dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Fix example property name dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes dt-bindings: arm,coresight-cti: Drop type for 'cpu' property dt-bindings: soundwire: Add reference to soundwire-controller.yaml schema dt-bindings: input: syna,rmi4: Make "additionalProperties: true" explicit media: dt-bindings: ti,ds90ub960: Add missing type for "i2c-alias" dt-bindings: input: qcom,pm8921-keypad: convert to YAML format of: overlay: unittest: overlay_bad_unresolved: Spelling s/ok/okay/ of: address: Consolidate bus .map() functions of: address: Store number of bus flag cells rather than bool of: unittest: Add tests for address translations of: address: Remove duplicated functions of: address: Fix address translation when address-size is greater than 2 dt-bindings: watchdog: cnxt,cx92755-wdt: convert txt to yaml dt-bindings: watchdog: da9062-wdt: convert txt to yaml dt-bindings: watchdog: fsl,scu-wdt: Document imx8dl dt-bindings: watchdog: atmel,at91rm9200-wdt: convert txt to yaml dt-bindings: usb: rockchip,dwc3: update inno usb2 phy binding name ... |
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Jisheng Zhang
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975f0a640c |
dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic
Add compatible string for SOPHGO CV1800B plic. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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Lorenzo Pieralisi
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5e5c636c69 |
dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property
The GIC v3 specifications allow redistributors and ITSes interconnect ports used to access memory to be wired up in a way that makes the respective initiators/memory observers non-coherent. Add the standard dma-noncoherent property to the GICv3 bindings to allow firmware to describe the redistributors/ITSes components and interconnect ports behaviour in system designs where the redistributors and ITSes are not coherent with the CPU. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20231006125929.48591-2-lpieralisi@kernel.org |
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Geert Uytterhoeven
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977f7c2b27 |
dt-bindings: interrupt-controller: renesas,irqc: Add r8a779f0 support
Document support for the Interrupt Controller for External Devices (INT-EX) in the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/9467a1c67d5d240211f88336973fa968d39cc860.1690446928.git.geert+renesas@glider.be |