We'll have devices that are EHT capable but don't support 320 MHz and
those devices look like the 320 MHz capable devices, but have distinct
subsystem ID.
We already had the same type of differentiation for HE devices that
support 160 MHz or not.
Enhance that mechanism and now the _IWL_DEV_INFO macro gets an
indication whether the bandwidth should be limited for that specific
device.
The subsystem ID gives a binary answer about the bandwidth limitation
and iwl_pci_find_dev_info() compares this to the list of _IWL_DEV_INFO
entries.
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Reviewed-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250205145347.1ba406c538a5.I6e24123f60a764aedfeaaac8768c26e136c320cf@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
We shouldn't have entries in the table that match the same
device; it's possible to have a specific entry followed by
a less specific entry (i.e. NNNN followed by ANY), but not
entries that are dead, where an earlier entry matches the
same as a later one.
Add a test similar to the existing devinfo test to catch
this situation.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://msgid.link/20240319100755.826b859abd62.I8140d7e9ae52ac50c6830818f8f95ccd0d94b3d3@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
We used to have a test built into the code for this internally,
but now we can put that into kunit and let everyone run it, to
verify the devinfo table ordering if it's changed.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Reviewed-by: Benjamin Berg <benjamin.berg@intel.com>
Reviewed-by: Gregory Greenman <gregory.greenman@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://msgid.link/20240123200528.a4a8af7c091f.I0fb09083317b331168b99b8db39656a126a5cc4d@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>