Commit Graph

10937 Commits

Author SHA1 Message Date
Alex Deucher 948ceec7c4 drm/amdgpu/mes: fix format specifier for size_t
To avoid a warning on 32 bit.

Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:11 -04:00
Alice Wong 4bef1abe74 drm/amdgpu/psp: Return failure when firmware failed to load in SRIOV
In SRIOV, PSP will block incompatible firmware from loading. When this happens,
driver should be prevented from continue initialization and start cleanup.
Return failure in psp_cmd_submit_buf when firmware load failed in SRIOV.

Signed-off-by: Alice Wong <shiwei.wong@amd.com>
Reviewed-by: Sashank Saye <sashank.saye@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:11 -04:00
Graham Sider 3cc69021e5 drm/amdgpu: Implement get_vmid_pasid_mapping for gfx11
Implement gmc_v11_0_get_vmid_pasid_mapping_info to fix
gmc_v11_0_flush_gpu_tlb_pasid logic. Change from gfx10 to use
IH_VMID_*_LUT registers for VMID -> PASID mapping.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:11 -04:00
Graham Sider de4c8a7b02 drm/amdgpu: Disable SDMA WPTR_POLL_ENABLE for sdma_v6_0
WPTR_POLL_ENABLE = 1 was kept to support legacy doorbell programming in
SimNow environment. Disable for real hardware.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:11 -04:00
Kenneth Feng b4e7b0e86f drm/amd/pm: enable gfxoff control on smu_v13_0_7
enable gfxoff control interface on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:11 -04:00
Likun Gao dfc53681de drm/amdgpu: add sysfs to shows psp vbflash status
Add new sysfs interface to shows the status of psp vbflash status.

V2: rename the sysfs interface, and set more return value.
    (0: not start; 1: in progress; MBX115 value when vbflash finish)
V3: warning fixes

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:10 -04:00
Likun Gao 8424f2ccb3 drm/amdgpu/psp: Add vbflash sysfs interface support
Add sysfs interface to copy VBIOS.

v2: squash in fix for proper vmalloc API (Alex)

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-10 17:53:10 -04:00
Andrey Grodzovsky 09fffcd969 drm/amdgpu/psp: Add VBIOS flash handler
Add psp vbflash function for psp v13.

v2: fix warnings

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:58:21 -04:00
Yang Li 1e51dbad4b drm/amdgpu/gfx11: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:1222:2-3: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:57 -04:00
James Zhu 97aa0c184f drm/amdgpu/vcn4: replace ip based software ring decode with common vcn software ring decode
Replace ip based software ring decode with common vcn software ring decode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian Koenig <Christian.Koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:52 -04:00
James Zhu 3d4cfd9e4d drm/amdgpu/vcn3: replace ip based software ring decode with common vcn software ring decode
Replace ip based software ring decode with common vcn software ring decode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian Koenig <Christian.Koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:44 -04:00
James Zhu 60a2e9eecf drm/amdgpu/vcn: add common vcn sofware ring decode
Add common vcn sofware ring decode.

v2: fixed compiling error

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Christian Koenig <Christian.Koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:36 -04:00
Richard Gong e02fe3bc7a drm/amdgpu: vi: disable ASPM on Intel Alder Lake based systems
Active State Power Management (ASPM) feature is enabled since kernel 5.14.
There are some AMD Volcanic Islands (VI) GFX cards, such as the WX3200 and
RX640, that do not work with ASPM-enabled Intel Alder Lake based systems.
Using these GFX cards as video/display output, Intel Alder Lake based
systems will freeze after suspend/resume.

The issue was originally reported on one system (Dell Precision 3660 with
BIOS version 0.14.81), but was later confirmed to affect at least 4
pre-production Alder Lake based systems.

Add an extra check to disable ASPM on Intel Alder Lake based systems with
the problematic AMD Volcanic Islands GFX cards.

Fixes: 0064b0ce85 ("drm/amd/pm: enable ASPM by default")
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/1885
Signed-off-by: Richard Gong <richard.gong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:28 -04:00
Christian König d54762cc3e drm/amdgpu: nuke dynamic gfx scratch reg allocation
It's over a decade ago that this was actually used for more than ring and
IB tests. Just use the static register directly where needed and nuke the
now useless infrastructure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:57:21 -04:00
Alex Deucher bf1781e17f drm/amdgpu: simplify nv and soc21 read_register functions
Check of the base offset for the IP exists rather than
explicitly checking for how many instances of a particular
IP there are.  This is what soc15.c already does.  Expand
this to nv.c and soc21.c.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:56:57 -04:00
Yiqing Yao 98f5618846 drm/amdgpu: flush delete wq after wait fence
[why]
lru_list not empty warning in sw fini during repeated device bind unbind.
There should be a amdgpu_fence_wait_empty() before the flush_delayed_work()
call as Christian suggested.

[how]
Move to do flush_delayed_work for ttm bo delayed delete wq after fence_driver_hw_fini.

Tested by: Yiqing Yao <yiqing.yao@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Yiqing Yao <yiqing.yao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 16:56:41 -04:00
Huang Rui f333c9c6f5 drm/amdgpu/discovery: enable mes support for GC v11.0.1
GC v11.0.1 is using MES v11, so add IP block.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:15 -04:00
Huang Rui 10eab4e7d7 drm/amdgpu/discovery: enable gfx v11 for GC 11.0.1
Enable gfx v11 for GC 11.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:15 -04:00
Huang Rui 7319c14fb0 drm/amdgpu: enable imu firmware for GC 11.0.1
The GC 11.0.1 needs load IMU to power up the GFX before loads GFX
firmware.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:15 -04:00
Huang Rui b0abae7d5d drm/amdgpu: add GC v11.0.1 into mes v11
Add GC v11.0.1 support into mes v11.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 2e5dbc1b05 drm/amdgpu: add gfx support for GC 11.0.1
Add GC 11.0.1 gfx support to gfx11 implementation.

v2: squash in golden regs

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Alex Deucher 921173e24d drm/amdgpu/discovery: set flag for GC 11.0.1
Set the APU flag appropriately for GC 11.0.1.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 2375271493 drm/amdgpu: set GC 11.0.1 family
Add GC 11.0.1 family support.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 500448dce2 drm/amdgpu/discovery: enable sdma v6 for SDMA 6.0.1
Enable sdma (system dma) v6 for SDMA 6.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 04dd809b6f drm/amdgpu: add sdma support for sdma 6.0.1
Add sdma 6.0.1 support to sdma6 implementation.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Xiaojian Du bed95cfdc5 drm/amdgpu/discovery: add PSP v13.0.4 into the IP discovery list
This patch will add PSP v13.0.4 into the IP discovery list.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 48858a101e drm/amdgpu/discovery: enable ih v6 for OSS 6.0.1
Enable ih (interrupt handler) v6 for OSS 6.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui a8f24139cc drm/amdgpu/discovery: enable gmc v11 for GC 11.0.1
Enable gmc (graphic memory controller) v11 for GC 11.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui ee367aed75 drm/amdgpu: add gmc v11 support for GC 11.0.1
Add gmc v11 support for GC 11.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 6e4eb7ce1f drm/amdgpu/discovery: enable soc21 common for GC 11.0.1
Enable soc21 common for GC 11.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 11417a927b drm/amdgpu: add soc21 common ip block support for GC 11.0.1
Add common soc21 ip block support for GC 11.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Huang Rui 50e9f54de4 drm/amdgpu: add mmhub support for MMHUB 3.0.1
Add the mmhub support for MMHUB 3.0.1.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Xiaojian Du 6e9e59e26f drm/amdgpu/discovery: add HDP v5.2.1 into the IP discovery list
This patch is to add HDP v5.2.1 in the IP discovery list.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:14 -04:00
Xiaojian Du 78039df8e8 drm/amdgpu: add the files of HDP v5.2 block
This patch is to add the files of HDP v5.2 block.
HDP (Host Data Port) is the IP which handles
host access to VRAM via the PCI BAR.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Xiaojian Du 0c1e5527e0 drm/admgpu/discovery: add NBIO v7.7 into the IP discovery list
This patch is to add NBIO v7.7 into the IP discovery list.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Xiaojian Du 810ecd4001 drm/amdgpu: add the files of NBIO v7.7 block
This patch is to add the files of NBIO v7.7 block.
NBIO (New Bus IO) is the block which handles
the GPU interface to the PCIe bus.

v2: squash in register name fix (Xiaojian)

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Xiaojian Du bafd6cbe4a drm/amdgpu: add pcie port function helpers for SOC21
These helpers will be used on NBIO v7.7.0.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Xiaojian Du f5d990d612 drm/amdgpu: skip the new gc doorbell function for some asics
This patch will skip the new gc doorbell function for some asics,
only enable new doorbell model on aisc where it is supported.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Xiaojian Du 06aeb75332 drm/amdgpu: handle asics with 1 SDMA instance
This patch will handle asics with 1 SDMA instance.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-06 10:36:13 -04:00
Dave Airlie b900352f9d Merge tag 'amd-drm-next-5.19-2022-04-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.19-2022-04-29:

amdgpu
- RAS updates
- SI dpm deadlock fix
- Misc code cleanups
- HDCP fixes
- PSR fixes
- DSC fixes
- SDMA doorbell cleanups
- S0ix fix
- DC FP fix
- Zen dom0 regression fix for APUs
- IP discovery updates
- Initial SoC21 support
- Support for new vbios tables
- Runtime PM fixes
- Add PSP TA debugfs interface

amdkfd:
- Misc code cleanups
- Ignore bogus MEC signals more efficiently
- SVM fixes
- Use bitmap helpers

radeon:
- Misc code cleanups
- Spelling/grammer fixes

From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220429144853.5742-1-alexander.deucher@amd.com
2022-05-06 15:05:27 +10:00
Kenneth Feng 27e3911c40 drm/amd/soc21: enable mmhub and athub power gating
add the pg_flag for athub and mmhub pg.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:44 -04:00
Likun Gao 9503a944e7 drm/amdgpu: enable cgcg and cgls for GC 11_0_2
Enable GFX CGCG and CGLS for GFX v11_0_2.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:00 -04:00
Flora Cui 30ca5b2b6b drm/amdgpu/discovery: set family for GC 11.0.2
Set AMDGPU_FAMILY_GC_11_0_0.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:57 -04:00
Flora Cui af6958492a drm/amdgpu/discovery: add gfx11 support for GC 11.0.2
Enable gfx11 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:54 -04:00
Likun Gao 84f5670737 drm/amdgpu: update rlc ram for gc v11_0_2
Add imu rlc ram register settings for gc v11_0_2

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:50 -04:00
Flora Cui 1366018e01 drm/amdgpu: add initial GC 11.0.2 support
Add initial support for GC 11.0.2 to gfx_v11_0.c.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:46 -04:00
Flora Cui 621e87875c drm/amdgpu: add gc v11_0_2 imu firmware
add gc v11_0_2 imu firmware

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:42 -04:00
Flora Cui 215a65f5d1 drm/amdgpu/discovery: add mes11 support for GC 11.0.2
Enable Micro Engine Scheduler support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:39 -04:00
Flora Cui 32697fea3a drm/amdgpu: add mes 11 firmware for mes 11.0.2
Define firmware for MES 11.0.2.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:37 -04:00
Flora Cui 63b170806b drm/amdgpu/discovery: add sdma6 support for SDMA 6.0.2
Enable sdma6 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:35 -04:00
Flora Cui c233f3fac7 drm/amdgpu: add sdma 6.0.2 firware support
define sdma 6.0.2 firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:29 -04:00
James Zhu 3a65fbc0a3 drm/amdgpu/discovery: enable vcn/jpeg v4_0_4
Enable vcn/jpeg 4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:27 -04:00
Sonny Jiang f963052b55 drm/amdgpu: Enable vcn v4_0_4 sram
enable vcn v4_0_4 sram

Signed-off-by: Sonny Jiang <sonjiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:24 -04:00
James Zhu ec9db74e1a drm/amdgpu/vcn: enable VCN DPG mode for VCN4_0_4
Enable VCN DPG mode for VCN4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:21 -04:00
James Zhu 143a34a0ac drm/amdgpu/vcn: enable VCN PG for VCN4_0_4
Enable VCN PG for VCN4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:18 -04:00
James Zhu 7ece9314a4 drm/amdgpu/vcn: enable VCN CG for VCN4_0_4
Enable VCN CG for VCN4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:16 -04:00
James Zhu ebac66a328 drm/amdgpu/jpeg: enable JPEG PG for VCN4_0_4
Enable JPEG PG for VCN4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:14 -04:00
James Zhu 71dae22143 drm/amdgpu/jpeg: enable JPEG CG for VCN4_0_4
Enable JPEG CG for VCN4_0_4.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:12 -04:00
James Zhu fbd23b5598 drm/amdgpu: add VCN4_0_4 firmware
Add VCN4_0_4 firmware.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:10 -04:00
Chengming Gui 5681e8009d drm/amdgpu/discovery: add psp13 support for PSP 13.0.7
Enable psp 13 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:07 -04:00
Chengming Gui 438a937d9a drm/amdgpu/psp13: add support for MP0 13.0.7
Enable support in psp code.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:52:05 -04:00
Flora Cui eee5ed4241 drm/amdgpu/discovery: add gmc11 support for GC 11.0.2
Enable gmc11 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:58 -04:00
Flora Cui f2754bf7e0 drm/amdgpu: add GMC11 support for GC 11.0.2
Add initial support for GC 11.0.2.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:56 -04:00
Flora Cui 89ae779b49 drm/amdgpu: add UMC 8.11.0 support
Add initial support for UMC 8.11.0.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:54 -04:00
Hawking Zhang f40fc1916c drm/amdgpu: split mmhub v3_0_2 callbacks from mmhub v3_0
So we don't need to add ip version check in every callback
when there is atc related programming that is only
available in mmhub v3_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:51 -04:00
Hawking Zhang 9fa57397d9 drm/amdgpu: add mmhub v3_0_2 ip callback functions
Unlike mmhub v3_0_0, there is no atc_l2 related
registers available in mmhub v3_0_2. Split the mmhub
v3_0_2 callback implementations from mmhub v3_0 so we
don't need to add ip version check when atc related
programming needs to be added to mmhub v3_0_0.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:48 -04:00
Chengming Gui 86140844dc drm/amdgpu/discovery: add SMUIO_13_0_8 func support
Add SMUIO funcs for SMUIO_13_0_8.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:43 -04:00
Flora Cui 8742f5f1c4 drm/amdgpu/discovery: add hdp6 support for HDP 6.0.1
Enable Host Data Path support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:40 -04:00
Flora Cui 4dad9d6338 drm/amdgpu/discovery: add nbio 4.3 support for NBIO 4.3.1
Enable nbio 4.3 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:38 -04:00
Flora Cui 1db7b3aa99 drm/amdgpu/discovery: add smu13 support for MP1 13.0.7
Enable System Management Unit support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:36 -04:00
Flora Cui 1f9261863a drm/amdgpu/discovery: add ih6 support for IH 6.0.2
Enable Interrupt Handler v6 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:33 -04:00
Flora Cui 446af531f5 drm/amdgpu: add support for ATHUB 3.0.2
Add support 3.0.2 to the ATHUB 3.0 code.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:30 -04:00
Flora Cui 0effe4a086 drm/amdgpu/discovery: add soc21 support for GC 11.0.2
Enable soc21 common soc support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:28 -04:00
Flora Cui 92fd215314 drm/amdgpu: add soc21 support for GC 11.0.2
Add initial soc21 support.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:24 -04:00
Evan Quan d386f64588 drm/amdgpu: enable clock gating for HDP 6.0
Enable HDP 6.0 clock gating.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:21 -04:00
Evan Quan 2013906955 drm/amdgpu: enable clock gating for IH 6.0
Enable IH 6.0 clock gating.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:17 -04:00
Evan Quan 7ccf6eb003 drm/amdgpu: enable MGCG and LS for MMHUB 3.0
Enable MMHUB 3.0 MGCG and LS features.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:14 -04:00
Evan Quan c649ed054a drm/amdgpu: enable MGCG and LS for ATHUB 3.0
Enable ATHUB 3.0 MGCG and LS features.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:11 -04:00
Evan Quan 915b5ce774 drm/amdgpu: enable more GFX clockgating features for GC 11.0.0
Support more GFX clockgating features(3D_CGCG, 3D_CGLS, MGCG,
FGCG and PERF_CLK).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:58 -04:00
Minghao Chi 38c1c73670 drm/amdgpu: simplify the return expression of vega10_ih_hw_init()
Simplify the return expression.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:22 -04:00
Minghao Chi 3f92a7d828 drm/amdgpu: simplify the return expression
Simplify the return expression.

Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:20 -04:00
Mike Lothian 0c1c5e4aae drm/amdgpu/gfx11: Avoid uninitialised variable 'index'
This stops clang complaining:

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
        if (ring->is_mes_queue) {
            ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:433:30: note: uninitialized use occurs here
        amdgpu_device_wb_free(adev, index);
                                    ^~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:376:2: note: remove the 'if' if its condition is always false
        if (ring->is_mes_queue) {
        ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:364:16: note: initialize the variable 'index' to silence this warning
        unsigned index;
                      ^
                       = 0

Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:17 -04:00
Mike Lothian 8fab8e2ecc drm/amdgpu/gfx10: Avoid uninitialised variable 'index'
This stops clang complaining:

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:6: warning: variable 'index' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized]
        if (ring->is_mes_queue) {
            ^~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3903:30: note: uninitialized use occurs here
        amdgpu_device_wb_free(adev, index);
                                    ^~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3846:2: note: remove the 'if' if its condition is always false
        if (ring->is_mes_queue) {
        ^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:3839:16: note: initialize the variable 'index' to silence this warning
        unsigned index;
                      ^
                       = 0

Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:15 -04:00
Mike Lothian 0a8c5ec66a drm/amdgpu/gfx11: Add missing break
This stops clang complaining:

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: warning: unannotated fall-through between switch labels [-Wimplicit-fallthrough]
        default:
        ^
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c:5895:2: note: insert 'break;' to avoid fall-through
        default:
        ^
        break;

Signed-off-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:11 -04:00
Alex Deucher 5a90c24ad0 Revert "drm/amdgpu: disable runpm if we are the primary adapter"
This reverts commit b95dc06af3.

This workaround is no longer necessary.  We have a better workaround
in commit f95af4a923 ("drm/amdgpu: don't runtime suspend if there are displays attached (v3)").

Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:00 -04:00
Alex Deucher 98bae89647 drm/amdgpu/gfx11: remove some register fields that no longer exist
Some copy paste leftovers for older asics.  They were protected
by __BIG_ENDIAN, so we didn't notice them initially.

Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:33:08 -04:00
James Zhu d6ffefccf7 drm/amdgpu/discovery: add VCN 4.0 Support
Enable VCN 4.0 on asics where it is present.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
James Zhu 9ac0edaa0f drm/amdgpu: add vcn_4_0_0 video codec query
Add vcn_4_0_0 video codec query.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
James Zhu 04270390fe drm/amdgpu/vcn: enable vcn4 dpg mode
Enable vcn4 dpg mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
James Zhu 7c507d35a5 drm/amdgpu/jpeg: enable JPEG PG and CG for VCN4_0_0
Enable JPEG PG and CG for VCN4_0_0.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
Leo Liu 8b719b968f drm/amdgpu: enable VCN4 PG and CG for VCN4_0_0
Most of the tiles can be power/clock gated.

Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
James Zhu b13111de32 drm/amdgpu/jpeg: add jpeg support for VCN4_0_0
Add jpeg support for VCN4_0_0.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
Leo Liu 8da1170a16 drm/amdgpu: add VCN4 ip block support
Add VCN 4.0 initialization and decoder/encoder ring functions.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
James Zhu b857e1477d drm/amdgpu: move out asic specific definition from common header
Move out asic specific definition from common header.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
Leo Liu 1218a2e39f drm/amdgpu: make software ring functions reuseable for newer VCN
Software ring will be supported only from VCN4

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:56 -04:00
Stanley Yang 8143b87c9d drm/amdgpu/discovery: add SDMA v6_0 ip block
Add SDMA v6 ip block for asics which support it.

Signed-off-by: Stanley Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:55 -04:00
Stanley Yang 61a039d175 drm/amdgpu: add initial support for sdma v6.0
Add functions for SDMA version 6.

Signed-off-by: Stanley Yang <Stanley.Yang@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:55 -04:00
Hawking Zhang 5e779b1745 drm/amdgpu: add sdma v6_0_0 pkt header v3
v1: add sdma v6_0_0 pkt definitions (Hawking)
v2: add gcr control field definition (Likun)
v3: correct some definitions (Likun)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:55 -04:00
Alex Deucher e97b07208d drm/amdgpu/discovery: add MES11 support
Enable MES 11 on asics which support it.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:55 -04:00
Likun Gao f6abd4d9f5 drm/amdgpu/discovery: add GFX 11.0 Support
Enable GFX 11.0 on asics where it is present.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 10:43:55 -04:00