Commit Graph

6 Commits

Author SHA1 Message Date
Alexandre Courbot ca16b15e78 gpu: nova-core: bitfield: remove BitOr implementation
Using this operand can produce invalid values. It also doesn't bring
any benefit as one can use the builder pattern to assemble a new value.

Reported-by: Edwin Peer <epeer@nvidia.com>
Link: https://lore.kernel.org/rust-for-linux/F3853912-2C1C-4F9B-89B0-3168689F35B3@nvidia.com/
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251022-nova-bitfield-v1-3-73bc0988667b@nvidia.com>
2025-10-25 13:16:31 +09:00
Alexandre Courbot e6b8932b93 gpu: nova-core: bitfield: simplify expression
The shift is more easily expressed by the index of the lowest bit of the
field.

Reported-by: Edwin Peer <epeer@nvidia.com>
Link: https://lore.kernel.org/rust-for-linux/F3853912-2C1C-4F9B-89B0-3168689F35B3@nvidia.com/
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251022-nova-bitfield-v1-2-73bc0988667b@nvidia.com>
2025-10-25 13:16:31 +09:00
Alexandre Courbot fa08ec789f gpu: nova-core: bitfield: simplify condition
This condition was uselessly convoluted.

Reported-by: Edwin Peer <epeer@nvidia.com>
Link: https://lore.kernel.org/rust-for-linux/F3853912-2C1C-4F9B-89B0-3168689F35B3@nvidia.com/
Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251022-nova-bitfield-v1-1-73bc0988667b@nvidia.com>
2025-10-25 13:16:31 +09:00
Joel Fernandes 77ed4376d7 gpu: nova-core: bitfield: Add support for custom visibility
Add support for custom visibility to allow for users to control
visibility of the structure and helpers.

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev>
Reviewed-by: Edwin Peer <epeer@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
[acourbot@nvidia.com: fix long lines warnings and typo in commit message.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251016151323.1201196-5-joelagnelf@nvidia.com>
2025-10-21 22:40:00 +09:00
Joel Fernandes 7cabacb1aa gpu: nova-core: bitfield: Add support for different storage widths
Previously, bitfields were hardcoded to use u32 as the underlying
storage type.  Add support for different storage types (u8, u16, u32,
u64) to the bitfield macro.

New syntax is: struct Name(<type ex., u32>) { ... }

Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev>
Reviewed-by: Edwin Peer <epeer@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
[acourbot@nvidia.com: fix long lines warnings.]
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251016151323.1201196-4-joelagnelf@nvidia.com>
2025-10-21 22:39:44 +09:00
Joel Fernandes 71ea85be25 gpu: nova-core: bitfield: Move bitfield-specific code from register! into new macro
Move the bitfield-specific code from the register macro into a new macro
called bitfield. This will be used to define structs with bitfields,
similar to C language.

Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-by: Edwin Peer <epeer@nvidia.com>
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Message-ID: <20251016151323.1201196-3-joelagnelf@nvidia.com>
2025-10-21 22:38:57 +09:00