mirror of https://github.com/torvalds/linux.git
KVM: x86: apply guest MTRR virtualization on host reserved pages
Currently guest MTRR is avoided if kvm_is_reserved_pfn returns true. However, the guest could prefer a different page type than UC for such pages. A good example is that pass-throughed VGA frame buffer is not always UC as host expected. This patch enables full use of virtual guest MTRRs. Suggested-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Tested-by: Joerg Roedel <jroedel@suse.de> (on AMD) Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -1166,14 +1166,11 @@ static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
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u8 mtrr;
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u8 mtrr;
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/*
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/*
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* 1. MMIO: always map as UC
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* 1. MMIO: trust guest MTRR, so same as item 3.
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* 2. No passthrough: always map as WB, and force guest PAT to WB as well
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* 2. No passthrough: always map as WB, and force guest PAT to WB as well
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* 3. Passthrough: can't guarantee the result, try to trust guest.
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* 3. Passthrough: can't guarantee the result, try to trust guest.
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*/
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*/
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if (is_mmio)
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if (!is_mmio && !kvm_arch_has_assigned_device(vcpu->kvm))
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return _PAGE_NOCACHE;
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if (!kvm_arch_has_assigned_device(vcpu->kvm))
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return 0;
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return 0;
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mtrr = kvm_mtrr_get_guest_memory_type(vcpu, gfn);
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mtrr = kvm_mtrr_get_guest_memory_type(vcpu, gfn);
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@ -8632,22 +8632,17 @@ static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
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u64 ipat = 0;
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u64 ipat = 0;
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/* For VT-d and EPT combination
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/* For VT-d and EPT combination
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* 1. MMIO: always map as UC
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* 1. MMIO: guest may want to apply WC, trust it.
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* 2. EPT with VT-d:
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* 2. EPT with VT-d:
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* a. VT-d without snooping control feature: can't guarantee the
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* a. VT-d without snooping control feature: can't guarantee the
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* result, try to trust guest.
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* result, try to trust guest. So the same as item 1.
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* b. VT-d with snooping control feature: snooping control feature of
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* b. VT-d with snooping control feature: snooping control feature of
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* VT-d engine can guarantee the cache correctness. Just set it
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* VT-d engine can guarantee the cache correctness. Just set it
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* to WB to keep consistent with host. So the same as item 3.
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* to WB to keep consistent with host. So the same as item 3.
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* 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
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* 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
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* consistent with host MTRR
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* consistent with host MTRR
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*/
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*/
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if (is_mmio) {
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if (!is_mmio && !kvm_arch_has_noncoherent_dma(vcpu->kvm)) {
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cache = MTRR_TYPE_UNCACHABLE;
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goto exit;
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}
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if (!kvm_arch_has_noncoherent_dma(vcpu->kvm)) {
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ipat = VMX_EPT_IPAT_BIT;
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ipat = VMX_EPT_IPAT_BIT;
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cache = MTRR_TYPE_WRBACK;
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cache = MTRR_TYPE_WRBACK;
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goto exit;
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goto exit;
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