Gh0st
/
linux
mirror of https://github.com/torvalds/linux.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

clk: xgene: convert from round_rate() to determine_rate() 

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
This commit is contained in:
Brian Masney 2025-08-11 11:18:57 -04:00
parent d616db080a
commit f95ed76fbe
1 changed files with 24 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

41
drivers/clk/clk-xgene.c
View File

@ -271,23 +271,28 @@ static unsigned long xgene_clk_pmd_recalc_rate(struct clk_hw *hw,
return ret; return ret;
} }
static long xgene_clk_pmd_round_rate(struct clk_hw *hw, unsigned long rate, static int xgene_clk_pmd_determine_rate(struct clk_hw *hw,
unsigned long *parent_rate) struct clk_rate_request *req)
{ {
struct xgene_clk_pmd *fd = to_xgene_clk_pmd(hw); struct xgene_clk_pmd *fd = to_xgene_clk_pmd(hw);
u64 ret, scale; u64 ret, scale;
if (!rate || rate >= *parent_rate) if (!req->rate || req->rate >= req->best_parent_rate) {
return *parent_rate; req->rate = req->best_parent_rate;
return 0;
}
/* freq = parent_rate * scaler / denom */ /* freq = parent_rate * scaler / denom */
ret = rate * fd->denom; ret = req->rate * fd->denom;
scale = DIV_ROUND_UP_ULL(ret, *parent_rate); scale = DIV_ROUND_UP_ULL(ret, req->best_parent_rate);
ret = (u64)*parent_rate * scale; ret = (u64)req->best_parent_rate * scale;
do_div(ret, fd->denom); do_div(ret, fd->denom);
return ret; req->rate = ret;
return 0;
} }
static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate, static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate,
@ -333,7 +338,7 @@ static int xgene_clk_pmd_set_rate(struct clk_hw *hw, unsigned long rate,
static const struct clk_ops xgene_clk_pmd_ops = { static const struct clk_ops xgene_clk_pmd_ops = {
.recalc_rate = xgene_clk_pmd_recalc_rate, .recalc_rate = xgene_clk_pmd_recalc_rate,
.round_rate = xgene_clk_pmd_round_rate, .determine_rate = xgene_clk_pmd_determine_rate,
.set_rate = xgene_clk_pmd_set_rate, .set_rate = xgene_clk_pmd_set_rate,
}; };
@ -593,23 +598,25 @@ static int xgene_clk_set_rate(struct clk_hw *hw, unsigned long rate,
return parent_rate / divider_save; return parent_rate / divider_save;
} }
static long xgene_clk_round_rate(struct clk_hw *hw, unsigned long rate, static int xgene_clk_determine_rate(struct clk_hw *hw,
unsigned long *prate) struct clk_rate_request *req)
{ {
struct xgene_clk *pclk = to_xgene_clk(hw); struct xgene_clk *pclk = to_xgene_clk(hw);
unsigned long parent_rate = *prate; unsigned long parent_rate = req->best_parent_rate;
u32 divider; u32 divider;
if (pclk->param.divider_reg) { if (pclk->param.divider_reg) {
/* Let's compute the divider */ /* Let's compute the divider */
if (rate > parent_rate) if (req->rate > parent_rate)
rate = parent_rate; req->rate = parent_rate;
divider = parent_rate / rate; /* Rounded down */ divider = parent_rate / req->rate; /* Rounded down */
} else { } else {
divider = 1; divider = 1;
} }
return parent_rate / divider; req->rate = parent_rate / divider;
return 0;
} }
static const struct clk_ops xgene_clk_ops = { static const struct clk_ops xgene_clk_ops = {
@ -618,7 +625,7 @@ static const struct clk_ops xgene_clk_ops = {
.is_enabled = xgene_clk_is_enabled, .is_enabled = xgene_clk_is_enabled,
.recalc_rate = xgene_clk_recalc_rate, .recalc_rate = xgene_clk_recalc_rate,
.set_rate = xgene_clk_set_rate, .set_rate = xgene_clk_set_rate,
.round_rate = xgene_clk_round_rate, .determine_rate = xgene_clk_determine_rate,
}; };
static struct clk *xgene_register_clk(struct device *dev, static struct clk *xgene_register_clk(struct device *dev,