mirror of https://github.com/torvalds/linux.git
ASoC: nau8821: Fix IRQ handling and improve jack
Merge series from Cristian Ciocaltea <cristian.ciocaltea@collabora.com>: This patch series addresses a set of issues in the Nuvoton NAU88L21 audio codec driver related to interrupt handling and jack hotplug detection reliability. The changes focus on: * Eliminating race conditions between jack insertion and ejection events * Ensuring interrupts are consistently and correctly cleared before unmasking * Introducing a DMI-based quirk to bypass the jack debounce circuit on Valve Steam Deck, improving detection accuracy under stress * Improving robustness of the IRQ handler by avoiding unnecessary blocking operations The series has been tested on affected hardware to verify correct behavior during repeated and rapid jack hotplug cycles.
This commit is contained in:
Mark Brown
commit
f1a450f9e1
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@ -26,7 +26,8 @@
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#include <sound/tlv.h>
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#include "nau8821.h"
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#define NAU8821_JD_ACTIVE_HIGH BIT(0)
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#define NAU8821_QUIRK_JD_ACTIVE_HIGH BIT(0)
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#define NAU8821_QUIRK_JD_DB_BYPASS BIT(1)
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static int nau8821_quirk;
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static int quirk_override = -1;
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@ -1021,12 +1022,17 @@ static bool nau8821_is_jack_inserted(struct regmap *regmap)
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return active_high == is_high;
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}
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static void nau8821_int_status_clear_all(struct regmap *regmap)
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static void nau8821_irq_status_clear(struct regmap *regmap, int active_irq)
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{
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int active_irq, clear_irq, i;
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int clear_irq, i;
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/* Reset the intrruption status from rightmost bit if the corres-
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* ponding irq event occurs.
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if (active_irq) {
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regmap_write(regmap, NAU8821_R11_INT_CLR_KEY_STATUS, active_irq);
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return;
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}
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/* Reset the interruption status from rightmost bit if the
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* corresponding irq event occurs.
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*/
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regmap_read(regmap, NAU8821_R10_IRQ_STATUS, &active_irq);
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for (i = 0; i < NAU8821_REG_DATA_LEN; i++) {
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@ -1052,20 +1058,24 @@ static void nau8821_eject_jack(struct nau8821 *nau8821)
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snd_soc_component_disable_pin(component, "MICBIAS");
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snd_soc_dapm_sync(dapm);
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/* Clear all interruption status */
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nau8821_int_status_clear_all(regmap);
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/* Enable the insertion interruption, disable the ejection inter-
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* ruption, and then bypass de-bounce circuit.
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*/
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/* Disable & mask both insertion & ejection IRQs */
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regmap_update_bits(regmap, NAU8821_R12_INTERRUPT_DIS_CTRL,
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NAU8821_IRQ_EJECT_DIS | NAU8821_IRQ_INSERT_DIS,
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NAU8821_IRQ_EJECT_DIS);
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/* Mask unneeded IRQs: 1 - disable, 0 - enable */
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NAU8821_IRQ_INSERT_DIS | NAU8821_IRQ_EJECT_DIS,
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NAU8821_IRQ_INSERT_DIS | NAU8821_IRQ_EJECT_DIS);
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regmap_update_bits(regmap, NAU8821_R0F_INTERRUPT_MASK,
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NAU8821_IRQ_EJECT_EN | NAU8821_IRQ_INSERT_EN,
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NAU8821_IRQ_EJECT_EN);
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NAU8821_IRQ_INSERT_EN | NAU8821_IRQ_EJECT_EN,
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NAU8821_IRQ_INSERT_EN | NAU8821_IRQ_EJECT_EN);
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/* Clear all interruption status */
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nau8821_irq_status_clear(regmap, 0);
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/* Enable & unmask the insertion IRQ */
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regmap_update_bits(regmap, NAU8821_R12_INTERRUPT_DIS_CTRL,
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NAU8821_IRQ_INSERT_DIS, 0);
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regmap_update_bits(regmap, NAU8821_R0F_INTERRUPT_MASK,
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NAU8821_IRQ_INSERT_EN, 0);
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/* Bypass de-bounce circuit */
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regmap_update_bits(regmap, NAU8821_R0D_JACK_DET_CTRL,
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NAU8821_JACK_DET_DB_BYPASS, NAU8821_JACK_DET_DB_BYPASS);
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@ -1089,22 +1099,17 @@ static void nau8821_eject_jack(struct nau8821 *nau8821)
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NAU8821_IRQ_KEY_RELEASE_DIS |
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NAU8821_IRQ_KEY_PRESS_DIS);
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}
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}
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static void nau8821_jdet_work(struct work_struct *work)
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{
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struct nau8821 *nau8821 =
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container_of(work, struct nau8821, jdet_work);
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container_of(work, struct nau8821, jdet_work.work);
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struct snd_soc_dapm_context *dapm = nau8821->dapm;
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struct snd_soc_component *component = snd_soc_dapm_to_component(dapm);
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struct regmap *regmap = nau8821->regmap;
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int jack_status_reg, mic_detected, event = 0, event_mask = 0;
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snd_soc_component_force_enable_pin(component, "MICBIAS");
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snd_soc_dapm_sync(dapm);
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msleep(20);
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regmap_read(regmap, NAU8821_R58_I2C_DEVICE_ID, &jack_status_reg);
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mic_detected = !(jack_status_reg & NAU8821_KEYDET);
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if (mic_detected) {
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@ -1137,6 +1142,7 @@ static void nau8821_jdet_work(struct work_struct *work)
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snd_soc_component_disable_pin(component, "MICBIAS");
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snd_soc_dapm_sync(dapm);
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}
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event_mask |= SND_JACK_HEADSET;
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snd_soc_jack_report(nau8821->jack, event, event_mask);
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}
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@ -1146,6 +1152,15 @@ static void nau8821_setup_inserted_irq(struct nau8821 *nau8821)
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{
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struct regmap *regmap = nau8821->regmap;
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/* Disable & mask insertion IRQ */
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regmap_update_bits(regmap, NAU8821_R12_INTERRUPT_DIS_CTRL,
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NAU8821_IRQ_INSERT_DIS, NAU8821_IRQ_INSERT_DIS);
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regmap_update_bits(regmap, NAU8821_R0F_INTERRUPT_MASK,
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NAU8821_IRQ_INSERT_EN, NAU8821_IRQ_INSERT_EN);
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/* Clear insert IRQ status */
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nau8821_irq_status_clear(regmap, NAU8821_JACK_INSERT_DETECTED);
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/* Enable internal VCO needed for interruptions */
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if (nau8821->dapm->bias_level < SND_SOC_BIAS_PREPARE)
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nau8821_configure_sysclk(nau8821, NAU8821_CLK_INTERNAL, 0);
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@ -1160,10 +1175,12 @@ static void nau8821_setup_inserted_irq(struct nau8821 *nau8821)
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regmap_update_bits(regmap, NAU8821_R1D_I2S_PCM_CTRL2,
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NAU8821_I2S_MS_MASK, NAU8821_I2S_MS_SLAVE);
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/* Not bypass de-bounce circuit */
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/* Do not bypass de-bounce circuit */
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if (!(nau8821_quirk & NAU8821_QUIRK_JD_DB_BYPASS))
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regmap_update_bits(regmap, NAU8821_R0D_JACK_DET_CTRL,
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NAU8821_JACK_DET_DB_BYPASS, 0);
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/* Unmask & enable the ejection IRQs */
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regmap_update_bits(regmap, NAU8821_R0F_INTERRUPT_MASK,
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NAU8821_IRQ_EJECT_EN, 0);
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regmap_update_bits(regmap, NAU8821_R12_INTERRUPT_DIS_CTRL,
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@ -1174,7 +1191,8 @@ static irqreturn_t nau8821_interrupt(int irq, void *data)
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{
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struct nau8821 *nau8821 = (struct nau8821 *)data;
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struct regmap *regmap = nau8821->regmap;
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int active_irq, clear_irq = 0, event = 0, event_mask = 0;
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struct snd_soc_component *component;
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int active_irq, event = 0, event_mask = 0;
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if (regmap_read(regmap, NAU8821_R10_IRQ_STATUS, &active_irq)) {
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dev_err(nau8821->dev, "failed to read irq status\n");
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@ -1185,48 +1203,41 @@ static irqreturn_t nau8821_interrupt(int irq, void *data)
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if ((active_irq & NAU8821_JACK_EJECT_IRQ_MASK) ==
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NAU8821_JACK_EJECT_DETECTED) {
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cancel_delayed_work_sync(&nau8821->jdet_work);
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regmap_update_bits(regmap, NAU8821_R71_ANALOG_ADC_1,
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NAU8821_MICDET_MASK, NAU8821_MICDET_DIS);
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nau8821_eject_jack(nau8821);
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event_mask |= SND_JACK_HEADSET;
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clear_irq = NAU8821_JACK_EJECT_IRQ_MASK;
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} else if (active_irq & NAU8821_KEY_SHORT_PRESS_IRQ) {
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event |= NAU8821_BUTTON;
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event_mask |= NAU8821_BUTTON;
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clear_irq = NAU8821_KEY_SHORT_PRESS_IRQ;
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nau8821_irq_status_clear(regmap, NAU8821_KEY_SHORT_PRESS_IRQ);
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} else if (active_irq & NAU8821_KEY_RELEASE_IRQ) {
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event_mask = NAU8821_BUTTON;
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clear_irq = NAU8821_KEY_RELEASE_IRQ;
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nau8821_irq_status_clear(regmap, NAU8821_KEY_RELEASE_IRQ);
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} else if ((active_irq & NAU8821_JACK_INSERT_IRQ_MASK) ==
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NAU8821_JACK_INSERT_DETECTED) {
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cancel_delayed_work_sync(&nau8821->jdet_work);
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regmap_update_bits(regmap, NAU8821_R71_ANALOG_ADC_1,
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NAU8821_MICDET_MASK, NAU8821_MICDET_EN);
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if (nau8821_is_jack_inserted(regmap)) {
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/* detect microphone and jack type */
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cancel_work_sync(&nau8821->jdet_work);
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schedule_work(&nau8821->jdet_work);
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/* Detect microphone and jack type */
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component = snd_soc_dapm_to_component(nau8821->dapm);
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snd_soc_component_force_enable_pin(component, "MICBIAS");
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snd_soc_dapm_sync(nau8821->dapm);
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schedule_delayed_work(&nau8821->jdet_work, msecs_to_jiffies(20));
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/* Turn off insertion interruption at manual mode */
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regmap_update_bits(regmap,
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NAU8821_R12_INTERRUPT_DIS_CTRL,
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NAU8821_IRQ_INSERT_DIS,
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NAU8821_IRQ_INSERT_DIS);
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regmap_update_bits(regmap,
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NAU8821_R0F_INTERRUPT_MASK,
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NAU8821_IRQ_INSERT_EN,
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NAU8821_IRQ_INSERT_EN);
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nau8821_setup_inserted_irq(nau8821);
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} else {
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dev_warn(nau8821->dev,
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"Inserted IRQ fired but not connected\n");
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nau8821_eject_jack(nau8821);
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}
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} else {
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/* Clear the rightmost interrupt */
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nau8821_irq_status_clear(regmap, active_irq);
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}
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if (!clear_irq)
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clear_irq = active_irq;
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/* clears the rightmost interruption */
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regmap_write(regmap, NAU8821_R11_INT_CLR_KEY_STATUS, clear_irq);
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if (event_mask)
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snd_soc_jack_report(nau8821->jack, event, event_mask);
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@ -1521,7 +1532,7 @@ static int nau8821_resume_setup(struct nau8821 *nau8821)
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nau8821_configure_sysclk(nau8821, NAU8821_CLK_DIS, 0);
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if (nau8821->irq) {
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/* Clear all interruption status */
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nau8821_int_status_clear_all(regmap);
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nau8821_irq_status_clear(regmap, 0);
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/* Enable both insertion and ejection interruptions, and then
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* bypass de-bounce circuit.
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@ -1651,7 +1662,8 @@ int nau8821_enable_jack_detect(struct snd_soc_component *component,
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nau8821->jack = jack;
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/* Initiate jack detection work queue */
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INIT_WORK(&nau8821->jdet_work, nau8821_jdet_work);
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INIT_DELAYED_WORK(&nau8821->jdet_work, nau8821_jdet_work);
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ret = devm_request_threaded_irq(nau8821->dev, nau8821->irq, NULL,
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nau8821_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT,
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"nau8821", nau8821);
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@ -1856,7 +1868,23 @@ static const struct dmi_system_id nau8821_quirk_table[] = {
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DMI_MATCH(DMI_SYS_VENDOR, "Positivo Tecnologia SA"),
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DMI_MATCH(DMI_BOARD_NAME, "CW14Q01P-V2"),
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},
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.driver_data = (void *)(NAU8821_JD_ACTIVE_HIGH),
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.driver_data = (void *)(NAU8821_QUIRK_JD_ACTIVE_HIGH),
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},
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{
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/* Valve Steam Deck LCD */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Valve"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Jupiter"),
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},
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.driver_data = (void *)(NAU8821_QUIRK_JD_DB_BYPASS),
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},
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{
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/* Valve Steam Deck OLED */
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Valve"),
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DMI_MATCH(DMI_PRODUCT_NAME, "Galileo"),
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},
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.driver_data = (void *)(NAU8821_QUIRK_JD_DB_BYPASS),
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},
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{}
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};
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@ -1898,9 +1926,12 @@ static int nau8821_i2c_probe(struct i2c_client *i2c)
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nau8821_check_quirks();
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if (nau8821_quirk & NAU8821_JD_ACTIVE_HIGH)
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if (nau8821_quirk & NAU8821_QUIRK_JD_ACTIVE_HIGH)
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nau8821->jkdet_polarity = 0;
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if (nau8821_quirk & NAU8821_QUIRK_JD_DB_BYPASS)
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dev_dbg(dev, "Force bypassing jack detection debounce circuit\n");
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nau8821_print_device_properties(nau8821);
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nau8821_reset_chip(nau8821->regmap);
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@ -561,7 +561,7 @@ struct nau8821 {
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struct regmap *regmap;
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struct snd_soc_dapm_context *dapm;
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struct snd_soc_jack *jack;
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struct work_struct jdet_work;
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struct delayed_work jdet_work;
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int irq;
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int clk_id;
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int micbias_voltage;
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