mirror of https://github.com/torvalds/linux.git
ALSA: azt3328: Use guard() for spin locks
Clean up the code using guard() for spin locks. Merely code refactoring, and no behavior change. Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20250829144342.4290-5-tiwai@suse.de
This commit is contained in:
Takashi Iwai
parent
ee7ddc5c01
commit
e96f601e7d
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@ -1201,7 +1201,6 @@ snd_azf3328_codec_setfmt(struct snd_azf3328_codec_data *codec,
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unsigned int channels
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)
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{
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unsigned long flags;
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u16 val = 0xff00;
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u8 freq = 0;
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@ -1244,7 +1243,7 @@ snd_azf3328_codec_setfmt(struct snd_azf3328_codec_data *codec,
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if (format_width == 16)
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val |= SOUNDFORMAT_FLAG_16BIT;
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spin_lock_irqsave(codec->lock, flags);
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guard(spinlock_irqsave)(codec->lock);
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/* set bitrate/format */
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_SOUNDFORMAT, val);
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@ -1266,8 +1265,6 @@ snd_azf3328_codec_setfmt(struct snd_azf3328_codec_data *codec,
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DMA_EPILOGUE_SOMETHING |
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DMA_SOMETHING_ELSE
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);
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spin_unlock_irqrestore(codec->lock, flags);
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}
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static inline void
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@ -1373,8 +1370,6 @@ snd_azf3328_codec_setdmaa(struct snd_azf3328 *chip,
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if (!codec->running) {
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/* AZF3328 uses a two buffer pointer DMA transfer approach */
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unsigned long flags;
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/* width 32bit (prevent overflow): */
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u32 area_length;
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struct codec_setup_io {
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@ -1405,11 +1400,10 @@ snd_azf3328_codec_setdmaa(struct snd_azf3328 *chip,
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/* build combined I/O buffer length word */
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setup_io.dma_lengths = (area_length << 16) | (area_length);
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spin_lock_irqsave(codec->lock, flags);
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guard(spinlock_irqsave)(codec->lock);
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snd_azf3328_codec_outl_multi(
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codec, IDX_IO_CODEC_DMA_START_1, &setup_io, 3
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);
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spin_unlock_irqrestore(codec->lock, flags);
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}
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}
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@ -1464,48 +1458,48 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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snd_pcm_format_width(runtime->format),
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runtime->channels);
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spin_lock(codec->lock);
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/* first, remember current value: */
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flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
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scoped_guard(spinlock, codec->lock) {
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/* first, remember current value: */
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flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
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/* stop transfer */
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flags1 &= ~DMA_RESUME;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* stop transfer */
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flags1 &= ~DMA_RESUME;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* FIXME: clear interrupts or what??? */
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_IRQTYPE, 0xffff);
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spin_unlock(codec->lock);
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/* FIXME: clear interrupts or what??? */
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_IRQTYPE, 0xffff);
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}
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snd_azf3328_codec_setdmaa(chip, codec, runtime->dma_addr,
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snd_pcm_lib_period_bytes(substream),
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snd_pcm_lib_buffer_bytes(substream)
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);
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spin_lock(codec->lock);
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scoped_guard(spinlock, codec->lock) {
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#ifdef WIN9X
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/* FIXME: enable playback/recording??? */
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flags1 |= DMA_RUN_SOMETHING1 | DMA_RUN_SOMETHING2;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* FIXME: enable playback/recording??? */
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flags1 |= DMA_RUN_SOMETHING1 | DMA_RUN_SOMETHING2;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* start transfer again */
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/* FIXME: what is this value (0x0010)??? */
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flags1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* start transfer again */
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/* FIXME: what is this value (0x0010)??? */
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flags1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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#else /* NT4 */
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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0x0000);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RUN_SOMETHING1);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RUN_SOMETHING1 |
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DMA_RUN_SOMETHING2);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RESUME |
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SOMETHING_ALMOST_ALWAYS_SET |
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DMA_EPILOGUE_SOMETHING |
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DMA_SOMETHING_ELSE);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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0x0000);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RUN_SOMETHING1);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RUN_SOMETHING1 |
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DMA_RUN_SOMETHING2);
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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DMA_RESUME |
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SOMETHING_ALMOST_ALWAYS_SET |
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DMA_EPILOGUE_SOMETHING |
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DMA_SOMETHING_ELSE);
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#endif
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spin_unlock(codec->lock);
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}
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snd_azf3328_ctrl_codec_activity(chip, codec->type, 1);
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if (is_main_mixer_playback_codec) {
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@ -1521,14 +1515,14 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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case SNDRV_PCM_TRIGGER_RESUME:
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dev_dbg(chip->card->dev, "PCM RESUME %s\n", codec->name);
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/* resume codec if we were active */
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spin_lock(codec->lock);
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if (codec->running)
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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snd_azf3328_codec_inw(
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codec, IDX_IO_CODEC_DMA_FLAGS
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) | DMA_RESUME
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);
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spin_unlock(codec->lock);
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scoped_guard(spinlock, codec->lock) {
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if (codec->running)
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS,
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snd_azf3328_codec_inw(
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codec, IDX_IO_CODEC_DMA_FLAGS
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) | DMA_RESUME
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);
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}
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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dev_dbg(chip->card->dev, "PCM STOP %s\n", codec->name);
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@ -1541,22 +1535,22 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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);
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}
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spin_lock(codec->lock);
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/* first, remember current value: */
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flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
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scoped_guard(spinlock, codec->lock) {
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/* first, remember current value: */
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flags1 = snd_azf3328_codec_inw(codec, IDX_IO_CODEC_DMA_FLAGS);
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/* stop transfer */
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flags1 &= ~DMA_RESUME;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* stop transfer */
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flags1 &= ~DMA_RESUME;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* hmm, is this really required? we're resetting the same bit
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* immediately thereafter... */
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flags1 |= DMA_RUN_SOMETHING1;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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/* hmm, is this really required? we're resetting the same bit
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* immediately thereafter... */
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flags1 |= DMA_RUN_SOMETHING1;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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flags1 &= ~DMA_RUN_SOMETHING1;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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spin_unlock(codec->lock);
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flags1 &= ~DMA_RUN_SOMETHING1;
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snd_azf3328_codec_outw(codec, IDX_IO_CODEC_DMA_FLAGS, flags1);
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}
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snd_azf3328_ctrl_codec_activity(chip, codec->type, 0);
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if (is_main_mixer_playback_codec) {
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@ -1724,12 +1718,11 @@ snd_azf3328_gameport_cooked_read(struct gameport *gameport,
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struct snd_azf3328 *chip = gameport_get_port_data(gameport);
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int i;
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u8 val;
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unsigned long flags;
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if (snd_BUG_ON(!chip))
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return 0;
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spin_lock_irqsave(&chip->reg_lock, flags);
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guard(spinlock_irqsave)(&chip->reg_lock);
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val = snd_azf3328_game_inb(chip, IDX_GAME_LEGACY_COMPATIBLE);
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*buttons = (~(val) >> 4) & 0xf;
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@ -1766,7 +1759,6 @@ snd_azf3328_gameport_cooked_read(struct gameport *gameport,
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snd_azf3328_game_outb(chip, IDX_GAME_AXES_CONFIG, val);
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snd_azf3328_game_outw(chip, IDX_GAME_AXIS_VALUE, 0xffff);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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for (i = 0; i < ARRAY_SIZE(chip->axes); i++) {
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axes[i] = chip->axes[i];
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@ -1863,11 +1855,11 @@ snd_azf3328_pcm_interrupt(struct snd_azf3328 *chip,
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if (!(status & (1 << codec_type)))
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continue;
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spin_lock(codec->lock);
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which = snd_azf3328_codec_inb(codec, IDX_IO_CODEC_IRQTYPE);
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/* ack all IRQ types immediately */
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snd_azf3328_codec_outb(codec, IDX_IO_CODEC_IRQTYPE, which);
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spin_unlock(codec->lock);
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scoped_guard(spinlock, codec->lock) {
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which = snd_azf3328_codec_inb(codec, IDX_IO_CODEC_IRQTYPE);
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/* ack all IRQ types immediately */
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snd_azf3328_codec_outb(codec, IDX_IO_CODEC_IRQTYPE, which);
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}
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if (codec->substream) {
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snd_pcm_period_elapsed(codec->substream);
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@ -1912,9 +1904,9 @@ snd_azf3328_interrupt(int irq, void *dev_id)
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if (chip->timer)
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snd_timer_interrupt(chip->timer, chip->timer->sticks);
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/* ACK timer */
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spin_lock(&chip->reg_lock);
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snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
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spin_unlock(&chip->reg_lock);
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scoped_guard(spinlock, &chip->reg_lock) {
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snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07);
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}
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dev_dbg(chip->card->dev, "timer IRQ\n");
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}
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@ -2137,7 +2129,6 @@ static int
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snd_azf3328_timer_start(struct snd_timer *timer)
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{
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struct snd_azf3328 *chip;
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unsigned long flags;
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unsigned int delay;
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chip = snd_timer_chip(timer);
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@ -2152,9 +2143,8 @@ snd_azf3328_timer_start(struct snd_timer *timer)
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}
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dev_dbg(chip->card->dev, "setting timer countdown value %d\n", delay);
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delay |= TIMER_COUNTDOWN_ENABLE | TIMER_IRQ_ENABLE;
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spin_lock_irqsave(&chip->reg_lock, flags);
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guard(spinlock_irqsave)(&chip->reg_lock);
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snd_azf3328_ctrl_outl(chip, IDX_IO_TIMER_VALUE, delay);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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return 0;
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}
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@ -2162,10 +2152,9 @@ static int
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snd_azf3328_timer_stop(struct snd_timer *timer)
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{
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struct snd_azf3328 *chip;
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unsigned long flags;
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chip = snd_timer_chip(timer);
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spin_lock_irqsave(&chip->reg_lock, flags);
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guard(spinlock_irqsave)(&chip->reg_lock);
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/* disable timer countdown and interrupt */
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/* Hmm, should we write TIMER_IRQ_ACK here?
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YES indeed, otherwise a rogue timer operation - which prompts
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@ -2174,7 +2163,6 @@ snd_azf3328_timer_stop(struct snd_timer *timer)
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Simply manually poking 0x04 _once_ immediately successfully stops
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the hardware/ALSA interrupt activity. */
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snd_azf3328_ctrl_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x04);
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spin_unlock_irqrestore(&chip->reg_lock, flags);
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return 0;
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}
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@ -2406,10 +2394,9 @@ snd_azf3328_create(struct snd_card *card,
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codec->running = true;
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snd_azf3328_ctrl_codec_activity(chip, codec_type, 0);
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spin_lock_irq(codec->lock);
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guard(spinlock_irq)(codec->lock);
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snd_azf3328_codec_outb(codec, IDX_IO_CODEC_DMA_FLAGS,
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dma_init);
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spin_unlock_irq(codec->lock);
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}
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return 0;
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