mirror of https://github.com/torvalds/linux.git
tools: riscv: Fixed misalignment of CSR related definitions
The file tools/arch/riscv/include/asm/csr.h borrows from arch/riscv/include/asm/csr.h, and subsequent modifications related to CSR should maintain consistency. Signed-off-by: Chen Pei <cp0613@linux.alibaba.com> Link: https://patch.msgid.link/20251114071215.816-1-cp0613@linux.alibaba.com [pjw@kernel.org: dropped Fixes: lines for patches that weren't broken; removed superfluous blank line] Signed-off-by: Paul Walmsley <pjw@kernel.org>
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@ -1109,7 +1109,7 @@ static irqreturn_t pmu_sbi_ovf_handler(int irq, void *dev)
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/* compute hardware counter index */
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/* compute hardware counter index */
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hidx = info->csr - CSR_CYCLE;
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hidx = info->csr - CSR_CYCLE;
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/* check if the corresponding bit is set in sscountovf or overflow mask in shmem */
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/* check if the corresponding bit is set in scountovf or overflow mask in shmem */
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if (!(overflow & BIT(hidx)))
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if (!(overflow & BIT(hidx)))
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continue;
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continue;
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@ -167,7 +167,8 @@
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#define VSIP_TO_HVIP_SHIFT (IRQ_VS_SOFT - IRQ_S_SOFT)
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#define VSIP_TO_HVIP_SHIFT (IRQ_VS_SOFT - IRQ_S_SOFT)
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#define VSIP_VALID_MASK ((_AC(1, UL) << IRQ_S_SOFT) | \
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#define VSIP_VALID_MASK ((_AC(1, UL) << IRQ_S_SOFT) | \
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(_AC(1, UL) << IRQ_S_TIMER) | \
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(_AC(1, UL) << IRQ_S_TIMER) | \
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(_AC(1, UL) << IRQ_S_EXT))
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(_AC(1, UL) << IRQ_S_EXT) | \
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(_AC(1, UL) << IRQ_PMU_OVF))
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/* AIA CSR bits */
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/* AIA CSR bits */
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#define TOPI_IID_SHIFT 16
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#define TOPI_IID_SHIFT 16
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@ -280,7 +281,7 @@
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#define CSR_HPMCOUNTER30H 0xc9e
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#define CSR_HPMCOUNTER30H 0xc9e
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#define CSR_HPMCOUNTER31H 0xc9f
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#define CSR_HPMCOUNTER31H 0xc9f
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#define CSR_SSCOUNTOVF 0xda0
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#define CSR_SCOUNTOVF 0xda0
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#define CSR_SSTATUS 0x100
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#define CSR_SSTATUS 0x100
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#define CSR_SIE 0x104
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#define CSR_SIE 0x104
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