mirror of https://github.com/torvalds/linux.git
ata: ahci-dwc: Remove not-going-to-be-supported code for Baikal SoC
As noticed in the discussion [1] the Baikal SoC and platforms are not going to be finalized, hence remove stale code. Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@infradead.org/ [1] Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Niklas Cassel <cassel@kernel.org>
This commit is contained in:
Andy Shevchenko
Niklas Cassel
parent
99d6b9014b
commit
db1d3cfaf3
|
|
@ -1,115 +0,0 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Baikal-T1 SoC AHCI SATA controller
|
||||
|
||||
maintainers:
|
||||
- Serge Semin <fancer.lancer@gmail.com>
|
||||
|
||||
description:
|
||||
AHCI SATA controller embedded into the Baikal-T1 SoC is based on the
|
||||
DWC AHCI SATA v4.10a IP-core.
|
||||
|
||||
allOf:
|
||||
- $ref: snps,dwc-ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: baikal,bt1-ahci
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Peripheral APB bus clock
|
||||
- description: Application AXI BIU clock
|
||||
- description: SATA Ports reference clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pclk
|
||||
- const: aclk
|
||||
- const: ref
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: Application AXI BIU domain reset
|
||||
- description: SATA Ports clock domain reset
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: arst
|
||||
- const: ref
|
||||
|
||||
ports-implemented:
|
||||
maximum: 0x3
|
||||
|
||||
patternProperties:
|
||||
"^sata-port@[0-1]$":
|
||||
$ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
|
||||
|
||||
properties:
|
||||
reg:
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
|
||||
snps,tx-ts-max:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Due to having AXI3 bus interface utilized the maximum Tx DMA
|
||||
transaction size can't exceed 16 beats (AxLEN[3:0]).
|
||||
enum: [ 1, 2, 4, 8, 16 ]
|
||||
|
||||
snps,rx-ts-max:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Due to having AXI3 bus interface utilized the maximum Rx DMA
|
||||
transaction size can't exceed 16 beats (AxLEN[3:0]).
|
||||
enum: [ 1, 2, 4, 8, 16 ]
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@1f050000 {
|
||||
compatible = "baikal,bt1-ahci";
|
||||
reg = <0x1f050000 0x2000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupts = <0 64 4>;
|
||||
|
||||
clocks = <&ccu_sys 1>, <&ccu_axi 2>, <&sata_ref_clk>;
|
||||
clock-names = "pclk", "aclk", "ref";
|
||||
|
||||
resets = <&ccu_axi 2>, <&ccu_sys 0>;
|
||||
reset-names = "arst", "ref";
|
||||
|
||||
ports-implemented = <0x3>;
|
||||
|
||||
sata-port@0 {
|
||||
reg = <0>;
|
||||
|
||||
snps,tx-ts-max = <4>;
|
||||
snps,rx-ts-max = <4>;
|
||||
};
|
||||
|
||||
sata-port@1 {
|
||||
reg = <1>;
|
||||
|
||||
snps,tx-ts-max = <4>;
|
||||
snps,rx-ts-max = <4>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -194,7 +194,6 @@ config AHCI_DM816
|
|||
config AHCI_DWC
|
||||
tristate "Synopsys DWC AHCI SATA support"
|
||||
select SATA_HOST
|
||||
select MFD_SYSCON if (MIPS_BAIKAL_T1 || COMPILE_TEST)
|
||||
help
|
||||
This option enables support for the Synopsys DWC AHCI SATA
|
||||
controller implementation.
|
||||
|
|
|
|||
|
|
@ -13,12 +13,10 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/libata.h>
|
||||
#include <linux/log2.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#include "ahci.h"
|
||||
|
||||
|
|
@ -92,20 +90,6 @@
|
|||
#define AHCI_DWC_PORT_PHYCR 0x74
|
||||
#define AHCI_DWC_PORT_PHYSR 0x78
|
||||
|
||||
/* Baikal-T1 AHCI SATA specific registers */
|
||||
#define AHCI_BT1_HOST_PHYCR AHCI_DWC_HOST_GPCR
|
||||
#define AHCI_BT1_HOST_MPLM_MASK GENMASK(29, 23)
|
||||
#define AHCI_BT1_HOST_LOSDT_MASK GENMASK(22, 20)
|
||||
#define AHCI_BT1_HOST_CRR BIT(19)
|
||||
#define AHCI_BT1_HOST_CRW BIT(18)
|
||||
#define AHCI_BT1_HOST_CRCD BIT(17)
|
||||
#define AHCI_BT1_HOST_CRCA BIT(16)
|
||||
#define AHCI_BT1_HOST_CRDI_MASK GENMASK(15, 0)
|
||||
|
||||
#define AHCI_BT1_HOST_PHYSR AHCI_DWC_HOST_GPSR
|
||||
#define AHCI_BT1_HOST_CRA BIT(16)
|
||||
#define AHCI_BT1_HOST_CRDO_MASK GENMASK(15, 0)
|
||||
|
||||
struct ahci_dwc_plat_data {
|
||||
unsigned int pflags;
|
||||
unsigned int hflags;
|
||||
|
|
@ -122,39 +106,6 @@ struct ahci_dwc_host_priv {
|
|||
u32 dmacr[AHCI_MAX_PORTS];
|
||||
};
|
||||
|
||||
static int ahci_bt1_init(struct ahci_host_priv *hpriv)
|
||||
{
|
||||
struct ahci_dwc_host_priv *dpriv = hpriv->plat_data;
|
||||
int ret;
|
||||
|
||||
/* APB, application and reference clocks are required */
|
||||
if (!ahci_platform_find_clk(hpriv, "pclk") ||
|
||||
!ahci_platform_find_clk(hpriv, "aclk") ||
|
||||
!ahci_platform_find_clk(hpriv, "ref")) {
|
||||
dev_err(&dpriv->pdev->dev, "No system clocks specified\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Fully reset the SATA AXI and ref clocks domain to ensure the state
|
||||
* machine is working from scratch especially if the reference clocks
|
||||
* source has been changed.
|
||||
*/
|
||||
ret = ahci_platform_assert_rsts(hpriv);
|
||||
if (ret) {
|
||||
dev_err(&dpriv->pdev->dev, "Couldn't assert the resets\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ahci_platform_deassert_rsts(hpriv);
|
||||
if (ret) {
|
||||
dev_err(&dpriv->pdev->dev, "Couldn't de-assert the resets\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct ahci_host_priv *ahci_dwc_get_resources(struct platform_device *pdev)
|
||||
{
|
||||
struct ahci_dwc_host_priv *dpriv;
|
||||
|
|
@ -457,15 +408,9 @@ static struct ahci_dwc_plat_data ahci_dwc_plat = {
|
|||
.pflags = AHCI_PLATFORM_GET_RESETS,
|
||||
};
|
||||
|
||||
static struct ahci_dwc_plat_data ahci_bt1_plat = {
|
||||
.pflags = AHCI_PLATFORM_GET_RESETS | AHCI_PLATFORM_RST_TRIGGER,
|
||||
.init = ahci_bt1_init,
|
||||
};
|
||||
|
||||
static const struct of_device_id ahci_dwc_of_match[] = {
|
||||
{ .compatible = "snps,dwc-ahci", &ahci_dwc_plat },
|
||||
{ .compatible = "snps,spear-ahci", &ahci_dwc_plat },
|
||||
{ .compatible = "baikal,bt1-ahci", &ahci_bt1_plat },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ahci_dwc_of_match);
|
||||
|
|
|
|||
Loading…
Reference in New Issue