From b91e6aafe8d356086cc621bc03e35ba2299e4788 Mon Sep 17 00:00:00 2001 From: Jeongjun Park Date: Mon, 21 Apr 2025 21:52:44 +0900 Subject: [PATCH 001/249] media: dvb-usb: dtv5100: fix out-of-bounds in dtv5100_i2c_msg() rlen value is a user-controlled value, but dtv5100_i2c_msg() does not check the size of the rlen value. Therefore, if it is set to a value larger than sizeof(st->data), an out-of-bounds vuln occurs for st->data. Therefore, we need to add proper range checking to prevent this vuln. Fixes: 60688d5e6e6e ("V4L/DVB (8735): dtv5100: replace dummy frontend by zl10353") Cc: stable@vger.kernel.org Signed-off-by: Jeongjun Park Signed-off-by: Hans Verkuil --- drivers/media/usb/dvb-usb/dtv5100.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/media/usb/dvb-usb/dtv5100.c b/drivers/media/usb/dvb-usb/dtv5100.c index 3d85c6f7f6ec..c448e2ebda1a 100644 --- a/drivers/media/usb/dvb-usb/dtv5100.c +++ b/drivers/media/usb/dvb-usb/dtv5100.c @@ -55,6 +55,11 @@ static int dtv5100_i2c_msg(struct dvb_usb_device *d, u8 addr, } index = (addr << 8) + wbuf[0]; + if (rlen > sizeof(st->data)) { + warn("rlen = %x is too big!\n", rlen); + return -EINVAL; + } + memcpy(st->data, rbuf, rlen); msleep(1); /* avoid I2C errors */ return usb_control_msg(d->udev, pipe, request, From ef08d2ea869612747f5c22f5588e969b04f7ec19 Mon Sep 17 00:00:00 2001 From: Darshan Rathod Date: Fri, 18 Jul 2025 13:08:01 +0000 Subject: [PATCH 002/249] media: dvb-core: dvb_ringbuffer: Fix various coding style issues The file dvb_ringbuffer.c has several minor coding style violations. This patch resolves these issues to improve code readability and align the code with the Linux kernel coding style. The cleanups include: - Adding spaces around assignment and comparison operators. - Adding spaces after commas in function arguments. - Placing statements on a new line for single-line 'if' blocks. - Correcting minor indentation. This is a purely stylistic change with no functional impact. Signed-off-by: Darshan Rathod Signed-off-by: Hans Verkuil [hverkuil: split rbuf->pread = rbuf->pwrite = 0 in two lines] --- drivers/media/dvb-core/dvb_ringbuffer.c | 36 ++++++++++++++----------- 1 file changed, 21 insertions(+), 15 deletions(-) diff --git a/drivers/media/dvb-core/dvb_ringbuffer.c b/drivers/media/dvb-core/dvb_ringbuffer.c index 7d4558de8e83..de6226556826 100644 --- a/drivers/media/dvb-core/dvb_ringbuffer.c +++ b/drivers/media/dvb-core/dvb_ringbuffer.c @@ -37,10 +37,11 @@ void dvb_ringbuffer_init(struct dvb_ringbuffer *rbuf, void *data, size_t len) { - rbuf->pread=rbuf->pwrite=0; - rbuf->data=data; - rbuf->size=len; - rbuf->error=0; + rbuf->pread = 0; + rbuf->pwrite = 0; + rbuf->data = data; + rbuf->size = len; + rbuf->error = 0; init_waitqueue_head(&rbuf->queue); @@ -235,7 +236,7 @@ ssize_t dvb_ringbuffer_write_user(struct dvb_ringbuffer *rbuf, return len; } -ssize_t dvb_ringbuffer_pkt_write(struct dvb_ringbuffer *rbuf, u8* buf, size_t len) +ssize_t dvb_ringbuffer_pkt_write(struct dvb_ringbuffer *rbuf, u8 *buf, size_t len) { int status; ssize_t oldpwrite = rbuf->pwrite; @@ -245,7 +246,8 @@ ssize_t dvb_ringbuffer_pkt_write(struct dvb_ringbuffer *rbuf, u8* buf, size_t le DVB_RINGBUFFER_WRITE_BYTE(rbuf, PKT_READY); status = dvb_ringbuffer_write(rbuf, buf, len); - if (status < 0) rbuf->pwrite = oldpwrite; + if (status < 0) + rbuf->pwrite = oldpwrite; return status; } @@ -258,8 +260,10 @@ ssize_t dvb_ringbuffer_pkt_read_user(struct dvb_ringbuffer *rbuf, size_t idx, pktlen = rbuf->data[idx] << 8; pktlen |= rbuf->data[(idx + 1) % rbuf->size]; - if (offset > pktlen) return -EINVAL; - if ((offset + len) > pktlen) len = pktlen - offset; + if (offset > pktlen) + return -EINVAL; + if ((offset + len) > pktlen) + len = pktlen - offset; idx = (idx + DVB_RINGBUFFER_PKTHDRSIZE + offset) % rbuf->size; todo = len; @@ -278,7 +282,7 @@ ssize_t dvb_ringbuffer_pkt_read_user(struct dvb_ringbuffer *rbuf, size_t idx, } ssize_t dvb_ringbuffer_pkt_read(struct dvb_ringbuffer *rbuf, size_t idx, - int offset, u8* buf, size_t len) + int offset, u8 *buf, size_t len) { size_t todo; size_t split; @@ -286,8 +290,10 @@ ssize_t dvb_ringbuffer_pkt_read(struct dvb_ringbuffer *rbuf, size_t idx, pktlen = rbuf->data[idx] << 8; pktlen |= rbuf->data[(idx + 1) % rbuf->size]; - if (offset > pktlen) return -EINVAL; - if ((offset + len) > pktlen) len = pktlen - offset; + if (offset > pktlen) + return -EINVAL; + if ((offset + len) > pktlen) + len = pktlen - offset; idx = (idx + DVB_RINGBUFFER_PKTHDRSIZE + offset) % rbuf->size; todo = len; @@ -309,7 +315,7 @@ void dvb_ringbuffer_pkt_dispose(struct dvb_ringbuffer *rbuf, size_t idx) rbuf->data[(idx + 2) % rbuf->size] = PKT_DISPOSED; // clean up disposed packets - while(dvb_ringbuffer_avail(rbuf) > DVB_RINGBUFFER_PKTHDRSIZE) { + while (dvb_ringbuffer_avail(rbuf) > DVB_RINGBUFFER_PKTHDRSIZE) { if (DVB_RINGBUFFER_PEEK(rbuf, 2) == PKT_DISPOSED) { pktlen = DVB_RINGBUFFER_PEEK(rbuf, 0) << 8; pktlen |= DVB_RINGBUFFER_PEEK(rbuf, 1); @@ -321,14 +327,14 @@ void dvb_ringbuffer_pkt_dispose(struct dvb_ringbuffer *rbuf, size_t idx) } } -ssize_t dvb_ringbuffer_pkt_next(struct dvb_ringbuffer *rbuf, size_t idx, size_t* pktlen) +ssize_t dvb_ringbuffer_pkt_next(struct dvb_ringbuffer *rbuf, size_t idx, size_t *pktlen) { int consumed; int curpktlen; int curpktstatus; if (idx == -1) { - idx = rbuf->pread; + idx = rbuf->pread; } else { curpktlen = rbuf->data[idx] << 8; curpktlen |= rbuf->data[(idx + 1) % rbuf->size]; @@ -339,7 +345,7 @@ ssize_t dvb_ringbuffer_pkt_next(struct dvb_ringbuffer *rbuf, size_t idx, size_t* if (consumed < 0) consumed += rbuf->size; - while((dvb_ringbuffer_avail(rbuf) - consumed) > DVB_RINGBUFFER_PKTHDRSIZE) { + while ((dvb_ringbuffer_avail(rbuf) - consumed) > DVB_RINGBUFFER_PKTHDRSIZE) { curpktlen = rbuf->data[idx] << 8; curpktlen |= rbuf->data[(idx + 1) % rbuf->size]; From 90d0f046ab60078c6ee51de70dbe68cae4130c71 Mon Sep 17 00:00:00 2001 From: Darshan Rathod Date: Fri, 18 Jul 2025 13:29:27 +0000 Subject: [PATCH 003/249] media: dvb-core: dvb_demux: Fix assignments in if conditions The code in dvb_demux.c has multiple instances where a variable is assigned a value inside the conditional part of an 'if' statement. This practice is prohibited by the Linux kernel coding style to avoid potential bugs arising from accidental assignments (e.g., '=' instead of '=='). This patch refactors these instances by moving the assignment out of the 'if' statement and onto the preceding line. This makes the code clearer, safer, and compliant with checkpatch.pl. Additionally, a minor whitespace issue in a function signature is also corrected. This is a purely stylistic change with no functional impact. Signed-off-by: Darshan Rathod Signed-off-by: Hans Verkuil --- drivers/media/dvb-core/dvb_demux.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/drivers/media/dvb-core/dvb_demux.c b/drivers/media/dvb-core/dvb_demux.c index 7c4d86bfdd6c..c93a3110a05d 100644 --- a/drivers/media/dvb-core/dvb_demux.c +++ b/drivers/media/dvb-core/dvb_demux.c @@ -744,7 +744,8 @@ static int dmx_ts_feed_start_filtering(struct dmx_ts_feed *ts_feed) return -ENODEV; } - if ((ret = demux->start_feed(feed)) < 0) { + ret = demux->start_feed(feed); + if (ret < 0) { mutex_unlock(&demux->mutex); return ret; } @@ -797,7 +798,8 @@ static int dvbdmx_allocate_ts_feed(struct dmx_demux *dmx, if (mutex_lock_interruptible(&demux->mutex)) return -ERESTARTSYS; - if (!(feed = dvb_dmx_feed_alloc(demux))) { + feed = dvb_dmx_feed_alloc(demux); + if (!feed) { mutex_unlock(&demux->mutex); return -EBUSY; } @@ -817,7 +819,8 @@ static int dvbdmx_allocate_ts_feed(struct dmx_demux *dmx, (*ts_feed)->stop_filtering = dmx_ts_feed_stop_filtering; (*ts_feed)->set = dmx_ts_feed_set; - if (!(feed->filter = dvb_dmx_filter_alloc(demux))) { + feed->filter = dvb_dmx_filter_alloc(demux); + if (!feed->filter) { feed->state = DMX_STATE_FREE; mutex_unlock(&demux->mutex); return -EBUSY; @@ -923,7 +926,8 @@ static void prepare_secfilters(struct dvb_demux_feed *dvbdmxfeed) struct dmx_section_filter *sf; u8 mask, mode, doneq; - if (!(f = dvbdmxfeed->filter)) + f = dvbdmxfeed->filter; + if (!f) return; do { sf = &f->filter; @@ -970,7 +974,8 @@ static int dmx_section_feed_start_filtering(struct dmx_section_feed *feed) prepare_secfilters(dvbdmxfeed); - if ((ret = dvbdmx->start_feed(dvbdmxfeed)) < 0) { + ret = dvbdmx->start_feed(dvbdmxfeed); + if (ret < 0) { mutex_unlock(&dvbdmx->mutex); return ret; } @@ -1057,7 +1062,8 @@ static int dvbdmx_allocate_section_feed(struct dmx_demux *demux, if (mutex_lock_interruptible(&dvbdmx->mutex)) return -ERESTARTSYS; - if (!(dvbdmxfeed = dvb_dmx_feed_alloc(dvbdmx))) { + dvbdmxfeed = dvb_dmx_feed_alloc(dvbdmx); + if (!dvbdmxfeed) { mutex_unlock(&dvbdmx->mutex); return -EBUSY; } @@ -1223,7 +1229,7 @@ static int dvbdmx_disconnect_frontend(struct dmx_demux *demux) return 0; } -static int dvbdmx_get_pes_pids(struct dmx_demux *demux, u16 * pids) +static int dvbdmx_get_pes_pids(struct dmx_demux *demux, u16 *pids) { struct dvb_demux *dvbdemux = (struct dvb_demux *)demux; From d22063f395ddf07fc228b33fd3ec398678cf93f7 Mon Sep 17 00:00:00 2001 From: Osama Albahrani Date: Mon, 4 Aug 2025 20:48:59 +0300 Subject: [PATCH 004/249] media: av7110: Fix warning 'unsigned' -> 'unsigned int' Fix the following checkpatch warning: av7110_ca.c:29: WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Signed-off-by: Osama Albahrani Signed-off-by: Hans Verkuil --- drivers/staging/media/av7110/av7110_ca.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/av7110/av7110_ca.c b/drivers/staging/media/av7110/av7110_ca.c index fce4023c9dea..63d9c97a5190 100644 --- a/drivers/staging/media/av7110/av7110_ca.c +++ b/drivers/staging/media/av7110/av7110_ca.c @@ -26,7 +26,7 @@ void CI_handle(struct av7110 *av7110, u8 *data, u16 len) { - unsigned slot_num; + unsigned int slot_num; dprintk(8, "av7110:%p\n", av7110); From 9c64c5d91e98471b44cca0999542c7ebcc385c51 Mon Sep 17 00:00:00 2001 From: Dmitry Antipov Date: Mon, 11 Aug 2025 10:23:25 +0300 Subject: [PATCH 005/249] Revert "media: xc2028: avoid use-after-free in load_firmware_cb()" Revert commit 68594cec291f ("media: xc2028: avoid use-after-free in load_firmware_cb()") since it doesn't make sense to check dangling 'struct dvb_frontend *' passed to 'load_firmware_cb()'. Signed-off-by: Dmitry Antipov Signed-off-by: Hans Verkuil --- drivers/media/tuners/xc2028.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/media/tuners/xc2028.c b/drivers/media/tuners/xc2028.c index 8e6638e5f688..807585d2dfde 100644 --- a/drivers/media/tuners/xc2028.c +++ b/drivers/media/tuners/xc2028.c @@ -1361,16 +1361,9 @@ static void load_firmware_cb(const struct firmware *fw, void *context) { struct dvb_frontend *fe = context; - struct xc2028_data *priv; + struct xc2028_data *priv = fe->tuner_priv; int rc; - if (!fe) { - pr_warn("xc2028: No frontend in %s\n", __func__); - return; - } - - priv = fe->tuner_priv; - tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error"); if (!fw) { tuner_err("Could not load firmware %s.\n", priv->fname); From e4b21577b463df84d4f8375d184a5039ca5d8c94 Mon Sep 17 00:00:00 2001 From: Qianfeng Rong Date: Tue, 12 Aug 2025 11:53:02 +0800 Subject: [PATCH 006/249] media: dvb-core: use vmalloc_array to simplify code Remove array_size() calls and replace vmalloc() with vmalloc_array() to simplify the code. Signed-off-by: Qianfeng Rong Signed-off-by: Hans Verkuil --- drivers/media/dvb-core/dmxdev.c | 4 ++-- drivers/media/dvb-core/dvb_demux.c | 8 ++++---- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/media/dvb-core/dmxdev.c b/drivers/media/dvb-core/dmxdev.c index 151177e5a06d..8c6f5aafda1d 100644 --- a/drivers/media/dvb-core/dmxdev.c +++ b/drivers/media/dvb-core/dmxdev.c @@ -1414,8 +1414,8 @@ int dvb_dmxdev_init(struct dmxdev *dmxdev, struct dvb_adapter *dvb_adapter) if (dmxdev->demux->open(dmxdev->demux) < 0) return -EUSERS; - dmxdev->filter = vmalloc(array_size(sizeof(struct dmxdev_filter), - dmxdev->filternum)); + dmxdev->filter = vmalloc_array(dmxdev->filternum, + sizeof(struct dmxdev_filter)); if (!dmxdev->filter) return -ENOMEM; diff --git a/drivers/media/dvb-core/dvb_demux.c b/drivers/media/dvb-core/dvb_demux.c index c93a3110a05d..290fc7961647 100644 --- a/drivers/media/dvb-core/dvb_demux.c +++ b/drivers/media/dvb-core/dvb_demux.c @@ -1244,14 +1244,14 @@ int dvb_dmx_init(struct dvb_demux *dvbdemux) dvbdemux->cnt_storage = NULL; dvbdemux->users = 0; - dvbdemux->filter = vmalloc(array_size(sizeof(struct dvb_demux_filter), - dvbdemux->filternum)); + dvbdemux->filter = vmalloc_array(dvbdemux->filternum, + sizeof(struct dvb_demux_filter)); if (!dvbdemux->filter) return -ENOMEM; - dvbdemux->feed = vmalloc(array_size(sizeof(struct dvb_demux_feed), - dvbdemux->feednum)); + dvbdemux->feed = vmalloc_array(dvbdemux->feednum, + sizeof(struct dvb_demux_feed)); if (!dvbdemux->feed) { vfree(dvbdemux->filter); dvbdemux->filter = NULL; From 1772b7f8045b703befc947da02b3c2620dea64fe Mon Sep 17 00:00:00 2001 From: Qianfeng Rong Date: Tue, 12 Aug 2025 11:53:03 +0800 Subject: [PATCH 007/249] media: pt1: use vmalloc_array to simplify code Remove array_size() calls and replace vmalloc() with vmalloc_array() to simplify the code. Signed-off-by: Qianfeng Rong Signed-off-by: Hans Verkuil --- drivers/media/pci/pt1/pt1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/pci/pt1/pt1.c b/drivers/media/pci/pt1/pt1.c index 121a4a92ea10..1ced093583ac 100644 --- a/drivers/media/pci/pt1/pt1.c +++ b/drivers/media/pci/pt1/pt1.c @@ -639,7 +639,7 @@ static int pt1_init_tables(struct pt1 *pt1) if (!pt1_nr_tables) return 0; - tables = vmalloc(array_size(pt1_nr_tables, sizeof(struct pt1_table))); + tables = vmalloc_array(pt1_nr_tables, sizeof(struct pt1_table)); if (tables == NULL) return -ENOMEM; From e2b0d6906a3e1b2d112996c5f891510947cb9c99 Mon Sep 17 00:00:00 2001 From: Qianfeng Rong Date: Tue, 12 Aug 2025 11:53:04 +0800 Subject: [PATCH 008/249] media: vivid: use vmalloc_array and vcalloc to simplify code Remove array_size() calls and replace vmalloc(array_size()) with vmalloc_array() and vzalloc(array_size()) with vcalloc() to simplify the code. Signed-off-by: Qianfeng Rong Signed-off-by: Hans Verkuil --- drivers/media/test-drivers/vivid/vivid-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/test-drivers/vivid/vivid-core.c b/drivers/media/test-drivers/vivid/vivid-core.c index 86506be36acb..9c0b1a32b5c9 100644 --- a/drivers/media/test-drivers/vivid/vivid-core.c +++ b/drivers/media/test-drivers/vivid/vivid-core.c @@ -1856,15 +1856,15 @@ static int vivid_create_instance(struct platform_device *pdev, int inst) tpg_init(&dev->tpg, 640, 360); if (tpg_alloc(&dev->tpg, array_size(MAX_WIDTH, MAX_ZOOM))) goto free_dev; - dev->scaled_line = vzalloc(array_size(MAX_WIDTH, MAX_ZOOM)); + dev->scaled_line = vcalloc(MAX_WIDTH, MAX_ZOOM); if (!dev->scaled_line) goto free_dev; - dev->blended_line = vzalloc(array_size(MAX_WIDTH, MAX_ZOOM)); + dev->blended_line = vcalloc(MAX_WIDTH, MAX_ZOOM); if (!dev->blended_line) goto free_dev; /* load the edid */ - dev->edid = vmalloc(array_size(256, 128)); + dev->edid = vmalloc_array(256, 128); if (!dev->edid) goto free_dev; From 801d26487f34d6d7561668082c0276ac5e0767f4 Mon Sep 17 00:00:00 2001 From: Xichao Zhao Date: Tue, 19 Aug 2025 19:00:59 +0800 Subject: [PATCH 009/249] staging: media: tegra-video: Remove the use of dev_err_probe() The dev_err_probe() doesn't do anything when error is '-ENOMEM'. Therefore, remove the useless call to dev_err_probe(), and just return the value instead. Signed-off-by: Xichao Zhao Signed-off-by: Hans Verkuil --- drivers/staging/media/tegra-video/tegra20.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/staging/media/tegra-video/tegra20.c b/drivers/staging/media/tegra-video/tegra20.c index 1473f1b1f203..aa9ff7fec4f9 100644 --- a/drivers/staging/media/tegra-video/tegra20.c +++ b/drivers/staging/media/tegra-video/tegra20.c @@ -255,7 +255,7 @@ static int tegra20_channel_host1x_syncpt_init(struct tegra_vi_channel *chan) out_sp = host1x_syncpt_request(&vi->client, HOST1X_SYNCPT_CLIENT_MANAGED); if (!out_sp) - return dev_err_probe(vi->dev, -ENOMEM, "failed to request syncpoint\n"); + return -ENOMEM; chan->mw_ack_sp[0] = out_sp; From a9d55c0f8bba3f2b58bac195e177d5fa046e09f6 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 20 Aug 2025 13:30:58 +0300 Subject: [PATCH 010/249] MAINTAINERS: Update Synopsys HDMI RX driver entry Shreeya no longer works at Collabora, set Dmitry as maintainer of the Synopsys HDMI RX driver. Signed-off-by: Dmitry Osipenko Signed-off-by: Hans Verkuil --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 46126ce2f968..c1f3ac7593b8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -24894,7 +24894,7 @@ F: drivers/net/pcs/pcs-xpcs.h F: include/linux/pcs/pcs-xpcs.h SYNOPSYS DESIGNWARE HDMI RX CONTROLLER DRIVER -M: Shreeya Patel +M: Dmitry Osipenko L: linux-media@vger.kernel.org L: kernel@collabora.com S: Maintained From 843bce0fd189c592fe8b466116b1df847447b586 Mon Sep 17 00:00:00 2001 From: Dmitry Osipenko Date: Wed, 20 Aug 2025 13:30:59 +0300 Subject: [PATCH 011/249] media: dt-bindings: snps,dw-hdmi-rx.yaml: Updated maintainers entry Shreeya no longer works at Collabora, set Dmitry as maintainer of the Synopsys HDMI RX binding. Signed-off-by: Dmitry Osipenko Acked-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml index 510e94e9ca3a..b7f6c87d0e06 100644 --- a/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml +++ b/Documentation/devicetree/bindings/media/snps,dw-hdmi-rx.yaml @@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Synopsys DesignWare HDMI RX Controller maintainers: - - Shreeya Patel + - Dmitry Osipenko description: Synopsys DesignWare HDMI Input Controller preset on RK3588 SoCs From 32768975e9b67169c62a0a9bfbd4eeec98d0b8ea Mon Sep 17 00:00:00 2001 From: Liao Yuanhong Date: Tue, 26 Aug 2025 22:50:56 +0800 Subject: [PATCH 012/249] media: synopsys: hdmirx: media: Remove redundant ternary operators For ternary operators in the form of a ? true : false, if a itself returns a boolean result, the ternary operator can be omitted. Remove redundant ternary operators to clean up the code. Signed-off-by: Liao Yuanhong Acked-by: Dmitry Osipenko Signed-off-by: Hans Verkuil --- drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c b/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c index b7d278b3889f..c3007e09bc9f 100644 --- a/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c +++ b/drivers/media/platform/synopsys/hdmirx/snps_hdmirx.c @@ -237,7 +237,7 @@ static bool tx_5v_power_present(struct snps_hdmirx_dev *hdmirx_dev) break; } - ret = (cnt >= detection_threshold) ? true : false; + ret = cnt >= detection_threshold; v4l2_dbg(3, debug, &hdmirx_dev->v4l2_dev, "%s: %d\n", __func__, ret); return ret; From a5e4a493756e96a076b2dfe83ded4496b698d004 Mon Sep 17 00:00:00 2001 From: Liao Yuanhong Date: Tue, 26 Aug 2025 22:51:54 +0800 Subject: [PATCH 013/249] media: dvb-frontends: Remove redundant ternary operators For ternary operators in the form of a ? true : false, if a itself returns a boolean result, the ternary operator can be omitted. Remove redundant ternary operators to clean up the code. Signed-off-by: Liao Yuanhong Signed-off-by: Hans Verkuil --- drivers/media/dvb-frontends/drx39xyj/drxj.c | 2 +- drivers/media/dvb-frontends/drxk_hard.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/media/dvb-frontends/drx39xyj/drxj.c b/drivers/media/dvb-frontends/drx39xyj/drxj.c index 779cce93e94a..428b31e60874 100644 --- a/drivers/media/dvb-frontends/drx39xyj/drxj.c +++ b/drivers/media/dvb-frontends/drx39xyj/drxj.c @@ -1270,7 +1270,7 @@ static const u16 nicam_presc_table_val[43] = { TODO: check ignoring single/multimaster is ok for AUD access ? */ -#define DRXJ_ISAUDWRITE(addr) (((((addr)>>16)&1) == 1) ? true : false) +#define DRXJ_ISAUDWRITE(addr) ((((addr) >> 16) & 1) == 1) #define DRXJ_DAP_AUDTRIF_TIMEOUT 80 /* millisec */ /*============================================================================*/ diff --git a/drivers/media/dvb-frontends/drxk_hard.c b/drivers/media/dvb-frontends/drxk_hard.c index 87f3d4f0eb8c..9ef367918824 100644 --- a/drivers/media/dvb-frontends/drxk_hard.c +++ b/drivers/media/dvb-frontends/drxk_hard.c @@ -6324,8 +6324,7 @@ static int drxk_set_parameters(struct dvb_frontend *fe) case SYS_DVBC_ANNEX_C: if (!state->m_has_dvbc) return -EINVAL; - state->m_itut_annex_c = (delsys == SYS_DVBC_ANNEX_C) ? - true : false; + state->m_itut_annex_c = delsys == SYS_DVBC_ANNEX_C; if (state->m_itut_annex_c) setoperation_mode(state, OM_QAM_ITU_C); else From 248d140a106de1a30cd6a603768d7f99491eb439 Mon Sep 17 00:00:00 2001 From: Qianfeng Rong Date: Wed, 27 Aug 2025 20:39:09 +0800 Subject: [PATCH 014/249] media: dvb: Use int type to store negative error codes Change the 'ret' variable from u8/u32 to int to store zero or negative error codes returned by other functions. Storing the negative error codes in unsigned type, doesn't cause an issue at runtime but it's ugly as pants. No effect on runtime. Signed-off-by: Qianfeng Rong Signed-off-by: Hans Verkuil --- drivers/media/dvb-frontends/cxd2841er.c | 3 ++- drivers/media/dvb-frontends/lgdt330x.c | 4 ++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/media/dvb-frontends/cxd2841er.c b/drivers/media/dvb-frontends/cxd2841er.c index 415f1f91cc30..8fcb4417ba22 100644 --- a/drivers/media/dvb-frontends/cxd2841er.c +++ b/drivers/media/dvb-frontends/cxd2841er.c @@ -1936,7 +1936,8 @@ static void cxd2841er_read_ber(struct dvb_frontend *fe) { struct dtv_frontend_properties *p = &fe->dtv_property_cache; struct cxd2841er_priv *priv = fe->demodulator_priv; - u32 ret, bit_error = 0, bit_count = 0; + u32 bit_error = 0, bit_count = 0; + int ret; dev_dbg(&priv->i2c->dev, "%s()\n", __func__); switch (p->delivery_system) { diff --git a/drivers/media/dvb-frontends/lgdt330x.c b/drivers/media/dvb-frontends/lgdt330x.c index cab442a350a5..8c34a5b850bc 100644 --- a/drivers/media/dvb-frontends/lgdt330x.c +++ b/drivers/media/dvb-frontends/lgdt330x.c @@ -124,7 +124,6 @@ static int i2c_read_demod_bytes(struct lgdt330x_state *state, /* Software reset */ static int lgdt3302_sw_reset(struct lgdt330x_state *state) { - u8 ret; u8 reset[] = { IRQ_MASK, /* @@ -133,6 +132,7 @@ static int lgdt3302_sw_reset(struct lgdt330x_state *state) */ 0x00 }; + int ret; ret = i2c_write_demod_bytes(state, reset, sizeof(reset)); @@ -147,11 +147,11 @@ static int lgdt3302_sw_reset(struct lgdt330x_state *state) static int lgdt3303_sw_reset(struct lgdt330x_state *state) { - u8 ret; u8 reset[] = { 0x02, 0x00 /* bit 0 is active low software reset */ }; + int ret; ret = i2c_write_demod_bytes(state, reset, sizeof(reset)); From 29de195ca39fc2ac0af6fd45522994df9f431f80 Mon Sep 17 00:00:00 2001 From: Duoming Zhou Date: Mon, 1 Sep 2025 21:26:17 +0800 Subject: [PATCH 015/249] media: TDA1997x: Remove redundant cancel_delayed_work in probe The delayed_work delayed_work_enable_hpd is initialized with INIT_DELAYED_WORK(), but it is never scheduled in tda1997x_probe(). Calling cancel_delayed_work() on a work that has never been scheduled is redundant and unnecessary, as there is no pending work to cancel. Remove the redundant cancel_delayed_work() from error handling path in tda1997x_probe() to avoid potential confusion. Fixes: 9ac0038db9a7 ("media: i2c: Add TDA1997x HDMI receiver driver") Cc: stable@vger.kernel.org Signed-off-by: Duoming Zhou Signed-off-by: Hans Verkuil --- drivers/media/i2c/tda1997x.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/i2c/tda1997x.c b/drivers/media/i2c/tda1997x.c index 1087d2bddaf2..3532766cd795 100644 --- a/drivers/media/i2c/tda1997x.c +++ b/drivers/media/i2c/tda1997x.c @@ -2797,7 +2797,6 @@ static int tda1997x_probe(struct i2c_client *client) err_free_handler: v4l2_ctrl_handler_free(&state->hdl); err_free_mutex: - cancel_delayed_work(&state->delayed_work_enable_hpd); mutex_destroy(&state->page_lock); mutex_destroy(&state->lock); tda1997x_set_power(state, 0); From e66a5cc606c58e72f18f9cdd868a3672e918f9f8 Mon Sep 17 00:00:00 2001 From: Duoming Zhou Date: Tue, 2 Sep 2025 09:10:31 +0800 Subject: [PATCH 016/249] media: i2c: adv7842: Remove redundant cancel_delayed_work in probe The delayed_work delayed_work_enable_hotplug is initialized with INIT_DELAYED_WORK() in adv7842_probe(), but it is never scheduled anywhere in the probe function. Calling cancel_delayed_work() on a work that has never been scheduled is redundant and unnecessary, as there is no pending work to cancel. Remove the redundant cancel_delayed_work() from error handling path and adjust the goto label accordingly to simplify the code and avoid potential confusion. Fixes: a89bcd4c6c20 ("[media] adv7842: add new video decoder driver") Cc: stable@vger.kernel.org Signed-off-by: Duoming Zhou Signed-off-by: Hans Verkuil --- drivers/media/i2c/adv7842.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index 9780082db841..331c5171d1ab 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -3626,7 +3626,7 @@ static int adv7842_probe(struct i2c_client *client) err = media_entity_pads_init(&sd->entity, ADV7842_PAD_SOURCE + 1, state->pads); if (err) - goto err_work_queues; + goto err_i2c; err = adv7842_core_init(sd); if (err) @@ -3647,8 +3647,6 @@ static int adv7842_probe(struct i2c_client *client) err_entity: media_entity_cleanup(&sd->entity); -err_work_queues: - cancel_delayed_work(&state->delayed_work_enable_hotplug); err_i2c: adv7842_unregister_clients(sd); err_hdl: From 8f34f24355a607b98ecd9924837aab13c676eeca Mon Sep 17 00:00:00 2001 From: Duoming Zhou Date: Tue, 2 Sep 2025 09:53:37 +0800 Subject: [PATCH 017/249] media: i2c: ADV7604: Remove redundant cancel_delayed_work in probe The delayed_work delayed_work_enable_hotplug is initialized with INIT_DELAYED_WORK() in adv76xx_probe(), but it is never scheduled anywhere in the probe function. Calling cancel_delayed_work() on a work that has never been scheduled is redundant and unnecessary, as there is no pending work to cancel. Remove the redundant cancel_delayed_work() from error handling path and adjust the goto label accordingly to simplify the code and avoid potential confusion. Fixes: 54450f591c99 ("[media] adv7604: driver for the Analog Devices ADV7604 video decoder") Cc: stable@vger.kernel.org Signed-off-by: Duoming Zhou Signed-off-by: Hans Verkuil --- drivers/media/i2c/adv7604.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/media/i2c/adv7604.c b/drivers/media/i2c/adv7604.c index 8fe7c2f72883..516553fb17e9 100644 --- a/drivers/media/i2c/adv7604.c +++ b/drivers/media/i2c/adv7604.c @@ -3670,7 +3670,7 @@ static int adv76xx_probe(struct i2c_client *client) err = media_entity_pads_init(&sd->entity, state->source_pad + 1, state->pads); if (err) - goto err_work_queues; + goto err_i2c; /* Configure regmaps */ err = configure_regmaps(state); @@ -3711,8 +3711,6 @@ static int adv76xx_probe(struct i2c_client *client) err_entity: media_entity_cleanup(&sd->entity); -err_work_queues: - cancel_delayed_work(&state->delayed_work_enable_hotplug); err_i2c: adv76xx_unregister_clients(state); err_hdl: From 8163419e3e05d71dcfa8fb49c8fdf8d76908fe51 Mon Sep 17 00:00:00 2001 From: Ivan Abramov Date: Wed, 3 Sep 2025 02:23:31 +0300 Subject: [PATCH 018/249] media: adv7842: Avoid possible out-of-bounds array accesses in adv7842_cp_log_status() It's possible for cp_read() and hdmi_read() to return -EIO. Those values are further used as indexes for accessing arrays. Fix that by checking return values where it's needed. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: a89bcd4c6c20 ("[media] adv7842: add new video decoder driver") Cc: stable@vger.kernel.org Signed-off-by: Ivan Abramov Signed-off-by: Hans Verkuil --- drivers/media/i2c/adv7842.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index 331c5171d1ab..21c3d3682e0b 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -2699,6 +2699,7 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd) /* CP block */ struct adv7842_state *state = to_state(sd); struct v4l2_dv_timings timings; + int temp; u8 reg_io_0x02 = io_read(sd, 0x02); u8 reg_io_0x21 = io_read(sd, 0x21); u8 reg_rep_0x77 = rep_read(sd, 0x77); @@ -2821,8 +2822,9 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd) (((reg_io_0x02 >> 2) & 0x01) ^ (reg_io_0x02 & 0x01)) ? "(16-235)" : "(0-255)", (reg_io_0x02 & 0x08) ? "enabled" : "disabled"); + temp = cp_read(sd, 0xf4) >> 4; v4l2_info(sd, "Color space conversion: %s\n", - csc_coeff_sel_rb[cp_read(sd, 0xf4) >> 4]); + temp < 0 ? "" : csc_coeff_sel_rb[temp]); if (!is_digital_input(sd)) return 0; @@ -2852,8 +2854,9 @@ static int adv7842_cp_log_status(struct v4l2_subdev *sd) hdmi_read(sd, 0x5f)); v4l2_info(sd, "AV Mute: %s\n", (hdmi_read(sd, 0x04) & 0x40) ? "on" : "off"); + temp = hdmi_read(sd, 0x0b) >> 6; v4l2_info(sd, "Deep color mode: %s\n", - deep_color_mode_txt[hdmi_read(sd, 0x0b) >> 6]); + temp < 0 ? "" : deep_color_mode_txt[temp]); adv7842_log_infoframes(sd); From d2bceb2e20e783d57e739c71e4e50b4b9f4a3953 Mon Sep 17 00:00:00 2001 From: Ivan Abramov Date: Wed, 3 Sep 2025 02:28:14 +0300 Subject: [PATCH 019/249] media: msp3400: Avoid possible out-of-bounds array accesses in msp3400c_thread() It's possible for max1 to remain -1 if msp_read() always fail. This variable is further used as index for accessing arrays. Fix that by checking max1 prior to array accesses. It seems that restart is the preferable action in case of out-of-bounds value. Found by Linux Verification Center (linuxtesting.org) with SVACE. Fixes: 8a4b275f9c19 ("V4L/DVB (3427): audmode and rxsubchans fixes (VIDIOC_G/S_TUNER)") Cc: stable@vger.kernel.org Signed-off-by: Ivan Abramov Signed-off-by: Hans Verkuil --- drivers/media/i2c/msp3400-kthreads.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/i2c/msp3400-kthreads.c b/drivers/media/i2c/msp3400-kthreads.c index ecabc0e1d32e..1d9f41dd7c21 100644 --- a/drivers/media/i2c/msp3400-kthreads.c +++ b/drivers/media/i2c/msp3400-kthreads.c @@ -596,6 +596,8 @@ int msp3400c_thread(void *data) "carrier2 val: %5d / %s\n", val, cd[i].name); } + if (max1 < 0 || max1 > 3) + goto restart; /* program the msp3400 according to the results */ state->main = msp3400c_carrier_detect_main[max1].cdo; switch (max1) { From be440980eace19c035a0745fd6b6e42707bc4f49 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Wed, 3 Sep 2025 09:44:16 +0100 Subject: [PATCH 020/249] media: pvrusb2: Fix incorrect variable used in trace message The pvr2_trace message is reporting an error about control read transfers, however it is using the incorrect variable write_len instead of read_lean. Fix this by using the correct variable read_len. Fixes: d855497edbfb ("V4L/DVB (4228a): pvrusb2 to kernel 2.6.18") Cc: stable@vger.kernel.org Signed-off-by: Colin Ian King Signed-off-by: Hans Verkuil --- drivers/media/usb/pvrusb2/pvrusb2-hdw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/usb/pvrusb2/pvrusb2-hdw.c b/drivers/media/usb/pvrusb2/pvrusb2-hdw.c index f21c2806eb9f..b32bb906a9de 100644 --- a/drivers/media/usb/pvrusb2/pvrusb2-hdw.c +++ b/drivers/media/usb/pvrusb2/pvrusb2-hdw.c @@ -3622,7 +3622,7 @@ static int pvr2_send_request_ex(struct pvr2_hdw *hdw, pvr2_trace( PVR2_TRACE_ERROR_LEGS, "Attempted to execute %d byte control-read transfer (limit=%d)", - write_len,PVR2_CTL_BUFFSIZE); + read_len, PVR2_CTL_BUFFSIZE); return -EINVAL; } if ((!write_len) && (!read_len)) { From 98aabfe2d79f74613abc2b0b1cef08f97eaf5322 Mon Sep 17 00:00:00 2001 From: Jeongjun Park Date: Fri, 5 Sep 2025 14:18:16 +0900 Subject: [PATCH 021/249] media: vidtv: initialize local pointers upon transfer of memory ownership vidtv_channel_si_init() creates a temporary list (program, service, event) and ownership of the memory itself is transferred to the PAT/SDT/EIT tables through vidtv_psi_pat_program_assign(), vidtv_psi_sdt_service_assign(), vidtv_psi_eit_event_assign(). The problem here is that the local pointer where the memory ownership transfer was completed is not initialized to NULL. This causes the vidtv_psi_pmt_create_sec_for_each_pat_entry() function to fail, and in the flow that jumps to free_eit, the memory that was freed by vidtv_psi_*_table_destroy() can be accessed again by vidtv_psi_*_event_destroy() due to the uninitialized local pointer, so it is freed once again. Therefore, to prevent use-after-free and double-free vulnerability, local pointers must be initialized to NULL when transferring memory ownership. Cc: Reported-by: syzbot+1d9c0edea5907af239e0@syzkaller.appspotmail.com Closes: https://syzkaller.appspot.com/bug?extid=1d9c0edea5907af239e0 Fixes: 3be8037960bc ("media: vidtv: add error checks") Signed-off-by: Jeongjun Park Reviewed-by: Daniel Almeida Signed-off-by: Hans Verkuil --- drivers/media/test-drivers/vidtv/vidtv_channel.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/media/test-drivers/vidtv/vidtv_channel.c b/drivers/media/test-drivers/vidtv/vidtv_channel.c index f3023e91b3eb..3541155c6fc6 100644 --- a/drivers/media/test-drivers/vidtv/vidtv_channel.c +++ b/drivers/media/test-drivers/vidtv/vidtv_channel.c @@ -461,12 +461,15 @@ int vidtv_channel_si_init(struct vidtv_mux *m) /* assemble all programs and assign to PAT */ vidtv_psi_pat_program_assign(m->si.pat, programs); + programs = NULL; /* assemble all services and assign to SDT */ vidtv_psi_sdt_service_assign(m->si.sdt, services); + services = NULL; /* assemble all events and assign to EIT */ vidtv_psi_eit_event_assign(m->si.eit, events); + events = NULL; m->si.pmt_secs = vidtv_psi_pmt_create_sec_for_each_pat_entry(m->si.pat, m->pcr_pid); From 142b1473c85b1625e28effb0d94c8657064a0a13 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 5 Sep 2025 14:06:19 -0500 Subject: [PATCH 022/249] media: pci: mg4b: use aligned_s64 Use aligned_s64 for IIO timestamp field instead of explicit __align(). This is the convention used throughout the IIO subsystem. No functional change. Suggested-by: Jonathan Cameron Closes: https://lore.kernel.org/linux-iio/20250724115610.011110fb@jic23-huawei/ Signed-off-by: David Lechner Reviewed-by: Jonathan Cameron Signed-off-by: Hans Verkuil --- drivers/media/pci/mgb4/mgb4_trigger.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/pci/mgb4/mgb4_trigger.c b/drivers/media/pci/mgb4/mgb4_trigger.c index d7dddc5c8728..bed8bbd4bc59 100644 --- a/drivers/media/pci/mgb4/mgb4_trigger.c +++ b/drivers/media/pci/mgb4/mgb4_trigger.c @@ -17,6 +17,7 @@ #include #include #include +#include #include "mgb4_core.h" #include "mgb4_trigger.h" @@ -90,7 +91,7 @@ static irqreturn_t trigger_handler(int irq, void *p) struct trigger_data *st = iio_priv(indio_dev); struct { u32 data; - s64 ts __aligned(8); + aligned_s64 ts; } scan = { }; scan.data = mgb4_read_reg(&st->mgbdev->video, 0xA0); From 2a0935ac4bac0607b5d70cc408d83cb43f20cb88 Mon Sep 17 00:00:00 2001 From: David Lechner Date: Fri, 5 Sep 2025 14:06:20 -0500 Subject: [PATCH 023/249] media: pci: mg4b: use iio_push_to_buffers_with_ts() Replace iio_push_to_buffers_with_timestamp() with iio_push_to_buffers_with_ts(). This adds an extra argument with the buffer size to ensure that we aren't writing past the end of the buffer. No functional change. Suggested-by: Jonathan Cameron Closes: https://lore.kernel.org/linux-iio/20250724115610.011110fb@jic23-huawei/ Signed-off-by: David Lechner Reviewed-by: Jonathan Cameron Signed-off-by: Hans Verkuil --- drivers/media/pci/mgb4/mgb4_trigger.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/pci/mgb4/mgb4_trigger.c b/drivers/media/pci/mgb4/mgb4_trigger.c index bed8bbd4bc59..4f9a35904b41 100644 --- a/drivers/media/pci/mgb4/mgb4_trigger.c +++ b/drivers/media/pci/mgb4/mgb4_trigger.c @@ -97,7 +97,7 @@ static irqreturn_t trigger_handler(int irq, void *p) scan.data = mgb4_read_reg(&st->mgbdev->video, 0xA0); mgb4_write_reg(&st->mgbdev->video, 0xA0, scan.data); - iio_push_to_buffers_with_timestamp(indio_dev, &scan, pf->timestamp); + iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan), pf->timestamp); iio_trigger_notify_done(indio_dev->trig); mgb4_write_reg(&st->mgbdev->video, 0xB4, 1U << 11); From 2282f76107368c1cb7fa20de40316dc204c19e83 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 12 Sep 2025 13:36:08 +0200 Subject: [PATCH 024/249] media: c8sectpfe: remove support of STi c8sectpfe driver STi c8sectpfe device is only used on B2120 boards, which support has been withdrawn in commit dee546e1adef ("ARM: sti: drop B2120 board support"). Signed-off-by: Raphael Gallais-Pou Reviewed-by: Patrice Chotard Signed-off-by: Hans Verkuil --- MAINTAINERS | 1 - drivers/media/platform/st/Makefile | 1 - drivers/media/platform/st/sti/Kconfig | 1 - drivers/media/platform/st/sti/Makefile | 1 - .../media/platform/st/sti/c8sectpfe/Kconfig | 28 - .../media/platform/st/sti/c8sectpfe/Makefile | 11 - .../st/sti/c8sectpfe/c8sectpfe-common.c | 262 ---- .../st/sti/c8sectpfe/c8sectpfe-common.h | 60 - .../st/sti/c8sectpfe/c8sectpfe-core.c | 1158 ----------------- .../st/sti/c8sectpfe/c8sectpfe-core.h | 287 ---- .../st/sti/c8sectpfe/c8sectpfe-debugfs.c | 244 ---- .../st/sti/c8sectpfe/c8sectpfe-debugfs.h | 23 - .../platform/st/sti/c8sectpfe/c8sectpfe-dvb.c | 235 ---- .../platform/st/sti/c8sectpfe/c8sectpfe-dvb.h | 17 - 14 files changed, 2329 deletions(-) delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/Kconfig delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/Makefile delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.c delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.h delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.c delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.h delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.c delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.h delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.c delete mode 100644 drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.h diff --git a/MAINTAINERS b/MAINTAINERS index c1f3ac7593b8..f7351fced572 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3437,7 +3437,6 @@ F: drivers/clocksource/clksrc_st_lpc.c F: drivers/cpufreq/sti-cpufreq.c F: drivers/dma/st_fdma* F: drivers/i2c/busses/i2c-st.c -F: drivers/media/platform/st/sti/c8sectpfe/ F: drivers/media/rc/st_rc.c F: drivers/mmc/host/sdhci-st.c F: drivers/phy/st/phy-miphy28lp.c diff --git a/drivers/media/platform/st/Makefile b/drivers/media/platform/st/Makefile index a1f75b2a8225..615a93d62662 100644 --- a/drivers/media/platform/st/Makefile +++ b/drivers/media/platform/st/Makefile @@ -1,7 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += sti/bdisp/ -obj-y += sti/c8sectpfe/ obj-y += sti/delta/ obj-y += sti/hva/ obj-y += stm32/ diff --git a/drivers/media/platform/st/sti/Kconfig b/drivers/media/platform/st/sti/Kconfig index 60068e8b47b8..91ca0950ff73 100644 --- a/drivers/media/platform/st/sti/Kconfig +++ b/drivers/media/platform/st/sti/Kconfig @@ -1,5 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only source "drivers/media/platform/st/sti/bdisp/Kconfig" -source "drivers/media/platform/st/sti/c8sectpfe/Kconfig" source "drivers/media/platform/st/sti/delta/Kconfig" source "drivers/media/platform/st/sti/hva/Kconfig" diff --git a/drivers/media/platform/st/sti/Makefile b/drivers/media/platform/st/sti/Makefile index f9ce8169b040..3328d50fb6cf 100644 --- a/drivers/media/platform/st/sti/Makefile +++ b/drivers/media/platform/st/sti/Makefile @@ -1,6 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += bdisp/ -obj-y += c8sectpfe/ obj-y += delta/ obj-y += hva/ obj-y += stm32/ diff --git a/drivers/media/platform/st/sti/c8sectpfe/Kconfig b/drivers/media/platform/st/sti/c8sectpfe/Kconfig deleted file mode 100644 index 01c33d9c9ec3..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/Kconfig +++ /dev/null @@ -1,28 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -config DVB_C8SECTPFE - tristate "STMicroelectronics C8SECTPFE DVB support" - depends on DVB_PLATFORM_DRIVERS - depends on PINCTRL && DVB_CORE && I2C - depends on ARCH_STI || ARCH_MULTIPLATFORM || COMPILE_TEST - select FW_LOADER - select DVB_LNBP21 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV090x if MEDIA_SUBDRV_AUTOSELECT - select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT - select DVB_STV0367 if MEDIA_SUBDRV_AUTOSELECT - select MEDIA_TUNER_TDA18212 if MEDIA_SUBDRV_AUTOSELECT - - help - This adds support for DVB front-end cards connected - to TS inputs of STiH407/410 SoC. - - The driver currently supports C8SECTPFE's TS input block, - memdma engine, and HW PID filtering. - - Supported DVB front-end cards are: - - STMicroelectronics DVB-T B2100A (STV0367 + TDA18212) - - STMicroelectronics DVB-S/S2 STV0903 + STV6110 + LNBP24 board - - To compile this driver as a module, choose M here: the - module will be called c8sectpfe. diff --git a/drivers/media/platform/st/sti/c8sectpfe/Makefile b/drivers/media/platform/st/sti/c8sectpfe/Makefile deleted file mode 100644 index 99425137ee0a..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -c8sectpfe-y += c8sectpfe-core.o c8sectpfe-common.o c8sectpfe-dvb.o - -ifneq ($(CONFIG_DEBUG_FS),) -c8sectpfe-y += c8sectpfe-debugfs.o -endif - -obj-$(CONFIG_DVB_C8SECTPFE) += c8sectpfe.o - -ccflags-y += -I $(srctree)/drivers/media/dvb-frontends/ -ccflags-y += -I $(srctree)/drivers/media/tuners/ diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.c b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.c deleted file mode 100644 index 5df67da25525..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.c +++ /dev/null @@ -1,262 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * c8sectpfe-common.c - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author: Peter Griffin - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "c8sectpfe-common.h" -#include "c8sectpfe-core.h" -#include "c8sectpfe-dvb.h" - -static int register_dvb(struct stdemux *demux, struct dvb_adapter *adap, - void *start_feed, void *stop_feed, - struct c8sectpfei *fei) -{ - int result; - - demux->dvb_demux.dmx.capabilities = DMX_TS_FILTERING | - DMX_SECTION_FILTERING | - DMX_MEMORY_BASED_FILTERING; - - demux->dvb_demux.priv = demux; - demux->dvb_demux.filternum = C8SECTPFE_MAXCHANNEL; - demux->dvb_demux.feednum = C8SECTPFE_MAXCHANNEL; - - demux->dvb_demux.start_feed = start_feed; - demux->dvb_demux.stop_feed = stop_feed; - demux->dvb_demux.write_to_decoder = NULL; - - result = dvb_dmx_init(&demux->dvb_demux); - if (result < 0) { - dev_err(fei->dev, "dvb_dmx_init failed (errno = %d)\n", - result); - goto err_dmx; - } - - demux->dmxdev.filternum = demux->dvb_demux.filternum; - demux->dmxdev.demux = &demux->dvb_demux.dmx; - demux->dmxdev.capabilities = 0; - - result = dvb_dmxdev_init(&demux->dmxdev, adap); - if (result < 0) { - dev_err(fei->dev, "dvb_dmxdev_init failed (errno = %d)\n", - result); - - goto err_dmxdev; - } - - demux->hw_frontend.source = DMX_FRONTEND_0 + demux->tsin_index; - - result = demux->dvb_demux.dmx.add_frontend(&demux->dvb_demux.dmx, - &demux->hw_frontend); - if (result < 0) { - dev_err(fei->dev, "add_frontend failed (errno = %d)\n", result); - goto err_fe_hw; - } - - demux->mem_frontend.source = DMX_MEMORY_FE; - result = demux->dvb_demux.dmx.add_frontend(&demux->dvb_demux.dmx, - &demux->mem_frontend); - if (result < 0) { - dev_err(fei->dev, "add_frontend failed (%d)\n", result); - goto err_fe_mem; - } - - result = demux->dvb_demux.dmx.connect_frontend(&demux->dvb_demux.dmx, - &demux->hw_frontend); - if (result < 0) { - dev_err(fei->dev, "connect_frontend (%d)\n", result); - goto err_fe_con; - } - - return 0; - -err_fe_con: - demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx, - &demux->mem_frontend); -err_fe_mem: - demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx, - &demux->hw_frontend); -err_fe_hw: - dvb_dmxdev_release(&demux->dmxdev); -err_dmxdev: - dvb_dmx_release(&demux->dvb_demux); -err_dmx: - return result; - -} - -static void unregister_dvb(struct stdemux *demux) -{ - - demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx, - &demux->mem_frontend); - - demux->dvb_demux.dmx.remove_frontend(&demux->dvb_demux.dmx, - &demux->hw_frontend); - - dvb_dmxdev_release(&demux->dmxdev); - - dvb_dmx_release(&demux->dvb_demux); -} - -static struct c8sectpfe *c8sectpfe_create(struct c8sectpfei *fei, - void *start_feed, - void *stop_feed) -{ - struct c8sectpfe *c8sectpfe; - int result; - int i, j; - - short int ids[] = { -1 }; - - c8sectpfe = kzalloc(sizeof(struct c8sectpfe), GFP_KERNEL); - if (!c8sectpfe) - goto err1; - - mutex_init(&c8sectpfe->lock); - - c8sectpfe->device = fei->dev; - - result = dvb_register_adapter(&c8sectpfe->adapter, "STi c8sectpfe", - THIS_MODULE, fei->dev, ids); - if (result < 0) { - dev_err(fei->dev, "dvb_register_adapter failed (errno = %d)\n", - result); - goto err2; - } - - c8sectpfe->adapter.priv = fei; - - for (i = 0; i < fei->tsin_count; i++) { - - c8sectpfe->demux[i].tsin_index = i; - c8sectpfe->demux[i].c8sectpfei = fei; - - result = register_dvb(&c8sectpfe->demux[i], &c8sectpfe->adapter, - start_feed, stop_feed, fei); - if (result < 0) { - dev_err(fei->dev, - "register_dvb feed=%d failed (errno = %d)\n", - result, i); - - /* we take a all or nothing approach */ - for (j = 0; j < i; j++) - unregister_dvb(&c8sectpfe->demux[j]); - goto err3; - } - } - - c8sectpfe->num_feeds = fei->tsin_count; - - return c8sectpfe; -err3: - dvb_unregister_adapter(&c8sectpfe->adapter); -err2: - kfree(c8sectpfe); -err1: - return NULL; -}; - -static void c8sectpfe_delete(struct c8sectpfe *c8sectpfe) -{ - int i; - - if (!c8sectpfe) - return; - - for (i = 0; i < c8sectpfe->num_feeds; i++) - unregister_dvb(&c8sectpfe->demux[i]); - - dvb_unregister_adapter(&c8sectpfe->adapter); - - kfree(c8sectpfe); -}; - -void c8sectpfe_tuner_unregister_frontend(struct c8sectpfe *c8sectpfe, - struct c8sectpfei *fei) -{ - int n; - struct channel_info *tsin; - - for (n = 0; n < fei->tsin_count; n++) { - - tsin = fei->channel_data[n]; - - if (tsin) { - if (tsin->frontend) { - dvb_unregister_frontend(tsin->frontend); - dvb_frontend_detach(tsin->frontend); - } - - i2c_put_adapter(tsin->i2c_adapter); - - if (tsin->i2c_client) { - module_put(tsin->i2c_client->dev.driver->owner); - i2c_unregister_device(tsin->i2c_client); - } - } - } - - c8sectpfe_delete(c8sectpfe); -}; - -int c8sectpfe_tuner_register_frontend(struct c8sectpfe **c8sectpfe, - struct c8sectpfei *fei, - void *start_feed, - void *stop_feed) -{ - struct channel_info *tsin; - struct dvb_frontend *frontend; - int n, res; - - *c8sectpfe = c8sectpfe_create(fei, start_feed, stop_feed); - if (!*c8sectpfe) - return -ENOMEM; - - for (n = 0; n < fei->tsin_count; n++) { - tsin = fei->channel_data[n]; - - res = c8sectpfe_frontend_attach(&frontend, *c8sectpfe, tsin, n); - if (res) - goto err; - - res = dvb_register_frontend(&c8sectpfe[0]->adapter, frontend); - if (res < 0) { - dev_err(fei->dev, "dvb_register_frontend failed (%d)\n", - res); - goto err; - } - - tsin->frontend = frontend; - } - - return 0; - -err: - c8sectpfe_tuner_unregister_frontend(*c8sectpfe, fei); - return res; -} diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.h b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.h deleted file mode 100644 index f8d97841f366..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-common.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * c8sectpfe-common.h - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author: Peter Griffin - * - */ -#ifndef _C8SECTPFE_COMMON_H_ -#define _C8SECTPFE_COMMON_H_ - -#include -#include -#include - -#include -#include -#include -#include - -/* Maximum number of channels */ -#define C8SECTPFE_MAXADAPTER (4) -#define C8SECTPFE_MAXCHANNEL 64 -#define STPTI_MAXCHANNEL 64 - -#define MAX_INPUTBLOCKS 7 - -struct c8sectpfe; -struct stdemux; - -struct stdemux { - struct dvb_demux dvb_demux; - struct dmxdev dmxdev; - struct dmx_frontend hw_frontend; - struct dmx_frontend mem_frontend; - int tsin_index; - int running_feed_count; - struct c8sectpfei *c8sectpfei; -}; - -struct c8sectpfe { - struct stdemux demux[MAX_INPUTBLOCKS]; - struct mutex lock; - struct dvb_adapter adapter; - struct device *device; - int mapping; - int num_feeds; -}; - -/* Channel registration */ -int c8sectpfe_tuner_register_frontend(struct c8sectpfe **c8sectpfe, - struct c8sectpfei *fei, - void *start_feed, - void *stop_feed); - -void c8sectpfe_tuner_unregister_frontend(struct c8sectpfe *c8sectpfe, - struct c8sectpfei *fei); - -#endif diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.c b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.c deleted file mode 100644 index 89bd15a4d26a..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.c +++ /dev/null @@ -1,1158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * c8sectpfe-core.c - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author:Peter Bennett - * Peter Griffin - * - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "c8sectpfe-common.h" -#include "c8sectpfe-core.h" -#include "c8sectpfe-debugfs.h" - -#include -#include -#include -#include - -#define FIRMWARE_MEMDMA "pti_memdma_h407.elf" -MODULE_FIRMWARE(FIRMWARE_MEMDMA); - -#define PID_TABLE_SIZE 1024 -#define POLL_MSECS 50 - -static int load_c8sectpfe_fw(struct c8sectpfei *fei); - -#define TS_PKT_SIZE 188 -#define HEADER_SIZE (4) -#define PACKET_SIZE (TS_PKT_SIZE+HEADER_SIZE) - -#define FEI_ALIGNMENT (32) -/* hw requires minimum of 8*PACKET_SIZE and padded to 8byte boundary */ -#define FEI_BUFFER_SIZE (8*PACKET_SIZE*340) - -#define FIFO_LEN 1024 - -static void c8sectpfe_timer_interrupt(struct timer_list *t) -{ - struct c8sectpfei *fei = timer_container_of(fei, t, timer); - struct channel_info *channel; - int chan_num; - - /* iterate through input block channels */ - for (chan_num = 0; chan_num < fei->tsin_count; chan_num++) { - channel = fei->channel_data[chan_num]; - - /* is this descriptor initialised and TP enabled */ - if (channel->irec && readl(channel->irec + DMA_PRDS_TPENABLE)) - queue_work(system_bh_wq, &channel->bh_work); - } - - fei->timer.expires = jiffies + msecs_to_jiffies(POLL_MSECS); - add_timer(&fei->timer); -} - -static void channel_swdemux_bh_work(struct work_struct *t) -{ - struct channel_info *channel = from_work(channel, t, bh_work); - struct c8sectpfei *fei; - unsigned long wp, rp; - int pos, num_packets, n, size; - u8 *buf; - - if (unlikely(!channel || !channel->irec)) - return; - - fei = channel->fei; - - wp = readl(channel->irec + DMA_PRDS_BUSWP_TP(0)); - rp = readl(channel->irec + DMA_PRDS_BUSRP_TP(0)); - - pos = rp - channel->back_buffer_busaddr; - - /* has it wrapped */ - if (wp < rp) - wp = channel->back_buffer_busaddr + FEI_BUFFER_SIZE; - - size = wp - rp; - num_packets = size / PACKET_SIZE; - - /* manage cache so data is visible to CPU */ - dma_sync_single_for_cpu(fei->dev, - rp, - size, - DMA_FROM_DEVICE); - - buf = channel->back_buffer_aligned; - - dev_dbg(fei->dev, - "chan=%d channel=%p num_packets = %d, buf = %p, pos = 0x%x\n\trp=0x%lx, wp=0x%lx\n", - channel->tsin_id, channel, num_packets, buf, pos, rp, wp); - - for (n = 0; n < num_packets; n++) { - dvb_dmx_swfilter_packets( - &fei->c8sectpfe[0]-> - demux[channel->demux_mapping].dvb_demux, - &buf[pos], 1); - - pos += PACKET_SIZE; - } - - /* advance the read pointer */ - if (wp == (channel->back_buffer_busaddr + FEI_BUFFER_SIZE)) - writel(channel->back_buffer_busaddr, channel->irec + - DMA_PRDS_BUSRP_TP(0)); - else - writel(wp, channel->irec + DMA_PRDS_BUSRP_TP(0)); -} - -static int c8sectpfe_start_feed(struct dvb_demux_feed *dvbdmxfeed) -{ - struct dvb_demux *demux = dvbdmxfeed->demux; - struct stdemux *stdemux = demux->priv; - struct c8sectpfei *fei = stdemux->c8sectpfei; - struct channel_info *channel; - u32 tmp; - unsigned long *bitmap; - int ret; - - switch (dvbdmxfeed->type) { - case DMX_TYPE_TS: - break; - case DMX_TYPE_SEC: - break; - default: - dev_err(fei->dev, "%s:%d Error bailing\n" - , __func__, __LINE__); - return -EINVAL; - } - - if (dvbdmxfeed->type == DMX_TYPE_TS) { - switch (dvbdmxfeed->pes_type) { - case DMX_PES_VIDEO: - case DMX_PES_AUDIO: - case DMX_PES_TELETEXT: - case DMX_PES_PCR: - case DMX_PES_OTHER: - break; - default: - dev_err(fei->dev, "%s:%d Error bailing\n" - , __func__, __LINE__); - return -EINVAL; - } - } - - if (!atomic_read(&fei->fw_loaded)) { - ret = load_c8sectpfe_fw(fei); - if (ret) - return ret; - } - - mutex_lock(&fei->lock); - - channel = fei->channel_data[stdemux->tsin_index]; - - bitmap = channel->pid_buffer_aligned; - - /* 8192 is a special PID */ - if (dvbdmxfeed->pid == 8192) { - tmp = readl(fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id)); - tmp &= ~C8SECTPFE_PID_ENABLE; - writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id)); - - } else { - bitmap_set(bitmap, dvbdmxfeed->pid, 1); - } - - /* manage cache so PID bitmap is visible to HW */ - dma_sync_single_for_device(fei->dev, - channel->pid_buffer_busaddr, - PID_TABLE_SIZE, - DMA_TO_DEVICE); - - channel->active = 1; - - if (fei->global_feed_count == 0) { - fei->timer.expires = jiffies + - msecs_to_jiffies(msecs_to_jiffies(POLL_MSECS)); - - add_timer(&fei->timer); - } - - if (stdemux->running_feed_count == 0) { - - dev_dbg(fei->dev, "Starting channel=%p\n", channel); - - INIT_WORK(&channel->bh_work, channel_swdemux_bh_work); - - /* Reset the internal inputblock sram pointers */ - writel(channel->fifo, - fei->io + C8SECTPFE_IB_BUFF_STRT(channel->tsin_id)); - writel(channel->fifo + FIFO_LEN - 1, - fei->io + C8SECTPFE_IB_BUFF_END(channel->tsin_id)); - - writel(channel->fifo, - fei->io + C8SECTPFE_IB_READ_PNT(channel->tsin_id)); - writel(channel->fifo, - fei->io + C8SECTPFE_IB_WRT_PNT(channel->tsin_id)); - - - /* reset read / write memdma ptrs for this channel */ - writel(channel->back_buffer_busaddr, channel->irec + - DMA_PRDS_BUSBASE_TP(0)); - - tmp = channel->back_buffer_busaddr + FEI_BUFFER_SIZE - 1; - writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0)); - - writel(channel->back_buffer_busaddr, channel->irec + - DMA_PRDS_BUSWP_TP(0)); - - /* Issue a reset and enable InputBlock */ - writel(C8SECTPFE_SYS_ENABLE | C8SECTPFE_SYS_RESET - , fei->io + C8SECTPFE_IB_SYS(channel->tsin_id)); - - /* and enable the tp */ - writel(0x1, channel->irec + DMA_PRDS_TPENABLE); - - dev_dbg(fei->dev, "%s:%d Starting DMA feed on stdemux=%p\n" - , __func__, __LINE__, stdemux); - } - - stdemux->running_feed_count++; - fei->global_feed_count++; - - mutex_unlock(&fei->lock); - - return 0; -} - -static int c8sectpfe_stop_feed(struct dvb_demux_feed *dvbdmxfeed) -{ - - struct dvb_demux *demux = dvbdmxfeed->demux; - struct stdemux *stdemux = demux->priv; - struct c8sectpfei *fei = stdemux->c8sectpfei; - struct channel_info *channel; - int idlereq; - u32 tmp; - int ret; - unsigned long *bitmap; - - if (!atomic_read(&fei->fw_loaded)) { - ret = load_c8sectpfe_fw(fei); - if (ret) - return ret; - } - - mutex_lock(&fei->lock); - - channel = fei->channel_data[stdemux->tsin_index]; - - bitmap = channel->pid_buffer_aligned; - - if (dvbdmxfeed->pid == 8192) { - tmp = readl(fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id)); - tmp |= C8SECTPFE_PID_ENABLE; - writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(channel->tsin_id)); - } else { - bitmap_clear(bitmap, dvbdmxfeed->pid, 1); - } - - /* manage cache so data is visible to HW */ - dma_sync_single_for_device(fei->dev, - channel->pid_buffer_busaddr, - PID_TABLE_SIZE, - DMA_TO_DEVICE); - - if (--stdemux->running_feed_count == 0) { - - channel = fei->channel_data[stdemux->tsin_index]; - - /* TP re-configuration on page 168 of functional spec */ - - /* disable IB (prevents more TS data going to memdma) */ - writel(0, fei->io + C8SECTPFE_IB_SYS(channel->tsin_id)); - - /* disable this channels descriptor */ - writel(0, channel->irec + DMA_PRDS_TPENABLE); - - disable_work_sync(&channel->bh_work); - - /* now request memdma channel goes idle */ - idlereq = (1 << channel->tsin_id) | IDLEREQ; - writel(idlereq, fei->io + DMA_IDLE_REQ); - - /* wait for idle irq handler to signal completion */ - ret = wait_for_completion_timeout(&channel->idle_completion, - msecs_to_jiffies(100)); - - if (ret == 0) - dev_warn(fei->dev, - "Timeout waiting for idle irq on tsin%d\n", - channel->tsin_id); - - reinit_completion(&channel->idle_completion); - - /* reset read / write ptrs for this channel */ - - writel(channel->back_buffer_busaddr, - channel->irec + DMA_PRDS_BUSBASE_TP(0)); - - tmp = channel->back_buffer_busaddr + FEI_BUFFER_SIZE - 1; - writel(tmp, channel->irec + DMA_PRDS_BUSTOP_TP(0)); - - writel(channel->back_buffer_busaddr, - channel->irec + DMA_PRDS_BUSWP_TP(0)); - - dev_dbg(fei->dev, - "%s:%d stopping DMA feed on stdemux=%p channel=%d\n", - __func__, __LINE__, stdemux, channel->tsin_id); - - /* turn off all PIDS in the bitmap */ - memset(channel->pid_buffer_aligned, 0, PID_TABLE_SIZE); - - /* manage cache so data is visible to HW */ - dma_sync_single_for_device(fei->dev, - channel->pid_buffer_busaddr, - PID_TABLE_SIZE, - DMA_TO_DEVICE); - - channel->active = 0; - } - - if (--fei->global_feed_count == 0) { - dev_dbg(fei->dev, "%s:%d global_feed_count=%d\n" - , __func__, __LINE__, fei->global_feed_count); - - timer_delete(&fei->timer); - } - - mutex_unlock(&fei->lock); - - return 0; -} - -static struct channel_info *find_channel(struct c8sectpfei *fei, int tsin_num) -{ - int i; - - for (i = 0; i < C8SECTPFE_MAX_TSIN_CHAN; i++) { - if (!fei->channel_data[i]) - continue; - - if (fei->channel_data[i]->tsin_id == tsin_num) - return fei->channel_data[i]; - } - - return NULL; -} - -static void c8sectpfe_getconfig(struct c8sectpfei *fei) -{ - struct c8sectpfe_hw *hw = &fei->hw_stats; - - hw->num_ib = readl(fei->io + SYS_CFG_NUM_IB); - hw->num_mib = readl(fei->io + SYS_CFG_NUM_MIB); - hw->num_swts = readl(fei->io + SYS_CFG_NUM_SWTS); - hw->num_tsout = readl(fei->io + SYS_CFG_NUM_TSOUT); - hw->num_ccsc = readl(fei->io + SYS_CFG_NUM_CCSC); - hw->num_ram = readl(fei->io + SYS_CFG_NUM_RAM); - hw->num_tp = readl(fei->io + SYS_CFG_NUM_TP); - - dev_info(fei->dev, "C8SECTPFE hw supports the following:\n"); - dev_info(fei->dev, "Input Blocks: %d\n", hw->num_ib); - dev_info(fei->dev, "Merged Input Blocks: %d\n", hw->num_mib); - dev_info(fei->dev, "Software Transport Stream Inputs: %d\n" - , hw->num_swts); - dev_info(fei->dev, "Transport Stream Output: %d\n", hw->num_tsout); - dev_info(fei->dev, "Cable Card Converter: %d\n", hw->num_ccsc); - dev_info(fei->dev, "RAMs supported by C8SECTPFE: %d\n", hw->num_ram); - dev_info(fei->dev, "Tango TPs supported by C8SECTPFE: %d\n" - , hw->num_tp); -} - -static irqreturn_t c8sectpfe_idle_irq_handler(int irq, void *priv) -{ - struct c8sectpfei *fei = priv; - struct channel_info *chan; - int bit; - unsigned long tmp = readl(fei->io + DMA_IDLE_REQ); - - /* page 168 of functional spec: Clear the idle request - by writing 0 to the C8SECTPFE_DMA_IDLE_REQ register. */ - - /* signal idle completion */ - for_each_set_bit(bit, &tmp, fei->hw_stats.num_ib) { - - chan = find_channel(fei, bit); - - if (chan) - complete(&chan->idle_completion); - } - - writel(0, fei->io + DMA_IDLE_REQ); - - return IRQ_HANDLED; -} - - -static void free_input_block(struct c8sectpfei *fei, struct channel_info *tsin) -{ - if (!fei || !tsin) - return; - - if (tsin->back_buffer_busaddr) - if (!dma_mapping_error(fei->dev, tsin->back_buffer_busaddr)) - dma_unmap_single(fei->dev, tsin->back_buffer_busaddr, - FEI_BUFFER_SIZE, DMA_BIDIRECTIONAL); - - kfree(tsin->back_buffer_start); - - if (tsin->pid_buffer_busaddr) - if (!dma_mapping_error(fei->dev, tsin->pid_buffer_busaddr)) - dma_unmap_single(fei->dev, tsin->pid_buffer_busaddr, - PID_TABLE_SIZE, DMA_BIDIRECTIONAL); - - kfree(tsin->pid_buffer_start); -} - -#define MAX_NAME 20 - -static int configure_memdma_and_inputblock(struct c8sectpfei *fei, - struct channel_info *tsin) -{ - int ret; - u32 tmp; - char tsin_pin_name[MAX_NAME]; - - if (!fei || !tsin) - return -EINVAL; - - dev_dbg(fei->dev, "%s:%d Configuring channel=%p tsin=%d\n" - , __func__, __LINE__, tsin, tsin->tsin_id); - - init_completion(&tsin->idle_completion); - - tsin->back_buffer_start = kzalloc(FEI_BUFFER_SIZE + FEI_ALIGNMENT, GFP_KERNEL); - if (!tsin->back_buffer_start) { - ret = -ENOMEM; - goto err_unmap; - } - - /* Ensure backbuffer is 32byte aligned */ - tsin->back_buffer_aligned = tsin->back_buffer_start + FEI_ALIGNMENT; - - tsin->back_buffer_aligned = PTR_ALIGN(tsin->back_buffer_aligned, FEI_ALIGNMENT); - - tsin->back_buffer_busaddr = dma_map_single(fei->dev, - tsin->back_buffer_aligned, - FEI_BUFFER_SIZE, - DMA_BIDIRECTIONAL); - - if (dma_mapping_error(fei->dev, tsin->back_buffer_busaddr)) { - dev_err(fei->dev, "failed to map back_buffer\n"); - ret = -EFAULT; - goto err_unmap; - } - - /* - * The pid buffer can be configured (in hw) for byte or bit - * per pid. By powers of deduction we conclude stih407 family - * is configured (at SoC design stage) for bit per pid. - */ - tsin->pid_buffer_start = kzalloc(PID_TABLE_SIZE + PID_TABLE_SIZE, GFP_KERNEL); - if (!tsin->pid_buffer_start) { - ret = -ENOMEM; - goto err_unmap; - } - - /* - * PID buffer needs to be aligned to size of the pid table - * which at bit per pid is 1024 bytes (8192 pids / 8). - * PIDF_BASE register enforces this alignment when writing - * the register. - */ - - tsin->pid_buffer_aligned = tsin->pid_buffer_start + PID_TABLE_SIZE; - - tsin->pid_buffer_aligned = PTR_ALIGN(tsin->pid_buffer_aligned, PID_TABLE_SIZE); - - tsin->pid_buffer_busaddr = dma_map_single(fei->dev, - tsin->pid_buffer_aligned, - PID_TABLE_SIZE, - DMA_BIDIRECTIONAL); - - if (dma_mapping_error(fei->dev, tsin->pid_buffer_busaddr)) { - dev_err(fei->dev, "failed to map pid_bitmap\n"); - ret = -EFAULT; - goto err_unmap; - } - - /* manage cache so pid bitmap is visible to HW */ - dma_sync_single_for_device(fei->dev, - tsin->pid_buffer_busaddr, - PID_TABLE_SIZE, - DMA_TO_DEVICE); - - snprintf(tsin_pin_name, MAX_NAME, "tsin%d-%s", tsin->tsin_id, - (tsin->serial_not_parallel ? "serial" : "parallel")); - - tsin->pstate = pinctrl_lookup_state(fei->pinctrl, tsin_pin_name); - if (IS_ERR(tsin->pstate)) { - dev_err(fei->dev, "%s: pinctrl_lookup_state couldn't find %s state\n" - , __func__, tsin_pin_name); - ret = PTR_ERR(tsin->pstate); - goto err_unmap; - } - - ret = pinctrl_select_state(fei->pinctrl, tsin->pstate); - - if (ret) { - dev_err(fei->dev, "%s: pinctrl_select_state failed\n" - , __func__); - goto err_unmap; - } - - /* Enable this input block */ - tmp = readl(fei->io + SYS_INPUT_CLKEN); - tmp |= BIT(tsin->tsin_id); - writel(tmp, fei->io + SYS_INPUT_CLKEN); - - if (tsin->serial_not_parallel) - tmp |= C8SECTPFE_SERIAL_NOT_PARALLEL; - - if (tsin->invert_ts_clk) - tmp |= C8SECTPFE_INVERT_TSCLK; - - if (tsin->async_not_sync) - tmp |= C8SECTPFE_ASYNC_NOT_SYNC; - - tmp |= C8SECTPFE_ALIGN_BYTE_SOP | C8SECTPFE_BYTE_ENDIANNESS_MSB; - - writel(tmp, fei->io + C8SECTPFE_IB_IP_FMT_CFG(tsin->tsin_id)); - - writel(C8SECTPFE_SYNC(0x9) | - C8SECTPFE_DROP(0x9) | - C8SECTPFE_TOKEN(0x47), - fei->io + C8SECTPFE_IB_SYNCLCKDRP_CFG(tsin->tsin_id)); - - writel(TS_PKT_SIZE, fei->io + C8SECTPFE_IB_PKT_LEN(tsin->tsin_id)); - - /* Place the FIFO's at the end of the irec descriptors */ - - tsin->fifo = (tsin->tsin_id * FIFO_LEN); - - writel(tsin->fifo, fei->io + C8SECTPFE_IB_BUFF_STRT(tsin->tsin_id)); - writel(tsin->fifo + FIFO_LEN - 1, - fei->io + C8SECTPFE_IB_BUFF_END(tsin->tsin_id)); - - writel(tsin->fifo, fei->io + C8SECTPFE_IB_READ_PNT(tsin->tsin_id)); - writel(tsin->fifo, fei->io + C8SECTPFE_IB_WRT_PNT(tsin->tsin_id)); - - writel(tsin->pid_buffer_busaddr, - fei->io + PIDF_BASE(tsin->tsin_id)); - - dev_dbg(fei->dev, "chan=%d PIDF_BASE=0x%x pid_bus_addr=%pad\n", - tsin->tsin_id, readl(fei->io + PIDF_BASE(tsin->tsin_id)), - &tsin->pid_buffer_busaddr); - - /* Configure and enable HW PID filtering */ - - /* - * The PID value is created by assembling the first 8 bytes of - * the TS packet into a 64-bit word in big-endian format. A - * slice of that 64-bit word is taken from - * (PID_OFFSET+PID_NUM_BITS-1) to PID_OFFSET. - */ - tmp = (C8SECTPFE_PID_ENABLE | C8SECTPFE_PID_NUMBITS(13) - | C8SECTPFE_PID_OFFSET(40)); - - writel(tmp, fei->io + C8SECTPFE_IB_PID_SET(tsin->tsin_id)); - - dev_dbg(fei->dev, "chan=%d setting wp: %d, rp: %d, buf: %d-%d\n", - tsin->tsin_id, - readl(fei->io + C8SECTPFE_IB_WRT_PNT(tsin->tsin_id)), - readl(fei->io + C8SECTPFE_IB_READ_PNT(tsin->tsin_id)), - readl(fei->io + C8SECTPFE_IB_BUFF_STRT(tsin->tsin_id)), - readl(fei->io + C8SECTPFE_IB_BUFF_END(tsin->tsin_id))); - - /* Get base addpress of pointer record block from DMEM */ - tsin->irec = fei->io + DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + - readl(fei->io + DMA_PTRREC_BASE); - - /* fill out pointer record data structure */ - - /* advance pointer record block to our channel */ - tsin->irec += (tsin->tsin_id * DMA_PRDS_SIZE); - - writel(tsin->fifo, tsin->irec + DMA_PRDS_MEMBASE); - - writel(tsin->fifo + FIFO_LEN - 1, tsin->irec + DMA_PRDS_MEMTOP); - - writel((188 + 7)&~7, tsin->irec + DMA_PRDS_PKTSIZE); - - writel(0x1, tsin->irec + DMA_PRDS_TPENABLE); - - /* read/write pointers with physical bus address */ - - writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSBASE_TP(0)); - - tmp = tsin->back_buffer_busaddr + FEI_BUFFER_SIZE - 1; - writel(tmp, tsin->irec + DMA_PRDS_BUSTOP_TP(0)); - - writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSWP_TP(0)); - writel(tsin->back_buffer_busaddr, tsin->irec + DMA_PRDS_BUSRP_TP(0)); - - /* initialize bh work */ - INIT_WORK(&tsin->bh_work, channel_swdemux_bh_work); - - return 0; - -err_unmap: - free_input_block(fei, tsin); - return ret; -} - -static irqreturn_t c8sectpfe_error_irq_handler(int irq, void *priv) -{ - struct c8sectpfei *fei = priv; - - dev_err(fei->dev, "%s: error handling not yet implemented\n" - , __func__); - - /* - * TODO FIXME we should detect some error conditions here - * and ideally do something about them! - */ - - return IRQ_HANDLED; -} - -static int c8sectpfe_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct device_node *np = dev->of_node; - struct c8sectpfei *fei; - struct resource *res; - int ret, index = 0; - struct channel_info *tsin; - - /* Allocate the c8sectpfei structure */ - fei = devm_kzalloc(dev, sizeof(struct c8sectpfei), GFP_KERNEL); - if (!fei) - return -ENOMEM; - - fei->dev = dev; - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "c8sectpfe"); - fei->io = devm_ioremap_resource(dev, res); - if (IS_ERR(fei->io)) - return PTR_ERR(fei->io); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "c8sectpfe-ram"); - fei->sram = devm_ioremap_resource(dev, res); - if (IS_ERR(fei->sram)) - return PTR_ERR(fei->sram); - - fei->sram_size = resource_size(res); - - fei->idle_irq = platform_get_irq_byname(pdev, "c8sectpfe-idle-irq"); - if (fei->idle_irq < 0) - return fei->idle_irq; - - fei->error_irq = platform_get_irq_byname(pdev, "c8sectpfe-error-irq"); - if (fei->error_irq < 0) - return fei->error_irq; - - platform_set_drvdata(pdev, fei); - - fei->c8sectpfeclk = devm_clk_get_enabled(dev, "c8sectpfe"); - if (IS_ERR(fei->c8sectpfeclk)) { - dev_err(dev, "Failed to enable c8sectpfe clock\n"); - return PTR_ERR(fei->c8sectpfeclk); - } - - /* to save power disable all IP's (on by default) */ - writel(0, fei->io + SYS_INPUT_CLKEN); - - /* Enable memdma clock */ - writel(MEMDMAENABLE, fei->io + SYS_OTHER_CLKEN); - - /* clear internal sram */ - memset_io(fei->sram, 0x0, fei->sram_size); - - c8sectpfe_getconfig(fei); - - ret = devm_request_irq(dev, fei->idle_irq, c8sectpfe_idle_irq_handler, - 0, "c8sectpfe-idle-irq", fei); - if (ret) { - dev_err(dev, "Can't register c8sectpfe-idle-irq IRQ.\n"); - return ret; - } - - ret = devm_request_irq(dev, fei->error_irq, - c8sectpfe_error_irq_handler, 0, - "c8sectpfe-error-irq", fei); - if (ret) { - dev_err(dev, "Can't register c8sectpfe-error-irq IRQ.\n"); - return ret; - } - - fei->tsin_count = of_get_child_count(np); - - if (fei->tsin_count > C8SECTPFE_MAX_TSIN_CHAN || - fei->tsin_count > fei->hw_stats.num_ib) { - - dev_err(dev, "More tsin declared than exist on SoC!\n"); - return -EINVAL; - } - - fei->pinctrl = devm_pinctrl_get(dev); - - if (IS_ERR(fei->pinctrl)) { - dev_err(dev, "Error getting tsin pins\n"); - return PTR_ERR(fei->pinctrl); - } - - for_each_child_of_node_scoped(np, child) { - struct device_node *i2c_bus; - - fei->channel_data[index] = devm_kzalloc(dev, - sizeof(struct channel_info), - GFP_KERNEL); - - if (!fei->channel_data[index]) - return -ENOMEM; - - tsin = fei->channel_data[index]; - - tsin->fei = fei; - - ret = of_property_read_u32(child, "tsin-num", &tsin->tsin_id); - if (ret) { - dev_err(&pdev->dev, "No tsin_num found\n"); - return ret; - } - - /* sanity check value */ - if (tsin->tsin_id > fei->hw_stats.num_ib) { - dev_err(&pdev->dev, - "tsin-num %d specified greater than number\n\tof input block hw in SoC! (%d)", - tsin->tsin_id, fei->hw_stats.num_ib); - return -EINVAL; - } - - tsin->invert_ts_clk = of_property_read_bool(child, - "invert-ts-clk"); - - tsin->serial_not_parallel = of_property_read_bool(child, - "serial-not-parallel"); - - tsin->async_not_sync = of_property_read_bool(child, - "async-not-sync"); - - ret = of_property_read_u32(child, "dvb-card", - &tsin->dvb_card); - if (ret) { - dev_err(&pdev->dev, "No dvb-card found\n"); - return ret; - } - - i2c_bus = of_parse_phandle(child, "i2c-bus", 0); - if (!i2c_bus) { - dev_err(&pdev->dev, "No i2c-bus found\n"); - return -ENODEV; - } - tsin->i2c_adapter = - of_find_i2c_adapter_by_node(i2c_bus); - of_node_put(i2c_bus); - if (!tsin->i2c_adapter) { - dev_err(&pdev->dev, "No i2c adapter found\n"); - return -ENODEV; - } - - /* Acquire reset GPIO and activate it */ - tsin->rst_gpio = devm_fwnode_gpiod_get(dev, - of_fwnode_handle(child), - "reset", GPIOD_OUT_HIGH, - "NIM reset"); - ret = PTR_ERR_OR_ZERO(tsin->rst_gpio); - if (ret && ret != -EBUSY) { - dev_err(dev, "Can't request tsin%d reset gpio\n", - fei->channel_data[index]->tsin_id); - return ret; - } - - if (!ret) { - /* wait for the chip to reset */ - usleep_range(3500, 5000); - /* release the reset line */ - gpiod_set_value_cansleep(tsin->rst_gpio, 0); - usleep_range(3000, 5000); - } - - tsin->demux_mapping = index; - - dev_dbg(fei->dev, - "channel=%p n=%d tsin_num=%d, invert-ts-clk=%d\n\tserial-not-parallel=%d pkt-clk-valid=%d dvb-card=%d\n", - fei->channel_data[index], index, - tsin->tsin_id, tsin->invert_ts_clk, - tsin->serial_not_parallel, tsin->async_not_sync, - tsin->dvb_card); - - index++; - } - - /* Setup timer interrupt */ - timer_setup(&fei->timer, c8sectpfe_timer_interrupt, 0); - - mutex_init(&fei->lock); - - /* Get the configuration information about the tuners */ - ret = c8sectpfe_tuner_register_frontend(&fei->c8sectpfe[0], - (void *)fei, - c8sectpfe_start_feed, - c8sectpfe_stop_feed); - if (ret) { - dev_err(dev, "c8sectpfe_tuner_register_frontend failed (%d)\n", - ret); - return ret; - } - - c8sectpfe_debugfs_init(fei); - - return 0; -} - -static void c8sectpfe_remove(struct platform_device *pdev) -{ - struct c8sectpfei *fei = platform_get_drvdata(pdev); - struct channel_info *channel; - int i; - - wait_for_completion(&fei->fw_ack); - - c8sectpfe_tuner_unregister_frontend(fei->c8sectpfe[0], fei); - - /* - * Now loop through and un-configure each of the InputBlock resources - */ - for (i = 0; i < fei->tsin_count; i++) { - channel = fei->channel_data[i]; - free_input_block(fei, channel); - } - - c8sectpfe_debugfs_exit(fei); - - dev_info(fei->dev, "Stopping memdma SLIM core\n"); - if (readl(fei->io + DMA_CPU_RUN)) - writel(0x0, fei->io + DMA_CPU_RUN); - - /* unclock all internal IP's */ - if (readl(fei->io + SYS_INPUT_CLKEN)) - writel(0, fei->io + SYS_INPUT_CLKEN); - - if (readl(fei->io + SYS_OTHER_CLKEN)) - writel(0, fei->io + SYS_OTHER_CLKEN); -} - - -static int configure_channels(struct c8sectpfei *fei) -{ - int index = 0, ret; - struct device_node *np = fei->dev->of_node; - - /* iterate round each tsin and configure memdma descriptor and IB hw */ - for_each_child_of_node_scoped(np, child) { - ret = configure_memdma_and_inputblock(fei, - fei->channel_data[index]); - if (ret) { - dev_err(fei->dev, - "configure_memdma_and_inputblock failed\n"); - goto err_unmap; - } - index++; - } - - return 0; - -err_unmap: - while (--index >= 0) - free_input_block(fei, fei->channel_data[index]); - - return ret; -} - -static int -c8sectpfe_elf_sanity_check(struct c8sectpfei *fei, const struct firmware *fw) -{ - struct elf32_hdr *ehdr; - char class; - - if (!fw) { - dev_err(fei->dev, "failed to load %s\n", FIRMWARE_MEMDMA); - return -EINVAL; - } - - if (fw->size < sizeof(struct elf32_hdr)) { - dev_err(fei->dev, "Image is too small\n"); - return -EINVAL; - } - - ehdr = (struct elf32_hdr *)fw->data; - - /* We only support ELF32 at this point */ - class = ehdr->e_ident[EI_CLASS]; - if (class != ELFCLASS32) { - dev_err(fei->dev, "Unsupported class: %d\n", class); - return -EINVAL; - } - - if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB) { - dev_err(fei->dev, "Unsupported firmware endianness\n"); - return -EINVAL; - } - - if (fw->size < ehdr->e_shoff + sizeof(struct elf32_shdr)) { - dev_err(fei->dev, "Image is too small\n"); - return -EINVAL; - } - - if (memcmp(ehdr->e_ident, ELFMAG, SELFMAG)) { - dev_err(fei->dev, "Image is corrupted (bad magic)\n"); - return -EINVAL; - } - - /* Check ELF magic */ - ehdr = (Elf32_Ehdr *)fw->data; - if (ehdr->e_ident[EI_MAG0] != ELFMAG0 || - ehdr->e_ident[EI_MAG1] != ELFMAG1 || - ehdr->e_ident[EI_MAG2] != ELFMAG2 || - ehdr->e_ident[EI_MAG3] != ELFMAG3) { - dev_err(fei->dev, "Invalid ELF magic\n"); - return -EINVAL; - } - - if (ehdr->e_type != ET_EXEC) { - dev_err(fei->dev, "Unsupported ELF header type\n"); - return -EINVAL; - } - - if (ehdr->e_phoff > fw->size) { - dev_err(fei->dev, "Firmware size is too small\n"); - return -EINVAL; - } - - return 0; -} - - -static void load_imem_segment(struct c8sectpfei *fei, Elf32_Phdr *phdr, - const struct firmware *fw, u8 __iomem *dest, - int seg_num) -{ - const u8 *imem_src = fw->data + phdr->p_offset; - int i; - - /* - * For IMEM segments, the segment contains 24-bit - * instructions which must be padded to 32-bit - * instructions before being written. The written - * segment is padded with NOP instructions. - */ - - dev_dbg(fei->dev, - "Loading IMEM segment %d 0x%08x\n\t (0x%x bytes) -> 0x%p (0x%x bytes)\n", - seg_num, phdr->p_paddr, phdr->p_filesz, dest, - phdr->p_memsz + phdr->p_memsz / 3); - - for (i = 0; i < phdr->p_filesz; i++) { - - writeb(readb((void __iomem *)imem_src), (void __iomem *)dest); - - /* Every 3 bytes, add an additional - * padding zero in destination */ - if (i % 3 == 2) { - dest++; - writeb(0x00, (void __iomem *)dest); - } - - dest++; - imem_src++; - } -} - -static void load_dmem_segment(struct c8sectpfei *fei, Elf32_Phdr *phdr, - const struct firmware *fw, u8 __iomem *dst, int seg_num) -{ - /* - * For DMEM segments copy the segment data from the ELF - * file and pad segment with zeroes - */ - - dev_dbg(fei->dev, - "Loading DMEM segment %d 0x%08x\n\t(0x%x bytes) -> 0x%p (0x%x bytes)\n", - seg_num, phdr->p_paddr, phdr->p_filesz, - dst, phdr->p_memsz); - - memcpy((void __force *)dst, (void *)fw->data + phdr->p_offset, - phdr->p_filesz); - - memset((void __force *)dst + phdr->p_filesz, 0, - phdr->p_memsz - phdr->p_filesz); -} - -static int load_slim_core_fw(const struct firmware *fw, struct c8sectpfei *fei) -{ - Elf32_Ehdr *ehdr; - Elf32_Phdr *phdr; - u8 __iomem *dst; - int err = 0, i; - - if (!fw || !fei) - return -EINVAL; - - ehdr = (Elf32_Ehdr *)fw->data; - phdr = (Elf32_Phdr *)(fw->data + ehdr->e_phoff); - - /* go through the available ELF segments */ - for (i = 0; i < ehdr->e_phnum; i++, phdr++) { - - /* Only consider LOAD segments */ - if (phdr->p_type != PT_LOAD) - continue; - - /* - * Check segment is contained within the fw->data buffer - */ - if (phdr->p_offset + phdr->p_filesz > fw->size) { - dev_err(fei->dev, - "Segment %d is outside of firmware file\n", i); - err = -EINVAL; - break; - } - - /* - * MEMDMA IMEM has executable flag set, otherwise load - * this segment into DMEM. - * - */ - - if (phdr->p_flags & PF_X) { - dst = (u8 __iomem *) fei->io + DMA_MEMDMA_IMEM; - /* - * The Slim ELF file uses 32-bit word addressing for - * load offsets. - */ - dst += (phdr->p_paddr & 0xFFFFF) * sizeof(unsigned int); - load_imem_segment(fei, phdr, fw, dst, i); - } else { - dst = (u8 __iomem *) fei->io + DMA_MEMDMA_DMEM; - /* - * The Slim ELF file uses 32-bit word addressing for - * load offsets. - */ - dst += (phdr->p_paddr & 0xFFFFF) * sizeof(unsigned int); - load_dmem_segment(fei, phdr, fw, dst, i); - } - } - - return err; -} - -static int load_c8sectpfe_fw(struct c8sectpfei *fei) -{ - const struct firmware *fw; - int err; - - dev_info(fei->dev, "Loading firmware: %s\n", FIRMWARE_MEMDMA); - - err = request_firmware(&fw, FIRMWARE_MEMDMA, fei->dev); - if (err) - return err; - - err = c8sectpfe_elf_sanity_check(fei, fw); - if (err) { - dev_err(fei->dev, "c8sectpfe_elf_sanity_check failed err=(%d)\n" - , err); - release_firmware(fw); - return err; - } - - err = load_slim_core_fw(fw, fei); - release_firmware(fw); - if (err) { - dev_err(fei->dev, "load_slim_core_fw failed err=(%d)\n", err); - return err; - } - - /* now the firmware is loaded configure the input blocks */ - err = configure_channels(fei); - if (err) { - dev_err(fei->dev, "configure_channels failed err=(%d)\n", err); - return err; - } - - /* - * STBus target port can access IMEM and DMEM ports - * without waiting for CPU - */ - writel(0x1, fei->io + DMA_PER_STBUS_SYNC); - - dev_info(fei->dev, "Boot the memdma SLIM core\n"); - writel(0x1, fei->io + DMA_CPU_RUN); - - atomic_set(&fei->fw_loaded, 1); - - return 0; -} - -static const struct of_device_id c8sectpfe_match[] = { - { .compatible = "st,stih407-c8sectpfe" }, - { /* sentinel */ }, -}; -MODULE_DEVICE_TABLE(of, c8sectpfe_match); - -static struct platform_driver c8sectpfe_driver = { - .driver = { - .name = "c8sectpfe", - .of_match_table = c8sectpfe_match, - }, - .probe = c8sectpfe_probe, - .remove = c8sectpfe_remove, -}; - -module_platform_driver(c8sectpfe_driver); - -MODULE_AUTHOR("Peter Bennett "); -MODULE_AUTHOR("Peter Griffin "); -MODULE_DESCRIPTION("C8SECTPFE STi DVB Driver"); -MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.h b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.h deleted file mode 100644 index c1b124c6ef12..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-core.h +++ /dev/null @@ -1,287 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * c8sectpfe-core.h - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author:Peter Bennett - * Peter Griffin - * - */ -#ifndef _C8SECTPFE_CORE_H_ -#define _C8SECTPFE_CORE_H_ - -#define C8SECTPFEI_MAXCHANNEL 16 -#define C8SECTPFEI_MAXADAPTER 3 - -#define C8SECTPFE_MAX_TSIN_CHAN 8 - -struct gpio_desc; - -struct channel_info { - - int tsin_id; - bool invert_ts_clk; - bool serial_not_parallel; - bool async_not_sync; - int i2c; - int dvb_card; - - struct gpio_desc *rst_gpio; - - struct i2c_adapter *i2c_adapter; - struct i2c_adapter *tuner_i2c; - struct i2c_adapter *lnb_i2c; - struct i2c_client *i2c_client; - struct dvb_frontend *frontend; - - struct pinctrl_state *pstate; - - int demux_mapping; - int active; - - void *back_buffer_start; - void *back_buffer_aligned; - dma_addr_t back_buffer_busaddr; - - void *pid_buffer_start; - void *pid_buffer_aligned; - dma_addr_t pid_buffer_busaddr; - - unsigned long fifo; - - struct completion idle_completion; - struct work_struct bh_work; - - struct c8sectpfei *fei; - void __iomem *irec; - -}; - -struct c8sectpfe_hw { - int num_ib; - int num_mib; - int num_swts; - int num_tsout; - int num_ccsc; - int num_ram; - int num_tp; -}; - -struct c8sectpfei { - - struct device *dev; - struct pinctrl *pinctrl; - - struct dentry *root; - struct debugfs_regset32 *regset; - struct completion fw_ack; - atomic_t fw_loaded; - - int tsin_count; - - struct c8sectpfe_hw hw_stats; - - struct c8sectpfe *c8sectpfe[C8SECTPFEI_MAXADAPTER]; - - int mapping[C8SECTPFEI_MAXCHANNEL]; - - struct mutex lock; - - struct timer_list timer; /* timer interrupts for outputs */ - - void __iomem *io; - void __iomem *sram; - - unsigned long sram_size; - - struct channel_info *channel_data[C8SECTPFE_MAX_TSIN_CHAN]; - - struct clk *c8sectpfeclk; - int nima_rst_gpio; - int nimb_rst_gpio; - - int idle_irq; - int error_irq; - - int global_feed_count; -}; - -/* C8SECTPFE SYS Regs list */ - -#define SYS_INPUT_ERR_STATUS 0x0 -#define SYS_OTHER_ERR_STATUS 0x8 -#define SYS_INPUT_ERR_MASK 0x10 -#define SYS_OTHER_ERR_MASK 0x18 -#define SYS_DMA_ROUTE 0x20 -#define SYS_INPUT_CLKEN 0x30 -#define IBENABLE_MASK 0x7F - -#define SYS_OTHER_CLKEN 0x38 -#define TSDMAENABLE BIT(1) -#define MEMDMAENABLE BIT(0) - -#define SYS_CFG_NUM_IB 0x200 -#define SYS_CFG_NUM_MIB 0x204 -#define SYS_CFG_NUM_SWTS 0x208 -#define SYS_CFG_NUM_TSOUT 0x20C -#define SYS_CFG_NUM_CCSC 0x210 -#define SYS_CFG_NUM_RAM 0x214 -#define SYS_CFG_NUM_TP 0x218 - -/* Input Block Regs */ - -#define C8SECTPFE_INPUTBLK_OFFSET 0x1000 -#define C8SECTPFE_CHANNEL_OFFSET(x) ((x*0x40) + C8SECTPFE_INPUTBLK_OFFSET) - -#define C8SECTPFE_IB_IP_FMT_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x00) -#define C8SECTPFE_IGNORE_ERR_AT_SOP BIT(7) -#define C8SECTPFE_IGNORE_ERR_IN_PKT BIT(6) -#define C8SECTPFE_IGNORE_ERR_IN_BYTE BIT(5) -#define C8SECTPFE_INVERT_TSCLK BIT(4) -#define C8SECTPFE_ALIGN_BYTE_SOP BIT(3) -#define C8SECTPFE_ASYNC_NOT_SYNC BIT(2) -#define C8SECTPFE_BYTE_ENDIANNESS_MSB BIT(1) -#define C8SECTPFE_SERIAL_NOT_PARALLEL BIT(0) - -#define C8SECTPFE_IB_SYNCLCKDRP_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x04) -#define C8SECTPFE_SYNC(x) (x & 0xf) -#define C8SECTPFE_DROP(x) ((x<<4) & 0xf) -#define C8SECTPFE_TOKEN(x) ((x<<8) & 0xff00) -#define C8SECTPFE_SLDENDIANNESS BIT(16) - -#define C8SECTPFE_IB_TAGBYTES_CFG(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x08) -#define C8SECTPFE_TAG_HEADER(x) (x << 16) -#define C8SECTPFE_TAG_COUNTER(x) ((x<<1) & 0x7fff) -#define C8SECTPFE_TAG_ENABLE BIT(0) - -#define C8SECTPFE_IB_PID_SET(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x0C) -#define C8SECTPFE_PID_OFFSET(x) (x & 0x3f) -#define C8SECTPFE_PID_NUMBITS(x) ((x << 6) & 0xfff) -#define C8SECTPFE_PID_ENABLE BIT(31) - -#define C8SECTPFE_IB_PKT_LEN(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x10) - -#define C8SECTPFE_IB_BUFF_STRT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x14) -#define C8SECTPFE_IB_BUFF_END(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x18) -#define C8SECTPFE_IB_READ_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x1C) -#define C8SECTPFE_IB_WRT_PNT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x20) - -#define C8SECTPFE_IB_PRI_THRLD(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x24) -#define C8SECTPFE_PRI_VALUE(x) (x & 0x7fffff) -#define C8SECTPFE_PRI_LOWPRI(x) ((x & 0xf) << 24) -#define C8SECTPFE_PRI_HIGHPRI(x) ((x & 0xf) << 28) - -#define C8SECTPFE_IB_STAT(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x28) -#define C8SECTPFE_STAT_FIFO_OVERFLOW(x) (x & 0x1) -#define C8SECTPFE_STAT_BUFFER_OVERFLOW(x) (x & 0x2) -#define C8SECTPFE_STAT_OUTOFORDERRP(x) (x & 0x4) -#define C8SECTPFE_STAT_PID_OVERFLOW(x) (x & 0x8) -#define C8SECTPFE_STAT_PKT_OVERFLOW(x) (x & 0x10) -#define C8SECTPFE_STAT_ERROR_PACKETS(x) ((x >> 8) & 0xf) -#define C8SECTPFE_STAT_SHORT_PACKETS(x) ((x >> 12) & 0xf) - -#define C8SECTPFE_IB_MASK(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x2C) -#define C8SECTPFE_MASK_FIFO_OVERFLOW BIT(0) -#define C8SECTPFE_MASK_BUFFER_OVERFLOW BIT(1) -#define C8SECTPFE_MASK_OUTOFORDERRP(x) BIT(2) -#define C8SECTPFE_MASK_PID_OVERFLOW(x) BIT(3) -#define C8SECTPFE_MASK_PKT_OVERFLOW(x) BIT(4) -#define C8SECTPFE_MASK_ERROR_PACKETS(x) ((x & 0xf) << 8) -#define C8SECTPFE_MASK_SHORT_PACKETS(x) ((x & 0xf) >> 12) - -#define C8SECTPFE_IB_SYS(x) (C8SECTPFE_CHANNEL_OFFSET(x) + 0x30) -#define C8SECTPFE_SYS_RESET BIT(1) -#define C8SECTPFE_SYS_ENABLE BIT(0) - -/* - * Pointer record data structure required for each input block - * see Table 82 on page 167 of functional specification. - */ - -#define DMA_PRDS_MEMBASE 0x0 /* Internal sram base address */ -#define DMA_PRDS_MEMTOP 0x4 /* Internal sram top address */ - -/* - * TS packet size, including tag bytes added by input block, - * rounded up to the next multiple of 8 bytes. The packet size, - * including any tagging bytes and rounded up to the nearest - * multiple of 8 bytes must be less than 255 bytes. - */ -#define DMA_PRDS_PKTSIZE 0x8 -#define DMA_PRDS_TPENABLE 0xc - -#define TP0_OFFSET 0x10 -#define DMA_PRDS_BUSBASE_TP(x) ((0x10*x) + TP0_OFFSET) -#define DMA_PRDS_BUSTOP_TP(x) ((0x10*x) + TP0_OFFSET + 0x4) -#define DMA_PRDS_BUSWP_TP(x) ((0x10*x) + TP0_OFFSET + 0x8) -#define DMA_PRDS_BUSRP_TP(x) ((0x10*x) + TP0_OFFSET + 0xc) - -#define DMA_PRDS_SIZE (0x20) - -#define DMA_MEMDMA_OFFSET 0x4000 -#define DMA_IMEM_OFFSET 0x0 -#define DMA_DMEM_OFFSET 0x4000 -#define DMA_CPU 0x8000 -#define DMA_PER_OFFSET 0xb000 - -#define DMA_MEMDMA_DMEM (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET) -#define DMA_MEMDMA_IMEM (DMA_MEMDMA_OFFSET + DMA_IMEM_OFFSET) - -/* XP70 Slim core regs */ -#define DMA_CPU_ID (DMA_MEMDMA_OFFSET + DMA_CPU + 0x0) -#define DMA_CPU_VCR (DMA_MEMDMA_OFFSET + DMA_CPU + 0x4) -#define DMA_CPU_RUN (DMA_MEMDMA_OFFSET + DMA_CPU + 0x8) -#define DMA_CPU_CLOCKGATE (DMA_MEMDMA_OFFSET + DMA_CPU + 0xc) -#define DMA_CPU_PC (DMA_MEMDMA_OFFSET + DMA_CPU + 0x20) - -/* Enable Interrupt for a IB */ -#define DMA_PER_TPn_DREQ_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xd00) -/* Ack interrupt by setting corresponding bit */ -#define DMA_PER_TPn_DACK_SET (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xd80) -#define DMA_PER_TPn_DREQ (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xe00) -#define DMA_PER_TPn_DACK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xe80) -#define DMA_PER_DREQ_MODE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf80) -#define DMA_PER_STBUS_SYNC (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf88) -#define DMA_PER_STBUS_ACCESS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf8c) -#define DMA_PER_STBUS_ADDRESS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xf90) -#define DMA_PER_IDLE_INT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfa8) -#define DMA_PER_PRIORITY (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfac) -#define DMA_PER_MAX_OPCODE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfb0) -#define DMA_PER_MAX_CHUNK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfb4) -#define DMA_PER_PAGE_SIZE (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfbc) -#define DMA_PER_MBOX_STATUS (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfc0) -#define DMA_PER_MBOX_SET (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfc8) -#define DMA_PER_MBOX_CLEAR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfd0) -#define DMA_PER_MBOX_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfd8) -#define DMA_PER_INJECT_PKT_SRC (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe0) -#define DMA_PER_INJECT_PKT_DEST (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe4) -#define DMA_PER_INJECT_PKT_ADDR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfe8) -#define DMA_PER_INJECT_PKT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xfec) -#define DMA_PER_PAT_PTR_INIT (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff0) -#define DMA_PER_PAT_PTR (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff4) -#define DMA_PER_SLEEP_MASK (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xff8) -#define DMA_PER_SLEEP_COUNTER (DMA_MEMDMA_OFFSET + DMA_PER_OFFSET + 0xffc) -/* #define DMA_RF_CPUREGn DMA_RFBASEADDR n=0 to 15) slim regsa */ - -/* The following are from DMA_DMEM_BaseAddress */ -#define DMA_FIRMWARE_VERSION (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x0) -#define DMA_PTRREC_BASE (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x4) -#define DMA_PTRREC_INPUT_OFFSET (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x8) -#define DMA_ERRREC_BASE (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0xc) -#define DMA_ERROR_RECORD(n) ((n*4) + DMA_ERRREC_BASE + 0x4) -#define DMA_IDLE_REQ (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x10) -#define IDLEREQ BIT(31) - -#define DMA_FIRMWARE_CONFIG (DMA_MEMDMA_OFFSET + DMA_DMEM_OFFSET + 0x14) - -/* Regs for PID Filter */ - -#define PIDF_OFFSET 0x2800 -#define PIDF_BASE(n) ((n*4) + PIDF_OFFSET) -#define PIDF_LEAK_ENABLE (PIDF_OFFSET + 0x100) -#define PIDF_LEAK_STATUS (PIDF_OFFSET + 0x108) -#define PIDF_LEAK_COUNT_RESET (PIDF_OFFSET + 0x110) -#define PIDF_LEAK_COUNTER (PIDF_OFFSET + 0x114) - -#endif /* _C8SECTPFE_CORE_H_ */ diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.c b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.c deleted file mode 100644 index 301fa10f419b..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.c +++ /dev/null @@ -1,244 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * c8sectpfe-debugfs.c - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author: Peter Griffin - * - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include "c8sectpfe-debugfs.h" - -#define dump_register(nm ...) \ -{ \ - .name = #nm, \ - .offset = nm, \ -} - -static const struct debugfs_reg32 fei_sys_regs[] = { - dump_register(SYS_INPUT_ERR_STATUS), - dump_register(SYS_OTHER_ERR_STATUS), - dump_register(SYS_INPUT_ERR_MASK), - dump_register(SYS_DMA_ROUTE), - dump_register(SYS_INPUT_CLKEN), - dump_register(IBENABLE_MASK), - dump_register(SYS_OTHER_CLKEN), - dump_register(SYS_CFG_NUM_IB), - dump_register(SYS_CFG_NUM_MIB), - dump_register(SYS_CFG_NUM_SWTS), - dump_register(SYS_CFG_NUM_TSOUT), - dump_register(SYS_CFG_NUM_CCSC), - dump_register(SYS_CFG_NUM_RAM), - dump_register(SYS_CFG_NUM_TP), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(0)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(0)), - dump_register(C8SECTPFE_IB_PID_SET(0)), - dump_register(C8SECTPFE_IB_PKT_LEN(0)), - dump_register(C8SECTPFE_IB_BUFF_STRT(0)), - dump_register(C8SECTPFE_IB_BUFF_END(0)), - dump_register(C8SECTPFE_IB_READ_PNT(0)), - dump_register(C8SECTPFE_IB_WRT_PNT(0)), - dump_register(C8SECTPFE_IB_PRI_THRLD(0)), - dump_register(C8SECTPFE_IB_STAT(0)), - dump_register(C8SECTPFE_IB_MASK(0)), - dump_register(C8SECTPFE_IB_SYS(0)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(1)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(1)), - dump_register(C8SECTPFE_IB_PID_SET(1)), - dump_register(C8SECTPFE_IB_PKT_LEN(1)), - dump_register(C8SECTPFE_IB_BUFF_STRT(1)), - dump_register(C8SECTPFE_IB_BUFF_END(1)), - dump_register(C8SECTPFE_IB_READ_PNT(1)), - dump_register(C8SECTPFE_IB_WRT_PNT(1)), - dump_register(C8SECTPFE_IB_PRI_THRLD(1)), - dump_register(C8SECTPFE_IB_STAT(1)), - dump_register(C8SECTPFE_IB_MASK(1)), - dump_register(C8SECTPFE_IB_SYS(1)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(2)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(2)), - dump_register(C8SECTPFE_IB_PID_SET(2)), - dump_register(C8SECTPFE_IB_PKT_LEN(2)), - dump_register(C8SECTPFE_IB_BUFF_STRT(2)), - dump_register(C8SECTPFE_IB_BUFF_END(2)), - dump_register(C8SECTPFE_IB_READ_PNT(2)), - dump_register(C8SECTPFE_IB_WRT_PNT(2)), - dump_register(C8SECTPFE_IB_PRI_THRLD(2)), - dump_register(C8SECTPFE_IB_STAT(2)), - dump_register(C8SECTPFE_IB_MASK(2)), - dump_register(C8SECTPFE_IB_SYS(2)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(3)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(3)), - dump_register(C8SECTPFE_IB_PID_SET(3)), - dump_register(C8SECTPFE_IB_PKT_LEN(3)), - dump_register(C8SECTPFE_IB_BUFF_STRT(3)), - dump_register(C8SECTPFE_IB_BUFF_END(3)), - dump_register(C8SECTPFE_IB_READ_PNT(3)), - dump_register(C8SECTPFE_IB_WRT_PNT(3)), - dump_register(C8SECTPFE_IB_PRI_THRLD(3)), - dump_register(C8SECTPFE_IB_STAT(3)), - dump_register(C8SECTPFE_IB_MASK(3)), - dump_register(C8SECTPFE_IB_SYS(3)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(4)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(4)), - dump_register(C8SECTPFE_IB_PID_SET(4)), - dump_register(C8SECTPFE_IB_PKT_LEN(4)), - dump_register(C8SECTPFE_IB_BUFF_STRT(4)), - dump_register(C8SECTPFE_IB_BUFF_END(4)), - dump_register(C8SECTPFE_IB_READ_PNT(4)), - dump_register(C8SECTPFE_IB_WRT_PNT(4)), - dump_register(C8SECTPFE_IB_PRI_THRLD(4)), - dump_register(C8SECTPFE_IB_STAT(4)), - dump_register(C8SECTPFE_IB_MASK(4)), - dump_register(C8SECTPFE_IB_SYS(4)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(5)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(5)), - dump_register(C8SECTPFE_IB_PID_SET(5)), - dump_register(C8SECTPFE_IB_PKT_LEN(5)), - dump_register(C8SECTPFE_IB_BUFF_STRT(5)), - dump_register(C8SECTPFE_IB_BUFF_END(5)), - dump_register(C8SECTPFE_IB_READ_PNT(5)), - dump_register(C8SECTPFE_IB_WRT_PNT(5)), - dump_register(C8SECTPFE_IB_PRI_THRLD(5)), - dump_register(C8SECTPFE_IB_STAT(5)), - dump_register(C8SECTPFE_IB_MASK(5)), - dump_register(C8SECTPFE_IB_SYS(5)), - - dump_register(C8SECTPFE_IB_IP_FMT_CFG(6)), - dump_register(C8SECTPFE_IB_TAGBYTES_CFG(6)), - dump_register(C8SECTPFE_IB_PID_SET(6)), - dump_register(C8SECTPFE_IB_PKT_LEN(6)), - dump_register(C8SECTPFE_IB_BUFF_STRT(6)), - dump_register(C8SECTPFE_IB_BUFF_END(6)), - dump_register(C8SECTPFE_IB_READ_PNT(6)), - dump_register(C8SECTPFE_IB_WRT_PNT(6)), - dump_register(C8SECTPFE_IB_PRI_THRLD(6)), - dump_register(C8SECTPFE_IB_STAT(6)), - dump_register(C8SECTPFE_IB_MASK(6)), - dump_register(C8SECTPFE_IB_SYS(6)), - - dump_register(DMA_CPU_ID), - dump_register(DMA_CPU_VCR), - dump_register(DMA_CPU_RUN), - dump_register(DMA_CPU_PC), - - dump_register(DMA_PER_TPn_DREQ_MASK), - dump_register(DMA_PER_TPn_DACK_SET), - dump_register(DMA_PER_TPn_DREQ), - dump_register(DMA_PER_TPn_DACK), - dump_register(DMA_PER_DREQ_MODE), - dump_register(DMA_PER_STBUS_SYNC), - dump_register(DMA_PER_STBUS_ACCESS), - dump_register(DMA_PER_STBUS_ADDRESS), - dump_register(DMA_PER_IDLE_INT), - dump_register(DMA_PER_PRIORITY), - dump_register(DMA_PER_MAX_OPCODE), - dump_register(DMA_PER_MAX_CHUNK), - dump_register(DMA_PER_PAGE_SIZE), - dump_register(DMA_PER_MBOX_STATUS), - dump_register(DMA_PER_MBOX_SET), - dump_register(DMA_PER_MBOX_CLEAR), - dump_register(DMA_PER_MBOX_MASK), - dump_register(DMA_PER_INJECT_PKT_SRC), - dump_register(DMA_PER_INJECT_PKT_DEST), - dump_register(DMA_PER_INJECT_PKT_ADDR), - dump_register(DMA_PER_INJECT_PKT), - dump_register(DMA_PER_PAT_PTR_INIT), - dump_register(DMA_PER_PAT_PTR), - dump_register(DMA_PER_SLEEP_MASK), - dump_register(DMA_PER_SLEEP_COUNTER), - - dump_register(DMA_FIRMWARE_VERSION), - dump_register(DMA_PTRREC_BASE), - dump_register(DMA_PTRREC_INPUT_OFFSET), - dump_register(DMA_ERRREC_BASE), - - dump_register(DMA_ERROR_RECORD(0)), - dump_register(DMA_ERROR_RECORD(1)), - dump_register(DMA_ERROR_RECORD(2)), - dump_register(DMA_ERROR_RECORD(3)), - dump_register(DMA_ERROR_RECORD(4)), - dump_register(DMA_ERROR_RECORD(5)), - dump_register(DMA_ERROR_RECORD(6)), - dump_register(DMA_ERROR_RECORD(7)), - dump_register(DMA_ERROR_RECORD(8)), - dump_register(DMA_ERROR_RECORD(9)), - dump_register(DMA_ERROR_RECORD(10)), - dump_register(DMA_ERROR_RECORD(11)), - dump_register(DMA_ERROR_RECORD(12)), - dump_register(DMA_ERROR_RECORD(13)), - dump_register(DMA_ERROR_RECORD(14)), - dump_register(DMA_ERROR_RECORD(15)), - dump_register(DMA_ERROR_RECORD(16)), - dump_register(DMA_ERROR_RECORD(17)), - dump_register(DMA_ERROR_RECORD(18)), - dump_register(DMA_ERROR_RECORD(19)), - dump_register(DMA_ERROR_RECORD(20)), - dump_register(DMA_ERROR_RECORD(21)), - dump_register(DMA_ERROR_RECORD(22)), - - dump_register(DMA_IDLE_REQ), - dump_register(DMA_FIRMWARE_CONFIG), - - dump_register(PIDF_BASE(0)), - dump_register(PIDF_BASE(1)), - dump_register(PIDF_BASE(2)), - dump_register(PIDF_BASE(3)), - dump_register(PIDF_BASE(4)), - dump_register(PIDF_BASE(5)), - dump_register(PIDF_BASE(6)), - dump_register(PIDF_BASE(7)), - dump_register(PIDF_BASE(8)), - dump_register(PIDF_BASE(9)), - dump_register(PIDF_BASE(10)), - dump_register(PIDF_BASE(11)), - dump_register(PIDF_BASE(12)), - dump_register(PIDF_BASE(13)), - dump_register(PIDF_BASE(14)), - dump_register(PIDF_BASE(15)), - dump_register(PIDF_BASE(16)), - dump_register(PIDF_BASE(17)), - dump_register(PIDF_BASE(18)), - dump_register(PIDF_BASE(19)), - dump_register(PIDF_BASE(20)), - dump_register(PIDF_BASE(21)), - dump_register(PIDF_BASE(22)), - dump_register(PIDF_LEAK_ENABLE), - dump_register(PIDF_LEAK_STATUS), - dump_register(PIDF_LEAK_COUNT_RESET), - dump_register(PIDF_LEAK_COUNTER), -}; - -void c8sectpfe_debugfs_init(struct c8sectpfei *fei) -{ - fei->regset = devm_kzalloc(fei->dev, sizeof(*fei->regset), GFP_KERNEL); - if (!fei->regset) - return; - - fei->regset->regs = fei_sys_regs; - fei->regset->nregs = ARRAY_SIZE(fei_sys_regs); - fei->regset->base = fei->io; - - fei->root = debugfs_create_dir("c8sectpfe", NULL); - debugfs_create_regset32("registers", S_IRUGO, fei->root, fei->regset); -} - -void c8sectpfe_debugfs_exit(struct c8sectpfei *fei) -{ - debugfs_remove_recursive(fei->root); - fei->root = NULL; -} diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.h b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.h deleted file mode 100644 index 3fe177b59b16..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-debugfs.h +++ /dev/null @@ -1,23 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * c8sectpfe-debugfs.h - C8SECTPFE STi DVB driver debugfs header - * - * Copyright (c) STMicroelectronics 2015 - * - * Authors: Peter Griffin - */ - -#ifndef __C8SECTPFE_DEBUG_H -#define __C8SECTPFE_DEBUG_H - -#include "c8sectpfe-core.h" - -#if defined(CONFIG_DEBUG_FS) -void c8sectpfe_debugfs_init(struct c8sectpfei *); -void c8sectpfe_debugfs_exit(struct c8sectpfei *); -#else -static inline void c8sectpfe_debugfs_init(struct c8sectpfei *fei) {}; -static inline void c8sectpfe_debugfs_exit(struct c8sectpfei *fei) {}; -#endif - -#endif /* __C8SECTPFE_DEBUG_H */ diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.c b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.c deleted file mode 100644 index feb48cb546d7..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.c +++ /dev/null @@ -1,235 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * c8sectpfe-dvb.c - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author Peter Griffin - * - */ -#include -#include -#include -#include - -#include - -#include "c8sectpfe-common.h" -#include "c8sectpfe-core.h" -#include "c8sectpfe-dvb.h" - -#include "dvb-pll.h" -#include "lnbh24.h" -#include "stv0367.h" -#include "stv0367_priv.h" -#include "stv6110x.h" -#include "stv090x.h" -#include "tda18212.h" - -static inline const char *dvb_card_str(unsigned int c) -{ - switch (c) { - case STV0367_TDA18212_NIMA_1: return "STV0367_TDA18212_NIMA_1"; - case STV0367_TDA18212_NIMA_2: return "STV0367_TDA18212_NIMA_2"; - case STV0367_TDA18212_NIMB_1: return "STV0367_TDA18212_NIMB_1"; - case STV0367_TDA18212_NIMB_2: return "STV0367_TDA18212_NIMB_2"; - case STV0903_6110_LNB24_NIMA: return "STV0903_6110_LNB24_NIMA"; - case STV0903_6110_LNB24_NIMB: return "STV0903_6110_LNB24_NIMB"; - default: return "unknown dvb frontend card"; - } -} - -static struct stv090x_config stv090x_config = { - .device = STV0903, - .demod_mode = STV090x_SINGLE, - .clk_mode = STV090x_CLK_EXT, - .xtal = 16000000, - .address = 0x69, - - .ts1_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, - .ts2_mode = STV090x_TSMODE_SERIAL_CONTINUOUS, - - .repeater_level = STV090x_RPTLEVEL_64, - - .tuner_init = NULL, - .tuner_set_mode = NULL, - .tuner_set_frequency = NULL, - .tuner_get_frequency = NULL, - .tuner_set_bandwidth = NULL, - .tuner_get_bandwidth = NULL, - .tuner_set_bbgain = NULL, - .tuner_get_bbgain = NULL, - .tuner_set_refclk = NULL, - .tuner_get_status = NULL, -}; - -static struct stv6110x_config stv6110x_config = { - .addr = 0x60, - .refclk = 16000000, -}; - -#define NIMA 0 -#define NIMB 1 - -static struct stv0367_config stv0367_tda18212_config[] = { - { - .demod_address = 0x1c, - .xtal = 16000000, - .if_khz = 4500, - .if_iq_mode = FE_TER_NORMAL_IF_TUNER, - .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, - .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, - }, { - .demod_address = 0x1d, - .xtal = 16000000, - .if_khz = 4500, - .if_iq_mode = FE_TER_NORMAL_IF_TUNER, - .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, - .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, - }, { - .demod_address = 0x1e, - .xtal = 16000000, - .if_khz = 4500, - .if_iq_mode = FE_TER_NORMAL_IF_TUNER, - .ts_mode = STV0367_SERIAL_PUNCT_CLOCK, - .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT, - }, -}; - -static struct tda18212_config tda18212_conf = { - .if_dvbt_6 = 4150, - .if_dvbt_7 = 4150, - .if_dvbt_8 = 4500, - .if_dvbc = 5000, -}; - -int c8sectpfe_frontend_attach(struct dvb_frontend **fe, - struct c8sectpfe *c8sectpfe, - struct channel_info *tsin, int chan_num) -{ - struct tda18212_config *tda18212; - const struct stv6110x_devctl *fe2; - struct i2c_client *client; - struct i2c_board_info tda18212_info = { - .type = "tda18212", - .addr = 0x60, - }; - - if (!tsin) - return -EINVAL; - - switch (tsin->dvb_card) { - - case STV0367_TDA18212_NIMA_1: - case STV0367_TDA18212_NIMA_2: - case STV0367_TDA18212_NIMB_1: - case STV0367_TDA18212_NIMB_2: - if (tsin->dvb_card == STV0367_TDA18212_NIMA_1) - *fe = dvb_attach(stv0367ter_attach, - &stv0367_tda18212_config[0], - tsin->i2c_adapter); - else if (tsin->dvb_card == STV0367_TDA18212_NIMB_1) - *fe = dvb_attach(stv0367ter_attach, - &stv0367_tda18212_config[1], - tsin->i2c_adapter); - else - *fe = dvb_attach(stv0367ter_attach, - &stv0367_tda18212_config[2], - tsin->i2c_adapter); - - if (!*fe) { - dev_err(c8sectpfe->device, - "%s: stv0367ter_attach failed for NIM card %s\n" - , __func__, dvb_card_str(tsin->dvb_card)); - return -ENODEV; - } - - /* - * init the demod so that i2c gate_ctrl - * to the tuner works correctly - */ - (*fe)->ops.init(*fe); - - /* Allocate the tda18212 structure */ - tda18212 = devm_kzalloc(c8sectpfe->device, - sizeof(struct tda18212_config), - GFP_KERNEL); - if (!tda18212) { - dev_err(c8sectpfe->device, - "%s: devm_kzalloc failed\n", __func__); - return -ENOMEM; - } - - memcpy(tda18212, &tda18212_conf, - sizeof(struct tda18212_config)); - - tda18212->fe = (*fe); - - tda18212_info.platform_data = tda18212; - - /* attach tuner */ - request_module("tda18212"); - client = i2c_new_client_device(tsin->i2c_adapter, - &tda18212_info); - if (!i2c_client_has_driver(client)) { - dvb_frontend_detach(*fe); - return -ENODEV; - } - - if (!try_module_get(client->dev.driver->owner)) { - i2c_unregister_device(client); - dvb_frontend_detach(*fe); - return -ENODEV; - } - - tsin->i2c_client = client; - - break; - - case STV0903_6110_LNB24_NIMA: - *fe = dvb_attach(stv090x_attach, &stv090x_config, - tsin->i2c_adapter, STV090x_DEMODULATOR_0); - if (!*fe) { - dev_err(c8sectpfe->device, "%s: stv090x_attach failed\n" - "\tfor NIM card %s\n", - __func__, dvb_card_str(tsin->dvb_card)); - return -ENODEV; - } - - fe2 = dvb_attach(stv6110x_attach, *fe, - &stv6110x_config, tsin->i2c_adapter); - if (!fe2) { - dev_err(c8sectpfe->device, - "%s: stv6110x_attach failed for NIM card %s\n" - , __func__, dvb_card_str(tsin->dvb_card)); - return -ENODEV; - } - - stv090x_config.tuner_init = fe2->tuner_init; - stv090x_config.tuner_set_mode = fe2->tuner_set_mode; - stv090x_config.tuner_set_frequency = fe2->tuner_set_frequency; - stv090x_config.tuner_get_frequency = fe2->tuner_get_frequency; - stv090x_config.tuner_set_bandwidth = fe2->tuner_set_bandwidth; - stv090x_config.tuner_get_bandwidth = fe2->tuner_get_bandwidth; - stv090x_config.tuner_set_bbgain = fe2->tuner_set_bbgain; - stv090x_config.tuner_get_bbgain = fe2->tuner_get_bbgain; - stv090x_config.tuner_set_refclk = fe2->tuner_set_refclk; - stv090x_config.tuner_get_status = fe2->tuner_get_status; - - dvb_attach(lnbh24_attach, *fe, tsin->i2c_adapter, 0, 0, 0x9); - break; - - default: - dev_err(c8sectpfe->device, - "%s: DVB frontend card %s not yet supported\n", - __func__, dvb_card_str(tsin->dvb_card)); - return -ENODEV; - } - - (*fe)->id = chan_num; - - dev_info(c8sectpfe->device, - "DVB frontend card %s successfully attached", - dvb_card_str(tsin->dvb_card)); - return 0; -} diff --git a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.h b/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.h deleted file mode 100644 index 3d87a9ae8702..000000000000 --- a/drivers/media/platform/st/sti/c8sectpfe/c8sectpfe-dvb.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * c8sectpfe-common.h - C8SECTPFE STi DVB driver - * - * Copyright (c) STMicroelectronics 2015 - * - * Author: Peter Griffin - * - */ -#ifndef _C8SECTPFE_DVB_H_ -#define _C8SECTPFE_DVB_H_ - -int c8sectpfe_frontend_attach(struct dvb_frontend **fe, - struct c8sectpfe *c8sectpfe, struct channel_info *tsin, - int chan_num); - -#endif From 9de877338a151860c76f194934d53b7b816d339a Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 12 Sep 2025 13:36:09 +0200 Subject: [PATCH 025/249] media: include: remove c8sectpfe header Driver is not used anymore. Remove header file. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Patrice Chotard Acked-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil --- include/dt-bindings/media/c8sectpfe.h | 13 ------------- 1 file changed, 13 deletions(-) delete mode 100644 include/dt-bindings/media/c8sectpfe.h diff --git a/include/dt-bindings/media/c8sectpfe.h b/include/dt-bindings/media/c8sectpfe.h deleted file mode 100644 index 6b1fb6f5413b..000000000000 --- a/include/dt-bindings/media/c8sectpfe.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_C8SECTPFE_H -#define __DT_C8SECTPFE_H - -#define STV0367_TDA18212_NIMA_1 0 -#define STV0367_TDA18212_NIMA_2 1 -#define STV0367_TDA18212_NIMB_1 2 -#define STV0367_TDA18212_NIMB_2 3 - -#define STV0903_6110_LNB24_NIMA 4 -#define STV0903_6110_LNB24_NIMB 5 - -#endif /* __DT_C8SECTPFE_H */ From 203ee65bfdb29753d1a4d2f8efba6c0c7eccdd71 Mon Sep 17 00:00:00 2001 From: Raphael Gallais-Pou Date: Fri, 12 Sep 2025 13:36:10 +0200 Subject: [PATCH 026/249] media: doc/dt-bindings: remove support of stih407-c8sectpfe Remove files documentation from stih407-c8sectpfe driver. Signed-off-by: Raphael Gallais-Pou Reviewed-by: Patrice Chotard Acked-by: Rob Herring (Arm) Signed-off-by: Hans Verkuil [hverkuil: slight change of the Subject, mention doc changes as well] --- .../admin-guide/media/platform-cardlist.rst | 2 - .../bindings/media/stih407-c8sectpfe.txt | 88 ------------------- 2 files changed, 90 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt diff --git a/Documentation/admin-guide/media/platform-cardlist.rst b/Documentation/admin-guide/media/platform-cardlist.rst index 1230ae4037ad..63f4b19c3628 100644 --- a/Documentation/admin-guide/media/platform-cardlist.rst +++ b/Documentation/admin-guide/media/platform-cardlist.rst @@ -18,8 +18,6 @@ am437x-vpfe TI AM437x VPFE aspeed-video Aspeed AST2400 and AST2500 atmel-isc ATMEL Image Sensor Controller (ISC) atmel-isi ATMEL Image Sensor Interface (ISI) -c8sectpfe SDR platform devices -c8sectpfe SDR platform devices cafe_ccic Marvell 88ALP01 (Cafe) CMOS Camera Controller cdns-csi2rx Cadence MIPI-CSI2 RX Controller cdns-csi2tx Cadence MIPI-CSI2 TX Controller diff --git a/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt b/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt deleted file mode 100644 index 880d4d70c9fd..000000000000 --- a/Documentation/devicetree/bindings/media/stih407-c8sectpfe.txt +++ /dev/null @@ -1,88 +0,0 @@ -STMicroelectronics STi c8sectpfe binding -============================================ - -This document describes the c8sectpfe device bindings that is used to get transport -stream data into the SoC on the TS pins, and into DDR for further processing. - -It is typically used in conjunction with one or more demodulator and tuner devices -which converts from the RF to digital domain. Demodulators and tuners are usually -located on an external DVB frontend card connected to SoC TS input pins. - -Currently 7 TS input (tsin) channels are supported on the stih407 family SoC. - -Required properties (controller (parent) node): -- compatible : Should be "stih407-c8sectpfe" - -- reg : Address and length of register sets for each device in - "reg-names" - -- reg-names : The names of the register addresses corresponding to the - registers filled in "reg": - - c8sectpfe: c8sectpfe registers - - c8sectpfe-ram: c8sectpfe internal sram - -- clocks : phandle list of c8sectpfe clocks -- clock-names : should be "c8sectpfe" -See: Documentation/devicetree/bindings/clock/clock-bindings.txt - -- pinctrl-names : a pinctrl state named tsin%d-serial or tsin%d-parallel (where %d is tsin-num) - must be defined for each tsin child node. -- pinctrl-0 : phandle referencing pin configuration for this tsin configuration -See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt - - -Required properties (tsin (child) node): - -- tsin-num : tsin id of the InputBlock (must be between 0 to 6) -- i2c-bus : phandle to the I2C bus DT node which the demodulators & tuners on this tsin channel are connected. -- reset-gpios : reset gpio for this tsin channel. - -Optional properties (tsin (child) node): - -- invert-ts-clk : Bool property to control sense of ts input clock (data stored on falling edge of clk). -- serial-not-parallel : Bool property to configure input bus width (serial on ts_data<7>). -- async-not-sync : Bool property to control if data is received in asynchronous mode - (all bits/bytes with ts_valid or ts_packet asserted are valid). - -- dvb-card : Describes the NIM card connected to this tsin channel. - -Example: - -/* stih410 SoC b2120 + b2004a + stv0367-pll(NIMB) + stv0367-tda18212 (NIMA) DT example) */ - - c8sectpfe@8a20000 { - compatible = "st,stih407-c8sectpfe"; - reg = <0x08a20000 0x10000>, <0x08a00000 0x4000>; - reg-names = "stfe", "stfe-ram"; - interrupts = , ; - interrupt-names = "stfe-error-irq", "stfe-idle-irq"; - pinctrl-0 = <&pinctrl_tsin0_serial>; - pinctrl-1 = <&pinctrl_tsin0_parallel>; - pinctrl-2 = <&pinctrl_tsin3_serial>; - pinctrl-3 = <&pinctrl_tsin4_serial_alt3>; - pinctrl-4 = <&pinctrl_tsin5_serial_alt1>; - pinctrl-names = "tsin0-serial", - "tsin0-parallel", - "tsin3-serial", - "tsin4-serial", - "tsin5-serial"; - clocks = <&clk_s_c0_flexgen CLK_PROC_STFE>; - clock-names = "c8sectpfe"; - - /* tsin0 is TSA on NIMA */ - tsin0: port@0 { - tsin-num = <0>; - serial-not-parallel; - i2c-bus = <&ssc2>; - reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>; - dvb-card = ; - }; - - tsin3: port@3 { - tsin-num = <3>; - serial-not-parallel; - i2c-bus = <&ssc3>; - reset-gpios = <&pio15 7 GPIO_ACTIVE_HIGH>; - dvb-card = ; - }; - }; From c43bcd2b2aa3c2ca9d2433c3990ecbc2c47d10eb Mon Sep 17 00:00:00 2001 From: Haotian Zhang Date: Mon, 29 Sep 2025 19:12:29 +0800 Subject: [PATCH 027/249] media: cec: Fix debugfs leak on bus_register() failure In cec_devnode_init(), the debugfs directory created with debugfs_create_dir() is not removed if bus_register() fails. This leaves a stale "cec" entry in debugfs and prevents proper module reloading. Fix this by removing the debugfs directory in the error path. Fixes: a56960e8b406 ("[media] cec: add HDMI CEC framework (core)") Cc: stable@vger.kernel.org Signed-off-by: Haotian Zhang Signed-off-by: Hans Verkuil --- drivers/media/cec/core/cec-core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/cec/core/cec-core.c b/drivers/media/cec/core/cec-core.c index d7259599029f..dd6e24a0899b 100644 --- a/drivers/media/cec/core/cec-core.c +++ b/drivers/media/cec/core/cec-core.c @@ -421,6 +421,7 @@ static int __init cec_devnode_init(void) ret = bus_register(&cec_bus_type); if (ret < 0) { + debugfs_remove_recursive(top_cec_dir); unregister_chrdev_region(cec_dev_t, CEC_NUM_DEVICES); pr_warn("cec: bus_register failed\n"); return -EIO; From 082b86919b7a94de01d849021b4da820a6cb89dc Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 8 Oct 2025 12:55:18 +0300 Subject: [PATCH 028/249] media: v4l2-mem2mem: Fix outdated documentation Commit cbd9463da1b1 ("media: v4l2-mem2mem: Avoid calling .device_run in v4l2_m2m_job_finish") deferred calls to .device_run() to a work queue to avoid recursive calls when a job is finished right away from .device_run(). It failed to update the v4l2_m2m_job_finish() documentation that still states the function must not be called from .device_run(). Fix it. Fixes: cbd9463da1b1 ("media: v4l2-mem2mem: Avoid calling .device_run in v4l2_m2m_job_finish") Cc: stable@vger.kernel.org Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- include/media/v4l2-mem2mem.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h index 09c6164577cc..500f81f399df 100644 --- a/include/media/v4l2-mem2mem.h +++ b/include/media/v4l2-mem2mem.h @@ -192,8 +192,7 @@ void v4l2_m2m_try_schedule(struct v4l2_m2m_ctx *m2m_ctx); * other instances to take control of the device. * * This function has to be called only after &v4l2_m2m_ops->device_run - * callback has been called on the driver. To prevent recursion, it should - * not be called directly from the &v4l2_m2m_ops->device_run callback though. + * callback has been called on the driver. */ void v4l2_m2m_job_finish(struct v4l2_m2m_dev *m2m_dev, struct v4l2_m2m_ctx *m2m_ctx); From 3662b54c16924b03197ec80f9764aabdf2c90231 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:24 +0300 Subject: [PATCH 029/249] media: v4l2-mem2mem: Document that v4l2_m2m_get_vq() never returns NULL The v4l2_m2m_get_vq() never returns a NULL pointer, as the internal get_queue_ctx() helper always returns a non-NULL pointer. Many drivers check the return value against NULL, due to a combination of old code and cargo-cult programming. Even v4l2-mem2mem.c contains unneeded NULL checks. Clarify the API by documenting explicitly that a NULL check is not needed, and simplify the code by removing the unneeded NULL checks from v4l2-mem2mem.c. Signed-off-by: Laurent Pinchart Reviewed-by: Stefan Klug Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-mem2mem.c | 12 +----------- include/media/v4l2-mem2mem.h | 3 +++ 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c index 21acd9bc8607..9fa8833e445f 100644 --- a/drivers/media/v4l2-core/v4l2-mem2mem.c +++ b/drivers/media/v4l2-core/v4l2-mem2mem.c @@ -123,13 +123,7 @@ static struct v4l2_m2m_queue_ctx *get_queue_ctx(struct v4l2_m2m_ctx *m2m_ctx, struct vb2_queue *v4l2_m2m_get_vq(struct v4l2_m2m_ctx *m2m_ctx, enum v4l2_buf_type type) { - struct v4l2_m2m_queue_ctx *q_ctx; - - q_ctx = get_queue_ctx(m2m_ctx, type); - if (!q_ctx) - return NULL; - - return &q_ctx->q; + return &get_queue_ctx(m2m_ctx, type)->q; } EXPORT_SYMBOL(v4l2_m2m_get_vq); @@ -1285,8 +1279,6 @@ void v4l2_m2m_buf_queue(struct v4l2_m2m_ctx *m2m_ctx, unsigned long flags; q_ctx = get_queue_ctx(m2m_ctx, vbuf->vb2_buf.vb2_queue->type); - if (!q_ctx) - return; spin_lock_irqsave(&q_ctx->rdy_spinlock, flags); list_add_tail(&b->list, &q_ctx->rdy_queue); @@ -1388,8 +1380,6 @@ int v4l2_m2m_ioctl_remove_bufs(struct file *file, void *priv, struct v4l2_fh *fh = file_to_v4l2_fh(file); struct vb2_queue *q = v4l2_m2m_get_vq(fh->m2m_ctx, remove->type); - if (!q) - return -EINVAL; if (q->type != remove->type) return -EINVAL; diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h index 500f81f399df..c82445929c68 100644 --- a/include/media/v4l2-mem2mem.h +++ b/include/media/v4l2-mem2mem.h @@ -153,6 +153,9 @@ void *v4l2_m2m_get_curr_priv(struct v4l2_m2m_dev *m2m_dev); * * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx * @type: type of the V4L2 buffer, as defined by enum &v4l2_buf_type + * + * This function returns the capture queue when @type is a capture type, and the + * output queue otherwise. It never returns a NULL pointer. */ struct vb2_queue *v4l2_m2m_get_vq(struct v4l2_m2m_ctx *m2m_ctx, enum v4l2_buf_type type); From 688d0b157f6c140bdf3c5667f0f72fb09a91f512 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:25 +0300 Subject: [PATCH 030/249] media: allgro-dvt: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/allegro-dvt/allegro-core.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index 510c3c9661d9..875e5cbbeb07 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -3333,8 +3333,6 @@ static int allegro_s_fmt_vid_cap(struct file *file, void *fh, return err; vq = v4l2_m2m_get_vq(channel->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) return -EBUSY; From 7adab6aac0e63eeac1cc82d97ff6a99129be8848 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:26 +0300 Subject: [PATCH 031/249] media: meson-g2d: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check was probably intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_G_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check and, as the return value is not used for other purposes and the function has no side effect, the function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Neil Armstrong Signed-off-by: Hans Verkuil --- drivers/media/platform/amlogic/meson-ge2d/ge2d.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/media/platform/amlogic/meson-ge2d/ge2d.c b/drivers/media/platform/amlogic/meson-ge2d/ge2d.c index 5744853a4003..c51c6f4e41dc 100644 --- a/drivers/media/platform/amlogic/meson-ge2d/ge2d.c +++ b/drivers/media/platform/amlogic/meson-ge2d/ge2d.c @@ -632,13 +632,8 @@ static int vidioc_s_fmt_cap(struct file *file, void *priv, struct v4l2_format *f static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct ge2d_ctx *ctx = file_to_ge2d_ctx(file); - struct vb2_queue *vq; struct ge2d_frame *frm; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - frm = get_frame(ctx, f->type); f->fmt.pix = frm->pix_fmt; From f51af110a367e956e3d24a29841c9dbc8c8f7124 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:27 +0300 Subject: [PATCH 032/249] media: amphion: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/amphion/vdec.c | 2 -- drivers/media/platform/amphion/venc.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/media/platform/amphion/vdec.c b/drivers/media/platform/amphion/vdec.c index 32eef2fd1f2a..79790fbadc95 100644 --- a/drivers/media/platform/amphion/vdec.c +++ b/drivers/media/platform/amphion/vdec.c @@ -532,8 +532,6 @@ static int vdec_s_fmt_common(struct vpu_inst *inst, struct v4l2_format *f) return -EINVAL; q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; diff --git a/drivers/media/platform/amphion/venc.c b/drivers/media/platform/amphion/venc.c index c5c1f1fbaa80..319fbae70571 100644 --- a/drivers/media/platform/amphion/venc.c +++ b/drivers/media/platform/amphion/venc.c @@ -223,8 +223,6 @@ static int venc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; From 46bab404735aaa6a47c5f70f72c0c5b00518c19a Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:28 +0300 Subject: [PATCH 033/249] media: coda: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Reviewed-by: Philipp Zabel Signed-off-by: Hans Verkuil --- drivers/media/platform/chips-media/coda/coda-common.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/media/platform/chips-media/coda/coda-common.c b/drivers/media/platform/chips-media/coda/coda-common.c index 9a57b042d9fd..33f712ff8556 100644 --- a/drivers/media/platform/chips-media/coda/coda-common.c +++ b/drivers/media/platform/chips-media/coda/coda-common.c @@ -790,8 +790,6 @@ static int coda_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f, struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ctx, f->type); if (!q_data) @@ -942,8 +940,6 @@ static int coda_s_fmt_vid_out(struct file *file, void *priv, ctx->codec = codec; dst_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); - if (!dst_vq) - return -EINVAL; /* * Setting the capture queue format is not possible while the capture From 5aa7bbaa245c64b6ed701237bada1681d30f143b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:29 +0300 Subject: [PATCH 034/249] media: imagination: e5010: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In e5010_s_fmt(), the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In e5010_s_selection(), the function performs an explicit type check, so the NULL check couldn't have been intended as a type check. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/imagination/e5010-jpeg-enc.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/media/platform/imagination/e5010-jpeg-enc.c b/drivers/media/platform/imagination/e5010-jpeg-enc.c index c4e0097cb8b7..1b5c8b1d6a31 100644 --- a/drivers/media/platform/imagination/e5010-jpeg-enc.c +++ b/drivers/media/platform/imagination/e5010-jpeg-enc.c @@ -396,8 +396,6 @@ static int e5010_s_fmt(struct file *file, void *priv, struct v4l2_format *f) struct e5010_fmt *fmt; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) { v4l2_err(&ctx->e5010->v4l2_dev, "queue busy\n"); @@ -496,8 +494,6 @@ static int e5010_s_selection(struct file *file, void *fh, struct v4l2_selection struct v4l2_rect base_rect; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, s->type); - if (!vq) - return -EINVAL; if (vb2_is_streaming(vq)) return -EBUSY; From 0e8255bf1be3f58789516ca156539559f4f3ddb0 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:30 +0300 Subject: [PATCH 035/249] media: m2m-deinterlace: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/m2m-deinterlace.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/m2m-deinterlace.c b/drivers/media/platform/m2m-deinterlace.c index e07e57d4206b..af098874ead5 100644 --- a/drivers/media/platform/m2m-deinterlace.c +++ b/drivers/media/platform/m2m-deinterlace.c @@ -485,13 +485,8 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, static int vidioc_g_fmt(struct deinterlace_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct deinterlace_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(f->type); f->fmt.pix.width = q_data->width; @@ -586,8 +581,6 @@ static int vidioc_s_fmt(struct deinterlace_ctx *ctx, struct v4l2_format *f) struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(f->type); if (!q_data) From 4cdfbfcc25512d8305abc1a565f83087269df3b2 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:31 +0300 Subject: [PATCH 036/249] media: mediatek: jpeg: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c index 6268d651bdcf..d78b83f06247 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -302,17 +302,12 @@ static int mtk_jpeg_try_fmt_mplane(struct v4l2_pix_format_mplane *pix_mp, static int mtk_jpeg_g_fmt_vid_mplane(struct file *file, void *priv, struct v4l2_format *f) { - struct vb2_queue *vq; struct mtk_jpeg_q_data *q_data = NULL; struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; struct mtk_jpeg_ctx *ctx = mtk_jpeg_file_to_ctx(file); struct mtk_jpeg_dev *jpeg = ctx->jpeg; int i; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = mtk_jpeg_get_q_data(ctx, f->type); pix_mp->width = q_data->pix_mp.width; @@ -416,8 +411,6 @@ static int mtk_jpeg_s_fmt_mplane(struct mtk_jpeg_ctx *ctx, int i; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = mtk_jpeg_get_q_data(ctx, f->type); From 842497a81b32d88ed913156e691695b74e03837d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:32 +0300 Subject: [PATCH 037/249] media: mediatek: vcodec: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handlers, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handlers, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. In other locations the v4l2_m2m_get_vq() function is called with a hardcoded V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE type, so the NULL check can't have been an attempt to catch an invalid type there either. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../mediatek/vcodec/decoder/mtk_vcodec_dec.c | 7 ------- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 2 -- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 2 -- .../mediatek/vcodec/encoder/mtk_vcodec_enc.c | 14 -------------- 4 files changed, 25 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c index d691bd533103..1f32ba11a18c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec.c @@ -674,15 +674,8 @@ static int vidioc_vdec_g_fmt(struct file *file, void *priv, { struct mtk_vcodec_dec_ctx *ctx = file_to_dec_ctx(file); struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; - struct vb2_queue *vq; struct mtk_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); - if (!vq) { - mtk_v4l2_vdec_err(ctx, "no vb2 queue for type=%d", f->type); - return -EINVAL; - } - q_data = mtk_vdec_get_q_data(ctx, f->type); pix_mp->field = V4L2_FIELD_NONE; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c index bf21f2467a0f..08e0f5a70935 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c @@ -1810,8 +1810,6 @@ static int vdec_av1_slice_setup_core_buffer(struct vdec_av1_slice_instance *inst /* reference buffers */ vq = v4l2_m2m_get_vq(instance->ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); - if (!vq) - return -EINVAL; /* get current output buffer */ vb = &v4l2_m2m_next_dst_buf(instance->ctx->m2m_ctx)->vb2_buf; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c index 47c302745c1d..45cd555a5fb5 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c @@ -1686,8 +1686,6 @@ static int vdec_vp9_slice_setup_core_buffer(struct vdec_vp9_slice_instance *inst /* reference buffers */ vq = v4l2_m2m_get_vq(instance->ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); - if (!vq) - return -EINVAL; /* get current output buffer */ vb = &v4l2_m2m_next_dst_buf(instance->ctx->m2m_ctx)->vb2_buf; diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c index d815e962ab89..6faf3f659e75 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc.c @@ -421,10 +421,6 @@ static int vidioc_venc_s_fmt_cap(struct file *file, void *priv, const struct mtk_video_fmt *fmt; vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); - if (!vq) { - mtk_v4l2_venc_err(ctx, "fail to get vq"); - return -EINVAL; - } if (vb2_is_busy(vq)) { mtk_v4l2_venc_err(ctx, "queue busy"); @@ -476,10 +472,6 @@ static int vidioc_venc_s_fmt_out(struct file *file, void *priv, const struct mtk_video_fmt *fmt; vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); - if (!vq) { - mtk_v4l2_venc_err(ctx, "fail to get vq"); - return -EINVAL; - } if (vb2_is_busy(vq)) { mtk_v4l2_venc_err(ctx, "queue busy"); @@ -524,15 +516,9 @@ static int vidioc_venc_g_fmt(struct file *file, void *priv, { struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; struct mtk_vcodec_enc_ctx *ctx = file_to_enc_ctx(file); - struct vb2_queue *vq; struct mtk_q_data *q_data = mtk_venc_get_q_data(ctx, f->type); int i; - vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type); - if (!vq) - return -EINVAL; - - pix->width = q_data->coded_width; pix->height = q_data->coded_height; pix->pixelformat = q_data->fmt->fourcc; From 9f38617da4ed21a14d97cd0d920023e8fb3d3fd6 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:33 +0300 Subject: [PATCH 038/249] media: dw100: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Stefan Klug Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/dw100/dw100.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/nxp/dw100/dw100.c b/drivers/media/platform/nxp/dw100/dw100.c index 97744c7b7c03..035081c4223b 100644 --- a/drivers/media/platform/nxp/dw100/dw100.c +++ b/drivers/media/platform/nxp/dw100/dw100.c @@ -735,13 +735,8 @@ static int dw100_enum_framesizes(struct file *file, void *priv, static int dw100_g_fmt_vid(struct file *file, void *priv, struct v4l2_format *f) { struct dw100_ctx *ctx = dw100_file2ctx(file); - struct vb2_queue *vq; struct dw100_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = dw100_get_q_data(ctx, f->type); f->fmt.pix_mp = q_data->pix_fmt; @@ -803,8 +798,6 @@ static int dw100_s_fmt(struct dw100_ctx *ctx, struct v4l2_format *f) struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = dw100_get_q_data(ctx, f->type); if (!q_data) From 21910e3587a34c63c3d67c09914ae3c247fbd6ee Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:34 +0300 Subject: [PATCH 039/249] media: imx-jpeg: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Reviewed-by: Frank Li Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c index df3ccdf767ba..d41fa4c3139b 100644 --- a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c +++ b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c @@ -2491,8 +2491,6 @@ static int mxc_jpeg_s_fmt(struct mxc_jpeg_ctx *ctx, struct mxc_jpeg_dev *jpeg = ctx->mxc_jpeg; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) { v4l2_err(&jpeg->v4l2_dev, "queue busy\n"); @@ -2528,8 +2526,6 @@ static int mxc_jpeg_s_fmt_vid_out(struct file *file, void *priv, return 0; dst_vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, cap_type); - if (!dst_vq) - return -EINVAL; if (vb2_is_busy(dst_vq)) return 0; From 4417205aa72f84ac6035524d573b30db4bec4f3f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:35 +0300 Subject: [PATCH 040/249] media: imx-pxp: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Frank Li Reviewed-by: Philipp Zabel Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-pxp.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/nxp/imx-pxp.c b/drivers/media/platform/nxp/imx-pxp.c index 6cc9b07ea53a..3f9a67a6bd4d 100644 --- a/drivers/media/platform/nxp/imx-pxp.c +++ b/drivers/media/platform/nxp/imx-pxp.c @@ -1180,13 +1180,8 @@ static int pxp_enum_fmt_vid_out(struct file *file, void *priv, static int pxp_g_fmt(struct pxp_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct pxp_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); f->fmt.pix.width = q_data->width; @@ -1329,8 +1324,6 @@ static int pxp_s_fmt(struct pxp_ctx *ctx, struct v4l2_format *f) struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ctx, f->type); if (!q_data) From 3779335f109bf348e9e8afbf9abddf5284750528 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:36 +0300 Subject: [PATCH 041/249] media: nxp: imx8-isi: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Reviewed-by: Frank Li Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c index 00afcbfbdde4..df14f12b3ad2 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c @@ -554,8 +554,6 @@ static int mxc_isi_m2m_s_fmt_vid(struct file *file, void *fh, struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) return -EBUSY; From 50241256297ed4aa479cb46b5582734571e9b20c Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:37 +0300 Subject: [PATCH 042/249] media: mx2_emmaprp: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/mx2_emmaprp.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/nxp/mx2_emmaprp.c b/drivers/media/platform/nxp/mx2_emmaprp.c index 3aae8c0b690c..02d57229b9b3 100644 --- a/drivers/media/platform/nxp/mx2_emmaprp.c +++ b/drivers/media/platform/nxp/mx2_emmaprp.c @@ -431,13 +431,8 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, static int vidioc_g_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct emmaprp_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); f->fmt.pix.width = q_data->width; @@ -540,8 +535,6 @@ static int vidioc_s_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f) int ret; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ctx, f->type); if (!q_data) From 9fec05f5739d87b24d052f5c7f65138ae4ccd2f2 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:38 +0300 Subject: [PATCH 043/249] media: qcom: iris: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_vdec.c | 2 -- drivers/media/platform/qcom/iris/iris_venc.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/platform/qcom/iris/iris_vdec.c index ae13c3e1b426..3926ed513f08 100644 --- a/drivers/media/platform/qcom/iris/iris_vdec.c +++ b/drivers/media/platform/qcom/iris/iris_vdec.c @@ -190,8 +190,6 @@ int iris_vdec_s_fmt(struct iris_inst *inst, struct v4l2_format *f) u32 codec_align; q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/platform/qcom/iris/iris_venc.c index 099bd5ed4ae0..8a65c9cc6010 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -269,8 +269,6 @@ int iris_venc_s_fmt(struct iris_inst *inst, struct v4l2_format *f) struct vb2_queue *q; q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; From 81775c25b48e4b54dc15777f015e5ffe11fb7992 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:39 +0300 Subject: [PATCH 044/249] media: qcom: venus: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check. Signed-off-by: Laurent Pinchart Reviewed-by: Dikshita Agarwal Reviewed-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/venus/vdec.c | 2 -- drivers/media/platform/qcom/venus/venc.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 55c27345b7d8..bb0b4f6639c5 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -329,8 +329,6 @@ static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f) struct vb2_queue *q; q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index fba07557a399..8a89c01c5dbb 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -241,8 +241,6 @@ static int venc_s_fmt(struct file *file, void *fh, struct v4l2_format *f) struct vb2_queue *q; q = v4l2_m2m_get_vq(inst->m2m_ctx, f->type); - if (!q) - return -EINVAL; if (vb2_is_busy(q)) return -EBUSY; From 57d58836cd3b63e6f8b49b08c2ad66189c2c417f Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:40 +0300 Subject: [PATCH 045/249] media: renesas: fdp1: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check was probably intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_G_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check and, as the function has no side effect, the function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rcar_fdp1.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/media/platform/renesas/rcar_fdp1.c b/drivers/media/platform/renesas/rcar_fdp1.c index e615c56083f1..3515601030ec 100644 --- a/drivers/media/platform/renesas/rcar_fdp1.c +++ b/drivers/media/platform/renesas/rcar_fdp1.c @@ -1409,9 +1409,6 @@ static int fdp1_g_fmt(struct file *file, void *priv, struct v4l2_format *f) struct fdp1_ctx *ctx = file_to_ctx(file); struct fdp1_q_data *q_data; - if (!v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type)) - return -EINVAL; - q_data = get_q_data(ctx, f->type); f->fmt.pix_mp = q_data->format; From bc0334556c8972ddd6ee993647460e20a9960f24 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:41 +0300 Subject: [PATCH 046/249] media: rcar_jpu: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get and try format handlers, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value check and, as the function has no side effect, the unneeded function calls as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rcar_jpu.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/media/platform/renesas/rcar_jpu.c b/drivers/media/platform/renesas/rcar_jpu.c index 46ea259a2bb9..3d714fec4fad 100644 --- a/drivers/media/platform/renesas/rcar_jpu.c +++ b/drivers/media/platform/renesas/rcar_jpu.c @@ -825,9 +825,6 @@ static int jpu_try_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct jpu_ctx *ctx = file_to_ctx(file); - if (!v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type)) - return -EINVAL; - return __jpu_try_fmt(ctx, NULL, &f->fmt.pix_mp, f->type); } @@ -841,8 +838,6 @@ static int jpu_s_fmt(struct file *file, void *priv, struct v4l2_format *f) int ret; vq = v4l2_m2m_get_vq(m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) { v4l2_err(&ctx->jpu->v4l2_dev, "%s queue busy\n", __func__); @@ -866,9 +861,6 @@ static int jpu_g_fmt(struct file *file, void *priv, struct v4l2_format *f) struct jpu_ctx *ctx = file_to_ctx(file); struct jpu_q_data *q_data; - if (!v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type)) - return -EINVAL; - q_data = jpu_get_q_data(ctx, f->type); f->fmt.pix_mp = q_data->format; From 7656bf918b6bcd795cf602ea24e1cea9e54113ca Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:42 +0300 Subject: [PATCH 047/249] media: platform: rga: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check was probably intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_G_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check and, as the return value is not used for other purposes and the function has no side effect, the function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/rockchip/rga/rga.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/platform/rockchip/rga/rga.c index 776046de979a..eb9c556a105c 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -463,12 +463,8 @@ static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct v4l2_pix_format_mplane *pix_fmt = &f->fmt.pix_mp; struct rga_ctx *ctx = file_to_rga_ctx(file); - struct vb2_queue *vq; struct rga_frame *frm; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; frm = rga_get_frame(ctx, f->type); if (IS_ERR(frm)) return PTR_ERR(frm); From f1a31151b0691dd4954a737c2ba9897261d7cea7 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:43 +0300 Subject: [PATCH 048/249] media: samsung: s5p-g2d: Drop unneeded v4l2_m2m_get_vq() NULL check MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The v4l2_m2m_get_vq() function never returns NULL. The check was probably intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_G_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check and, as the return value is not used for other purposes and the function has no side effect, the function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Łukasz Stelmach Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/s5p-g2d/g2d.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-g2d/g2d.c b/drivers/media/platform/samsung/s5p-g2d/g2d.c index ffb9bee6cb9d..e765dfcc2830 100644 --- a/drivers/media/platform/samsung/s5p-g2d/g2d.c +++ b/drivers/media/platform/samsung/s5p-g2d/g2d.c @@ -308,12 +308,8 @@ static int vidioc_enum_fmt(struct file *file, void *priv, struct v4l2_fmtdesc *f static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct g2d_ctx *ctx = file2ctx(file); - struct vb2_queue *vq; struct g2d_frame *frm; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; frm = get_frame(ctx, f->type); if (IS_ERR(frm)) return PTR_ERR(frm); From f47955fce44e4e43e88dddc2a0e9c6b5fe157476 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:44 +0300 Subject: [PATCH 049/249] media: samsung: s5p-jpeg: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value check and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Reviewed-by: Andrzej Pietrasiewicz Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c b/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c index 81792f7f8b16..ff28482759ec 100644 --- a/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c +++ b/drivers/media/platform/samsung/s5p-jpeg/jpeg-core.c @@ -1332,15 +1332,10 @@ static struct s5p_jpeg_q_data *get_q_data(struct s5p_jpeg_ctx *ctx, static int s5p_jpeg_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { - struct vb2_queue *vq; struct s5p_jpeg_q_data *q_data = NULL; struct v4l2_pix_format *pix = &f->fmt.pix; struct s5p_jpeg_ctx *ct = file_to_ctx(file); - vq = v4l2_m2m_get_vq(ct->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && ct->mode == S5P_JPEG_DECODE && !ct->hdr_parsed) return -EINVAL; @@ -1593,8 +1588,6 @@ static int s5p_jpeg_s_fmt(struct s5p_jpeg_ctx *ct, struct v4l2_format *f) unsigned int f_type; vq = v4l2_m2m_get_vq(ct->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ct, f->type); BUG_ON(q_data == NULL); From b1fc226edf8680882a5bf89038bdc55afa2ac80d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:45 +0300 Subject: [PATCH 050/249] media: stm32: dma2d: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. The check was probably intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_G_FMT ioctl handler based on the format type, so the type can't be incorrect. Drop the unneeded return value check and, as the return value is not used for other purposes and the function has no side effect, the function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/st/stm32/dma2d/dma2d.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/media/platform/st/stm32/dma2d/dma2d.c b/drivers/media/platform/st/stm32/dma2d/dma2d.c index 468c247ba328..30544ceca42c 100644 --- a/drivers/media/platform/st/stm32/dma2d/dma2d.c +++ b/drivers/media/platform/st/stm32/dma2d/dma2d.c @@ -355,13 +355,8 @@ static int vidioc_enum_fmt(struct file *file, void *priv, struct v4l2_fmtdesc *f static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct dma2d_ctx *ctx = file2ctx(file); - struct vb2_queue *vq; struct dma2d_frame *frm; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - frm = get_frame(ctx, f->type); f->fmt.pix.width = frm->width; f->fmt.pix.height = frm->height; From 84de83188d06f2a37791aeea76c5ec2230890385 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:46 +0300 Subject: [PATCH 051/249] media: ti: vpe: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/ti/vpe/vpe.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/platform/ti/vpe/vpe.c b/drivers/media/platform/ti/vpe/vpe.c index 6029d4e8e0bd..1a549775cabe 100644 --- a/drivers/media/platform/ti/vpe/vpe.c +++ b/drivers/media/platform/ti/vpe/vpe.c @@ -1567,13 +1567,8 @@ static int vpe_g_fmt(struct file *file, void *priv, struct v4l2_format *f) { struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; struct vpe_ctx *ctx = to_vpe_ctx(file); - struct vb2_queue *vq; struct vpe_q_data *q_data; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); if (!q_data) return -EINVAL; @@ -1740,8 +1735,6 @@ static int __vpe_s_fmt(struct vpe_ctx *ctx, struct v4l2_format *f) struct vb2_queue *vq; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; if (vb2_is_busy(vq)) { vpe_err(ctx->dev, "queue busy\n"); From b69a8f57943e4cce1f27dc23449efc0edcdbc326 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:47 +0300 Subject: [PATCH 052/249] media: vicodec: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/test-drivers/vicodec/vicodec-core.c | 7 ------- 1 file changed, 7 deletions(-) diff --git a/drivers/media/test-drivers/vicodec/vicodec-core.c b/drivers/media/test-drivers/vicodec/vicodec-core.c index a3df3a33237e..9dc32c593427 100644 --- a/drivers/media/test-drivers/vicodec/vicodec-core.c +++ b/drivers/media/test-drivers/vicodec/vicodec-core.c @@ -760,16 +760,11 @@ static int vidioc_enum_fmt_vid_out(struct file *file, void *priv, static int vidioc_g_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct vicodec_q_data *q_data; struct v4l2_pix_format_mplane *pix_mp; struct v4l2_pix_format *pix; const struct v4l2_fwht_pixfmt_info *info; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); info = q_data->info; @@ -976,8 +971,6 @@ static int vidioc_s_fmt(struct vicodec_ctx *ctx, struct v4l2_format *f) struct v4l2_pix_format *pix; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ctx, f->type); if (!q_data) From 27aac602413388aea9ab85969646ccdd7b7aa50b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 10:53:48 +0300 Subject: [PATCH 053/249] media: vim2m: Drop unneeded v4l2_m2m_get_vq() NULL check The v4l2_m2m_get_vq() function never returns NULL. In the set format handler, the check may have been intended to catch invalid format types, but that's not needed as the V4L2 core picks the appropriate VIDIOC_S_FMT ioctl handler based on the format type, so the type can't be incorrect. In the get format handler, the return value is not used for any purpose other than the NULL check, which was therefore probably intended to catch invalid format types. That's not needed for the same reason as in the set format handler. Drop the unneeded return value checks and, as the function has no side effect, the unneeded function call as well. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/test-drivers/vim2m.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/media/test-drivers/vim2m.c b/drivers/media/test-drivers/vim2m.c index 86c32699111a..9d921feaf824 100644 --- a/drivers/media/test-drivers/vim2m.c +++ b/drivers/media/test-drivers/vim2m.c @@ -724,14 +724,9 @@ static int vidioc_enum_framesizes(struct file *file, void *priv, static int vidioc_g_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct vim2m_q_data *q_data; int ret; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); if (!q_data) return -EINVAL; @@ -752,14 +747,9 @@ static int vidioc_g_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) static int vidioc_g_fmt_mplane(struct vim2m_ctx *ctx, struct v4l2_format *f) { - struct vb2_queue *vq; struct vim2m_q_data *q_data; int ret; - vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; - q_data = get_q_data(ctx, f->type); if (!q_data) return -EINVAL; @@ -971,8 +961,6 @@ static int vidioc_s_fmt(struct vim2m_ctx *ctx, struct v4l2_format *f) u32 height = (is_mplane) ? f->fmt.pix_mp.height : f->fmt.pix.height; vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type); - if (!vq) - return -EINVAL; q_data = get_q_data(ctx, f->type); if (!q_data) From f6493b52971ac94b1af3e83a819643e767ee44b4 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:42 +0000 Subject: [PATCH 054/249] media: dvbdev: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./dvb-core/dvbdev.c:575:48-55: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/dvb-core/dvbdev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/dvb-core/dvbdev.c b/drivers/media/dvb-core/dvbdev.c index 9df7c213716a..8b980d371a45 100644 --- a/drivers/media/dvb-core/dvbdev.c +++ b/drivers/media/dvb-core/dvbdev.c @@ -571,8 +571,8 @@ int dvb_register_device(struct dvb_adapter *adap, struct dvb_device **pdvbdev, MKDEV(DVB_MAJOR, minor), dvbdev, "dvb%d.%s%d", adap->num, dnames[type], id); if (IS_ERR(clsdev)) { - pr_err("%s: failed to create device dvb%d.%s%d (%ld)\n", - __func__, adap->num, dnames[type], id, PTR_ERR(clsdev)); + pr_err("%s: failed to create device dvb%d.%s%d (%pe)\n", + __func__, adap->num, dnames[type], id, clsdev); if (new_node) { list_del(&new_node->list_head); kfree(dvbdevfops); From 283ea98f2ad97d66b90b6aba6f69dd32d1dd7c69 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:43 +0000 Subject: [PATCH 055/249] media: mn88443x: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./dvb-frontends/mn88443x.c:698:3-10: WARNING: Consider using %pe to print PTR_ERR() ./dvb-frontends/mn88443x.c:713:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/dvb-frontends/mn88443x.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/media/dvb-frontends/mn88443x.c b/drivers/media/dvb-frontends/mn88443x.c index 7a58f53ab999..818c4e67364c 100644 --- a/drivers/media/dvb-frontends/mn88443x.c +++ b/drivers/media/dvb-frontends/mn88443x.c @@ -694,8 +694,7 @@ static int mn88443x_probe(struct i2c_client *client) chip->mclk = devm_clk_get(dev, "mclk"); if (IS_ERR(chip->mclk) && !conf) { - dev_err(dev, "Failed to request mclk: %ld\n", - PTR_ERR(chip->mclk)); + dev_err(dev, "Failed to request mclk: %pe\n", chip->mclk); return PTR_ERR(chip->mclk); } @@ -709,8 +708,8 @@ static int mn88443x_probe(struct i2c_client *client) chip->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(chip->reset_gpio)) { - dev_err(dev, "Failed to request reset_gpio: %ld\n", - PTR_ERR(chip->reset_gpio)); + dev_err(dev, "Failed to request reset_gpio: %pe\n", + chip->reset_gpio); return PTR_ERR(chip->reset_gpio); } From ce5bf59e0eea1c14c918c44683cfae78c438b92d Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:44 +0000 Subject: [PATCH 056/249] media: adv7842: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./i2c/adv7842.c:3470:16-23: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/adv7842.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index 21c3d3682e0b..ea6966c0605e 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -3469,8 +3469,8 @@ static struct i2c_client *adv7842_dummy_client(struct v4l2_subdev *sd, const cha cp = i2c_new_dummy_device(client->adapter, io_read(sd, io_reg) >> 1); if (IS_ERR(cp)) { - v4l2_err(sd, "register %s on i2c addr 0x%x failed with %ld\n", - desc, addr, PTR_ERR(cp)); + v4l2_err(sd, "register %s on i2c addr 0x%x failed with %pe\n", + desc, addr, cp); cp = NULL; } From 435becbe2ecad8ddec6061b710b611a912283716 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:45 +0000 Subject: [PATCH 057/249] media: ar0521: Use %pe format specifier MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./i2c/ar0521.c:1113:31-38: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Krzysztof Hałasa Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ar0521.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c index 939bf590d4b2..f156058500e3 100644 --- a/drivers/media/i2c/ar0521.c +++ b/drivers/media/i2c/ar0521.c @@ -1109,8 +1109,8 @@ static int ar0521_probe(struct i2c_client *client) ar0521_supply_names[cnt]); if (IS_ERR(supply)) { - dev_info(dev, "no %s regulator found: %li\n", - ar0521_supply_names[cnt], PTR_ERR(supply)); + dev_info(dev, "no %s regulator found: %pe\n", + ar0521_supply_names[cnt], supply); return PTR_ERR(supply); } sensor->supplies[cnt] = supply; From f85015f473bbae6b6b835fe4a23d4f9481775555 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:46 +0000 Subject: [PATCH 058/249] media: ccs: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./i2c/ccs/ccs-core.c:3241:3-10: WARNING: Consider using %pe to print PTR_ERR() ./i2c/ccs/ccs-core.c:3298:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ccs/ccs-core.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/i2c/ccs/ccs-core.c b/drivers/media/i2c/ccs/ccs-core.c index 1c889c878abd..f8523140784c 100644 --- a/drivers/media/i2c/ccs/ccs-core.c +++ b/drivers/media/i2c/ccs/ccs-core.c @@ -3237,8 +3237,8 @@ static int ccs_probe(struct i2c_client *client) dev_info(&client->dev, "no clock defined, continuing...\n"); sensor->ext_clk = NULL; } else if (IS_ERR(sensor->ext_clk)) { - dev_err(&client->dev, "could not get clock (%ld)\n", - PTR_ERR(sensor->ext_clk)); + dev_err(&client->dev, "could not get clock (%pe)\n", + sensor->ext_clk); return -EPROBE_DEFER; } @@ -3294,8 +3294,8 @@ static int ccs_probe(struct i2c_client *client) sensor->regmap = devm_cci_regmap_init_i2c(client, 16); if (IS_ERR(sensor->regmap)) { - dev_err(&client->dev, "can't initialise CCI (%ld)\n", - PTR_ERR(sensor->regmap)); + dev_err(&client->dev, "can't initialise CCI (%pe)\n", + sensor->regmap); return PTR_ERR(sensor->regmap); } From 9b4677ed2a26ee1f59035f949742489ede317f61 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:47 +0000 Subject: [PATCH 059/249] media: i2c: ds90ub913: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/ds90ub913.c:625:44-51: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ds90ub913.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/ds90ub913.c b/drivers/media/i2c/ds90ub913.c index 73150061ea45..e97e499b04e6 100644 --- a/drivers/media/i2c/ds90ub913.c +++ b/drivers/media/i2c/ds90ub913.c @@ -622,7 +622,7 @@ static int ub913_v4l2_notifier_register(struct ub913_data *priv) fwnode_handle_put(ep_fwnode); if (IS_ERR(asd)) { - dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); + dev_err(dev, "Failed to add subdev: %pe", asd); v4l2_async_nf_cleanup(&priv->notifier); return PTR_ERR(asd); } From e1fa799310e093db54ab0ccc0a4424a97e340b85 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:48 +0000 Subject: [PATCH 060/249] media: i2c: ds90ub953: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/ds90ub953.c:779:44-51: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ds90ub953.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/ds90ub953.c b/drivers/media/i2c/ds90ub953.c index e3fc9d66970a..087bb4ea5559 100644 --- a/drivers/media/i2c/ds90ub953.c +++ b/drivers/media/i2c/ds90ub953.c @@ -776,7 +776,7 @@ static int ub953_v4l2_notifier_register(struct ub953_data *priv) fwnode_handle_put(ep_fwnode); if (IS_ERR(asd)) { - dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); + dev_err(dev, "Failed to add subdev: %pe", asd); v4l2_async_nf_cleanup(&priv->notifier); return PTR_ERR(asd); } From c268a1e9afbbf4b12953207d1407c8340149890b Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:49 +0000 Subject: [PATCH 061/249] media: i2c: imx274: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/imx274.c:2038:32-39: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx274.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx274.c b/drivers/media/i2c/imx274.c index d86d08c29174..8ec78b60bea6 100644 --- a/drivers/media/i2c/imx274.c +++ b/drivers/media/i2c/imx274.c @@ -2034,8 +2034,7 @@ static int imx274_probe(struct i2c_client *client) /* initialize regmap */ imx274->regmap = devm_regmap_init_i2c(client, &imx274_regmap_config); if (IS_ERR(imx274->regmap)) { - dev_err(dev, - "regmap init failed: %ld\n", PTR_ERR(imx274->regmap)); + dev_err(dev, "regmap init failed: %pe\n", imx274->regmap); ret = -ENODEV; goto err_regmap; } From 03e5b11a063d68f85254f775fcd886cbaad8ed08 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:50 +0000 Subject: [PATCH 062/249] media: i2c: imx335: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/imx335.c:1013:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Kieran Bingham Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index c043df2f15fb..71ed9a0d84a2 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -1009,8 +1009,8 @@ static int imx335_parse_hw_config(struct imx335 *imx335) imx335->reset_gpio = devm_gpiod_get_optional(imx335->dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(imx335->reset_gpio)) { - dev_err(imx335->dev, "failed to get reset gpio %ld\n", - PTR_ERR(imx335->reset_gpio)); + dev_err(imx335->dev, "failed to get reset gpio %pe\n", + imx335->reset_gpio); return PTR_ERR(imx335->reset_gpio); } From f7be2c2e59719b3a7dc1acd7523914baf9d827b3 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:51 +0000 Subject: [PATCH 063/249] media: i2c: imx412: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/imx412.c:931:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Bryan O'Donoghue Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx412.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx412.c b/drivers/media/i2c/imx412.c index 7bbd639a9ddf..b3826f803547 100644 --- a/drivers/media/i2c/imx412.c +++ b/drivers/media/i2c/imx412.c @@ -927,8 +927,8 @@ static int imx412_parse_hw_config(struct imx412 *imx412) imx412->reset_gpio = devm_gpiod_get_optional(imx412->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(imx412->reset_gpio)) { - dev_err(imx412->dev, "failed to get reset gpio %ld\n", - PTR_ERR(imx412->reset_gpio)); + dev_err(imx412->dev, "failed to get reset gpio %pe\n", + imx412->reset_gpio); return PTR_ERR(imx412->reset_gpio); } From 3a57a0763b4c082569a22a955c206fcb2e970ee8 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:52 +0000 Subject: [PATCH 064/249] media: i2c: max9286: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/max9286.c:755:7-14: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Kieran Bingham Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/max9286.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c index 7c0961688d61..e6e214f8294b 100644 --- a/drivers/media/i2c/max9286.c +++ b/drivers/media/i2c/max9286.c @@ -751,8 +751,8 @@ static int max9286_v4l2_notifier_register(struct max9286_priv *priv) mas = v4l2_async_nf_add_fwnode(&priv->notifier, source->fwnode, struct max9286_asd); if (IS_ERR(mas)) { - dev_err(dev, "Failed to add subdev for source %u: %ld", - i, PTR_ERR(mas)); + dev_err(dev, "Failed to add subdev for source %u: %pe", + i, mas); v4l2_async_nf_cleanup(&priv->notifier); return PTR_ERR(mas); } From e8fd8080e7a9c8c577e5dec5bd6d486a3f14011c Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:53 +0000 Subject: [PATCH 065/249] media: i2c: max96717: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/max96717.c:653:44-51: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/max96717.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/max96717.c b/drivers/media/i2c/max96717.c index c8ae7890d9fa..71ec4fdb8e3d 100644 --- a/drivers/media/i2c/max96717.c +++ b/drivers/media/i2c/max96717.c @@ -650,7 +650,7 @@ static int max96717_v4l2_notifier_register(struct max96717_priv *priv) fwnode_handle_put(ep_fwnode); if (IS_ERR(asd)) { - dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); + dev_err(dev, "Failed to add subdev: %pe", asd); v4l2_async_nf_cleanup(&priv->notifier); return PTR_ERR(asd); } From e027f53e058fc043e0146d53e650e03e44ae3f6e Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:54 +0000 Subject: [PATCH 066/249] media: i2c: mt9m111: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/mt9m111.c:1290:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/mt9m111.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/mt9m111.c b/drivers/media/i2c/mt9m111.c index 05dcf37c6f01..3532c7c38bec 100644 --- a/drivers/media/i2c/mt9m111.c +++ b/drivers/media/i2c/mt9m111.c @@ -1286,8 +1286,8 @@ static int mt9m111_probe(struct i2c_client *client) mt9m111->regulator = devm_regulator_get(&client->dev, "vdd"); if (IS_ERR(mt9m111->regulator)) { - dev_err(&client->dev, "regulator not found: %ld\n", - PTR_ERR(mt9m111->regulator)); + dev_err(&client->dev, "regulator not found: %pe\n", + mt9m111->regulator); return PTR_ERR(mt9m111->regulator); } From b97ef7b65ade812ab2b485b287e7fbbbacef067c Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:55 +0000 Subject: [PATCH 067/249] media: i2c: mt9v111: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/mt9v111.c:1143:3-10: WARNING: Consider using %pe to print PTR_ERR() ./i2c/mt9v111.c:1151:3-10: WARNING: Consider using %pe to print PTR_ERR() ./i2c/mt9v111.c:1159:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/mt9v111.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/media/i2c/mt9v111.c b/drivers/media/i2c/mt9v111.c index b4f2703faa18..64a758c95ab7 100644 --- a/drivers/media/i2c/mt9v111.c +++ b/drivers/media/i2c/mt9v111.c @@ -1139,24 +1139,24 @@ static int mt9v111_probe(struct i2c_client *client) mt9v111->oe = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW); if (IS_ERR(mt9v111->oe)) { - dev_err(&client->dev, "Unable to get GPIO \"enable\": %ld\n", - PTR_ERR(mt9v111->oe)); + dev_err(&client->dev, "Unable to get GPIO \"enable\": %pe\n", + mt9v111->oe); return PTR_ERR(mt9v111->oe); } mt9v111->standby = devm_gpiod_get_optional(&client->dev, "standby", GPIOD_OUT_HIGH); if (IS_ERR(mt9v111->standby)) { - dev_err(&client->dev, "Unable to get GPIO \"standby\": %ld\n", - PTR_ERR(mt9v111->standby)); + dev_err(&client->dev, "Unable to get GPIO \"standby\": %pe\n", + mt9v111->standby); return PTR_ERR(mt9v111->standby); } mt9v111->reset = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(mt9v111->reset)) { - dev_err(&client->dev, "Unable to get GPIO \"reset\": %ld\n", - PTR_ERR(mt9v111->reset)); + dev_err(&client->dev, "Unable to get GPIO \"reset\": %pe\n", + mt9v111->reset); return PTR_ERR(mt9v111->reset); } From 24dc83173f4a384063e07c731dcae9dd2408507f Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:56 +0000 Subject: [PATCH 068/249] media: i2c: ov5675: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/ov5675.c:1188:9-16: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Bryan O'Donoghue Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov5675.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov5675.c b/drivers/media/i2c/ov5675.c index 30e27d39ee44..ea26df328189 100644 --- a/drivers/media/i2c/ov5675.c +++ b/drivers/media/i2c/ov5675.c @@ -1184,8 +1184,8 @@ static int ov5675_get_hwcfg(struct ov5675 *ov5675) ov5675->xvclk = devm_v4l2_sensor_clk_get(dev, NULL); if (IS_ERR(ov5675->xvclk)) return dev_err_probe(dev, PTR_ERR(ov5675->xvclk), - "failed to get xvclk: %ld\n", - PTR_ERR(ov5675->xvclk)); + "failed to get xvclk: %pe\n", + ov5675->xvclk); xvclk_rate = clk_get_rate(ov5675->xvclk); if (xvclk_rate != OV5675_XVCLK_19_2) { From ca1c388ad0441a76894b28e2204c78dfa8cbbdef Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:57 +0000 Subject: [PATCH 069/249] media: i2c: ov5693: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/ov5693.c:1296:9-16: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov5693.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov5693.c b/drivers/media/i2c/ov5693.c index d294477f9dd3..4cc796bbee92 100644 --- a/drivers/media/i2c/ov5693.c +++ b/drivers/media/i2c/ov5693.c @@ -1292,8 +1292,8 @@ static int ov5693_probe(struct i2c_client *client) ov5693->xvclk = devm_v4l2_sensor_clk_get(&client->dev, "xvclk"); if (IS_ERR(ov5693->xvclk)) return dev_err_probe(&client->dev, PTR_ERR(ov5693->xvclk), - "failed to get xvclk: %ld\n", - PTR_ERR(ov5693->xvclk)); + "failed to get xvclk: %pe\n", + ov5693->xvclk); xvclk_rate = clk_get_rate(ov5693->xvclk); if (xvclk_rate != OV5693_XVCLK_FREQ) From b3c30874a9d9baf32ba834bd992b910e5c2f2bb3 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:58 +0000 Subject: [PATCH 070/249] media: i2c: ov9282: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/ov9282.c:1133:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Bryan O'Donoghue Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov9282.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov9282.c b/drivers/media/i2c/ov9282.c index a9f6176e9729..3e24d88f603c 100644 --- a/drivers/media/i2c/ov9282.c +++ b/drivers/media/i2c/ov9282.c @@ -1129,8 +1129,8 @@ static int ov9282_parse_hw_config(struct ov9282 *ov9282) ov9282->reset_gpio = devm_gpiod_get_optional(ov9282->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(ov9282->reset_gpio)) { - dev_err(ov9282->dev, "failed to get reset gpio %ld", - PTR_ERR(ov9282->reset_gpio)); + dev_err(ov9282->dev, "failed to get reset gpio %pe", + ov9282->reset_gpio); return PTR_ERR(ov9282->reset_gpio); } From 7f457b281cc363320fb954498b15156f9dbfc6e5 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:14:59 +0000 Subject: [PATCH 071/249] media: rj54n1cb0c: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/rj54n1cb0c.c:1361:4-11: WARNING: Consider using %pe to print PTR_ERR() ./i2c/rj54n1cb0c.c:1370:4-11: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/rj54n1cb0c.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/i2c/rj54n1cb0c.c b/drivers/media/i2c/rj54n1cb0c.c index 6dfc91216851..e95342d706c3 100644 --- a/drivers/media/i2c/rj54n1cb0c.c +++ b/drivers/media/i2c/rj54n1cb0c.c @@ -1357,8 +1357,8 @@ static int rj54n1_probe(struct i2c_client *client) rj54n1->pwup_gpio = gpiod_get_optional(&client->dev, "powerup", GPIOD_OUT_LOW); if (IS_ERR(rj54n1->pwup_gpio)) { - dev_info(&client->dev, "Unable to get GPIO \"powerup\": %ld\n", - PTR_ERR(rj54n1->pwup_gpio)); + dev_info(&client->dev, "Unable to get GPIO \"powerup\": %pe\n", + rj54n1->pwup_gpio); ret = PTR_ERR(rj54n1->pwup_gpio); goto err_clk_put; } @@ -1366,8 +1366,8 @@ static int rj54n1_probe(struct i2c_client *client) rj54n1->enable_gpio = gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW); if (IS_ERR(rj54n1->enable_gpio)) { - dev_info(&client->dev, "Unable to get GPIO \"enable\": %ld\n", - PTR_ERR(rj54n1->enable_gpio)); + dev_info(&client->dev, "Unable to get GPIO \"enable\": %pe\n", + rj54n1->enable_gpio); ret = PTR_ERR(rj54n1->enable_gpio); goto err_gpio_put; } From 8bcc9138a780194496ccfe2f22aaaeadce686211 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:00 +0000 Subject: [PATCH 072/249] media: i2c: st-mipid02: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./i2c/st-mipid02.c:751:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/st-mipid02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/st-mipid02.c b/drivers/media/i2c/st-mipid02.c index 41ae25b0911f..4675181af5fb 100644 --- a/drivers/media/i2c/st-mipid02.c +++ b/drivers/media/i2c/st-mipid02.c @@ -747,8 +747,8 @@ static int mipid02_parse_rx_ep(struct mipid02_dev *bridge) of_node_put(ep_node); if (IS_ERR(asd)) { - dev_err(&client->dev, "fail to register asd to notifier %ld", - PTR_ERR(asd)); + dev_err(&client->dev, "fail to register asd to notifier %pe", + asd); return PTR_ERR(asd); } bridge->notifier.ops = &mipid02_notifier_ops; From 5e82eb357af8e0304b1231f1166b55e4c04e2bc4 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:01 +0000 Subject: [PATCH 073/249] media: ipu-bridge: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./pci/intel/ipu-bridge.c:567:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu-bridge.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c index 4e579352ab2c..153b2f3685b4 100644 --- a/drivers/media/pci/intel/ipu-bridge.c +++ b/drivers/media/pci/intel/ipu-bridge.c @@ -563,8 +563,8 @@ static void ipu_bridge_instantiate_vcm_work(struct work_struct *work) vcm_client = i2c_acpi_new_device_by_fwnode(acpi_fwnode_handle(adev), 1, &data->board_info); if (IS_ERR(vcm_client)) { - dev_err(data->sensor, "Error instantiating VCM client: %ld\n", - PTR_ERR(vcm_client)); + dev_err(data->sensor, "Error instantiating VCM client: %pe\n", + vcm_client); goto out_pm_put; } From 96097ec153d1638b3c5286f0de888e5a7855ee0e Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:02 +0000 Subject: [PATCH 074/249] media: ipu3-cio2: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./pci/intel/ipu3/ipu3-cio2.c:318:19-26: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu3/ipu3-cio2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/pci/intel/ipu3/ipu3-cio2.c b/drivers/media/pci/intel/ipu3/ipu3-cio2.c index a87f105beb5e..986b9afd7cb5 100644 --- a/drivers/media/pci/intel/ipu3/ipu3-cio2.c +++ b/drivers/media/pci/intel/ipu3/ipu3-cio2.c @@ -314,8 +314,8 @@ static int cio2_csi2_calc_timing(struct cio2_device *cio2, struct cio2_queue *q, src_pad = media_entity_remote_source_pad_unique(&q->subdev.entity); if (IS_ERR(src_pad)) { - dev_err(dev, "can't get source pad of %s (%ld)\n", - q->subdev.name, PTR_ERR(src_pad)); + dev_err(dev, "can't get source pad of %s (%pe)\n", + q->subdev.name, src_pad); return PTR_ERR(src_pad); } From ee738d5c91eb74c25b74ade10e089e842b7f1498 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:03 +0000 Subject: [PATCH 075/249] media: ipu6: isys: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./pci/intel/ipu6/ipu6-isys-csi2.c:91:22-29: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c b/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c index d1fece6210ab..d858976112ba 100644 --- a/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c +++ b/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c @@ -87,8 +87,8 @@ s64 ipu6_isys_csi2_get_link_freq(struct ipu6_isys_csi2 *csi2) src_pad = media_entity_remote_source_pad_unique(&csi2->asd.sd.entity); if (IS_ERR(src_pad)) { dev_err(&csi2->isys->adev->auxdev.dev, - "can't get source pad of %s (%ld)\n", - csi2->asd.sd.name, PTR_ERR(src_pad)); + "can't get source pad of %s (%pe)\n", + csi2->asd.sd.name, src_pad); return PTR_ERR(src_pad); } From 610a0fcd80036fa27c7a198d4b0374417d392cc0 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:04 +0000 Subject: [PATCH 076/249] media: mediatek: vcodec: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c:187:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: AngeloGioacchino Del Regno Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c index 5ad3797836db..643d6fff088b 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_dbgfs.c @@ -183,8 +183,8 @@ static void mtk_vcodec_dbgfs_vdec_init(struct mtk_vcodec_dec_dev *vcodec_dev) vcodec_dev->dbgfs.vcodec_root = debugfs_create_dir("vcodec-dec", NULL); if (IS_ERR(vcodec_dev->dbgfs.vcodec_root)) - dev_err(&vcodec_dev->plat_dev->dev, "create vcodec dir err:%ld\n", - PTR_ERR(vcodec_dev->dbgfs.vcodec_root)); + dev_err(&vcodec_dev->plat_dev->dev, "create vcodec dir err:%pe\n", + vcodec_dev->dbgfs.vcodec_root); vcodec_root = vcodec_dev->dbgfs.vcodec_root; debugfs_create_x32("mtk_v4l2_dbg_level", 0644, vcodec_root, &mtk_v4l2_dbg_level); From 53d94ec2eabf458cfb49ad3dce059e02bd85ae12 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:05 +0000 Subject: [PATCH 077/249] media: imx8mq-mipi-csi2: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/nxp/imx8mq-mipi-csi2.c:422:23-30: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Martin Kepplinger-Novakovic Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c index 3a4645f59a44..d333ff43539f 100644 --- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c +++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c @@ -418,8 +418,8 @@ static int imx8mq_mipi_csi_calc_hs_settle(struct csi_state *state, src_pad = media_entity_remote_source_pad_unique(&sd_state->sd->entity); if (IS_ERR(src_pad)) { - dev_err(state->dev, "can't get source pad of %s (%ld)\n", - sd_state->sd->name, PTR_ERR(src_pad)); + dev_err(state->dev, "can't get source pad of %s (%pe)\n", + sd_state->sd->name, src_pad); return PTR_ERR(src_pad); } From e374b123ca602060c018a029f508dc175b8ba5b3 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:06 +0000 Subject: [PATCH 078/249] media: platform: rzg2l-cru: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/renesas/rzg2l-cru/rzg2l-csi2.c:307:30-37: WARNING: Consider using %pe to print PTR_ERR() ./platform/renesas/rzg2l-cru/rzg2l-csi2.c:726:30-37: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c index 1520211e7418..0fbdae280fdc 100644 --- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c +++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-csi2.c @@ -303,8 +303,8 @@ static int rzg2l_csi2_calc_mbps(struct rzg2l_csi2 *csi2) remote_pad = media_pad_remote_pad_unique(&csi2->pads[RZG2L_CSI2_SINK]); if (IS_ERR(remote_pad)) { - dev_err(csi2->dev, "can't get source pad of %s (%ld)\n", - csi2->remote_source->name, PTR_ERR(remote_pad)); + dev_err(csi2->dev, "can't get source pad of %s (%pe)\n", + csi2->remote_source->name, remote_pad); return PTR_ERR(remote_pad); } @@ -722,8 +722,8 @@ static int rzg2l_csi2_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad, remote_pad = media_pad_remote_pad_unique(&csi2->pads[RZG2L_CSI2_SINK]); if (IS_ERR(remote_pad)) { - dev_err(csi2->dev, "can't get source pad of %s (%ld)\n", - csi2->remote_source->name, PTR_ERR(remote_pad)); + dev_err(csi2->dev, "can't get source pad of %s (%pe)\n", + csi2->remote_source->name, remote_pad); return PTR_ERR(remote_pad); } return v4l2_subdev_call(csi2->remote_source, pad, get_frame_desc, From 66725aa5069c577e89ef6b90f3036338f92a3c47 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:07 +0000 Subject: [PATCH 079/249] media: renesas: vsp1: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/renesas/vsp1/vsp1_drv.c:958:4-11: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Geert Uytterhoeven Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/vsp1/vsp1_drv.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/renesas/vsp1/vsp1_drv.c b/drivers/media/platform/renesas/vsp1/vsp1_drv.c index 6c64657fc4f3..2de515c497eb 100644 --- a/drivers/media/platform/renesas/vsp1/vsp1_drv.c +++ b/drivers/media/platform/renesas/vsp1/vsp1_drv.c @@ -954,8 +954,7 @@ static int vsp1_probe(struct platform_device *pdev) vsp1->fcp = rcar_fcp_get(fcp_node); of_node_put(fcp_node); if (IS_ERR(vsp1->fcp)) { - dev_dbg(&pdev->dev, "FCP not found (%ld)\n", - PTR_ERR(vsp1->fcp)); + dev_dbg(&pdev->dev, "FCP not found (%pe)\n", vsp1->fcp); return PTR_ERR(vsp1->fcp); } From 34cfce1dd5dd2692c2ed7a86606482cfbdb7b686 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:08 +0000 Subject: [PATCH 080/249] media: rkisp1: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/rockchip/rkisp1/rkisp1-isp.c:940:3-10: WARNING: Consider using %pe to print PTR_ERR() ./platform/rockchip/rkisp1/rkisp1-csi.c:372:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c | 4 ++-- drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c index 841e58c20f7f..ddc6182f3e4b 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c @@ -368,8 +368,8 @@ static int rkisp1_csi_s_stream(struct v4l2_subdev *sd, int enable) source_pad = media_entity_remote_source_pad_unique(&sd->entity); if (IS_ERR(source_pad)) { - dev_dbg(rkisp1->dev, "Failed to get source for CSI: %ld\n", - PTR_ERR(source_pad)); + dev_dbg(rkisp1->dev, "Failed to get source for CSI: %pe\n", + source_pad); return -EPIPE; } diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c index 8c29a1c9309a..147d33eb6ee0 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c @@ -936,8 +936,8 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) sink_pad = &isp->pads[RKISP1_ISP_PAD_SINK_VIDEO]; source_pad = media_pad_remote_pad_unique(sink_pad); if (IS_ERR(source_pad)) { - dev_dbg(rkisp1->dev, "Failed to get source for ISP: %ld\n", - PTR_ERR(source_pad)); + dev_dbg(rkisp1->dev, "Failed to get source for ISP: %pe\n", + source_pad); return -EPIPE; } From 2639358ef82ce5c3459a215fad8313ca18b79e67 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:09 +0000 Subject: [PATCH 081/249] media: samsung: exynos4-is: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/samsung/exynos4-is/media-dev.c:1337:16-23: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/exynos4-is/media-dev.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/samsung/exynos4-is/media-dev.c b/drivers/media/platform/samsung/exynos4-is/media-dev.c index c781853586fd..d6f7601de597 100644 --- a/drivers/media/platform/samsung/exynos4-is/media-dev.c +++ b/drivers/media/platform/samsung/exynos4-is/media-dev.c @@ -1333,8 +1333,8 @@ static int fimc_md_register_clk_provider(struct fimc_md *fmd) cp->clks[i] = clk_register(NULL, &camclk->hw); if (IS_ERR(cp->clks[i])) { - dev_err(dev, "failed to register clock: %s (%ld)\n", - init.name, PTR_ERR(cp->clks[i])); + dev_err(dev, "failed to register clock: %s (%pe)\n", + init.name, cp->clks[i]); ret = PTR_ERR(cp->clks[i]); goto err; } From efb83db2b9a9ae62e2360d2741462844877e22ab Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:10 +0000 Subject: [PATCH 082/249] media: ti: cal Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./platform/ti/cal/cal.c:1111:3-10: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/ti/cal/cal.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/ti/cal/cal.c b/drivers/media/platform/ti/cal/cal.c index b644ed890412..3e25ce0c3c3b 100644 --- a/drivers/media/platform/ti/cal/cal.c +++ b/drivers/media/platform/ti/cal/cal.c @@ -1107,8 +1107,7 @@ static int cal_init_camerarx_regmap(struct cal_dev *cal) return 0; } - dev_warn(cal->dev, "failed to get ti,camerrx-control: %ld\n", - PTR_ERR(syscon)); + dev_warn(cal->dev, "failed to get ti,camerrx-control: %pe\n", syscon); /* * Backward DTS compatibility. If syscon entry is not present then From 53a5927b44b1bbd9ee4227d0f4756286645a36e6 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:11 +0000 Subject: [PATCH 083/249] media: staging: ipu3-imgu: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./ipu3/ipu3.c:534:5-12: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/staging/media/ipu3/ipu3.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/media/ipu3/ipu3.c b/drivers/staging/media/ipu3/ipu3.c index e22a9c092195..bdf5a457752b 100644 --- a/drivers/staging/media/ipu3/ipu3.c +++ b/drivers/staging/media/ipu3/ipu3.c @@ -530,8 +530,7 @@ static irqreturn_t imgu_isr_threaded(int irq, void *imgu_ptr) if (IS_ERR(b)) { if (PTR_ERR(b) != -EBUSY) /* All done */ dev_err(&imgu->pci_dev->dev, - "failed to dequeue buffers (%ld)\n", - PTR_ERR(b)); + "failed to dequeue buffers (%pe)\n", b); break; } From d5ddab0cf001fb2ac56fb03d1393077287b9cc03 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 13 Oct 2025 14:15:12 +0000 Subject: [PATCH 084/249] media: staging/ipu7: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR(). This patch fixes this cocci report: ./ipu7/ipu7-isys-csi-phy.c:311:23-30: WARNING: Consider using %pe to print PTR_ERR() ./ipu7/ipu7-isys-csi2.c:59:22-29: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Acked-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/staging/media/ipu7/ipu7-isys-csi-phy.c | 4 ++-- drivers/staging/media/ipu7/ipu7-isys-csi2.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c b/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c index b8c5db7ae300..2d5717883518 100644 --- a/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c +++ b/drivers/staging/media/ipu7/ipu7-isys-csi-phy.c @@ -307,8 +307,8 @@ static int ipu7_isys_csi_ctrl_dids_config(struct ipu7_isys_csi2 *csi2, u32 id) pad = media_entity_remote_source_pad_unique(&csi2->asd.sd.entity); if (IS_ERR(pad)) { - dev_warn(dev, "can't get remote source pad of %s (%ld)\n", - csi2->asd.sd.name, PTR_ERR(pad)); + dev_warn(dev, "can't get remote source pad of %s (%pe)\n", + csi2->asd.sd.name, pad); return PTR_ERR(pad); } diff --git a/drivers/staging/media/ipu7/ipu7-isys-csi2.c b/drivers/staging/media/ipu7/ipu7-isys-csi2.c index 4023db4a6466..f34eabfe8a98 100644 --- a/drivers/staging/media/ipu7/ipu7-isys-csi2.c +++ b/drivers/staging/media/ipu7/ipu7-isys-csi2.c @@ -55,8 +55,8 @@ s64 ipu7_isys_csi2_get_link_freq(struct ipu7_isys_csi2 *csi2) src_pad = media_entity_remote_source_pad_unique(&csi2->asd.sd.entity); if (IS_ERR(src_pad)) { dev_err(&csi2->isys->adev->auxdev.dev, - "can't get source pad of %s (%ld)\n", - csi2->asd.sd.name, PTR_ERR(src_pad)); + "can't get source pad of %s (%pe)\n", + csi2->asd.sd.name, src_pad); return PTR_ERR(src_pad); } From 1fdb55ed40fa5ebe6934bd6b93036c714ebb5ef8 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 15 Oct 2025 13:01:16 +0300 Subject: [PATCH 085/249] media: v4l2-mem2mem: Don't copy frame flags in v4l2_m2m_buf_copy_metadata() The v4l2_m2m_buf_copy_metadata() function takes a boolean copy_frame_flags argument. When true, it causes the function to copy the V4L2_BUF_FLAG_KEYFRAME, V4L2_BUF_FLAG_BFRAME and V4L2_BUF_FLAG_PFRAME flags from the output buffer to the capture buffer. There is no use cases in any upstream driver for copying the flags. KEY/P/B frames are properties of the bitstream buffer in some formats. Once decoded, this is no longer a property of the video frame and should be discarded. It was considered useful to know if an uncompressed frame was decoded from a KEY/P/B compressed frame, and to preserve that information if that same uncompressed frame was passed through another M2M device (e.g. a scaler). However, the V4L2 documentation makes it clear that the flags are meant for compressed frames only. Drop the copy_frame_flags argument from v4l2_m2m_buf_copy_metadata(). The change to drivers was performed with the following Coccinelle semantic patch: @@ expression src; expression dst; expression flag; @@ - v4l2_m2m_buf_copy_metadata(src, dst, flag); + v4l2_m2m_buf_copy_metadata(src, dst); include/media/v4l2-mem2mem.h and drivers/media/v4l2-core/v4l2-mem2mem.c have been updated manually. Signed-off-by: Laurent Pinchart Reviewed-by: Philipp Zabel Reviewed-by: Benjamin Gaignard Signed-off-by: Hans Verkuil --- drivers/media/platform/allegro-dvt/allegro-core.c | 2 +- drivers/media/platform/amphion/vdec.c | 2 +- drivers/media/platform/amphion/venc.c | 2 +- drivers/media/platform/chips-media/coda/coda-bit.c | 2 +- .../media/platform/chips-media/coda/coda-jpeg.c | 4 ++-- .../media/platform/imagination/e5010-jpeg-enc.c | 2 +- .../media/platform/mediatek/jpeg/mtk_jpeg_core.c | 4 ++-- .../media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 4 ++-- .../media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 4 ++-- .../media/platform/mediatek/mdp3/mtk-mdp3-m2m.c | 2 +- .../vcodec/decoder/vdec/vdec_av1_req_lat_if.c | 4 ++-- .../vcodec/decoder/vdec/vdec_h264_req_if.c | 2 +- .../vcodec/decoder/vdec/vdec_h264_req_multi_if.c | 14 ++++++++------ .../vcodec/decoder/vdec/vdec_hevc_req_multi_if.c | 5 +++-- .../mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c | 2 +- .../vcodec/decoder/vdec/vdec_vp9_req_lat_if.c | 6 +++--- drivers/media/platform/nvidia/tegra-vde/h264.c | 2 +- drivers/media/platform/nxp/dw100/dw100.c | 2 +- drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c | 2 +- drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c | 2 +- drivers/media/platform/rockchip/rga/rga.c | 2 +- drivers/media/platform/rockchip/rkvdec/rkvdec.c | 2 +- drivers/media/platform/st/stm32/dma2d/dma2d.c | 2 +- drivers/media/platform/sunxi/sun8i-di/sun8i-di.c | 2 +- .../platform/sunxi/sun8i-rotate/sun8i_rotate.c | 2 +- drivers/media/platform/verisilicon/hantro_drv.c | 2 +- drivers/media/test-drivers/vicodec/vicodec-core.c | 4 ++-- drivers/media/test-drivers/vim2m.c | 2 +- drivers/media/test-drivers/visl/visl-dec.c | 2 +- drivers/media/v4l2-core/v4l2-mem2mem.c | 9 ++------- drivers/staging/media/imx/imx-media-csc-scaler.c | 2 +- drivers/staging/media/sunxi/cedrus/cedrus_dec.c | 2 +- include/media/v4l2-mem2mem.h | 12 +++--------- 33 files changed, 53 insertions(+), 61 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index 875e5cbbeb07..f347d56ac108 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -2124,7 +2124,7 @@ static void allegro_channel_finish_frame(struct allegro_channel *channel, state = VB2_BUF_STATE_DONE; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); if (msg->is_idr) dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME; else diff --git a/drivers/media/platform/amphion/vdec.c b/drivers/media/platform/amphion/vdec.c index 79790fbadc95..c0d2aabb9e0e 100644 --- a/drivers/media/platform/amphion/vdec.c +++ b/drivers/media/platform/amphion/vdec.c @@ -821,7 +821,7 @@ static int vdec_frame_decoded(struct vpu_inst *inst, void *arg) vbuf = &vpu_buf->m2m_buf.vb; src_buf = vdec_get_src_buffer(inst, info->consumed_count); if (src_buf) { - v4l2_m2m_buf_copy_metadata(src_buf, vbuf, true); + v4l2_m2m_buf_copy_metadata(src_buf, vbuf); if (info->consumed_count) { v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx); vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); diff --git a/drivers/media/platform/amphion/venc.c b/drivers/media/platform/amphion/venc.c index 319fbae70571..aced76401b69 100644 --- a/drivers/media/platform/amphion/venc.c +++ b/drivers/media/platform/amphion/venc.c @@ -788,7 +788,7 @@ static int venc_get_one_encoded_frame(struct vpu_inst *inst, src_buf = vpu_find_buf_by_sequence(inst, inst->out_format.type, frame->info.frame_id); if (src_buf) { - v4l2_m2m_buf_copy_metadata(src_buf, vbuf, true); + v4l2_m2m_buf_copy_metadata(src_buf, vbuf); vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); v4l2_m2m_src_buf_remove_by_buf(inst->fh.m2m_ctx, src_buf); v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); diff --git a/drivers/media/platform/chips-media/coda/coda-bit.c b/drivers/media/platform/chips-media/coda/coda-bit.c index 84ded154adfe..fa6b72c3bd93 100644 --- a/drivers/media/platform/chips-media/coda/coda-bit.c +++ b/drivers/media/platform/chips-media/coda/coda-bit.c @@ -1685,7 +1685,7 @@ static void coda_finish_encode(struct coda_ctx *ctx) dst_buf->flags |= V4L2_BUF_FLAG_PFRAME; dst_buf->flags |= src_buf->flags & V4L2_BUF_FLAG_LAST; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); diff --git a/drivers/media/platform/chips-media/coda/coda-jpeg.c b/drivers/media/platform/chips-media/coda/coda-jpeg.c index 5746892658b1..fb150b87c773 100644 --- a/drivers/media/platform/chips-media/coda/coda-jpeg.c +++ b/drivers/media/platform/chips-media/coda/coda-jpeg.c @@ -1245,7 +1245,7 @@ static void coda9_jpeg_finish_encode(struct coda_ctx *ctx) dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME; dst_buf->flags |= src_buf->flags & V4L2_BUF_FLAG_LAST; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); coda_m2m_buf_done(ctx, dst_buf, err_mb ? VB2_BUF_STATE_ERROR : @@ -1472,7 +1472,7 @@ static void coda9_jpeg_finish_decode(struct coda_ctx *ctx) dst_buf->flags |= V4L2_BUF_FLAG_KEYFRAME; dst_buf->flags |= src_buf->flags & V4L2_BUF_FLAG_LAST; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE); vb2_set_plane_payload(&dst_buf->vb2_buf, 0, q_data_dst->sizeimage); diff --git a/drivers/media/platform/imagination/e5010-jpeg-enc.c b/drivers/media/platform/imagination/e5010-jpeg-enc.c index 1b5c8b1d6a31..1c6e076033ec 100644 --- a/drivers/media/platform/imagination/e5010-jpeg-enc.c +++ b/drivers/media/platform/imagination/e5010-jpeg-enc.c @@ -1354,7 +1354,7 @@ static void e5010_device_run(void *priv) s_vb->sequence = ctx->out_queue.sequence++; d_vb->sequence = ctx->cap_queue.sequence++; - v4l2_m2m_buf_copy_metadata(s_vb, d_vb, false); + v4l2_m2m_buf_copy_metadata(s_vb, d_vb); if (ctx != e5010->last_context_run || ctx->update_qp) { dprintk(e5010, 1, "ctx updated: 0x%p -> 0x%p, updating qp tables\n", diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c index d78b83f06247..d08fe365cbb2 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1618,7 +1618,7 @@ static void mtk_jpegenc_worker(struct work_struct *work) if (!dst_buf) goto getbuf_fail; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); mtk_jpegenc_set_hw_param(ctx, hw_id, src_buf, dst_buf); ret = pm_runtime_get_sync(comp_jpeg[hw_id]->dev); @@ -1714,7 +1714,7 @@ static void mtk_jpegdec_worker(struct work_struct *work) if (!dst_buf) goto getbuf_fail; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); jpeg_src_buf = mtk_jpeg_vb2_to_srcbuf(&src_buf->vb2_buf); jpeg_dst_buf = mtk_jpeg_vb2_to_srcbuf(&dst_buf->vb2_buf); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index e78e1d11093c..32372781daf5 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -530,7 +530,7 @@ static void mtk_jpegdec_timeout_work(struct work_struct *work) src_buf = cjpeg->hw_param.src_buffer; dst_buf = cjpeg->hw_param.dst_buffer; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); mtk_jpeg_dec_reset(cjpeg->reg_base); clk_disable_unprepare(cjpeg->jdec_clk.clks->clk); @@ -560,7 +560,7 @@ static irqreturn_t mtk_jpegdec_hw_irq_handler(int irq, void *priv) ctx = jpeg->hw_param.curr_ctx; src_buf = jpeg->hw_param.src_buffer; dst_buf = jpeg->hw_param.dst_buffer; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); irq_status = mtk_jpeg_dec_get_int_status(jpeg->reg_base); dec_irq_ret = mtk_jpeg_dec_enum_result(irq_status); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index 9ab27aee302a..b6f5b2249f1f 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -261,7 +261,7 @@ static void mtk_jpegenc_timeout_work(struct work_struct *work) src_buf = cjpeg->hw_param.src_buffer; dst_buf = cjpeg->hw_param.dst_buffer; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); mtk_jpeg_enc_reset(cjpeg->reg_base); clk_disable_unprepare(cjpeg->venc_clk.clks->clk); @@ -289,7 +289,7 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv) ctx = jpeg->hw_param.curr_ctx; src_buf = jpeg->hw_param.src_buffer; dst_buf = jpeg->hw_param.dst_buffer; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); irq_status = readl(jpeg->reg_base + JPEG_ENC_INT_STS) & JPEG_ENC_INT_STATUS_MASK_ALLIRQ; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c index 9ef956b565a7..44140987cf5f 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c @@ -51,7 +51,7 @@ static void mdp_m2m_process_done(void *priv, int vb_state) ctx->curr_param.frame_no = ctx->frame_count[MDP_M2M_SRC]; src_vbuf->sequence = ctx->frame_count[MDP_M2M_SRC]++; dst_vbuf->sequence = ctx->frame_count[MDP_M2M_DST]++; - v4l2_m2m_buf_copy_metadata(src_vbuf, dst_vbuf, true); + v4l2_m2m_buf_copy_metadata(src_vbuf, dst_vbuf); v4l2_m2m_buf_done(src_vbuf, vb_state); v4l2_m2m_buf_done(dst_vbuf, vb_state); diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c index 08e0f5a70935..7be4b6086920 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_av1_req_lat_if.c @@ -1073,7 +1073,7 @@ static int vdec_av1_slice_setup_lat_from_src_buf(struct vdec_av1_slice_instance lat_buf->src_buf_req = src->vb2_buf.req_obj.req; dst = &lat_buf->ts_info; - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); vsi->frame.cur_ts = dst->vb2_buf.timestamp; return 0; @@ -1780,7 +1780,7 @@ static int vdec_av1_slice_setup_core_to_dst_buf(struct vdec_av1_slice_instance * if (!dst) return -EINVAL; - v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, dst, true); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, dst); return 0; } diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_if.c index 1e1b32faac77..b9a5ea7887d3 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_if.c @@ -367,7 +367,7 @@ static int vdec_h264_slice_decode(void *h_vdec, struct mtk_vcodec_mem *bs, inst->vsi_ctx.dec.vdec_fb_va = (u64)(uintptr_t)fb; v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, - &dst_buf_info->m2m_buf.vb, true); + &dst_buf_info->m2m_buf.vb); err = get_vdec_decode_parameters(inst); if (err) goto err_free_fb_out; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c index 5b25e1679b51..9a9dc2f88d6e 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_h264_req_multi_if.c @@ -570,7 +570,7 @@ static int vdec_h264_slice_setup_core_buffer_ext(struct vdec_h264_slice_inst *in } vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); - v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2, true); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2); return 0; } @@ -674,7 +674,7 @@ static int vdec_h264_slice_core_decode(struct vdec_lat_buf *lat_buf) } vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); - v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2, true); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2); vdec_h264_slice_fill_decode_reflist(inst, &inst->vsi_core->h264_slice_params, share_info); @@ -768,7 +768,8 @@ static int vdec_h264_slice_lat_decode_ext(void *h_vdec, struct mtk_vcodec_mem *b src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req; - v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); + v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, + &lat_buf->ts_info); err = vdec_h264_slice_fill_decode_parameters(inst, share_info, &inst->vsi_ext->h264_slice_params); @@ -900,7 +901,8 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, struct mtk_vcodec_mem *bs, inst->vsi->dec.nal_info = buf[nal_start_idx]; lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req; - v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); + v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, + &lat_buf->ts_info); err = vdec_h264_slice_fill_decode_parameters(inst, share_info, &inst->vsi->h264_slice_params); @@ -1039,7 +1041,7 @@ static int vdec_h264_slice_single_decode_ext(void *h_vdec, struct mtk_vcodec_mem inst->vsi_ctx_ext.dec.vdec_fb_va = (u64)(uintptr_t)fb; v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, - &dst_buf_info->m2m_buf.vb, true); + &dst_buf_info->m2m_buf.vb); err = get_vdec_sig_decode_parameters(inst); if (err) goto err_free_fb_out; @@ -1135,7 +1137,7 @@ static int vdec_h264_slice_single_decode(void *h_vdec, struct mtk_vcodec_mem *bs inst->vsi_ctx.dec.vdec_fb_va = (u64)(uintptr_t)fb; v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, - &dst_buf_info->m2m_buf.vb, true); + &dst_buf_info->m2m_buf.vb); err = get_vdec_sig_decode_parameters(inst); if (err) goto err_free_fb_out; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c index 2725db882e5b..88eca50c2017 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_hevc_req_multi_if.c @@ -742,7 +742,8 @@ static int vdec_hevc_slice_setup_lat_buffer(struct vdec_hevc_slice_inst *inst, src_buf_info = container_of(bs, struct mtk_video_dec_buf, bs_buffer); lat_buf->src_buf_req = src_buf_info->m2m_buf.vb.vb2_buf.req_obj.req; - v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, &lat_buf->ts_info, true); + v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, + &lat_buf->ts_info); *res_chg = inst->resolution_changed; if (inst->resolution_changed) { @@ -847,7 +848,7 @@ static int vdec_hevc_slice_setup_core_buffer(struct vdec_hevc_slice_inst *inst, } vb2_v4l2 = v4l2_m2m_next_dst_buf(ctx->m2m_ctx); - v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2, true); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, vb2_v4l2); return 0; } diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c index 232ef3bd246a..e1d4960553f2 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp8_req_if.c @@ -358,7 +358,7 @@ static int vdec_vp8_slice_decode(void *h_vdec, struct mtk_vcodec_mem *bs, y_fb_dma, c_fb_dma); v4l2_m2m_buf_copy_metadata(&src_buf_info->m2m_buf.vb, - &dst_buf_info->m2m_buf.vb, true); + &dst_buf_info->m2m_buf.vb); err = vdec_vp8_slice_get_decode_parameters(inst); if (err) diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c index 45cd555a5fb5..cd1935014d76 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec/vdec_vp9_req_lat_if.c @@ -706,7 +706,7 @@ int vdec_vp9_slice_setup_single_from_src_to_dst(struct vdec_vp9_slice_instance * if (!dst) return -EINVAL; - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); return 0; } @@ -724,7 +724,7 @@ static int vdec_vp9_slice_setup_lat_from_src_buf(struct vdec_vp9_slice_instance lat_buf->src_buf_req = src->vb2_buf.req_obj.req; dst = &lat_buf->ts_info; - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); return 0; } @@ -1652,7 +1652,7 @@ static int vdec_vp9_slice_setup_core_to_dst_buf(struct vdec_vp9_slice_instance * if (!dst) return -EINVAL; - v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, dst, true); + v4l2_m2m_buf_copy_metadata(&lat_buf->ts_info, dst); return 0; } diff --git a/drivers/media/platform/nvidia/tegra-vde/h264.c b/drivers/media/platform/nvidia/tegra-vde/h264.c index 45f8f6904867..2a2211671fd9 100644 --- a/drivers/media/platform/nvidia/tegra-vde/h264.c +++ b/drivers/media/platform/nvidia/tegra-vde/h264.c @@ -776,7 +776,7 @@ static int tegra_vde_h264_setup_frames(struct tegra_ctx *ctx, * If userspace doesn't tell us frame's type, then we will try decode * as-is. */ - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); if (h->decode_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BFRAME) tb->b_frame = true; diff --git a/drivers/media/platform/nxp/dw100/dw100.c b/drivers/media/platform/nxp/dw100/dw100.c index 035081c4223b..4aaf9c3fff53 100644 --- a/drivers/media/platform/nxp/dw100/dw100.c +++ b/drivers/media/platform/nxp/dw100/dw100.c @@ -1430,7 +1430,7 @@ static void dw100_start(struct dw100_ctx *ctx, struct vb2_v4l2_buffer *in_vb, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE), in_vb->sequence, out_vb->sequence); - v4l2_m2m_buf_copy_metadata(in_vb, out_vb, true); + v4l2_m2m_buf_copy_metadata(in_vb, out_vb); /* Now, let's deal with hardware ... */ dw100_hw_master_bus_disable(dw_dev); diff --git a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c index d41fa4c3139b..9e4a813489c0 100644 --- a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c +++ b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c @@ -1537,7 +1537,7 @@ static void mxc_jpeg_device_run(void *priv) src_buf->sequence = q_data_out->sequence++; dst_buf->sequence = q_data_cap->sequence++; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); jpeg_src_buf = vb2_to_mxc_buf(&src_buf->vb2_buf); if (q_data_cap->fmt->mem_planes != dst_buf->vb2_buf.num_planes) { diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c index df14f12b3ad2..f425ac786854 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-m2m.c @@ -107,7 +107,7 @@ static void mxc_isi_m2m_frame_write_done(struct mxc_isi_pipe *pipe, u32 status) src_vbuf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); dst_vbuf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - v4l2_m2m_buf_copy_metadata(src_vbuf, dst_vbuf, false); + v4l2_m2m_buf_copy_metadata(src_vbuf, dst_vbuf); src_vbuf->sequence = ctx->queues.out.sequence++; dst_vbuf->sequence = ctx->queues.cap.sequence++; diff --git a/drivers/media/platform/rockchip/rga/rga.c b/drivers/media/platform/rockchip/rga/rga.c index eb9c556a105c..43f6a8d99381 100644 --- a/drivers/media/platform/rockchip/rga/rga.c +++ b/drivers/media/platform/rockchip/rga/rga.c @@ -75,7 +75,7 @@ static irqreturn_t rga_isr(int irq, void *prv) WARN_ON(!src); WARN_ON(!dst); - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); dst->sequence = ctx->csequence++; diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index 6e606d73ff51..cb02c6988602 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -783,7 +783,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) if (src_req) v4l2_ctrl_request_setup(src_req, &ctx->ctrl_hdl); - v4l2_m2m_buf_copy_metadata(run->bufs.src, run->bufs.dst, true); + v4l2_m2m_buf_copy_metadata(run->bufs.src, run->bufs.dst); } void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) diff --git a/drivers/media/platform/st/stm32/dma2d/dma2d.c b/drivers/media/platform/st/stm32/dma2d/dma2d.c index 30544ceca42c..72488aa922fc 100644 --- a/drivers/media/platform/st/stm32/dma2d/dma2d.c +++ b/drivers/media/platform/st/stm32/dma2d/dma2d.c @@ -485,7 +485,7 @@ static void device_run(void *prv) src->sequence = frm_out->sequence++; dst->sequence = frm_cap->sequence++; - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); if (clk_enable(dev->gate)) goto end; diff --git a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c index eb519afb30ca..7c4dd1ac772d 100644 --- a/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c +++ b/drivers/media/platform/sunxi/sun8i-di/sun8i-di.c @@ -71,7 +71,7 @@ static void deinterlace_device_run(void *priv) src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); deinterlace_write(dev, DEINTERLACE_MOD_ENABLE, DEINTERLACE_MOD_ENABLE_EN); diff --git a/drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c b/drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c index 89992feaab60..2deab920884a 100644 --- a/drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c +++ b/drivers/media/platform/sunxi/sun8i-rotate/sun8i_rotate.c @@ -70,7 +70,7 @@ static void rotate_device_run(void *priv) src = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx); dst = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx); - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); val = ROTATE_GLB_CTL_MODE(ROTATE_MODE_COPY_ROTATE); if (ctx->hflip) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index e0c11fe8b55c..60b95b5d8565 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -183,7 +183,7 @@ static void device_run(void *priv) if (ret) goto err_cancel_job; - v4l2_m2m_buf_copy_metadata(src, dst, true); + v4l2_m2m_buf_copy_metadata(src, dst); if (ctx->codec_ops->run(ctx)) goto err_cancel_job; diff --git a/drivers/media/test-drivers/vicodec/vicodec-core.c b/drivers/media/test-drivers/vicodec/vicodec-core.c index 9dc32c593427..a7ab668ce70b 100644 --- a/drivers/media/test-drivers/vicodec/vicodec-core.c +++ b/drivers/media/test-drivers/vicodec/vicodec-core.c @@ -421,7 +421,7 @@ static void device_run(void *priv) else dst_buf->sequence = q_dst->sequence++; dst_buf->flags &= ~V4L2_BUF_FLAG_LAST; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, false); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); spin_lock(ctx->lock); if (!ctx->comp_has_next_frame && @@ -555,7 +555,7 @@ static void set_last_buffer(struct vb2_v4l2_buffer *dst_buf, vb2_set_plane_payload(&dst_buf->vb2_buf, 0, 0); dst_buf->sequence = q_dst->sequence++; - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, !ctx->is_enc); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); dst_buf->flags |= V4L2_BUF_FLAG_LAST; v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE); } diff --git a/drivers/media/test-drivers/vim2m.c b/drivers/media/test-drivers/vim2m.c index 9d921feaf824..c33c18ea5210 100644 --- a/drivers/media/test-drivers/vim2m.c +++ b/drivers/media/test-drivers/vim2m.c @@ -477,7 +477,7 @@ static int device_process(struct vim2m_ctx *ctx, out_vb->sequence = q_data_out->sequence++; in_vb->sequence = q_data_in->sequence++; - v4l2_m2m_buf_copy_metadata(in_vb, out_vb, true); + v4l2_m2m_buf_copy_metadata(in_vb, out_vb); if (ctx->mode & MEM2MEM_VFLIP) { start = height - 1; diff --git a/drivers/media/test-drivers/visl/visl-dec.c b/drivers/media/test-drivers/visl/visl-dec.c index 6a9639bd4d61..d90b79de8384 100644 --- a/drivers/media/test-drivers/visl/visl-dec.c +++ b/drivers/media/test-drivers/visl/visl-dec.c @@ -572,7 +572,7 @@ void visl_device_run(void *priv) if (src_req) v4l2_ctrl_request_setup(src_req, &ctx->hdl); - v4l2_m2m_buf_copy_metadata(run.src, run.dst, true); + v4l2_m2m_buf_copy_metadata(run.src, run.dst); run.dst->sequence = ctx->q_data[V4L2_M2M_DST].sequence++; run.src->sequence = ctx->q_data[V4L2_M2M_SRC].sequence++; run.dst->field = ctx->decoded_fmt.fmt.pix.field; diff --git a/drivers/media/v4l2-core/v4l2-mem2mem.c b/drivers/media/v4l2-core/v4l2-mem2mem.c index 9fa8833e445f..fec93c1a9231 100644 --- a/drivers/media/v4l2-core/v4l2-mem2mem.c +++ b/drivers/media/v4l2-core/v4l2-mem2mem.c @@ -1288,14 +1288,9 @@ void v4l2_m2m_buf_queue(struct v4l2_m2m_ctx *m2m_ctx, EXPORT_SYMBOL_GPL(v4l2_m2m_buf_queue); void v4l2_m2m_buf_copy_metadata(const struct vb2_v4l2_buffer *out_vb, - struct vb2_v4l2_buffer *cap_vb, - bool copy_frame_flags) + struct vb2_v4l2_buffer *cap_vb) { - u32 mask = V4L2_BUF_FLAG_TIMECODE | V4L2_BUF_FLAG_TSTAMP_SRC_MASK; - - if (copy_frame_flags) - mask |= V4L2_BUF_FLAG_KEYFRAME | V4L2_BUF_FLAG_PFRAME | - V4L2_BUF_FLAG_BFRAME; + const u32 mask = V4L2_BUF_FLAG_TIMECODE | V4L2_BUF_FLAG_TSTAMP_SRC_MASK; cap_vb->vb2_buf.timestamp = out_vb->vb2_buf.timestamp; diff --git a/drivers/staging/media/imx/imx-media-csc-scaler.c b/drivers/staging/media/imx/imx-media-csc-scaler.c index 1869c5792ecb..0a27330f9790 100644 --- a/drivers/staging/media/imx/imx-media-csc-scaler.c +++ b/drivers/staging/media/imx/imx-media-csc-scaler.c @@ -99,7 +99,7 @@ static void ipu_ic_pp_complete(struct ipu_image_convert_run *run, void *_ctx) src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx); dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx); - v4l2_m2m_buf_copy_metadata(src_buf, dst_buf, true); + v4l2_m2m_buf_copy_metadata(src_buf, dst_buf); src_buf->sequence = ctx->sequence++; dst_buf->sequence = src_buf->sequence; diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c index fbbf9e6f0f50..9f8b0555b7dc 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_dec.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_dec.c @@ -90,7 +90,7 @@ void cedrus_device_run(void *priv) break; } - v4l2_m2m_buf_copy_metadata(run.src, run.dst, true); + v4l2_m2m_buf_copy_metadata(run.src, run.dst); cedrus_dst_format_set(dev, &ctx->dst_fmt); diff --git a/include/media/v4l2-mem2mem.h b/include/media/v4l2-mem2mem.h index c82445929c68..bf6a09a04dcf 100644 --- a/include/media/v4l2-mem2mem.h +++ b/include/media/v4l2-mem2mem.h @@ -845,19 +845,13 @@ v4l2_m2m_dst_buf_remove_by_idx(struct v4l2_m2m_ctx *m2m_ctx, unsigned int idx) * * @out_vb: the output buffer that is the source of the metadata. * @cap_vb: the capture buffer that will receive the metadata. - * @copy_frame_flags: copy the KEY/B/PFRAME flags as well. * * This helper function copies the timestamp, timecode (if the TIMECODE - * buffer flag was set), field and the TIMECODE, KEYFRAME, BFRAME, PFRAME - * and TSTAMP_SRC_MASK flags from @out_vb to @cap_vb. - * - * If @copy_frame_flags is false, then the KEYFRAME, BFRAME and PFRAME - * flags are not copied. This is typically needed for encoders that - * set this bits explicitly. + * buffer flag was set), field, and the TIMECODE and TSTAMP_SRC_MASK flags from + * @out_vb to @cap_vb. */ void v4l2_m2m_buf_copy_metadata(const struct vb2_v4l2_buffer *out_vb, - struct vb2_v4l2_buffer *cap_vb, - bool copy_frame_flags); + struct vb2_v4l2_buffer *cap_vb); /* v4l2 request helper */ From a5844227e0f030d2af2d85d4aed10c5eca6ca176 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Wed, 20 Aug 2025 15:54:05 +0800 Subject: [PATCH 086/249] media: mediatek: vcodec: Use spinlock for context list protection lock Previously a mutex was added to protect the encoder and decoder context lists from unexpected changes originating from the SCP IP block, causing the context pointer to go invalid, resulting in a NULL pointer dereference in the IPI handler. Turns out on the MT8173, the VPU IPI handler is called from hard IRQ context. This causes a big warning from the scheduler. This was first reported downstream on the ChromeOS kernels, but is also reproducible on mainline using Fluster with the FFmpeg v4l2m2m decoders. Even though the actual capture format is not supported, the affected code paths are triggered. Since this lock just protects the context list and operations on it are very fast, it should be OK to switch to a spinlock. Fixes: 6467cda18c9f ("media: mediatek: vcodec: adding lock to protect decoder context list") Fixes: afaaf3a0f647 ("media: mediatek: vcodec: adding lock to protect encoder context list") Cc: Yunfei Dong Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai Reviewed-by: Fei Shao Reviewed-by: Tomasz Figa Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../mediatek/vcodec/common/mtk_vcodec_fw_vpu.c | 10 ++++++---- .../mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c | 12 +++++++----- .../mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h | 2 +- .../platform/mediatek/vcodec/decoder/vdec_vpu_if.c | 5 +++-- .../mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c | 12 +++++++----- .../mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h | 2 +- .../platform/mediatek/vcodec/encoder/venc_vpu_if.c | 5 +++-- 7 files changed, 28 insertions(+), 20 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c index d7027d600208..223fb2294894 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c @@ -47,30 +47,32 @@ static void mtk_vcodec_vpu_reset_dec_handler(void *priv) { struct mtk_vcodec_dec_dev *dev = priv; struct mtk_vcodec_dec_ctx *ctx; + unsigned long flags; dev_err(&dev->plat_dev->dev, "Watchdog timeout!!"); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_for_each_entry(ctx, &dev->ctx_list, list) { ctx->state = MTK_STATE_ABORT; mtk_v4l2_vdec_dbg(0, ctx, "[%d] Change to state MTK_STATE_ABORT", ctx->id); } - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); } static void mtk_vcodec_vpu_reset_enc_handler(void *priv) { struct mtk_vcodec_enc_dev *dev = priv; struct mtk_vcodec_enc_ctx *ctx; + unsigned long flags; dev_err(&dev->plat_dev->dev, "Watchdog timeout!!"); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_for_each_entry(ctx, &dev->ctx_list, list) { ctx->state = MTK_STATE_ABORT; mtk_v4l2_vdec_dbg(0, ctx, "[%d] Change to state MTK_STATE_ABORT", ctx->id); } - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); } static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = { diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c index 46d176e6de63..3b81fae9f913 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.c @@ -198,6 +198,7 @@ static int fops_vcodec_open(struct file *file) struct mtk_vcodec_dec_ctx *ctx = NULL; int ret = 0, i, hw_count; struct vb2_queue *src_vq; + unsigned long flags; ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -267,9 +268,9 @@ static int fops_vcodec_open(struct file *file) ctx->dev->vdec_pdata->init_vdec_params(ctx); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_add(&ctx->list, &dev->ctx_list); - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); mtk_vcodec_dbgfs_create(ctx); mutex_unlock(&dev->dev_mutex); @@ -294,6 +295,7 @@ static int fops_vcodec_release(struct file *file) { struct mtk_vcodec_dec_dev *dev = video_drvdata(file); struct mtk_vcodec_dec_ctx *ctx = file_to_dec_ctx(file); + unsigned long flags; mtk_v4l2_vdec_dbg(0, ctx, "[%d] decoder", ctx->id); mutex_lock(&dev->dev_mutex); @@ -312,9 +314,9 @@ static int fops_vcodec_release(struct file *file) v4l2_ctrl_handler_free(&ctx->ctrl_hdl); mtk_vcodec_dbgfs_remove(dev, ctx->id); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_del_init(&ctx->list); - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); kfree(ctx); mutex_unlock(&dev->dev_mutex); return 0; @@ -407,7 +409,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) for (i = 0; i < MTK_VDEC_HW_MAX; i++) mutex_init(&dev->dec_mutex[i]); mutex_init(&dev->dev_mutex); - mutex_init(&dev->dev_ctx_lock); + spin_lock_init(&dev->dev_ctx_lock); spin_lock_init(&dev->irqlock); snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s", diff --git a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h index d047d7c580fb..9d68808e8f9c 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/decoder/mtk_vcodec_dec_drv.h @@ -285,7 +285,7 @@ struct mtk_vcodec_dec_dev { /* decoder hardware mutex lock */ struct mutex dec_mutex[MTK_VDEC_HW_MAX]; struct mutex dev_mutex; - struct mutex dev_ctx_lock; + spinlock_t dev_ctx_lock; struct workqueue_struct *decode_workqueue; spinlock_t irqlock; diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c index 145958206e38..40b97f114cf6 100644 --- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c @@ -75,16 +75,17 @@ static void handle_get_param_msg_ack(const struct vdec_vpu_ipi_get_param_ack *ms static bool vpu_dec_check_ap_inst(struct mtk_vcodec_dec_dev *dec_dev, struct vdec_vpu_inst *vpu) { struct mtk_vcodec_dec_ctx *ctx; + unsigned long flags; int ret = false; - mutex_lock(&dec_dev->dev_ctx_lock); + spin_lock_irqsave(&dec_dev->dev_ctx_lock, flags); list_for_each_entry(ctx, &dec_dev->ctx_list, list) { if (!IS_ERR_OR_NULL(ctx) && ctx->vpu_inst == vpu) { ret = true; break; } } - mutex_unlock(&dec_dev->dev_ctx_lock); + spin_unlock_irqrestore(&dec_dev->dev_ctx_lock, flags); return ret; } diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c index fb1c3bdc2dae..82b8ff38e8f1 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.c @@ -117,6 +117,7 @@ static int fops_vcodec_open(struct file *file) struct mtk_vcodec_enc_ctx *ctx = NULL; int ret = 0; struct vb2_queue *src_vq; + unsigned long flags; ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); if (!ctx) @@ -176,9 +177,9 @@ static int fops_vcodec_open(struct file *file) mtk_v4l2_venc_dbg(2, ctx, "Create instance [%d]@%p m2m_ctx=%p ", ctx->id, ctx, ctx->m2m_ctx); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_add(&ctx->list, &dev->ctx_list); - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); mutex_unlock(&dev->dev_mutex); mtk_v4l2_venc_dbg(0, ctx, "%s encoder [%d]", dev_name(&dev->plat_dev->dev), @@ -203,6 +204,7 @@ static int fops_vcodec_release(struct file *file) { struct mtk_vcodec_enc_dev *dev = video_drvdata(file); struct mtk_vcodec_enc_ctx *ctx = file_to_enc_ctx(file); + unsigned long flags; mtk_v4l2_venc_dbg(1, ctx, "[%d] encoder", ctx->id); mutex_lock(&dev->dev_mutex); @@ -213,9 +215,9 @@ static int fops_vcodec_release(struct file *file) v4l2_fh_exit(&ctx->fh); v4l2_ctrl_handler_free(&ctx->ctrl_hdl); - mutex_lock(&dev->dev_ctx_lock); + spin_lock_irqsave(&dev->dev_ctx_lock, flags); list_del_init(&ctx->list); - mutex_unlock(&dev->dev_ctx_lock); + spin_unlock_irqrestore(&dev->dev_ctx_lock, flags); kfree(ctx); mutex_unlock(&dev->dev_mutex); return 0; @@ -297,7 +299,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) mutex_init(&dev->enc_mutex); mutex_init(&dev->dev_mutex); - mutex_init(&dev->dev_ctx_lock); + spin_lock_init(&dev->dev_ctx_lock); spin_lock_init(&dev->irqlock); snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), "%s", diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h index 5b304a551236..0cddfa13594f 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h @@ -206,7 +206,7 @@ struct mtk_vcodec_enc_dev { /* encoder hardware mutex lock */ struct mutex enc_mutex; struct mutex dev_mutex; - struct mutex dev_ctx_lock; + spinlock_t dev_ctx_lock; struct workqueue_struct *encode_workqueue; int enc_irq; diff --git a/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c b/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c index 51bb7ee141b9..3c229b1f6b21 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c @@ -45,16 +45,17 @@ static void handle_enc_encode_msg(struct venc_vpu_inst *vpu, const void *data) static bool vpu_enc_check_ap_inst(struct mtk_vcodec_enc_dev *enc_dev, struct venc_vpu_inst *vpu) { struct mtk_vcodec_enc_ctx *ctx; + unsigned long flags; int ret = false; - mutex_lock(&enc_dev->dev_ctx_lock); + spin_lock_irqsave(&enc_dev->dev_ctx_lock, flags); list_for_each_entry(ctx, &enc_dev->ctx_list, list) { if (!IS_ERR_OR_NULL(ctx) && ctx->vpu_inst == vpu) { ret = true; break; } } - mutex_unlock(&enc_dev->dev_ctx_lock); + spin_unlock_irqrestore(&enc_dev->dev_ctx_lock, flags); return ret; } From 8f6f3aa21517ef34d50808af0c572e69580dca20 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Wed, 24 Sep 2025 16:39:19 +0200 Subject: [PATCH 087/249] media: platform: mtk-mdp3: fix device leaks at probe Make sure to drop the references taken when looking up the subsys devices during probe on probe failure (e.g. probe deferral) and on driver unbind. Similarly, drop the SCP device reference after retrieving its platform data during probe to avoid leaking it. Note that holding a reference to a device does not prevent its driver data from going away. Fixes: 61890ccaefaf ("media: platform: mtk-mdp3: add MediaTek MDP3 driver") Cc: stable@vger.kernel.org # 6.1 Cc: Moudy Ho Signed-off-by: Johan Hovold Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/mediatek/mdp3/mtk-mdp3-core.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c index 6559d72d5d42..6d26d4aa1eef 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -157,10 +157,18 @@ void mdp_video_device_release(struct video_device *vdev) kfree(mdp); } +static void mdp_put_device(void *_dev) +{ + struct device *dev = _dev; + + put_device(dev); +} + static int mdp_mm_subsys_deploy(struct mdp_dev *mdp, enum mdp_infra_id id) { struct platform_device *mm_pdev = NULL; struct device **dev; + int ret; int i; if (!mdp) @@ -194,6 +202,11 @@ static int mdp_mm_subsys_deploy(struct mdp_dev *mdp, enum mdp_infra_id id) if (WARN_ON(!mm_pdev)) return -ENODEV; + ret = devm_add_action_or_reset(&mdp->pdev->dev, mdp_put_device, + &mm_pdev->dev); + if (ret) + return ret; + *dev = &mm_pdev->dev; } @@ -279,6 +292,7 @@ static int mdp_probe(struct platform_device *pdev) goto err_destroy_clock_wq; } mdp->scp = platform_get_drvdata(mm_pdev); + put_device(&mm_pdev->dev); } mdp->rproc_handle = scp_get_rproc(mdp->scp); From 19c286b755072a22a063052f530a6b1fac8a1f63 Mon Sep 17 00:00:00 2001 From: Nicolas Dufresne Date: Mon, 22 Sep 2025 14:43:38 -0400 Subject: [PATCH 088/249] media: verisilicon: Fix CPU stalls on G2 bus error In some seek stress tests, we are getting IRQ from the G2 decoder where the dec_bus_int and the dec_e bits are high, meaning the decoder is still running despite the error. Fix this by reworking the IRQ handler to only finish the job once we have reached completion and move the software reset to when our software watchdog triggers. This way, we let the hardware continue on errors when it did not self reset and in worse case scenario the hardware timeout will automatically stop it. The actual error will be fixed in a follow up patch. Fixes: 3385c514ecc5a ("media: hantro: Convert imx8m_vpu_g2_irq to helper") Cc: stable@vger.kernel.org Reviewed-by: Benjamin Gaignard Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/verisilicon/hantro_g2.c | 84 +++++++++++++++---- .../platform/verisilicon/hantro_g2_hevc_dec.c | 2 - .../platform/verisilicon/hantro_g2_regs.h | 13 +++ .../platform/verisilicon/hantro_g2_vp9_dec.c | 2 - .../media/platform/verisilicon/hantro_hw.h | 1 + .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 + 6 files changed, 83 insertions(+), 21 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_g2.c b/drivers/media/platform/verisilicon/hantro_g2.c index aae0b562fabb..318673b66da8 100644 --- a/drivers/media/platform/verisilicon/hantro_g2.c +++ b/drivers/media/platform/verisilicon/hantro_g2.c @@ -5,43 +5,93 @@ * Copyright (C) 2021 Collabora Ltd, Andrzej Pietrasiewicz */ +#include #include "hantro_hw.h" #include "hantro_g2_regs.h" #define G2_ALIGN 16 -void hantro_g2_check_idle(struct hantro_dev *vpu) +static bool hantro_g2_active(struct hantro_ctx *ctx) { - int i; + struct hantro_dev *vpu = ctx->dev; + u32 status; - for (i = 0; i < 3; i++) { - u32 status; + status = vdpu_read(vpu, G2_REG_INTERRUPT); - /* Make sure the VPU is idle */ - status = vdpu_read(vpu, G2_REG_INTERRUPT); - if (status & G2_REG_INTERRUPT_DEC_E) { - dev_warn(vpu->dev, "device still running, aborting"); - status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; - vdpu_write(vpu, status, G2_REG_INTERRUPT); - } + return (status & G2_REG_INTERRUPT_DEC_E); +} + +/** + * hantro_g2_reset: + * @ctx: the hantro context + * + * Emulates a reset using Hantro abort function. Failing this procedure would + * results in programming a running IP which leads to CPU hang. + * + * Using a hard reset procedure instead is prefferred. + */ +void hantro_g2_reset(struct hantro_ctx *ctx) +{ + struct hantro_dev *vpu = ctx->dev; + u32 status; + + status = vdpu_read(vpu, G2_REG_INTERRUPT); + if (status & G2_REG_INTERRUPT_DEC_E) { + dev_warn_ratelimited(vpu->dev, "device still running, aborting"); + status |= G2_REG_INTERRUPT_DEC_ABORT_E | G2_REG_INTERRUPT_DEC_IRQ_DIS; + vdpu_write(vpu, status, G2_REG_INTERRUPT); + + do { + mdelay(1); + } while (hantro_g2_active(ctx)); } } irqreturn_t hantro_g2_irq(int irq, void *dev_id) { struct hantro_dev *vpu = dev_id; - enum vb2_buffer_state state; u32 status; status = vdpu_read(vpu, G2_REG_INTERRUPT); - state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ? - VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR; - vdpu_write(vpu, 0, G2_REG_INTERRUPT); - vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG); + if (!(status & G2_REG_INTERRUPT_DEC_IRQ)) + return IRQ_NONE; - hantro_irq_done(vpu, state); + hantro_reg_write(vpu, &g2_dec_irq, 0); + hantro_reg_write(vpu, &g2_dec_int_stat, 0); + hantro_reg_write(vpu, &g2_clk_gate_e, 1); + if (status & G2_REG_INTERRUPT_DEC_RDY_INT) { + hantro_irq_done(vpu, VB2_BUF_STATE_DONE); + return IRQ_HANDLED; + } + + if (status & G2_REG_INTERRUPT_DEC_ABORT_INT) { + /* disabled on abort, though lets be safe and handle it */ + dev_warn_ratelimited(vpu->dev, "decode operation aborted."); + return IRQ_HANDLED; + } + + if (status & G2_REG_INTERRUPT_DEC_LAST_SLICE_INT) + dev_warn_ratelimited(vpu->dev, "not all macroblocks were decoded."); + + if (status & G2_REG_INTERRUPT_DEC_BUS_INT) + dev_warn_ratelimited(vpu->dev, "bus error detected."); + + if (status & G2_REG_INTERRUPT_DEC_ERROR_INT) + dev_warn_ratelimited(vpu->dev, "decode error detected."); + + if (status & G2_REG_INTERRUPT_DEC_TIMEOUT) + dev_warn_ratelimited(vpu->dev, "frame decode timed out."); + + /** + * If the decoding haven't stopped, let it continue. The hardware timeout + * will trigger if it is trully stuck. + */ + if (status & G2_REG_INTERRUPT_DEC_E) + return IRQ_HANDLED; + + hantro_irq_done(vpu, VB2_BUF_STATE_ERROR); return IRQ_HANDLED; } diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c index 0e212198dd65..f066636e56f9 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c @@ -582,8 +582,6 @@ int hantro_g2_hevc_dec_run(struct hantro_ctx *ctx) struct hantro_dev *vpu = ctx->dev; int ret; - hantro_g2_check_idle(vpu); - /* Prepare HEVC decoder context. */ ret = hantro_hevc_dec_prepare_run(ctx); if (ret) diff --git a/drivers/media/platform/verisilicon/hantro_g2_regs.h b/drivers/media/platform/verisilicon/hantro_g2_regs.h index b943b1816db7..c614951121c7 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_regs.h +++ b/drivers/media/platform/verisilicon/hantro_g2_regs.h @@ -22,7 +22,14 @@ #define G2_REG_VERSION G2_SWREG(0) #define G2_REG_INTERRUPT G2_SWREG(1) +#define G2_REG_INTERRUPT_DEC_LAST_SLICE_INT BIT(19) +#define G2_REG_INTERRUPT_DEC_TIMEOUT BIT(18) +#define G2_REG_INTERRUPT_DEC_ERROR_INT BIT(16) +#define G2_REG_INTERRUPT_DEC_BUF_INT BIT(14) +#define G2_REG_INTERRUPT_DEC_BUS_INT BIT(13) #define G2_REG_INTERRUPT_DEC_RDY_INT BIT(12) +#define G2_REG_INTERRUPT_DEC_ABORT_INT BIT(11) +#define G2_REG_INTERRUPT_DEC_IRQ BIT(8) #define G2_REG_INTERRUPT_DEC_ABORT_E BIT(5) #define G2_REG_INTERRUPT_DEC_IRQ_DIS BIT(4) #define G2_REG_INTERRUPT_DEC_E BIT(0) @@ -35,6 +42,9 @@ #define BUS_WIDTH_128 2 #define BUS_WIDTH_256 3 +#define g2_dec_int_stat G2_DEC_REG(1, 11, 0xf) +#define g2_dec_irq G2_DEC_REG(1, 8, 0x1) + #define g2_strm_swap G2_DEC_REG(2, 28, 0xf) #define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f) #define g2_pic_swap G2_DEC_REG(2, 22, 0x1f) @@ -225,6 +235,9 @@ #define vp9_filt_level_seg5 G2_DEC_REG(19, 8, 0x3f) #define vp9_quant_seg5 G2_DEC_REG(19, 0, 0xff) +#define g2_timemout_override_e G2_DEC_REG(45, 31, 0x1) +#define g2_timemout_cycles G2_DEC_REG(45, 0, 0x7fffffff) + #define hevc_cur_poc_00 G2_DEC_REG(46, 24, 0xff) #define hevc_cur_poc_01 G2_DEC_REG(46, 16, 0xff) #define hevc_cur_poc_02 G2_DEC_REG(46, 8, 0xff) diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c index 82a478ac645e..56c79e339030 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c @@ -893,8 +893,6 @@ int hantro_g2_vp9_dec_run(struct hantro_ctx *ctx) struct vb2_v4l2_buffer *dst; int ret; - hantro_g2_check_idle(ctx->dev); - ret = start_prepare_run(ctx, &decode_params); if (ret) { hantro_end_prepare_run(ctx); diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h index c9b6556f8b2b..5f2011529f02 100644 --- a/drivers/media/platform/verisilicon/hantro_hw.h +++ b/drivers/media/platform/verisilicon/hantro_hw.h @@ -583,6 +583,7 @@ void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx); int hantro_vp9_dec_init(struct hantro_ctx *ctx); void hantro_vp9_dec_exit(struct hantro_ctx *ctx); void hantro_g2_check_idle(struct hantro_dev *vpu); +void hantro_g2_reset(struct hantro_ctx *ctx); irqreturn_t hantro_g2_irq(int irq, void *dev_id); #endif /* HANTRO_HW_H_ */ diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c index f9f276385c11..5be0e2e76882 100644 --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c @@ -294,11 +294,13 @@ static const struct hantro_codec_ops imx8mq_vpu_g1_codec_ops[] = { static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = { [HANTRO_MODE_HEVC_DEC] = { .run = hantro_g2_hevc_dec_run, + .reset = hantro_g2_reset, .init = hantro_hevc_dec_init, .exit = hantro_hevc_dec_exit, }, [HANTRO_MODE_VP9_DEC] = { .run = hantro_g2_vp9_dec_run, + .reset = hantro_g2_reset, .done = hantro_g2_vp9_dec_done, .init = hantro_vp9_dec_init, .exit = hantro_vp9_dec_exit, From 47825b1646a6a9eca0f90baa3d4f98947c2add96 Mon Sep 17 00:00:00 2001 From: Nicolas Dufresne Date: Mon, 22 Sep 2025 14:43:39 -0400 Subject: [PATCH 089/249] media: verisilicon: Protect G2 HEVC decoder against invalid DPB index Fix the Hantro G2 HEVC decoder so that we use DPB index 0 whenever a ninvalid index is received from user space. This protects the hardware from doing faulty memory access which then leads to bus errors. To be noted that when a reference is missing, userspace such as GStreamer passes an invalid DPB index of 255. This issue was found by seeking to a CRA picture using GStreamer. The framework is currently missing the code to skip over RASL pictures placed after the CRA. This situation can also occur while doing live streaming over lossy transport. Fixes: cb5dd5a0fa518 ("media: hantro: Introduce G2/HEVC decoder") Cc: stable@vger.kernel.org Reviewed-by: Benjamin Gaignard Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../platform/verisilicon/hantro_g2_hevc_dec.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c index f066636e56f9..e8c2e83379de 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_hevc_dec.c @@ -283,6 +283,15 @@ static void set_params(struct hantro_ctx *ctx) hantro_reg_write(vpu, &g2_apf_threshold, 8); } +static u32 get_dpb_index(const struct v4l2_ctrl_hevc_decode_params *decode_params, + const u32 index) +{ + if (index > decode_params->num_active_dpb_entries) + return 0; + + return index; +} + static void set_ref_pic_list(struct hantro_ctx *ctx) { const struct hantro_hevc_dec_ctrls *ctrls = &ctx->hevc_dec.ctrls; @@ -355,8 +364,10 @@ static void set_ref_pic_list(struct hantro_ctx *ctx) list1[j++] = list1[i++]; for (i = 0; i < V4L2_HEVC_DPB_ENTRIES_NUM_MAX; i++) { - hantro_reg_write(vpu, &ref_pic_regs0[i], list0[i]); - hantro_reg_write(vpu, &ref_pic_regs1[i], list1[i]); + hantro_reg_write(vpu, &ref_pic_regs0[i], + get_dpb_index(decode_params, list0[i])); + hantro_reg_write(vpu, &ref_pic_regs1[i], + get_dpb_index(decode_params, list1[i])); } } From 634c2cd17bd021487c57b95973bddb14be8002ff Mon Sep 17 00:00:00 2001 From: Ming Qian Date: Tue, 16 Sep 2025 14:08:53 +0800 Subject: [PATCH 090/249] media: amphion: Remove vpu_vb_is_codecconfig Currently the function vpu_vb_is_codecconfig() always returns 0. Delete it and its related code. Fixes: 3cd084519c6f ("media: amphion: add vpu v4l2 m2m support") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- drivers/media/platform/amphion/vpu_malone.c | 23 +++------------------ drivers/media/platform/amphion/vpu_v4l2.c | 10 --------- drivers/media/platform/amphion/vpu_v4l2.h | 10 --------- 3 files changed, 3 insertions(+), 40 deletions(-) diff --git a/drivers/media/platform/amphion/vpu_malone.c b/drivers/media/platform/amphion/vpu_malone.c index ba688566dffd..80802975c4f1 100644 --- a/drivers/media/platform/amphion/vpu_malone.c +++ b/drivers/media/platform/amphion/vpu_malone.c @@ -1337,22 +1337,18 @@ static int vpu_malone_insert_scode_vc1_g_seq(struct malone_scode_t *scode) { if (!scode->inst->total_input_count) return 0; - if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) - scode->need_data = 0; return 0; } static int vpu_malone_insert_scode_vc1_g_pic(struct malone_scode_t *scode) { - struct vb2_v4l2_buffer *vbuf; u8 nal_hdr[MALONE_VC1_NAL_HEADER_LEN]; u32 *data = NULL; int ret; - vbuf = to_vb2_v4l2_buffer(scode->vb); data = vb2_plane_vaddr(scode->vb, 0); - if (scode->inst->total_input_count == 0 || vpu_vb_is_codecconfig(vbuf)) + if (scode->inst->total_input_count == 0) return 0; if (MALONE_VC1_CONTAIN_NAL(*data)) return 0; @@ -1373,8 +1369,6 @@ static int vpu_malone_insert_scode_vc1_l_seq(struct malone_scode_t *scode) int size = 0; u8 rcv_seqhdr[MALONE_VC1_RCV_SEQ_HEADER_LEN]; - if (vpu_vb_is_codecconfig(to_vb2_v4l2_buffer(scode->vb))) - scode->need_data = 0; if (scode->inst->total_input_count) return 0; scode->need_data = 0; @@ -1560,7 +1554,7 @@ static int vpu_malone_input_frame_data(struct vpu_malone_str_buffer __iomem *str scode.vb = vb; scode.wptr = wptr; scode.need_data = 1; - if (vbuf->sequence == 0 || vpu_vb_is_codecconfig(vbuf)) + if (vbuf->sequence == 0) ret = vpu_malone_insert_scode(&scode, SCODE_SEQUENCE); if (ret < 0) @@ -1596,7 +1590,7 @@ static int vpu_malone_input_frame_data(struct vpu_malone_str_buffer __iomem *str * This module is currently only supported for the H264 and HEVC formats, * for other formats, vpu_malone_add_scode() will return 0. */ - if ((disp_imm || low_latency) && !vpu_vb_is_codecconfig(vbuf)) { + if (disp_imm || low_latency) { ret = vpu_malone_add_scode(inst->core->iface, inst->id, &inst->stream_buffer, @@ -1643,7 +1637,6 @@ int vpu_malone_input_frame(struct vpu_shared_addr *shared, struct vpu_inst *inst, struct vb2_buffer *vb) { struct vpu_dec_ctrl *hc = shared->priv; - struct vb2_v4l2_buffer *vbuf; struct vpu_malone_str_buffer __iomem *str_buf = hc->str_buf[inst->id]; u32 disp_imm = hc->codec_param[inst->id].disp_imm; u32 size; @@ -1657,16 +1650,6 @@ int vpu_malone_input_frame(struct vpu_shared_addr *shared, return ret; size = ret; - /* - * if buffer only contain codec data, and the timestamp is invalid, - * don't put the invalid timestamp to resync - * merge the data to next frame - */ - vbuf = to_vb2_v4l2_buffer(vb); - if (vpu_vb_is_codecconfig(vbuf)) { - inst->extra_size += size; - return 0; - } if (inst->extra_size) { size += inst->extra_size; inst->extra_size = 0; diff --git a/drivers/media/platform/amphion/vpu_v4l2.c b/drivers/media/platform/amphion/vpu_v4l2.c index fcb2eff813ac..511881a131b7 100644 --- a/drivers/media/platform/amphion/vpu_v4l2.c +++ b/drivers/media/platform/amphion/vpu_v4l2.c @@ -349,16 +349,6 @@ struct vb2_v4l2_buffer *vpu_next_src_buf(struct vpu_inst *inst) if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE) return NULL; - while (vpu_vb_is_codecconfig(src_buf)) { - v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx); - vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE); - v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE); - - src_buf = v4l2_m2m_next_src_buf(inst->fh.m2m_ctx); - if (!src_buf || vpu_get_buffer_state(src_buf) == VPU_BUF_STATE_IDLE) - return NULL; - } - return src_buf; } diff --git a/drivers/media/platform/amphion/vpu_v4l2.h b/drivers/media/platform/amphion/vpu_v4l2.h index 4a87b06ae520..da9945f25e32 100644 --- a/drivers/media/platform/amphion/vpu_v4l2.h +++ b/drivers/media/platform/amphion/vpu_v4l2.h @@ -39,14 +39,4 @@ static inline struct vpu_format *vpu_get_format(struct vpu_inst *inst, u32 type) else return &inst->cap_format; } - -static inline int vpu_vb_is_codecconfig(struct vb2_v4l2_buffer *vbuf) -{ -#ifdef V4L2_BUF_FLAG_CODECCONFIG - return (vbuf->flags & V4L2_BUF_FLAG_CODECCONFIG) ? 1 : 0; -#else - return 0; -#endif -} - #endif From ae246b0032146e352c4c06a7bf03cd3d5bcb2ecd Mon Sep 17 00:00:00 2001 From: Ming Qian Date: Tue, 16 Sep 2025 14:10:07 +0800 Subject: [PATCH 091/249] media: amphion: Cancel message work before releasing the VPU core To avoid accessing the VPU register after release of the VPU core, cancel the message work and destroy the workqueue that handles the VPU message before release of the VPU core. Fixes: 3cd084519c6f ("media: amphion: add vpu v4l2 m2m support") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- drivers/media/platform/amphion/vpu_v4l2.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/amphion/vpu_v4l2.c b/drivers/media/platform/amphion/vpu_v4l2.c index 511881a131b7..47dff9a35bb4 100644 --- a/drivers/media/platform/amphion/vpu_v4l2.c +++ b/drivers/media/platform/amphion/vpu_v4l2.c @@ -703,15 +703,15 @@ static int vpu_v4l2_release(struct vpu_inst *inst) { vpu_trace(inst->vpu->dev, "%p\n", inst); - vpu_release_core(inst->core); - put_device(inst->dev); - if (inst->workqueue) { cancel_work_sync(&inst->msg_work); destroy_workqueue(inst->workqueue); inst->workqueue = NULL; } + vpu_release_core(inst->core); + put_device(inst->dev); + v4l2_ctrl_handler_free(&inst->ctrl_handler); mutex_destroy(&inst->lock); From cdd0f118ef87db8a664fb5ea366fd1766d2df1cd Mon Sep 17 00:00:00 2001 From: Haoxiang Li Date: Mon, 15 Sep 2025 20:09:38 +0800 Subject: [PATCH 092/249] media: mediatek: vcodec: Fix a reference leak in mtk_vcodec_fw_vpu_init() vpu_get_plat_device() increases the reference count of the returned platform device. However, when devm_kzalloc() fails, the reference is not released, causing a reference leak. Fix this by calling put_device() on fw_pdev->dev before returning on the error path. Fixes: e25a89f743b1 ("media: mtk-vcodec: potential dereference of null pointer") Cc: stable@vger.kernel.org Signed-off-by: Haoxiang Li Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Tzung-Bi Shih Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c index 223fb2294894..3632037f78f5 100644 --- a/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c +++ b/drivers/media/platform/mediatek/vcodec/common/mtk_vcodec_fw_vpu.c @@ -119,8 +119,10 @@ struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(void *priv, enum mtk_vcodec_fw_use vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_vpu_reset_enc_handler, priv, rst_id); fw = devm_kzalloc(&plat_dev->dev, sizeof(*fw), GFP_KERNEL); - if (!fw) + if (!fw) { + put_device(&fw_pdev->dev); return ERR_PTR(-ENOMEM); + } fw->type = VPU; fw->ops = &mtk_vcodec_vpu_msg; fw->pdev = fw_pdev; From 2ce45197befbdc60f72288346c67930db3a4489e Mon Sep 17 00:00:00 2001 From: Pavan Bobba Date: Sat, 13 Sep 2025 16:22:46 +0530 Subject: [PATCH 093/249] media: v4l2-ctrls: add full AV1 profile validation in validate_av1_sequence() Complete the "TODO: PROFILES" by enforcing profile-specific and monochrome constraints as defined by the AV1 specification (Section 5.5.2, "Color config syntax"). The validator now checks: - Flags: reject any unknown bits set in sequence->flags - Profile range: only profiles 0..2 are valid - Profile 0: 8/10-bit only, subsampling must be 4:2:0 (sx=1, sy=1), monochrome allowed - Profile 1: 8/10-bit only, subsampling must be 4:4:4 (sx=0, sy=0), monochrome forbidden - Profile 2: * 8/10-bit: only 4:2:2 allowed (sx=1, sy=0) * 12-bit: 4:4:4 (sx=0, sy=0), 4:2:2 (sx=1, sy=0), or 4:2:0 (sx=1, sy=1) allowed - Monochrome path (all profiles except 1): forces subsampling_x=1, subsampling_y=1, separate_uv_delta_q=0 These checks prevent userspace from providing invalid AV1 sequence headers that would otherwise be accepted, leading to undefined driver or hardware behavior. Signed-off-by: Pavan Bobba Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-ctrls-core.c | 125 +++++++++++++++++----- 1 file changed, 100 insertions(+), 25 deletions(-) diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c index 85d07ef44f62..7c660cd61e48 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c @@ -827,39 +827,114 @@ static int validate_av1_frame(struct v4l2_ctrl_av1_frame *f) return 0; } +/** + * validate_av1_sequence - validate AV1 sequence header fields + * @s: control struct from userspace + * + * Implements AV1 spec §5.5.2 color_config() checks that are + * possible with the current v4l2_ctrl_av1_sequence definition. + * + * TODO: extend validation once additional fields such as + * color_primaries, transfer_characteristics, + * matrix_coefficients, and chroma_sample_position + * are added to the uAPI. + * + * Returns 0 if valid, -EINVAL otherwise. + */ static int validate_av1_sequence(struct v4l2_ctrl_av1_sequence *s) { + const bool mono = s->flags & V4L2_AV1_SEQUENCE_FLAG_MONO_CHROME; + const bool sx = s->flags & V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_X; + const bool sy = s->flags & V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_Y; + const bool uv_dq = s->flags & V4L2_AV1_SEQUENCE_FLAG_SEPARATE_UV_DELTA_Q; + + /* 1. Reject unknown flags */ if (s->flags & - ~(V4L2_AV1_SEQUENCE_FLAG_STILL_PICTURE | - V4L2_AV1_SEQUENCE_FLAG_USE_128X128_SUPERBLOCK | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_FILTER_INTRA | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTRA_EDGE_FILTER | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTERINTRA_COMPOUND | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_MASKED_COMPOUND | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_WARPED_MOTION | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_DUAL_FILTER | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_ORDER_HINT | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_JNT_COMP | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_REF_FRAME_MVS | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_SUPERRES | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_CDEF | - V4L2_AV1_SEQUENCE_FLAG_ENABLE_RESTORATION | - V4L2_AV1_SEQUENCE_FLAG_MONO_CHROME | - V4L2_AV1_SEQUENCE_FLAG_COLOR_RANGE | - V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_X | - V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_Y | - V4L2_AV1_SEQUENCE_FLAG_FILM_GRAIN_PARAMS_PRESENT | - V4L2_AV1_SEQUENCE_FLAG_SEPARATE_UV_DELTA_Q)) + ~(V4L2_AV1_SEQUENCE_FLAG_STILL_PICTURE | + V4L2_AV1_SEQUENCE_FLAG_USE_128X128_SUPERBLOCK | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_FILTER_INTRA | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTRA_EDGE_FILTER | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_INTERINTRA_COMPOUND | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_MASKED_COMPOUND | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_WARPED_MOTION | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_DUAL_FILTER | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_ORDER_HINT | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_JNT_COMP | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_REF_FRAME_MVS | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_SUPERRES | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_CDEF | + V4L2_AV1_SEQUENCE_FLAG_ENABLE_RESTORATION | + V4L2_AV1_SEQUENCE_FLAG_MONO_CHROME | + V4L2_AV1_SEQUENCE_FLAG_COLOR_RANGE | + V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_X | + V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_Y | + V4L2_AV1_SEQUENCE_FLAG_FILM_GRAIN_PARAMS_PRESENT | + V4L2_AV1_SEQUENCE_FLAG_SEPARATE_UV_DELTA_Q)) return -EINVAL; - if (s->seq_profile == 1 && s->flags & V4L2_AV1_SEQUENCE_FLAG_MONO_CHROME) - return -EINVAL; - - /* reserved */ + /* 2. Profile range */ if (s->seq_profile > 2) return -EINVAL; - /* TODO: PROFILES */ + /* 3. Monochrome shortcut */ + if (mono) { + /* Profile 1 forbids monochrome */ + if (s->seq_profile == 1) + return -EINVAL; + + /* Mono → subsampling must look like 4:0:0: sx=1, sy=1 */ + if (!sx || !sy) + return -EINVAL; + + /* separate_uv_delta_q must be 0 */ + if (uv_dq) + return -EINVAL; + + return 0; + } + + /* 4. Profile-specific rules */ + switch (s->seq_profile) { + case 0: + /* Profile 0: only 8/10-bit, subsampling=4:2:0 (sx=1, sy=1) */ + if (s->bit_depth != 8 && s->bit_depth != 10) + return -EINVAL; + if (!(sx && sy)) + return -EINVAL; + break; + + case 1: + /* Profile 1: only 8/10-bit, subsampling=4:4:4 (sx=0, sy=0) */ + if (s->bit_depth != 8 && s->bit_depth != 10) + return -EINVAL; + if (sx || sy) + return -EINVAL; + break; + + case 2: + /* Profile 2: 8/10/12-bit allowed */ + if (s->bit_depth != 8 && s->bit_depth != 10 && + s->bit_depth != 12) + return -EINVAL; + + if (s->bit_depth == 12) { + if (!sx) { + /* 4:4:4 → sy must be 0 */ + if (sy) + return -EINVAL; + } else { + /* sx=1 → sy=0 (4:2:2) or sy=1 (4:2:0) */ + if (sy != 0 && sy != 1) + return -EINVAL; + } + } else { + /* 8/10-bit → only 4:2:2 allowed (sx=1, sy=0) */ + if (!(sx && !sy)) + return -EINVAL; + } + break; + } + return 0; } From 277f507fb1ece3c2050b75594d64b050590cc82b Mon Sep 17 00:00:00 2001 From: Matthias Fend Date: Mon, 1 Sep 2025 17:13:36 +0200 Subject: [PATCH 094/249] media: allegro: print warning if channel creation timeout occurs This message can be helpful for troubleshooting and there is already a corresponding message in case of a channel destroy timeout. Add a similar message for channel creation. Signed-off-by: Matthias Fend Reviewed-by: Nicolas Dufresne Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- drivers/media/platform/allegro-dvt/allegro-core.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index f347d56ac108..be56ef682845 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -2602,8 +2602,14 @@ static int allegro_create_channel(struct allegro_channel *channel) allegro_mcu_send_create_channel(dev, channel); time_left = wait_for_completion_timeout(&channel->completion, msecs_to_jiffies(5000)); - if (time_left == 0) + if (time_left == 0) { + v4l2_warn(&dev->v4l2_dev, + "user %d: timeout while creating channel\n", + channel->user_id); + channel->error = -ETIMEDOUT; + } + if (channel->error) goto err; From 62190e91b070cf5987f85dddafe82dbfb193999f Mon Sep 17 00:00:00 2001 From: Matthias Fend Date: Mon, 1 Sep 2025 17:13:37 +0200 Subject: [PATCH 095/249] media: allegro: process all pending status mbox messages Under certain circumstances, not every message written by the MCU to the status mailbox may trigger a corresponding interrupt. This is likely when multiple messages are generated in a very short period of time. Since the current implementation only processes one message per interrupt, even if multiple messages are already available in the mailbox, expected messages are either not received or are processed late. This leads to various subsequent problems and causes the driver to no longer function properly. The behavior has been adjusted so that after an interrupt, all messages available in the mailbox are processed. Signed-off-by: Matthias Fend Reviewed-by: Nicolas Dufresne Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/allegro-dvt/allegro-core.c | 42 +++++++++++++++---- 1 file changed, 34 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index be56ef682845..3d531dce8086 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -831,6 +831,20 @@ static int allegro_mbox_write(struct allegro_mbox *mbox, return err; } +static unsigned int allegro_mbox_get_available(struct allegro_mbox *mbox) +{ + struct regmap *sram = mbox->dev->sram; + unsigned int head, tail; + + regmap_read(sram, mbox->head, &head); + regmap_read(sram, mbox->tail, &tail); + + if (tail >= head) + return tail - head; + else + return mbox->size - (head - tail); +} + static ssize_t allegro_mbox_read(struct allegro_mbox *mbox, u32 *dst, size_t nbyte) { @@ -839,11 +853,15 @@ static ssize_t allegro_mbox_read(struct allegro_mbox *mbox, u16 type; } __attribute__ ((__packed__)) *header; struct regmap *sram = mbox->dev->sram; - unsigned int head; + unsigned int available, head; ssize_t size; size_t body_no_wrap; int stride = regmap_get_reg_stride(sram); + available = allegro_mbox_get_available(mbox); + if (available < sizeof(*header)) + return -EAGAIN; + regmap_read(sram, mbox->head, &head); if (head > mbox->size) return -EIO; @@ -857,6 +875,8 @@ static ssize_t allegro_mbox_read(struct allegro_mbox *mbox, return -EIO; if (size > nbyte) return -EINVAL; + if (size > available) + return -EAGAIN; /* * The message might wrap within the mailbox. If the message does not @@ -916,26 +936,27 @@ static int allegro_mbox_send(struct allegro_mbox *mbox, void *msg) * allegro_mbox_notify() - Notify the mailbox about a new message * @mbox: The allegro_mbox to notify */ -static void allegro_mbox_notify(struct allegro_mbox *mbox) +static int allegro_mbox_notify(struct allegro_mbox *mbox) { struct allegro_dev *dev = mbox->dev; union mcu_msg_response *msg; - ssize_t size; u32 *tmp; int err; msg = kmalloc(sizeof(*msg), GFP_KERNEL); if (!msg) - return; + return -ENOMEM; msg->header.version = dev->fw_info->mailbox_version; tmp = kmalloc(mbox->size, GFP_KERNEL); - if (!tmp) + if (!tmp) { + err = -ENOMEM; goto out; + } - size = allegro_mbox_read(mbox, tmp, mbox->size); - if (size < 0) + err = allegro_mbox_read(mbox, tmp, mbox->size); + if (err < 0) goto out; err = allegro_decode_mail(msg, tmp); @@ -947,6 +968,8 @@ static void allegro_mbox_notify(struct allegro_mbox *mbox) out: kfree(tmp); kfree(msg); + + return err; } static int allegro_encoder_buffer_init(struct allegro_dev *dev, @@ -2329,7 +2352,10 @@ static irqreturn_t allegro_irq_thread(int irq, void *data) if (!dev->mbox_status) return IRQ_NONE; - allegro_mbox_notify(dev->mbox_status); + while (allegro_mbox_get_available(dev->mbox_status) > 0) { + if (allegro_mbox_notify(dev->mbox_status)) + break; + } return IRQ_HANDLED; } From 33384002a496408fb8c726c82e12475dceba0b69 Mon Sep 17 00:00:00 2001 From: Matthias Fend Date: Mon, 1 Sep 2025 17:13:36 +0200 Subject: [PATCH 096/249] media: allegro: fix race conditions in channel handling Since the channel list is used in different contexts, it must be ensured that it is always consistent. Also, the channels contained in the list may only be released when they are no longer needed in any context. Add a lock to protect the list and reference handling for the channels. Signed-off-by: Matthias Fend Reviewed-by: Nicolas Dufresne Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/allegro-dvt/allegro-core.c | 64 +++++++++++++++---- 1 file changed, 50 insertions(+), 14 deletions(-) diff --git a/drivers/media/platform/allegro-dvt/allegro-core.c b/drivers/media/platform/allegro-dvt/allegro-core.c index 3d531dce8086..eec0b8b30b7f 100644 --- a/drivers/media/platform/allegro-dvt/allegro-core.c +++ b/drivers/media/platform/allegro-dvt/allegro-core.c @@ -177,6 +177,7 @@ struct allegro_dev { */ unsigned long channel_user_ids; struct list_head channels; + struct mutex channels_lock; }; static const struct regmap_config allegro_regmap_config = { @@ -198,6 +199,7 @@ static const struct regmap_config allegro_sram_config = { }; struct allegro_channel { + struct kref ref; struct allegro_dev *dev; struct v4l2_fh fh; struct v4l2_ctrl_handler ctrl_handler; @@ -430,33 +432,55 @@ static unsigned long allegro_next_user_id(struct allegro_dev *dev) } static struct allegro_channel * -allegro_find_channel_by_user_id(struct allegro_dev *dev, - unsigned int user_id) +allegro_ref_get_channel_by_user_id(struct allegro_dev *dev, + unsigned int user_id) { struct allegro_channel *channel; + guard(mutex)(&dev->channels_lock); + list_for_each_entry(channel, &dev->channels, list) { - if (channel->user_id == user_id) - return channel; + if (channel->user_id == user_id) { + if (kref_get_unless_zero(&channel->ref)) + return channel; + break; + } } return ERR_PTR(-EINVAL); } static struct allegro_channel * -allegro_find_channel_by_channel_id(struct allegro_dev *dev, - unsigned int channel_id) +allegro_ref_get_channel_by_channel_id(struct allegro_dev *dev, + unsigned int channel_id) { struct allegro_channel *channel; + guard(mutex)(&dev->channels_lock); + list_for_each_entry(channel, &dev->channels, list) { - if (channel->mcu_channel_id == channel_id) - return channel; + if (channel->mcu_channel_id == channel_id) { + if (kref_get_unless_zero(&channel->ref)) + return channel; + break; + } } return ERR_PTR(-EINVAL); } +static void allegro_free_channel(struct kref *ref) +{ + struct allegro_channel *channel = container_of(ref, struct allegro_channel, ref); + + kfree(channel); +} + +static int allegro_ref_put_channel(struct allegro_channel *channel) +{ + return kref_put(&channel->ref, allegro_free_channel); +} + static inline bool channel_exists(struct allegro_channel *channel) { return channel->mcu_channel_id != -1; @@ -2186,7 +2210,7 @@ allegro_handle_create_channel(struct allegro_dev *dev, int err = 0; struct create_channel_param param; - channel = allegro_find_channel_by_user_id(dev, msg->user_id); + channel = allegro_ref_get_channel_by_user_id(dev, msg->user_id); if (IS_ERR(channel)) { v4l2_warn(&dev->v4l2_dev, "received %s for unknown user %d\n", @@ -2253,6 +2277,7 @@ allegro_handle_create_channel(struct allegro_dev *dev, out: channel->error = err; complete(&channel->completion); + allegro_ref_put_channel(channel); /* Handled successfully, error is passed via channel->error */ return 0; @@ -2264,7 +2289,7 @@ allegro_handle_destroy_channel(struct allegro_dev *dev, { struct allegro_channel *channel; - channel = allegro_find_channel_by_channel_id(dev, msg->channel_id); + channel = allegro_ref_get_channel_by_channel_id(dev, msg->channel_id); if (IS_ERR(channel)) { v4l2_err(&dev->v4l2_dev, "received %s for unknown channel %d\n", @@ -2277,6 +2302,7 @@ allegro_handle_destroy_channel(struct allegro_dev *dev, "user %d: vcu destroyed channel %d\n", channel->user_id, channel->mcu_channel_id); complete(&channel->completion); + allegro_ref_put_channel(channel); return 0; } @@ -2287,7 +2313,7 @@ allegro_handle_encode_frame(struct allegro_dev *dev, { struct allegro_channel *channel; - channel = allegro_find_channel_by_channel_id(dev, msg->channel_id); + channel = allegro_ref_get_channel_by_channel_id(dev, msg->channel_id); if (IS_ERR(channel)) { v4l2_err(&dev->v4l2_dev, "received %s for unknown channel %d\n", @@ -2297,6 +2323,7 @@ allegro_handle_encode_frame(struct allegro_dev *dev, } allegro_channel_finish_frame(channel, msg); + allegro_ref_put_channel(channel); return 0; } @@ -3082,6 +3109,8 @@ static int allegro_open(struct file *file) if (!channel) return -ENOMEM; + kref_init(&channel->ref); + v4l2_fh_init(&channel->fh, vdev); init_completion(&channel->completion); @@ -3248,7 +3277,10 @@ static int allegro_open(struct file *file) goto error; } - list_add(&channel->list, &dev->channels); + scoped_guard(mutex, &dev->channels_lock) { + list_add(&channel->list, &dev->channels); + } + v4l2_fh_add(&channel->fh, file); allegro_channel_adjust(channel); @@ -3264,17 +3296,20 @@ static int allegro_open(struct file *file) static int allegro_release(struct file *file) { struct allegro_channel *channel = file_to_channel(file); + struct allegro_dev *dev = channel->dev; v4l2_m2m_ctx_release(channel->fh.m2m_ctx); - list_del(&channel->list); + scoped_guard(mutex, &dev->channels_lock) { + list_del(&channel->list); + } v4l2_ctrl_handler_free(&channel->ctrl_handler); v4l2_fh_del(&channel->fh, file); v4l2_fh_exit(&channel->fh); - kfree(channel); + allegro_ref_put_channel(channel); return 0; } @@ -3866,6 +3901,7 @@ static int allegro_probe(struct platform_device *pdev) dev->plat_dev = pdev; init_completion(&dev->init_complete); INIT_LIST_HEAD(&dev->channels); + mutex_init(&dev->channels_lock); mutex_init(&dev->lock); From ea299a2164262ff787c9d33f46049acccd120672 Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 20 Oct 2025 07:53:41 +0000 Subject: [PATCH 097/249] media: renesas: fdp1: Use %pe format specifier The %pe format specifier is designed to print error pointers. It prints a symbolic error name (eg. -EINVAL) and it makes the code simpler by omitting PTR_ERR() This patch fixes this cocci report: ./platform/renesas/rcar_fdp1.c:2303:4-11: WARNING: Consider using %pe to print PTR_ERR() Signed-off-by: Ricardo Ribalda Reviewed-by: Kieran Bingham Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rcar_fdp1.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/platform/renesas/rcar_fdp1.c b/drivers/media/platform/renesas/rcar_fdp1.c index 3515601030ec..672869815f63 100644 --- a/drivers/media/platform/renesas/rcar_fdp1.c +++ b/drivers/media/platform/renesas/rcar_fdp1.c @@ -2299,8 +2299,7 @@ static int fdp1_probe(struct platform_device *pdev) fdp1->fcp = rcar_fcp_get(fcp_node); of_node_put(fcp_node); if (IS_ERR(fdp1->fcp)) { - dev_dbg(&pdev->dev, "FCP not found (%ld)\n", - PTR_ERR(fdp1->fcp)); + dev_dbg(&pdev->dev, "FCP not found (%pe)\n", fdp1->fcp); return PTR_ERR(fdp1->fcp); } } From c218ce4f98eccf5a40de64c559c52d61e9cc78ee Mon Sep 17 00:00:00 2001 From: Pavan Bobba Date: Tue, 28 Oct 2025 11:56:23 +0530 Subject: [PATCH 098/249] media: v4l2-ctrls: set AV1 sequence flags for testing Initialize additional AV1 sequence parameters in std_init_compound() to make the default AV1 sequence control compatible with compliance and userspace testing tools. Specifically, set: - enable both SUBSAMPLING_X and SUBSAMPLING_Y flags These defaults help ensure that V4L2_CID_AV1_SEQUENCE behaves consistently during validation and v4l2-compliance tests. Signed-off-by: Pavan Bobba Reviewed-by: Nicolas Dufresne [hverkuil: align everything a bit better] [hverkuil: replaced Pavan's comment with comment suggested by Nicolas] Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-ctrls-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ctrls-core.c b/drivers/media/v4l2-core/v4l2-ctrls-core.c index 7c660cd61e48..209bc05883bb 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-core.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-core.c @@ -160,7 +160,13 @@ static void std_init_compound(const struct v4l2_ctrl *ctrl, u32 idx, break; case V4L2_CTRL_TYPE_AV1_SEQUENCE: p_av1_sequence = p; + /* + * The initial profile is 0 which only allows YUV 420 subsampled + * data. Set the subsampling flags accordingly. + */ p_av1_sequence->bit_depth = 8; + p_av1_sequence->flags |= V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_X | + V4L2_AV1_SEQUENCE_FLAG_SUBSAMPLING_Y; break; case V4L2_CTRL_TYPE_FWHT_PARAMS: p_fwht_params = p; From ebe5523ec32c5be6bf2523502a44231764a93df1 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Mon, 22 Sep 2025 14:10:55 +0300 Subject: [PATCH 099/249] media: MAINTAINERS: Assign ov08x40 driver to Jimmy Wentong's e-mail no longer works; assign the ov08x40 driver to Jimmy Su. Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- MAINTAINERS | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index f7351fced572..5be50323d635 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18970,10 +18970,9 @@ T: git git://linuxtv.org/media.git F: drivers/media/i2c/ov08d10.c OMNIVISION OV08X40 SENSOR DRIVER -M: Jason Chen +M: Jimmy Su L: linux-media@vger.kernel.org S: Maintained -T: git git://linuxtv.org/media.git F: drivers/media/i2c/ov08x40.c F: Documentation/devicetree/bindings/media/i2c/ovti,ov08x40.yaml From 765abb76f51f217405fe91176c680dff4d7b8c25 Mon Sep 17 00:00:00 2001 From: Ma Ke Date: Mon, 29 Sep 2025 09:30:07 +0800 Subject: [PATCH 100/249] media: ivsc: Release csi_dev reference early in mei_ace_setup_dev_link() Put the reference to csi_dev acquired during driver probe in mei_ace_setup_dev_link() inside the same function, instead of during driver unbind in mei_ace_remove(). This can be done as device_link_add() already takes a reference to csi_dev. Signed-off-by: Ma Ke [Sakari Ailus: Rework commit message.] Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ivsc/mei_ace.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/pci/intel/ivsc/mei_ace.c b/drivers/media/pci/intel/ivsc/mei_ace.c index 98310b8511b1..b306a320b70f 100644 --- a/drivers/media/pci/intel/ivsc/mei_ace.c +++ b/drivers/media/pci/intel/ivsc/mei_ace.c @@ -414,10 +414,11 @@ static int mei_ace_setup_dev_link(struct mei_ace *ace) /* setup link between mei_ace and mei_csi */ ace->csi_link = device_link_add(csi_dev, dev, DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE | DL_FLAG_STATELESS); + put_device(csi_dev); if (!ace->csi_link) { ret = -EINVAL; dev_err(dev, "failed to link to %s\n", dev_name(csi_dev)); - goto err_put; + goto err; } ace->csi_dev = csi_dev; @@ -522,7 +523,6 @@ static void mei_ace_remove(struct mei_cl_device *cldev) cancel_work_sync(&ace->work); device_link_del(ace->csi_link); - put_device(ace->csi_dev); pm_runtime_disable(&cldev->dev); pm_runtime_set_suspended(&cldev->dev); From 14e32e62bd1ce0edd6ce3faa0a33cbb8634a9e9d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Apitzsch?= Date: Sat, 20 Sep 2025 14:03:40 +0200 Subject: [PATCH 101/249] dt-bindings: media: i2c: Add DW9718S, DW9719 and DW9761 VCM MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document Dongwoon DW9718S, DW9719 and DW9761 VCM devicetree bindings. Signed-off-by: André Apitzsch Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/dongwoon,dw9719.yaml | 88 +++++++++++++++++++ 1 file changed, 88 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml new file mode 100644 index 000000000000..38db0764c0f7 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9719.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dongwoon Anatech DW9719 Voice Coil Motor (VCM) Controller + +maintainers: + - André Apitzsch + +description: + The Dongwoon DW9718S/9719/9761 is a single 10-bit digital-to-analog converter + with 100 mA output current sink capability, designed for linear control of + voice coil motors (VCM) in camera lenses. This chip provides a Smart Actuator + Control (SAC) mode intended for driving voice coil lenses in camera modules. + +properties: + compatible: + enum: + - dongwoon,dw9718s + - dongwoon,dw9719 + - dongwoon,dw9761 + + reg: + maxItems: 1 + + vdd-supply: + description: VDD power supply + + dongwoon,sac-mode: + description: | + Slew Rate Control mode to use: direct, LSC (Linear Slope Control) or + SAC1-SAC6 (Smart Actuator Control). + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # Direct mode + - 1 # LSC mode + - 2 # SAC1 mode (operation time# 0.32 x Tvib) + - 3 # SAC2 mode (operation time# 0.48 x Tvib) + - 4 # SAC3 mode (operation time# 0.72 x Tvib) + - 5 # SAC4 mode (operation time# 1.20 x Tvib) + - 6 # SAC5 mode (operation time# 1.64 x Tvib) + - 7 # SAC6 mode (operation time# 1.88 x Tvib) + default: 4 + + dongwoon,vcm-prescale: + description: + Indication of VCM switching frequency dividing rate select. + $ref: /schemas/types.yaml#/definitions/uint32 + +required: + - compatible + - reg + - vdd-supply + +allOf: + - if: + properties: + compatible: + contains: + const: dongwoon,dw9718s + then: + properties: + dongwoon,vcm-prescale: + description: + The final frequency is 10 MHz divided by (value + 2). + maximum: 15 + default: 0 + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + actuator@c { + compatible = "dongwoon,dw9718s"; + reg = <0x0c>; + + vdd-supply = <&pm8937_l17>; + + dongwoon,sac-mode = <4>; + dongwoon,vcm-prescale = <0>; + }; + }; From 36e98b0406e10f6581d9ef35bacedc9d78284bc1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Apitzsch?= Date: Sat, 20 Sep 2025 14:03:41 +0200 Subject: [PATCH 102/249] media: i2c: dw9719: Deprecate dongwoon,vcm-freq MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The name of property "dongwoon,vcm-freq" doesn't match its purpose. Change the name of the property to "dongwoon,vcm-prescale" to better describe its purpose and deprecate the old one. Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 032fbcb981f2..5ed0042fce18 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -82,6 +82,7 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) { u64 val; int ret; + int err; ret = regulator_enable(dw9719->regulator); if (ret) @@ -123,7 +124,13 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) &dw9719->sac_mode); /* Optional indication of VCM frequency */ - device_property_read_u32(dw9719->dev, "dongwoon,vcm-freq", + err = device_property_read_u32(dw9719->dev, "dongwoon,vcm-freq", + &dw9719->vcm_freq); + if (err == 0) + dev_warn(dw9719->dev, "dongwoon,vcm-freq property is deprecated, please use dongwoon,vcm-prescale\n"); + + /* Optional indication of VCM prescale */ + device_property_read_u32(dw9719->dev, "dongwoon,vcm-prescale", &dw9719->vcm_freq); } From 15faf0fa1472d1da301498a2e33cdaffe84bc4f1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Apitzsch?= Date: Sat, 20 Sep 2025 14:03:42 +0200 Subject: [PATCH 103/249] media: i2c: dw9719: Remove unused i2c device id table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Nothing depends on the I²C device ID table, so remove it. Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 5ed0042fce18..8d83e6fb4781 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -360,13 +360,6 @@ static void dw9719_remove(struct i2c_client *client) pm_runtime_set_suspended(&client->dev); } -static const struct i2c_device_id dw9719_id_table[] = { - { "dw9719" }, - { "dw9761" }, - { } -}; -MODULE_DEVICE_TABLE(i2c, dw9719_id_table); - static DEFINE_RUNTIME_DEV_PM_OPS(dw9719_pm_ops, dw9719_suspend, dw9719_resume, NULL); @@ -377,7 +370,6 @@ static struct i2c_driver dw9719_i2c_driver = { }, .probe = dw9719_probe, .remove = dw9719_remove, - .id_table = dw9719_id_table, }; module_i2c_driver(dw9719_i2c_driver); From af14ba3622b031752e1b4b68421d8cfde01e929e Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sat, 20 Sep 2025 14:03:43 +0200 Subject: [PATCH 104/249] media: i2c: dw9719: Add an of_match_table MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow the dw9719 driver to be attached via FDT. Signed-off-by: Val Packett Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 8d83e6fb4781..d2af2c6fcd67 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -360,6 +360,13 @@ static void dw9719_remove(struct i2c_client *client) pm_runtime_set_suspended(&client->dev); } +static const struct of_device_id dw9719_of_table[] = { + { .compatible = "dongwoon,dw9719" }, + { .compatible = "dongwoon,dw9761" }, + { } +}; +MODULE_DEVICE_TABLE(of, dw9719_of_table); + static DEFINE_RUNTIME_DEV_PM_OPS(dw9719_pm_ops, dw9719_suspend, dw9719_resume, NULL); @@ -367,6 +374,7 @@ static struct i2c_driver dw9719_i2c_driver = { .driver = { .name = "dw9719", .pm = pm_sleep_ptr(&dw9719_pm_ops), + .of_match_table = dw9719_of_table, }, .probe = dw9719_probe, .remove = dw9719_remove, From a6119d1e70d5d8edfab81dbac9e5bc648e28c93c Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sat, 20 Sep 2025 14:03:44 +0200 Subject: [PATCH 105/249] media: i2c: dw9719: Add driver_data matching MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit In preparation for adding models with different register sets, start assigning the model based on the i2c match data. Signed-off-by: Val Packett Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index d2af2c6fcd67..5dc4126909b7 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -282,6 +282,8 @@ static int dw9719_probe(struct i2c_client *client) if (!dw9719) return -ENOMEM; + dw9719->model = (enum dw9719_model)(uintptr_t)i2c_get_match_data(client); + dw9719->regmap = devm_cci_regmap_init_i2c(client, 8); if (IS_ERR(dw9719->regmap)) return PTR_ERR(dw9719->regmap); @@ -361,8 +363,8 @@ static void dw9719_remove(struct i2c_client *client) } static const struct of_device_id dw9719_of_table[] = { - { .compatible = "dongwoon,dw9719" }, - { .compatible = "dongwoon,dw9761" }, + { .compatible = "dongwoon,dw9719", .data = (const void *)DW9719 }, + { .compatible = "dongwoon,dw9761", .data = (const void *)DW9761 }, { } }; MODULE_DEVICE_TABLE(of, dw9719_of_table); From b327384a1349fbbf2777307a66282bf769f994c0 Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sat, 20 Sep 2025 14:03:45 +0200 Subject: [PATCH 106/249] media: i2c: dw9719: Add DW9718S support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The DW9718S is a similar part that uses a different register set but follows the same method of operation otherwise. Add support for it to the existing dw9719 driver. Tested on the Moto E5 (motorola-nora) smartphone. Signed-off-by: Val Packett Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 67 +++++++++++++++++++++++++++++++++----- 1 file changed, 58 insertions(+), 9 deletions(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 5dc4126909b7..5e3a200db3b5 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -23,6 +23,25 @@ #define DW9719_CTRL_STEPS 16 #define DW9719_CTRL_DELAY_US 1000 +#define DW9718S_PD CCI_REG8(0) + +#define DW9718S_CONTROL CCI_REG8(1) +#define DW9718S_CONTROL_SW_LINEAR BIT(0) +#define DW9718S_CONTROL_SAC_SHIFT 1 +#define DW9718S_CONTROL_SAC_MASK 0x7 +#define DW9718S_CONTROL_OCP_DISABLE BIT(4) +#define DW9718S_CONTROL_UVLO_DISABLE BIT(5) +#define DW9718S_DEFAULT_SAC 4 + +#define DW9718S_VCM_CURRENT CCI_REG16(2) + +#define DW9718S_SW CCI_REG8(4) +#define DW9718S_SW_VCM_FREQ_MASK 0xF +#define DW9718S_DEFAULT_VCM_FREQ 0 + +#define DW9718S_SACT CCI_REG8(5) +#define DW9718S_SACT_PERIOD_8_8MS 0x19 + #define DW9719_INFO CCI_REG8(0) #define DW9719_ID 0xF1 #define DW9761_ID 0xF4 @@ -53,6 +72,7 @@ #define to_dw9719_device(x) container_of(x, struct dw9719_device, sd) enum dw9719_model { + DW9718S, DW9719, DW9761, }; @@ -80,6 +100,7 @@ static int dw9719_power_down(struct dw9719_device *dw9719) static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) { + u32 reg_pwr; u64 val; int ret; int err; @@ -89,13 +110,21 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) return ret; /* Jiggle SCL pin to wake up device */ - cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_SHUTDOWN, &ret); + reg_pwr = dw9719->model == DW9718S ? DW9718S_PD : DW9719_CONTROL; + cci_write(dw9719->regmap, reg_pwr, DW9719_SHUTDOWN, &ret); fsleep(100); - cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_STANDBY, &ret); + cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, &ret); /* Need 100us to transit from SHUTDOWN to STANDBY */ fsleep(100); if (detect) { + /* This model does not have an INFO register */ + if (dw9719->model == DW9718S) { + dw9719->sac_mode = DW9718S_DEFAULT_SAC; + dw9719->vcm_freq = DW9718S_DEFAULT_VCM_FREQ; + goto props; + } + ret = cci_read(dw9719->regmap, DW9719_INFO, &val, NULL); if (ret < 0) return ret; @@ -119,6 +148,7 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) return -ENXIO; } +props: /* Optional indication of SAC mode select */ device_property_read_u32(dw9719->dev, "dongwoon,sac-mode", &dw9719->sac_mode); @@ -134,14 +164,30 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) &dw9719->vcm_freq); } - cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret); - cci_write(dw9719->regmap, DW9719_MODE, dw9719->mode_low_bits | - (dw9719->sac_mode << DW9719_MODE_SAC_SHIFT), &ret); - cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret); - - if (dw9719->model == DW9761) + switch (dw9719->model) { + case DW9718S: + /* Datasheet says [OCP/UVLO] should be disabled below 2.5V */ + dw9719->sac_mode &= DW9718S_CONTROL_SAC_MASK; + cci_write(dw9719->regmap, DW9718S_CONTROL, + DW9718S_CONTROL_SW_LINEAR | + (dw9719->sac_mode << DW9718S_CONTROL_SAC_SHIFT) | + DW9718S_CONTROL_OCP_DISABLE | + DW9718S_CONTROL_UVLO_DISABLE, &ret); + cci_write(dw9719->regmap, DW9718S_SACT, + DW9718S_SACT_PERIOD_8_8MS, &ret); + cci_write(dw9719->regmap, DW9718S_SW, + dw9719->vcm_freq & DW9718S_SW_VCM_FREQ_MASK, &ret); + break; + case DW9761: cci_write(dw9719->regmap, DW9761_VCM_PRELOAD, DW9761_DEFAULT_VCM_PRELOAD, &ret); + fallthrough; + case DW9719: + cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret); + cci_write(dw9719->regmap, DW9719_MODE, dw9719->mode_low_bits | + (dw9719->sac_mode << DW9719_MODE_SAC_SHIFT), &ret); + cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret); + } if (ret) dw9719_power_down(dw9719); @@ -151,7 +197,9 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) static int dw9719_t_focus_abs(struct dw9719_device *dw9719, s32 value) { - return cci_write(dw9719->regmap, DW9719_VCM_CURRENT, value, NULL); + u32 reg = dw9719->model == DW9718S ? DW9718S_VCM_CURRENT + : DW9719_VCM_CURRENT; + return cci_write(dw9719->regmap, reg, value, NULL); } static int dw9719_set_ctrl(struct v4l2_ctrl *ctrl) @@ -363,6 +411,7 @@ static void dw9719_remove(struct i2c_client *client) } static const struct of_device_id dw9719_of_table[] = { + { .compatible = "dongwoon,dw9718s", .data = (const void *)DW9718S }, { .compatible = "dongwoon,dw9719", .data = (const void *)DW9719 }, { .compatible = "dongwoon,dw9761", .data = (const void *)DW9761 }, { } From 5e18755738632d3c5aaaddd45b76520f78e6d8d4 Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sat, 20 Sep 2025 14:03:46 +0200 Subject: [PATCH 107/249] media: i2c: dw9719: Update PM last busy time upon close MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Update the close callback to match other similar drivers like dw9768. Signed-off-by: Val Packett Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 5e3a200db3b5..a24594523030 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -284,7 +284,7 @@ static int dw9719_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) static int dw9719_close(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) { - pm_runtime_put(sd->dev); + pm_runtime_put_autosuspend(sd->dev); return 0; } From a4b325c23e0453cff1bcec260dfd4bc092a11285 Mon Sep 17 00:00:00 2001 From: Val Packett Date: Sat, 20 Sep 2025 14:03:47 +0200 Subject: [PATCH 108/249] media: i2c: dw9719: Fix power on/off sequence MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The "jiggle" code was not actually expecting failure, which it should because that's what actually happens when the device wasn't already woken up by the regulator power-on (i.e. in the case of a shared regulator). Also, do actually enter the internal suspend mode on shutdown, to save power in the case of a shared regulator. Also, wait a bit longer (2x tOPR) on waking up, 1x is not enough at least on the DW9718S as found on the motorola-nora smartphone. Signed-off-by: Val Packett Signed-off-by: André Apitzsch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index a24594523030..3627e78b8b66 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -95,12 +95,20 @@ struct dw9719_device { static int dw9719_power_down(struct dw9719_device *dw9719) { + u32 reg_pwr = dw9719->model == DW9718S ? DW9718S_PD : DW9719_CONTROL; + + /* + * Worth engaging the internal SHUTDOWN mode especially due to the + * regulator being potentially shared with other devices. + */ + if (cci_write(dw9719->regmap, reg_pwr, DW9719_SHUTDOWN, NULL)) + dev_err(dw9719->dev, "Error writing to power register\n"); return regulator_disable(dw9719->regulator); } static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) { - u32 reg_pwr; + u32 reg_pwr = dw9719->model == DW9718S ? DW9718S_PD : DW9719_CONTROL; u64 val; int ret; int err; @@ -109,13 +117,17 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) if (ret) return ret; - /* Jiggle SCL pin to wake up device */ - reg_pwr = dw9719->model == DW9718S ? DW9718S_PD : DW9719_CONTROL; - cci_write(dw9719->regmap, reg_pwr, DW9719_SHUTDOWN, &ret); - fsleep(100); + /* + * Need 100us to transition from SHUTDOWN to STANDBY. + * Jiggle the SCL pin to wake up the device (even when the regulator is + * shared) and wait double the time to be sure, as 100us is not enough + * at least on the DW9718S as found on the motorola-nora smartphone, + * then retry the write. + */ + cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, NULL); + /* the jiggle is expected to fail, don't even log that as error */ + fsleep(200); cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, &ret); - /* Need 100us to transit from SHUTDOWN to STANDBY */ - fsleep(100); if (detect) { /* This model does not have an INFO register */ From e470f1bb4455c5a57633159f9748efba03e199ce Mon Sep 17 00:00:00 2001 From: Griffin Kroah-Hartman Date: Thu, 16 Oct 2025 13:35:22 +0200 Subject: [PATCH 109/249] dt-bindings: media: i2c: dw9719: Document DW9800K Document the Dongwoon Anatech DW9800K. Acked-by: Rob Herring (Arm) Signed-off-by: Griffin Kroah-Hartman Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml index 38db0764c0f7..8e8d62436e0d 100644 --- a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml +++ b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9719.yaml @@ -21,6 +21,7 @@ properties: - dongwoon,dw9718s - dongwoon,dw9719 - dongwoon,dw9761 + - dongwoon,dw9800k reg: maxItems: 1 From 083f7f0dce16ef7c62e016dd558643a8ca32e9ba Mon Sep 17 00:00:00 2001 From: Griffin Kroah-Hartman Date: Thu, 16 Oct 2025 13:35:23 +0200 Subject: [PATCH 110/249] media: i2c: dw9719: Add DW9800K support The DW9800K is a similar part to the DW9719. The method for operation is the same as the DW9719, but the register set is different. Add support for this part to the existing dw9719 driver. Tested on the Fairphone 5 smartphone. Tested-by: Luca Weiss Signed-off-by: Griffin Kroah-Hartman Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/dw9719.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/dw9719.c b/drivers/media/i2c/dw9719.c index 3627e78b8b66..59558335989e 100644 --- a/drivers/media/i2c/dw9719.c +++ b/drivers/media/i2c/dw9719.c @@ -68,6 +68,9 @@ #define DW9761_VCM_PRELOAD CCI_REG8(8) #define DW9761_DEFAULT_VCM_PRELOAD 0x73 +#define DW9800K_DEFAULT_SAC 1 +#define DW9800K_MODE_SAC_SHIFT 6 +#define DW9800K_DEFAULT_VCM_FREQ 0x10 #define to_dw9719_device(x) container_of(x, struct dw9719_device, sd) @@ -75,6 +78,7 @@ enum dw9719_model { DW9718S, DW9719, DW9761, + DW9800K, }; struct dw9719_device { @@ -130,11 +134,18 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) cci_write(dw9719->regmap, reg_pwr, DW9719_STANDBY, &ret); if (detect) { - /* This model does not have an INFO register */ - if (dw9719->model == DW9718S) { + /* These models do not have an INFO register */ + switch (dw9719->model) { + case DW9718S: dw9719->sac_mode = DW9718S_DEFAULT_SAC; dw9719->vcm_freq = DW9718S_DEFAULT_VCM_FREQ; goto props; + case DW9800K: + dw9719->sac_mode = DW9800K_DEFAULT_SAC; + dw9719->vcm_freq = DW9800K_DEFAULT_VCM_FREQ; + goto props; + default: + break; } ret = cci_read(dw9719->regmap, DW9719_INFO, &val, NULL); @@ -177,6 +188,12 @@ static int dw9719_power_up(struct dw9719_device *dw9719, bool detect) } switch (dw9719->model) { + case DW9800K: + cci_write(dw9719->regmap, DW9719_CONTROL, DW9719_ENABLE_RINGING, &ret); + cci_write(dw9719->regmap, DW9719_MODE, + dw9719->sac_mode << DW9800K_MODE_SAC_SHIFT, &ret); + cci_write(dw9719->regmap, DW9719_VCM_FREQ, dw9719->vcm_freq, &ret); + break; case DW9718S: /* Datasheet says [OCP/UVLO] should be disabled below 2.5V */ dw9719->sac_mode &= DW9718S_CONTROL_SAC_MASK; @@ -426,6 +443,7 @@ static const struct of_device_id dw9719_of_table[] = { { .compatible = "dongwoon,dw9718s", .data = (const void *)DW9718S }, { .compatible = "dongwoon,dw9719", .data = (const void *)DW9719 }, { .compatible = "dongwoon,dw9761", .data = (const void *)DW9761 }, + { .compatible = "dongwoon,dw9800k", .data = (const void *)DW9800K }, { } }; MODULE_DEVICE_TABLE(of, dw9719_of_table); From 577242cdcbc5e525530ecb486df8a10b2af89597 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 14 Oct 2025 14:55:09 -0400 Subject: [PATCH 111/249] dt-bindings: media: Convert ti,tvp5150.txt to yaml format. Convert ti,tvp5150.txt to yaml format. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Reviewed-by: David Heidelberg [Sakari Ailus: Align the endpoint properties to the right column.] Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/ti,tvp5150.txt | 157 ------------------ .../bindings/media/i2c/ti,tvp5150.yaml | 133 +++++++++++++++ 2 files changed, 133 insertions(+), 157 deletions(-) delete mode 100644 Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt create mode 100644 Documentation/devicetree/bindings/media/i2c/ti,tvp5150.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt deleted file mode 100644 index 94b908ace53c..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.txt +++ /dev/null @@ -1,157 +0,0 @@ -* Texas Instruments TVP5150 and TVP5151 video decoders - -The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL -(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV -with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats. - -Required Properties: -==================== -- compatible: Value must be "ti,tvp5150". -- reg: I2C slave address. - -Optional Properties: -==================== -- pdn-gpios: Phandle for the GPIO connected to the PDN pin, if any. -- reset-gpios: Phandle for the GPIO connected to the RESETB pin, if any. - -The device node must contain one 'port' child node per device physical input -and output port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. The port nodes -are numbered as follows - - Name Type Port - -------------------------------------- - AIP1A sink 0 - AIP1B sink 1 - Y-OUT src 2 - -The device node must contain at least one sink port and the src port. Each input -port must be linked to an endpoint defined in [1]. The port/connector layout is -as follows - -tvp-5150 port@0 (AIP1A) - endpoint@0 -----------> Comp0-Con port - endpoint@1 ------+----> Svideo-Con port -tvp-5150 port@1 (AIP1B) | - endpoint@1 ------+ - endpoint@0 -----------> Comp1-Con port -tvp-5150 port@2 - endpoint (video bitstream output at YOUT[0-7] parallel bus) - -Required Endpoint Properties for parallel synchronization on output port: -========================================================================= - -- hsync-active: Active state of the HSYNC signal. Must be <1> (HIGH). -- vsync-active: Active state of the VSYNC signal. Must be <1> (HIGH). -- field-even-active: Field signal level during the even field data - transmission. Must be <0>. - -Note: Do not specify any of these properties if you want to use the embedded - BT.656 synchronization. - -Optional Connector Properties: -============================== - -- sdtv-standards: Set the possible signals to which the hardware tries to lock - instead of using the autodetection mechanism. Please look at - [1] for more information. - -[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml. - -Example - three input sources: -#include - -comp_connector_0 { - compatible = "composite-video-connector"; - label = "Composite0"; - sdtv-standards = ; /* limit to pal-m signals */ - - port { - composite0_to_tvp5150: endpoint { - remote-endpoint = <&tvp5150_to_composite0>; - }; - }; -}; - -comp_connector_1 { - compatible = "composite-video-connector"; - label = "Composite1"; - sdtv-standards = ; /* limit to ntsc-m signals */ - - port { - composite1_to_tvp5150: endpoint { - remote-endpoint = <&tvp5150_to_composite1>; - }; - }; -}; - -svideo_connector { - compatible = "svideo-connector"; - label = "S-Video"; - - port { - #address-cells = <1>; - #size-cells = <0>; - - svideo_luma_to_tvp5150: endpoint@0 { - reg = <0>; - remote-endpoint = <&tvp5150_to_svideo_luma>; - }; - - svideo_chroma_to_tvp5150: endpoint@1 { - reg = <1>; - remote-endpoint = <&tvp5150_to_svideo_chroma>; - }; - }; -}; - -&i2c2 { - tvp5150@5c { - compatible = "ti,tvp5150"; - reg = <0x5c>; - pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - - tvp5150_to_composite0: endpoint@0 { - reg = <0>; - remote-endpoint = <&composite0_to_tvp5150>; - }; - - tvp5150_to_svideo_luma: endpoint@1 { - reg = <1>; - remote-endpoint = <&svideo_luma_to_tvp5150>; - }; - }; - - port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - - tvp5150_to_composite1: endpoint@0 { - reg = <0>; - remote-endpoint = <&composite1_to_tvp5150>; - }; - - tvp5150_to_svideo_chroma: endpoint@1 { - reg = <1>; - remote-endpoint = <&svideo_chroma_to_tvp5150>; - }; - }; - - port@2 { - reg = <2>; - - tvp5150_1: endpoint { - remote-endpoint = <&ccdc_ep>; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.yaml b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.yaml new file mode 100644 index 000000000000..382a29652a05 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ti,tvp5150.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ti,tvp5150.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TVP5150 and TVP5151 video decoders + +maintainers: + - Frank Li + +description: + The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL + (and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV + with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats. + +properties: + compatible: + const: ti,tvp5150 + + reg: + maxItems: 1 + + pdn-gpios: + maxItems: 1 + + reset-gpios: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + sink port node, AIP1A + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + sink port node, AIP1B + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + source port node, Y-OUT + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - port@2 + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@5c { + compatible = "ti,tvp5150"; + reg = <0x5c>; + pdn-gpios = <&gpio4 30 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio6 7 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + endpoint@0 { + reg = <0>; + remote-endpoint = <&composite0_to_tvp5150>; + }; + + endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_luma_to_tvp5150>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + endpoint@0 { + reg = <0>; + remote-endpoint = <&composite1_to_tvp5150>; + }; + + endpoint@1 { + reg = <1>; + remote-endpoint = <&svideo_chroma_to_tvp5150>; + }; + }; + + port@2 { + reg = <2>; + + endpoint { + remote-endpoint = <&ccdc_ep>; + }; + }; + }; + }; From c423487bf66740b111c99ecf19fa7f6607a41431 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Wed, 15 Oct 2025 11:48:11 -0400 Subject: [PATCH 112/249] dt-bindings: media: convert nxp,tda1997x.txt to yaml format Convert nxp,tda1997x.txt to yaml format Additional changes: - update audio width to 8, 16, 24, 32. - keep one example only. Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/nxp,tda19971.yaml | 162 ++++++++++++++++ .../bindings/media/i2c/nxp,tda1997x.txt | 178 ------------------ 2 files changed, 162 insertions(+), 178 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/i2c/nxp,tda19971.yaml delete mode 100644 Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt diff --git a/Documentation/devicetree/bindings/media/i2c/nxp,tda19971.yaml b/Documentation/devicetree/bindings/media/i2c/nxp,tda19971.yaml new file mode 100644 index 000000000000..477e59316dfa --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/nxp,tda19971.yaml @@ -0,0 +1,162 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/nxp,tda19971.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP TDA1997x HDMI receiver + +maintainers: + - Frank Li + +description: | + The TDA19971/73 are HDMI video receivers. + + The TDA19971 Video port output pins can be used as follows: + - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] + - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] + - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] + - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] + - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] + - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) + - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) + + The TDA19973 Video port output pins can be used as follows: + - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0] + - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0] + - YUV422 semi-planar 12bit per component (24 bits total): Y[11:0] CbCr[11:0] + - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) + + The Video port output pins are mapped via 4-bit 'pin groups' allowing + for a variety of connection possibilities including swapping pin order within + pin groups. The video_portcfg device-tree property consists of register mapping + pairs which map a chip-specific VP output register to a 4-bit pin group. If + the pin group needs to be bit-swapped you can use the *_S pin-group defines. + +properties: + compatible: + enum: + - nxp,tda19971 + - nxp,tda19973 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + DOVDD-supply: true + + DVDD-supply: true + + AVDD-supply: true + + '#sound-dai-cells': + const: 0 + + port: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + nxp,vidout-portcfg: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + minItems: 1 + maxItems: 4 + items: + items: + - description: Video Port control registers index. + maximum: 8 + minimum: 0 + - description: pin(pinswapped) groups + + description: + array of pairs mapping VP output pins to pin groups. + + nxp,audout-format: + enum: + - i2s + - spdif + + nxp,audout-width: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16, 24, 32] + description: + width of audio output data bus. + + nxp,audout-layout: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: + data layout (0=AP0 used, 1=AP0/AP1/AP2/AP3 used). + + nxp,audout-mclk-fs: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Multiplication factor between stream rate and codec mclk. + +required: + - compatible + - reg + - interrupts + - DOVDD-supply + - AVDD-supply + - DVDD-supply + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hdmi-receiver@48 { + compatible = "nxp,tda19971"; + reg = <0x48>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tda1997x>; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + DOVDD-supply = <®_3p3v>; + AVDD-supply = <®_1p8v>; + DVDD-supply = <®_1p8v>; + /* audio */ + #sound-dai-cells = <0>; + nxp,audout-format = "i2s"; + nxp,audout-layout = <0>; + nxp,audout-width = <16>; + nxp,audout-mclk-fs = <128>; + /* + * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] + * and Y[11:4] across 16bits in the same pixclk cycle. + */ + nxp,vidout-portcfg = + /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ + < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, + /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ + < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, + /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ + < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, + /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ + < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; + + port { + endpoint { + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; + bus-width = <16>; + hsync-active = <1>; + vsync-active = <1>; + data-active = <1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt b/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt deleted file mode 100644 index e76167999d76..000000000000 --- a/Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt +++ /dev/null @@ -1,178 +0,0 @@ -Device-Tree bindings for the NXP TDA1997x HDMI receiver - -The TDA19971/73 are HDMI video receivers. - -The TDA19971 Video port output pins can be used as follows: - - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4] - - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4] - - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4] - - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2] - - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0] - - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles) - - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles) - - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) - -The TDA19973 Video port output pins can be used as follows: - - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0] - - YUV444 12bit per color (36 bits total): Y[11:0] Cb[11:0] Cr[11:0] - - YUV422 semi-planar 12bit per component (24 bits total): Y[11:0] CbCr[11:0] - - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles) - -The Video port output pins are mapped via 4-bit 'pin groups' allowing -for a variety of connection possibilities including swapping pin order within -pin groups. The video_portcfg device-tree property consists of register mapping -pairs which map a chip-specific VP output register to a 4-bit pin group. If -the pin group needs to be bit-swapped you can use the *_S pin-group defines. - -Required Properties: - - compatible : - - "nxp,tda19971" for the TDA19971 - - "nxp,tda19973" for the TDA19973 - - reg : I2C slave address - - interrupts : The interrupt number - - DOVDD-supply : Digital I/O supply - - DVDD-supply : Digital Core supply - - AVDD-supply : Analog supply - - nxp,vidout-portcfg : array of pairs mapping VP output pins to pin groups. - -Optional Properties: - - nxp,audout-format : DAI bus format: "i2s" or "spdif". - - nxp,audout-width : width of audio output data bus (1-4). - - nxp,audout-layout : data layout (0=AP0 used, 1=AP0/AP1/AP2/AP3 used). - - nxp,audout-mclk-fs : Multiplication factor between stream rate and codec - mclk. - -The port node shall contain one endpoint child node for its digital -output video port, in accordance with the video interface bindings defined in -Documentation/devicetree/bindings/media/video-interfaces.txt. - -Optional Endpoint Properties: - The following three properties are defined in video-interfaces.txt and - are valid for the output parallel bus endpoint: - - hsync-active: Horizontal synchronization polarity. Defaults to active high. - - vsync-active: Vertical synchronization polarity. Defaults to active high. - - data-active: Data polarity. Defaults to active high. - -Examples: - - VP[15:0] connected to IMX6 CSI_DATA[19:4] for 16bit YUV422 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] - * and Y[11:4] across 16bits in the same pixclk cycle. - */ - nxp,vidout-portcfg = - /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, - /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, - /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ - < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, - /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ - < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; - - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4] - * and Y[11:4] across 16bits in the same pixclk cycle. - */ - nxp,vidout-portcfg = - /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >, - /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >, - /* CbCc[11:8]<->VP[07:04]<->CSI_DATA[11:8] */ - < TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >, - /* CbCr[7:4]<->VP[03:00]<->CSI_DATA[7:4] */ - < TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >; - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; - - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656 - 16bit I2S layout0 with a 128*fs clock (A_WS, AP0, A_CLK pins) - hdmi-receiver@48 { - compatible = "nxp,tda19971"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_tda1997x>; - reg = <0x48>; - interrupt-parent = <&gpio1>; - interrupts = <7 IRQ_TYPE_LEVEL_LOW>; - DOVDD-supply = <®_3p3v>; - AVDD-supply = <®_1p8v>; - DVDD-supply = <®_1p8v>; - /* audio */ - #sound-dai-cells = <0>; - nxp,audout-format = "i2s"; - nxp,audout-layout = <0>; - nxp,audout-width = <16>; - nxp,audout-mclk-fs = <128>; - /* - * The 8bpp BT656 mode outputs YCbCr[11:4] across 8bits over - * 2 pixclk cycles. - */ - nxp,vidout-portcfg = - /* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */ - < TDA1997X_VP24_V15_12 TDA1997X_R_CR_CBCR_11_8 >, - /* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */ - < TDA1997X_VP24_V11_08 TDA1997X_R_CR_CBCR_7_4 >, - - port { - tda1997x_to_ipu1_csi0_mux: endpoint { - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; - bus-width = <16>; - hsync-active = <1>; - vsync-active = <1>; - data-active = <1>; - }; - }; - }; From 9ef6e4db152c34580cc52792f32485c193945395 Mon Sep 17 00:00:00 2001 From: Dave Stevenson Date: Fri, 17 Oct 2025 13:43:49 +0530 Subject: [PATCH 113/249] media: i2c: imx219: Fix 1920x1080 mode to use 1:1 pixel aspect ratio Commit 0af46fbc333d ("media: i2c: imx219: Calculate crop rectangle dynamically") meant that the 1920x1080 mode switched from using no binning to using vertical binning but no horizontal binning, which resulted in stretched pixels. Until proper controls are available to independently select horizontal and vertical binning, restore the original 1:1 pixel aspect ratio by forcing binning to be uniform in both directions. Cc: stable@vger.kernel.org Fixes: 0af46fbc333d ("media: i2c: imx219: Calculate crop rectangle dynamically") Signed-off-by: Dave Stevenson [Add comment & reword commit message] Signed-off-by: Jai Luthra Reviewed-by: Jacopo Mondi Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx219.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index c680aa6c3a55..300935b1ef24 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -856,7 +856,7 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, const struct imx219_mode *mode; struct v4l2_mbus_framefmt *format; struct v4l2_rect *crop; - u8 bin_h, bin_v; + u8 bin_h, bin_v, binning; u32 prev_line_len; format = v4l2_subdev_state_get_format(state, 0); @@ -877,9 +877,12 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, bin_h = min(IMX219_PIXEL_ARRAY_WIDTH / format->width, 2U); bin_v = min(IMX219_PIXEL_ARRAY_HEIGHT / format->height, 2U); + /* Ensure bin_h and bin_v are same to avoid 1:2 or 2:1 stretching */ + binning = min(bin_h, bin_v); + crop = v4l2_subdev_state_get_crop(state, 0); - crop->width = format->width * bin_h; - crop->height = format->height * bin_v; + crop->width = format->width * binning; + crop->height = format->height * binning; crop->left = (IMX219_NATIVE_WIDTH - crop->width) / 2; crop->top = (IMX219_NATIVE_HEIGHT - crop->height) / 2; From 3dc9770bf2d521e992df5ebcfdbf1dc68653788b Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Fri, 17 Oct 2025 13:43:50 +0530 Subject: [PATCH 114/249] media: i2c: imx219: Simplify imx219_get_binning() function In imx219_set_pad_format() there is now a constraint to enforce hbin == vbin. So, simplify the logic in imx219_get_binning() function by removing dead code that handles the case where hbin != vbin. Signed-off-by: Jai Luthra Reviewed-by: Jacopo Mondi Tested-by: Jacopo Mondi Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx219.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index 300935b1ef24..48efdcd2a8f9 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -409,24 +409,14 @@ static void imx219_get_binning(struct v4l2_subdev_state *state, u8 *bin_h, u32 hbin = crop->width / format->width; u32 vbin = crop->height / format->height; - *bin_h = IMX219_BINNING_NONE; - *bin_v = IMX219_BINNING_NONE; - - /* - * Use analog binning only if both dimensions are binned, as it crops - * the other dimension. - */ if (hbin == 2 && vbin == 2) { *bin_h = IMX219_BINNING_X2_ANALOG; *bin_v = IMX219_BINNING_X2_ANALOG; - - return; + } else { + *bin_h = IMX219_BINNING_NONE; + *bin_v = IMX219_BINNING_NONE; } - if (hbin == 2) - *bin_h = IMX219_BINNING_X2; - if (vbin == 2) - *bin_v = IMX219_BINNING_X2; } static inline u32 imx219_get_rate_factor(struct v4l2_subdev_state *state) From 74e53de740385dc0b9e35cadb8d844351dd28e97 Mon Sep 17 00:00:00 2001 From: "Adam J. Sypniewski" Date: Tue, 21 Oct 2025 11:46:19 -0400 Subject: [PATCH 115/249] media: ov13b10: Add ACPI ID for ASUS Z13 Flow laptop The ASUS ROG Flow Z13 2025 (GZ302) laptop uses an OV13B10 sensor with a non-standard ACPI ID of OMNI13B1 instead of the expected OVTI13B1. Add this ACPI ID to the driver to make the front-facing camera work on these laptops. Signed-off-by: Adam J. Sypniewski Reviewed-by: Hans de Goede Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov13b10.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/i2c/ov13b10.c b/drivers/media/i2c/ov13b10.c index 869bc78ed792..5421874732bc 100644 --- a/drivers/media/i2c/ov13b10.c +++ b/drivers/media/i2c/ov13b10.c @@ -1693,6 +1693,7 @@ static DEFINE_RUNTIME_DEV_PM_OPS(ov13b10_pm_ops, ov13b10_suspend, static const struct acpi_device_id ov13b10_acpi_ids[] = { {"OVTIDB10"}, {"OVTI13B1"}, + {"OMNI13B1"}, /* ASUS ROG Flow Z13 (GZ302) uses this ACPI ID */ { /* sentinel */ } }; From 7890895df19406feac27470d4acd4210e29a60e5 Mon Sep 17 00:00:00 2001 From: Frank Li Date: Tue, 21 Oct 2025 11:49:22 -0400 Subject: [PATCH 116/249] media: dt-bindings: video-interfaces: add video-interfaces.h information Mention include/dt-bindings/media/video-interfaces.h in descriptions to help avoid use hardcode in dts. Signed-off-by: Frank Li Reviewed-by: Krzysztof Kozlowski Reviewed-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/video-interfaces.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml index 038e85b45bef..6ed4695cacf7 100644 --- a/Documentation/devicetree/bindings/media/video-interfaces.yaml +++ b/Documentation/devicetree/bindings/media/video-interfaces.yaml @@ -95,7 +95,7 @@ properties: - 6 # BT.656 - 7 # DPI description: - Data bus type. + Data bus type. See include/dt-bindings/media/video-interfaces.h. bus-width: $ref: /schemas/types.yaml#/definitions/uint32 @@ -229,7 +229,7 @@ properties: Imaging. The length of the array must be the same length as the data-lanes property. If the line-orders property is omitted, the value shall be interpreted as 0 (ABC). This property is valid for CSI-2 C-PHY - busses only. + busses only. See include/dt-bindings/media/video-interfaces.h. strobe: $ref: /schemas/types.yaml#/definitions/uint32 From 5489abf66338c7890edc1a4ababedcb48ec3e996 Mon Sep 17 00:00:00 2001 From: Benjamin Mugnier Date: Tue, 19 Aug 2025 16:47:41 +0200 Subject: [PATCH 117/249] media: dt-bindings: vd55g1: Add vd65g4 compatible Switch compatible from a const to an enum to accommodate both the vd55g1 and the vd65g4, which is the color variant. Signed-off-by: Benjamin Mugnier Acked-by: Conor Dooley Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml b/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml index 3c071e6fbea6..060ac6829b66 100644 --- a/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml +++ b/Documentation/devicetree/bindings/media/i2c/st,vd55g1.yaml @@ -25,7 +25,11 @@ allOf: properties: compatible: - const: st,vd55g1 + enum: + - st,vd55g1 + - st,vd65g4 + description: + VD55G1 is the monochrome variant, while VD65G4 is the color one. reg: maxItems: 1 From e138e7f000424ee3bfef5fd38055d4c3ed5933b9 Mon Sep 17 00:00:00 2001 From: Benjamin Mugnier Date: Tue, 19 Aug 2025 16:47:42 +0200 Subject: [PATCH 118/249] media: i2c: vd55g1: Add support for vd65g4 RGB variant The vd65g4 is the bayer version of the vd55g1. As opposed to the vd55g1, the vd65g4 does not need any patch. Check the sensor id at probe and choose to patch or not on power_on() according to it. It's bayer matrix's order is RGGB. This commit handles hflip and vflip by switching the bayer pattern accordingly. Signed-off-by: Benjamin Mugnier Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/vd55g1.c | 236 ++++++++++++++++++++++++++----------- 1 file changed, 168 insertions(+), 68 deletions(-) diff --git a/drivers/media/i2c/vd55g1.c b/drivers/media/i2c/vd55g1.c index f09d6bf32641..78d18c028154 100644 --- a/drivers/media/i2c/vd55g1.c +++ b/drivers/media/i2c/vd55g1.c @@ -29,9 +29,11 @@ /* Register Map */ #define VD55G1_REG_MODEL_ID CCI_REG32_LE(0x0000) -#define VD55G1_MODEL_ID 0x53354731 +#define VD55G1_MODEL_ID_VD55G1 0x53354731 /* Mono */ +#define VD55G1_MODEL_ID_VD65G4 0x53354733 /* RGB */ #define VD55G1_REG_REVISION CCI_REG16_LE(0x0004) #define VD55G1_REVISION_CCB 0x2020 +#define VD55G1_REVISION_BAYER 0x3030 #define VD55G1_REG_FWPATCH_REVISION CCI_REG16_LE(0x0012) #define VD55G1_REG_FWPATCH_START_ADDR CCI_REG8(0x2000) #define VD55G1_REG_SYSTEM_FSM CCI_REG8(0x001c) @@ -39,7 +41,8 @@ #define VD55G1_SYSTEM_FSM_SW_STBY 0x02 #define VD55G1_SYSTEM_FSM_STREAMING 0x03 #define VD55G1_REG_BOOT CCI_REG8(0x0200) -#define VD55G1_BOOT_PATCH_SETUP 2 +#define VD55G1_BOOT_BOOT 1 +#define VD55G1_BOOT_PATCH_AND_BOOT 2 #define VD55G1_REG_STBY CCI_REG8(0x0201) #define VD55G1_STBY_START_STREAM 1 #define VD55G1_REG_STREAMING CCI_REG8(0x0202) @@ -132,7 +135,10 @@ #define VD55G1_MIPI_RATE_MIN (250 * MEGA) #define VD55G1_MIPI_RATE_MAX (1200 * MEGA) -static const u8 patch_array[] = { +#define VD55G1_MODEL_ID_NAME(id) \ + ((id) == VD55G1_MODEL_ID_VD55G1 ? "vd55g1" : "vd65g4") + +static const u8 vd55g1_patch_array[] = { 0x44, 0x03, 0x09, 0x02, 0xe6, 0x01, 0x42, 0x00, 0xea, 0x01, 0x42, 0x00, 0xf0, 0x01, 0x42, 0x00, 0xe6, 0x01, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -466,22 +472,24 @@ struct vd55g1_mode { u32 height; }; -struct vd55g1_fmt_desc { - u32 code; - u8 bpp; - u8 data_type; +static const u32 vd55g1_mbus_formats_mono[] = { + MEDIA_BUS_FMT_Y8_1X8, + MEDIA_BUS_FMT_Y10_1X10, }; -static const struct vd55g1_fmt_desc vd55g1_mbus_codes[] = { +/* Format order is : no flip, hflip, vflip, both */ +static const u32 vd55g1_mbus_formats_bayer[][4] = { { - .code = MEDIA_BUS_FMT_Y8_1X8, - .bpp = 8, - .data_type = MIPI_CSI2_DT_RAW8, + MEDIA_BUS_FMT_SRGGB8_1X8, + MEDIA_BUS_FMT_SGRBG8_1X8, + MEDIA_BUS_FMT_SGBRG8_1X8, + MEDIA_BUS_FMT_SBGGR8_1X8, }, { - .code = MEDIA_BUS_FMT_Y10_1X10, - .bpp = 10, - .data_type = MIPI_CSI2_DT_RAW10, + MEDIA_BUS_FMT_SRGGB10_1X10, + MEDIA_BUS_FMT_SGRBG10_1X10, + MEDIA_BUS_FMT_SGBRG10_1X10, + MEDIA_BUS_FMT_SBGGR10_1X10, }, }; @@ -524,6 +532,7 @@ struct vd55g1_vblank_limits { struct vd55g1 { struct device *dev; + unsigned int id; struct v4l2_subdev sd; struct media_pad pad; struct regulator_bulk_data supplies[ARRAY_SIZE(vd55g1_supply_name)]; @@ -572,27 +581,78 @@ static inline struct vd55g1 *ctrl_to_vd55g1(struct v4l2_ctrl *ctrl) return to_vd55g1(sd); } -static const struct vd55g1_fmt_desc *vd55g1_get_fmt_desc(struct vd55g1 *sensor, - u32 code) +static unsigned int vd55g1_get_fmt_bpp(u32 code) { - unsigned int i; + switch (code) { + case MEDIA_BUS_FMT_Y8_1X8: + case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SBGGR8_1X8: + default: + return 8; - for (i = 0; i < ARRAY_SIZE(vd55g1_mbus_codes); i++) { - if (vd55g1_mbus_codes[i].code == code) - return &vd55g1_mbus_codes[i]; + case MEDIA_BUS_FMT_Y10_1X10: + case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_SGRBG10_1X10: + case MEDIA_BUS_FMT_SGBRG10_1X10: + case MEDIA_BUS_FMT_SBGGR10_1X10: + return 10; + } +} + +static unsigned int vd55g1_get_fmt_data_type(u32 code) +{ + switch (code) { + case MEDIA_BUS_FMT_Y8_1X8: + case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SBGGR8_1X8: + default: + return MIPI_CSI2_DT_RAW8; + + case MEDIA_BUS_FMT_Y10_1X10: + case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_SGRBG10_1X10: + case MEDIA_BUS_FMT_SGBRG10_1X10: + case MEDIA_BUS_FMT_SBGGR10_1X10: + return MIPI_CSI2_DT_RAW10; + } +} + +static u32 vd55g1_get_fmt_code(struct vd55g1 *sensor, u32 code) +{ + unsigned int i, j; + + if (sensor->id == VD55G1_MODEL_ID_VD55G1) + return code; + + for (i = 0; i < ARRAY_SIZE(vd55g1_mbus_formats_bayer); i++) { + for (j = 0; j < ARRAY_SIZE(vd55g1_mbus_formats_bayer[i]); j++) { + if (vd55g1_mbus_formats_bayer[i][j] == code) + goto adapt_bayer_pattern; + } + } + dev_warn(sensor->dev, "Unsupported mbus format\n"); + + return code; + +adapt_bayer_pattern: + j = 0; + /* In first init_state() call, controls might not be initialized yet */ + if (sensor->hflip_ctrl && sensor->vflip_ctrl) { + j = (sensor->hflip_ctrl->val ? 1 : 0) + + (sensor->vflip_ctrl->val ? 2 : 0); } - /* Should never happen */ - dev_warn(sensor->dev, "Unsupported code %d. default to 8 bpp\n", code); - - return &vd55g1_mbus_codes[0]; + return vd55g1_mbus_formats_bayer[i][j]; } static s32 vd55g1_get_pixel_rate(struct vd55g1 *sensor, struct v4l2_mbus_framefmt *format) { - return sensor->mipi_rate / - vd55g1_get_fmt_desc(sensor, format->code)->bpp; + return sensor->mipi_rate / vd55g1_get_fmt_bpp(format->code); } static unsigned int vd55g1_get_hblank_min(struct vd55g1 *sensor, @@ -605,7 +665,7 @@ static unsigned int vd55g1_get_hblank_min(struct vd55g1 *sensor, /* MIPI required time */ mipi_req_line_time = (crop->width * - vd55g1_get_fmt_desc(sensor, format->code)->bpp + + vd55g1_get_fmt_bpp(format->code) + VD55G1_MIPI_MARGIN) / (sensor->mipi_rate / MEGA); mipi_req_line_length = mipi_req_line_time * sensor->pixel_clock / @@ -887,7 +947,7 @@ static void vd55g1_update_pad_fmt(struct vd55g1 *sensor, const struct vd55g1_mode *mode, u32 code, struct v4l2_mbus_framefmt *fmt) { - fmt->code = code; + fmt->code = vd55g1_get_fmt_code(sensor, code); fmt->width = mode->width; fmt->height = mode->height; fmt->colorspace = V4L2_COLORSPACE_RAW; @@ -951,10 +1011,9 @@ static int vd55g1_set_framefmt(struct vd55g1 *sensor, int ret = 0; vd55g1_write(sensor, VD55G1_REG_FORMAT_CTRL, - vd55g1_get_fmt_desc(sensor, format->code)->bpp, &ret); + vd55g1_get_fmt_bpp(format->code), &ret); vd55g1_write(sensor, VD55G1_REG_OIF_IMG_CTRL, - vd55g1_get_fmt_desc(sensor, format->code)->data_type, - &ret); + vd55g1_get_fmt_data_type(format->code), &ret); switch (crop->width / format->width) { case 1: @@ -1114,26 +1173,45 @@ static int vd55g1_patch(struct vd55g1 *sensor) u64 patch; int ret = 0; - vd55g1_write_array(sensor, VD55G1_REG_FWPATCH_START_ADDR, - sizeof(patch_array), patch_array, &ret); - vd55g1_write(sensor, VD55G1_REG_BOOT, VD55G1_BOOT_PATCH_SETUP, &ret); - vd55g1_poll_reg(sensor, VD55G1_REG_BOOT, 0, &ret); - if (ret) { - dev_err(sensor->dev, "Failed to apply patch\n"); - return ret; + /* vd55g1 needs a patch while vd65g4 does not */ + if (sensor->id == VD55G1_MODEL_ID_VD55G1) { + vd55g1_write_array(sensor, VD55G1_REG_FWPATCH_START_ADDR, + sizeof(vd55g1_patch_array), + vd55g1_patch_array, &ret); + vd55g1_write(sensor, VD55G1_REG_BOOT, + VD55G1_BOOT_PATCH_AND_BOOT, &ret); + vd55g1_poll_reg(sensor, VD55G1_REG_BOOT, 0, &ret); + if (ret) { + dev_err(sensor->dev, "Failed to apply patch\n"); + return ret; + } + + vd55g1_read(sensor, VD55G1_REG_FWPATCH_REVISION, &patch, &ret); + if (patch != (VD55G1_FWPATCH_REVISION_MAJOR << 8) + + VD55G1_FWPATCH_REVISION_MINOR) { + dev_err(sensor->dev, "Bad patch version expected %d.%d got %d.%d\n", + VD55G1_FWPATCH_REVISION_MAJOR, + VD55G1_FWPATCH_REVISION_MINOR, + (u8)(patch >> 8), (u8)(patch & 0xff)); + return -ENODEV; + } + dev_dbg(sensor->dev, "patch %d.%d applied\n", + (u8)(patch >> 8), (u8)(patch & 0xff)); + + } else { + vd55g1_write(sensor, VD55G1_REG_BOOT, VD55G1_BOOT_BOOT, &ret); + vd55g1_poll_reg(sensor, VD55G1_REG_BOOT, 0, &ret); + if (ret) { + dev_err(sensor->dev, "Failed to boot\n"); + return ret; + } } - vd55g1_read(sensor, VD55G1_REG_FWPATCH_REVISION, &patch, &ret); - if (patch != (VD55G1_FWPATCH_REVISION_MAJOR << 8) + - VD55G1_FWPATCH_REVISION_MINOR) { - dev_err(sensor->dev, "Bad patch version expected %d.%d got %d.%d\n", - VD55G1_FWPATCH_REVISION_MAJOR, - VD55G1_FWPATCH_REVISION_MINOR, - (u8)(patch >> 8), (u8)(patch & 0xff)); - return -ENODEV; + ret = vd55g1_wait_state(sensor, VD55G1_SYSTEM_FSM_SW_STBY, NULL); + if (ret) { + dev_err(sensor->dev, "Sensor waiting after boot failed\n"); + return ret; } - dev_dbg(sensor->dev, "patch %d.%d applied\n", - (u8)(patch >> 8), (u8)(patch & 0xff)); return 0; } @@ -1165,10 +1243,19 @@ static int vd55g1_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { - if (code->index >= ARRAY_SIZE(vd55g1_mbus_codes)) - return -EINVAL; + struct vd55g1 *sensor = to_vd55g1(sd); + u32 base_code; - code->code = vd55g1_mbus_codes[code->index].code; + if (sensor->id == VD55G1_MODEL_ID_VD55G1) { + if (code->index >= ARRAY_SIZE(vd55g1_mbus_formats_mono)) + return -EINVAL; + base_code = vd55g1_mbus_formats_mono[code->index]; + } else { + if (code->index >= ARRAY_SIZE(vd55g1_mbus_formats_bayer)) + return -EINVAL; + base_code = vd55g1_mbus_formats_bayer[code->index][0]; + } + code->code = vd55g1_get_fmt_code(sensor, base_code); return 0; } @@ -1275,7 +1362,7 @@ static int vd55g1_init_state(struct v4l2_subdev *sd, return ret; vd55g1_update_pad_fmt(sensor, &vd55g1_supported_modes[VD55G1_MODE_DEF], - vd55g1_mbus_codes[VD55G1_MBUS_CODE_DEF].code, + vd55g1_get_fmt_code(sensor, VD55G1_MBUS_CODE_DEF), &fmt.format); return vd55g1_set_pad_fmt(sd, sd_state, &fmt); @@ -1285,9 +1372,16 @@ static int vd55g1_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { + struct vd55g1 *sensor = to_vd55g1(sd); + u32 code; + if (fse->index >= ARRAY_SIZE(vd55g1_supported_modes)) return -EINVAL; + code = vd55g1_get_fmt_code(sensor, fse->code); + if (fse->code != code) + return -EINVAL; + fse->min_width = vd55g1_supported_modes[fse->index].width; fse->max_width = fse->min_width; fse->min_height = vd55g1_supported_modes[fse->index].height; @@ -1463,8 +1557,12 @@ static int vd55g1_init_ctrls(struct vd55g1 *sensor) /* Flip cluster */ sensor->hflip_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, 0); + if (sensor->hflip_ctrl) + sensor->hflip_ctrl->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; sensor->vflip_ctrl = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, 0); + if (sensor->vflip_ctrl) + sensor->vflip_ctrl->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; v4l2_ctrl_cluster(2, &sensor->hflip_ctrl); /* Exposition cluster */ @@ -1548,26 +1646,34 @@ static int vd55g1_init_ctrls(struct vd55g1 *sensor) static int vd55g1_detect(struct vd55g1 *sensor) { - u64 device_rev; - u64 id; + unsigned int dt_id = (uintptr_t)device_get_match_data(sensor->dev); + u64 rev, id; int ret; ret = vd55g1_read(sensor, VD55G1_REG_MODEL_ID, &id, NULL); if (ret) return ret; - if (id != VD55G1_MODEL_ID) { - dev_warn(sensor->dev, "Unsupported sensor id %x\n", (u32)id); + if (id != VD55G1_MODEL_ID_VD55G1 && id != VD55G1_MODEL_ID_VD65G4) { + dev_warn(sensor->dev, "Unsupported sensor id 0x%x\n", + (u32)id); return -ENODEV; } + if (id != dt_id) { + dev_err(sensor->dev, "Probed sensor %s and device tree definition (%s) mismatch", + VD55G1_MODEL_ID_NAME(id), VD55G1_MODEL_ID_NAME(dt_id)); + return -ENODEV; + } + sensor->id = id; - ret = vd55g1_read(sensor, VD55G1_REG_REVISION, &device_rev, NULL); + ret = vd55g1_read(sensor, VD55G1_REG_REVISION, &rev, NULL); if (ret) return ret; - if (device_rev != VD55G1_REVISION_CCB) { - dev_err(sensor->dev, "Unsupported sensor revision (0x%x)\n", - (u16)device_rev); + if ((id == VD55G1_MODEL_ID_VD55G1 && rev != VD55G1_REVISION_CCB) && + (id == VD55G1_MODEL_ID_VD65G4 && rev != VD55G1_REVISION_BAYER)) { + dev_err(sensor->dev, "Unsupported sensor revision 0x%x for sensor %s\n", + (u16)rev, VD55G1_MODEL_ID_NAME(id)); return -ENODEV; } @@ -1616,13 +1722,6 @@ static int vd55g1_power_on(struct device *dev) goto disable_clock; } - ret = vd55g1_wait_state(sensor, VD55G1_SYSTEM_FSM_SW_STBY, NULL); - if (ret) { - dev_err(dev, "Sensor waiting after patch failed %d\n", - ret); - goto disable_clock; - } - return 0; disable_clock: @@ -1934,7 +2033,8 @@ static void vd55g1_remove(struct i2c_client *client) } static const struct of_device_id vd55g1_dt_ids[] = { - { .compatible = "st,vd55g1" }, + { .compatible = "st,vd55g1", .data = (void *)VD55G1_MODEL_ID_VD55G1 }, + { .compatible = "st,vd65g4", .data = (void *)VD55G1_MODEL_ID_VD65G4 }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, vd55g1_dt_ids); From d5ebe3f7d13d4cee3ff7e718de23564915aaf163 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 02:13:19 +0200 Subject: [PATCH 119/249] media: ov02c10: Fix default vertical flip The driver right now defaults to setting the vertical flip bit. This conflicts with proper handling of the rotation property defined in ACPI or device tree, so drop the VFLIP bit. It should be handled via V4L2_CID_VFLIP instead. Reported-by: Frederic Stuyk Closes: https://lore.kernel.org/all/b6df9ae7-ea9f-4e5a-8065-5b130f534f37@runbox.com/ Fixes: 44f89010dae0 ("media: i2c: Add Omnivision OV02C10 sensor driver") Signed-off-by: Sebastian Reichel Reviewed-by: Bryan O'Donoghue Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov02c10.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index 8c4d85dc7922..8e22ff446b0c 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -174,7 +174,7 @@ static const struct reg_sequence sensor_1928x1092_30fps_setting[] = { {0x3816, 0x01}, {0x3817, 0x01}, - {0x3820, 0xb0}, + {0x3820, 0xa0}, {0x3821, 0x00}, {0x3822, 0x80}, {0x3823, 0x08}, From b7cd2ba3f692729906ad6eeefc78dd625021c7bd Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 02:13:20 +0200 Subject: [PATCH 120/249] media: ov02c10: Support hflip and vflip Support horizontal and vertical flip, which is necessary to handle upside-down mounted sensors. Suggested-by: Bryan O'Donoghue Signed-off-by: Sebastian Reichel Reviewed-by: Bryan O'Donoghue Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/ov02c10.c | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index 8e22ff446b0c..b1e540eb8326 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -385,6 +385,8 @@ struct ov02c10 { struct v4l2_ctrl *vblank; struct v4l2_ctrl *hblank; struct v4l2_ctrl *exposure; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; struct clk *img_clk; struct gpio_desc *reset; @@ -462,6 +464,16 @@ static int ov02c10_set_ctrl(struct v4l2_ctrl *ctrl) ret = ov02c10_test_pattern(ov02c10, ctrl->val); break; + case V4L2_CID_HFLIP: + cci_update_bits(ov02c10->regmap, OV02C10_ROTATE_CONTROL, + BIT(3), ov02c10->hflip->val << 3, &ret); + break; + + case V4L2_CID_VFLIP: + cci_update_bits(ov02c10->regmap, OV02C10_ROTATE_CONTROL, + BIT(4), ov02c10->vflip->val << 4, &ret); + break; + default: ret = -EINVAL; break; @@ -485,7 +497,7 @@ static int ov02c10_init_controls(struct ov02c10 *ov02c10) s64 exposure_max, h_blank, pixel_rate; int ret; - v4l2_ctrl_handler_init(ctrl_hdlr, 10); + v4l2_ctrl_handler_init(ctrl_hdlr, 12); ov02c10->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov02c10_ctrl_ops, @@ -536,6 +548,17 @@ static int ov02c10_init_controls(struct ov02c10 *ov02c10) exposure_max, OV02C10_EXPOSURE_STEP, exposure_max); + + ov02c10->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov02c10_ctrl_ops, + V4L2_CID_HFLIP, 0, 1, 1, 0); + if (ov02c10->hflip) + ov02c10->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + + ov02c10->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &ov02c10_ctrl_ops, + V4L2_CID_VFLIP, 0, 1, 1, 0); + if (ov02c10->vflip) + ov02c10->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov02c10_ctrl_ops, V4L2_CID_TEST_PATTERN, ARRAY_SIZE(ov02c10_test_pattern_menu) - 1, From 5d505becf75a9696937815ab147e1f2d81165ad8 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 26 Oct 2025 20:12:16 +0200 Subject: [PATCH 121/249] media: ipu3-imgu: Drop struct imgu_device v4l2_file_ops field The struct imgu_device v4l2_file_ops field is unused. Drop it. Signed-off-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/staging/media/ipu3/ipu3.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/staging/media/ipu3/ipu3.h b/drivers/staging/media/ipu3/ipu3.h index d2ad0a95c5aa..7b2a1eee2c7f 100644 --- a/drivers/staging/media/ipu3/ipu3.h +++ b/drivers/staging/media/ipu3/ipu3.h @@ -127,7 +127,6 @@ struct imgu_device { /* Private fields */ struct v4l2_device v4l2_dev; struct media_device media_dev; - struct v4l2_file_operations v4l2_file_ops; /* MMU driver for css */ struct imgu_mmu_info *mmu; From 27aa2085c08d56656396fc3bfb4c8115843c1c5b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 26 Oct 2025 20:12:37 +0200 Subject: [PATCH 122/249] media: staging: ipu7: isys: Drop video_open() function The video_open() function is just a wrapper around v4l2_fh_open(). Replace it by the latter in the v4l2_file_operations. Signed-off-by: Laurent Pinchart Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/staging/media/ipu7/ipu7-isys-video.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/drivers/staging/media/ipu7/ipu7-isys-video.c b/drivers/staging/media/ipu7/ipu7-isys-video.c index 1a7c8a91fffb..8c6730833f24 100644 --- a/drivers/staging/media/ipu7/ipu7-isys-video.c +++ b/drivers/staging/media/ipu7/ipu7-isys-video.c @@ -88,11 +88,6 @@ const struct ipu7_isys_pixelformat ipu7_isys_pfmts[] = { IPU_INSYS_FRAME_FORMAT_RGBA888}, }; -static int video_open(struct file *file) -{ - return v4l2_fh_open(file); -} - const struct ipu7_isys_pixelformat *ipu7_isys_get_isys_format(u32 pixelformat) { unsigned int i; @@ -867,7 +862,7 @@ static const struct v4l2_file_operations isys_fops = { .poll = vb2_fop_poll, .unlocked_ioctl = video_ioctl2, .mmap = vb2_fop_mmap, - .open = video_open, + .open = v4l2_fh_open, .release = vb2_fop_release, }; From f91b64dbe358c464070a53f525b6f4d4d59f8323 Mon Sep 17 00:00:00 2001 From: Elgin Perumbilly Date: Tue, 28 Oct 2025 12:53:00 +0530 Subject: [PATCH 123/249] media: i2c: Fix vendor name typo in OV2735 Kconfig help text Fix incorrect vendor name for OV2735 sensor (Sony -> OmniVision) in Kconfig help text. Signed-off-by: Elgin Perumbilly Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index cdd7ba5da0d5..4c1eb4279dc3 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -471,7 +471,7 @@ config VIDEO_OV2735 tristate "OmniVision OV2735 sensor support" select V4L2_CCI_I2C help - This is a Video4Linux2 sensor driver for the Sony + This is a Video4Linux2 sensor driver for the OmniVision OV2735 camera. To compile this driver as a module, choose M here: the From 163917839c0eea3bdfe3620f27f617a55fd76302 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 28 Oct 2025 09:28:54 +0000 Subject: [PATCH 124/249] MAINTAINERS: Update Daniel Scally's email address Update my email address in MAINTAINERS from my personal account to my work one. Signed-off-by: Daniel Scally Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- MAINTAINERS | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 5be50323d635..c3412b3e9006 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7477,7 +7477,7 @@ F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml F: drivers/media/i2c/dw9714.c DONGWOON DW9719 LENS VOICE COIL DRIVER -M: Daniel Scally +M: Daniel Scally L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media.git @@ -12611,7 +12611,7 @@ INTEL IPU3 CSI-2 CIO2 DRIVER M: Yong Zhi M: Sakari Ailus M: Bingbu Cao -M: Dan Scally +M: Dan Scally R: Tianshu Qiu L: linux-media@vger.kernel.org S: Maintained @@ -19065,7 +19065,7 @@ F: Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml F: drivers/media/i2c/ov5675.c OMNIVISION OV5693 SENSOR DRIVER -M: Daniel Scally +M: Daniel Scally L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media.git From 3595375c2301653d5440d54b396df03499686c20 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 5 Sep 2025 16:19:19 +0000 Subject: [PATCH 125/249] media: rkvdec: Add HEVC backend The Rockchip VDEC supports the HEVC codec with the Main and Main10 Profile up to Level 5.1 High tier: 4096x2304@60 fps. Add the backend for HEVC format to the decoder. Signed-off-by: Alex Bee Signed-off-by: Sebastian Fricke Tested-by: Nicolas Dufresne Reviewed-by: Nicolas Dufresne Signed-off-by: Jonas Karlman Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkvdec/Makefile | 2 +- .../rockchip/rkvdec/rkvdec-hevc-data.c | 1848 +++++++++++++++++ .../platform/rockchip/rkvdec/rkvdec-hevc.c | 817 ++++++++ .../platform/rockchip/rkvdec/rkvdec-regs.h | 2 + .../media/platform/rockchip/rkvdec/rkvdec.c | 76 + .../media/platform/rockchip/rkvdec/rkvdec.h | 1 + 6 files changed, 2745 insertions(+), 1 deletion(-) create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c diff --git a/drivers/media/platform/rockchip/rkvdec/Makefile b/drivers/media/platform/rockchip/rkvdec/Makefile index cb86b429cfaa..a77122641d14 100644 --- a/drivers/media/platform/rockchip/rkvdec/Makefile +++ b/drivers/media/platform/rockchip/rkvdec/Makefile @@ -1,3 +1,3 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_VDEC) += rockchip-vdec.o -rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-vp9.o +rockchip-vdec-y += rkvdec.o rkvdec-h264.o rkvdec-hevc.o rkvdec-vp9.o diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c new file mode 100644 index 000000000000..eac4ea604949 --- /dev/null +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-data.c @@ -0,0 +1,1848 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder driver + * + * Copyright (C) 2023 Collabora, Ltd. + * Sebastian Fricke + */ + +#include + +#define RKV_CABAC_TABLE_SIZE 27456 + +/* + * This file is #include from rkvdec-hevc.c and not compiled. + */ +static const u8 rkvdec_hevc_cabac_table[RKV_CABAC_TABLE_SIZE] = { + 0x07, 0x0f, 0x48, 0x58, 0x58, 0x40, 0x40, 0x40, 0x40, 0x40, 0x0f, 0x40, 0x40, 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0x1f, 0x27, 0x08, 0x17, 0x47, 0x40, 0x17, 0x47, + 0x40, 0x40, 0x40, 0x40, 0x00, 0x08, 0x08, 0x40, 0x0f, 0x08, 0x00, 0x00, 0x2f, 0x27, 0x1f, + 0x07, 0x27, 0x1f, 0x1f, 0x47, 0x10, 0x10, 0x08, 0x40, 0x0f, 0x08, 0x00, 0x27, 0x08, 0x37, + 0x27, 0x27, 0x08, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c new file mode 100644 index 000000000000..9b5cf70188db --- /dev/null +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c @@ -0,0 +1,817 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Video Decoder HEVC backend + * + * Copyright (C) 2023 Collabora, Ltd. + * Sebastian Fricke + * + * Copyright (C) 2019 Collabora, Ltd. + * Boris Brezillon + * + * Copyright (C) 2016 Rockchip Electronics Co., Ltd. + * Jeffy Chen + */ + +#include + +#include "rkvdec.h" +#include "rkvdec-regs.h" +#include "rkvdec-hevc-data.c" + +/* Size in u8/u32 units. */ +#define RKV_SCALING_LIST_SIZE 1360 +#define RKV_PPS_SIZE (80 / 4) +#define RKV_PPS_LEN 64 +#define RKV_RPS_SIZE (32 / 4) +#define RKV_RPS_LEN 600 + +struct rkvdec_sps_pps_packet { + u32 info[RKV_PPS_SIZE]; +}; + +struct rkvdec_rps_packet { + u32 info[RKV_RPS_SIZE]; +}; + +struct rkvdec_ps_field { + u16 offset; + u8 len; +}; + +#define PS_FIELD(_offset, _len) \ + ((struct rkvdec_ps_field){ _offset, _len }) + +/* SPS */ +#define VIDEO_PARAMETER_SET_ID PS_FIELD(0, 4) +#define SEQ_PARAMETER_SET_ID PS_FIELD(4, 4) +#define CHROMA_FORMAT_IDC PS_FIELD(8, 2) +#define PIC_WIDTH_IN_LUMA_SAMPLES PS_FIELD(10, 13) +#define PIC_HEIGHT_IN_LUMA_SAMPLES PS_FIELD(23, 13) +#define BIT_DEPTH_LUMA PS_FIELD(36, 4) +#define BIT_DEPTH_CHROMA PS_FIELD(40, 4) +#define LOG2_MAX_PIC_ORDER_CNT_LSB PS_FIELD(44, 5) +#define LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE PS_FIELD(49, 2) +#define LOG2_MIN_LUMA_CODING_BLOCK_SIZE PS_FIELD(51, 3) +#define LOG2_MIN_TRANSFORM_BLOCK_SIZE PS_FIELD(54, 3) +#define LOG2_DIFF_MAX_MIN_LUMA_TRANSFORM_BLOCK_SIZE PS_FIELD(57, 2) +#define MAX_TRANSFORM_HIERARCHY_DEPTH_INTER PS_FIELD(59, 3) +#define MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA PS_FIELD(62, 3) +#define SCALING_LIST_ENABLED_FLAG PS_FIELD(65, 1) +#define AMP_ENABLED_FLAG PS_FIELD(66, 1) +#define SAMPLE_ADAPTIVE_OFFSET_ENABLED_FLAG PS_FIELD(67, 1) +#define PCM_ENABLED_FLAG PS_FIELD(68, 1) +#define PCM_SAMPLE_BIT_DEPTH_LUMA PS_FIELD(69, 4) +#define PCM_SAMPLE_BIT_DEPTH_CHROMA PS_FIELD(73, 4) +#define PCM_LOOP_FILTER_DISABLED_FLAG PS_FIELD(77, 1) +#define LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE PS_FIELD(78, 3) +#define LOG2_MIN_PCM_LUMA_CODING_BLOCK_SIZE PS_FIELD(81, 3) +#define NUM_SHORT_TERM_REF_PIC_SETS PS_FIELD(84, 7) +#define LONG_TERM_REF_PICS_PRESENT_FLAG PS_FIELD(91, 1) +#define NUM_LONG_TERM_REF_PICS_SPS PS_FIELD(92, 6) +#define SPS_TEMPORAL_MVP_ENABLED_FLAG PS_FIELD(98, 1) +#define STRONG_INTRA_SMOOTHING_ENABLED_FLAG PS_FIELD(99, 1) +/* PPS */ +#define PIC_PARAMETER_SET_ID PS_FIELD(128, 6) +#define PPS_SEQ_PARAMETER_SET_ID PS_FIELD(134, 4) +#define DEPENDENT_SLICE_SEGMENTS_ENABLED_FLAG PS_FIELD(138, 1) +#define OUTPUT_FLAG_PRESENT_FLAG PS_FIELD(139, 1) +#define NUM_EXTRA_SLICE_HEADER_BITS PS_FIELD(140, 13) +#define SIGN_DATA_HIDING_ENABLED_FLAG PS_FIELD(153, 1) +#define CABAC_INIT_PRESENT_FLAG PS_FIELD(154, 1) +#define NUM_REF_IDX_L0_DEFAULT_ACTIVE PS_FIELD(155, 4) +#define NUM_REF_IDX_L1_DEFAULT_ACTIVE PS_FIELD(159, 4) +#define INIT_QP_MINUS26 PS_FIELD(163, 7) +#define CONSTRAINED_INTRA_PRED_FLAG PS_FIELD(170, 1) +#define TRANSFORM_SKIP_ENABLED_FLAG PS_FIELD(171, 1) +#define CU_QP_DELTA_ENABLED_FLAG PS_FIELD(172, 1) +#define LOG2_MIN_CU_QP_DELTA_SIZE PS_FIELD(173, 3) +#define PPS_CB_QP_OFFSET PS_FIELD(176, 5) +#define PPS_CR_QP_OFFSET PS_FIELD(181, 5) +#define PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT_FLAG PS_FIELD(186, 1) +#define WEIGHTED_PRED_FLAG PS_FIELD(187, 1) +#define WEIGHTED_BIPRED_FLAG PS_FIELD(188, 1) +#define TRANSQUANT_BYPASS_ENABLED_FLAG PS_FIELD(189, 1) +#define TILES_ENABLED_FLAG PS_FIELD(190, 1) +#define ENTROPY_CODING_SYNC_ENABLED_FLAG PS_FIELD(191, 1) +#define PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED_FLAG PS_FIELD(192, 1) +#define LOOP_FILTER_ACROSS_TILES_ENABLED_FLAG PS_FIELD(193, 1) +#define DEBLOCKING_FILTER_OVERRIDE_ENABLED_FLAG PS_FIELD(194, 1) +#define PPS_DEBLOCKING_FILTER_DISABLED_FLAG PS_FIELD(195, 1) +#define PPS_BETA_OFFSET_DIV2 PS_FIELD(196, 4) +#define PPS_TC_OFFSET_DIV2 PS_FIELD(200, 4) +#define LISTS_MODIFICATION_PRESENT_FLAG PS_FIELD(204, 1) +#define LOG2_PARALLEL_MERGE_LEVEL PS_FIELD(205, 3) +#define SLICE_SEGMENT_HEADER_EXTENSION_PRESENT_FLAG PS_FIELD(208, 1) +#define NUM_TILE_COLUMNS PS_FIELD(212, 5) +#define NUM_TILE_ROWS PS_FIELD(217, 5) +#define COLUMN_WIDTH(i) PS_FIELD(256 + ((i) * 8), 8) +#define ROW_HEIGHT(i) PS_FIELD(416 + ((i) * 8), 8) +#define SCALING_LIST_ADDRESS PS_FIELD(592, 32) + +/* Data structure describing auxiliary buffer format. */ +struct rkvdec_hevc_priv_tbl { + u8 cabac_table[RKV_CABAC_TABLE_SIZE]; + u8 scaling_list[RKV_SCALING_LIST_SIZE]; + struct rkvdec_sps_pps_packet param_set[RKV_PPS_LEN]; + struct rkvdec_rps_packet rps[RKV_RPS_LEN]; +}; + +struct rkvdec_hevc_run { + struct rkvdec_run base; + const struct v4l2_ctrl_hevc_slice_params *slices_params; + const struct v4l2_ctrl_hevc_decode_params *decode_params; + const struct v4l2_ctrl_hevc_sps *sps; + const struct v4l2_ctrl_hevc_pps *pps; + const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; + int num_slices; +}; + +struct rkvdec_hevc_ctx { + struct rkvdec_aux_buf priv_tbl; + struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix_cache; +}; + +struct scaling_factor { + u8 scalingfactor0[1248]; + u8 scalingfactor1[96]; /*4X4 TU Rotate, total 16X4*/ + u8 scalingdc[12]; /*N1005 Vienna Meeting*/ + u8 reserved[4]; /*16Bytes align*/ +}; + +static void set_ps_field(u32 *buf, struct rkvdec_ps_field field, u32 value) +{ + u8 bit = field.offset % 32, word = field.offset / 32; + u64 mask = GENMASK_ULL(bit + field.len - 1, bit); + u64 val = ((u64)value << bit) & mask; + + buf[word] &= ~mask; + buf[word] |= val; + if (bit + field.len > 32) { + buf[word + 1] &= ~(mask >> 32); + buf[word + 1] |= val >> 32; + } +} + +static void assemble_hw_pps(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) +{ + struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; + const struct v4l2_ctrl_hevc_sps *sps = run->sps; + const struct v4l2_ctrl_hevc_pps *pps = run->pps; + struct rkvdec_hevc_priv_tbl *priv_tbl = hevc_ctx->priv_tbl.cpu; + struct rkvdec_sps_pps_packet *hw_ps; + u32 min_cb_log2_size_y, ctb_log2_size_y, ctb_size_y; + u32 log2_min_cu_qp_delta_size, scaling_distance; + dma_addr_t scaling_list_address; + int i; + + /* + * HW read the SPS/PPS information from PPS packet index by PPS id. + * offset from the base can be calculated by PPS_id * 80 (size per PPS + * packet unit). so the driver copy SPS/PPS information to the exact PPS + * packet unit for HW accessing. + */ + hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; + memset(hw_ps, 0, sizeof(*hw_ps)); + +#define WRITE_PPS(value, field) set_ps_field(hw_ps->info, field, value) + /* write sps */ + WRITE_PPS(sps->video_parameter_set_id, VIDEO_PARAMETER_SET_ID); + WRITE_PPS(sps->seq_parameter_set_id, SEQ_PARAMETER_SET_ID); + WRITE_PPS(sps->chroma_format_idc, CHROMA_FORMAT_IDC); + WRITE_PPS(sps->pic_width_in_luma_samples, PIC_WIDTH_IN_LUMA_SAMPLES); + WRITE_PPS(sps->pic_height_in_luma_samples, PIC_HEIGHT_IN_LUMA_SAMPLES); + WRITE_PPS(sps->bit_depth_luma_minus8 + 8, BIT_DEPTH_LUMA); + WRITE_PPS(sps->bit_depth_chroma_minus8 + 8, BIT_DEPTH_CHROMA); + WRITE_PPS(sps->log2_max_pic_order_cnt_lsb_minus4 + 4, + LOG2_MAX_PIC_ORDER_CNT_LSB); + WRITE_PPS(sps->log2_diff_max_min_luma_coding_block_size, + LOG2_DIFF_MAX_MIN_LUMA_CODING_BLOCK_SIZE); + WRITE_PPS(sps->log2_min_luma_coding_block_size_minus3 + 3, + LOG2_MIN_LUMA_CODING_BLOCK_SIZE); + WRITE_PPS(sps->log2_min_luma_transform_block_size_minus2 + 2, + LOG2_MIN_TRANSFORM_BLOCK_SIZE); + WRITE_PPS(sps->log2_diff_max_min_luma_transform_block_size, + LOG2_DIFF_MAX_MIN_LUMA_TRANSFORM_BLOCK_SIZE); + WRITE_PPS(sps->max_transform_hierarchy_depth_inter, + MAX_TRANSFORM_HIERARCHY_DEPTH_INTER); + WRITE_PPS(sps->max_transform_hierarchy_depth_intra, + MAX_TRANSFORM_HIERARCHY_DEPTH_INTRA); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED), + SCALING_LIST_ENABLED_FLAG); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_AMP_ENABLED), + AMP_ENABLED_FLAG); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET), + SAMPLE_ADAPTIVE_OFFSET_ENABLED_FLAG); + if (sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED) { + WRITE_PPS(1, PCM_ENABLED_FLAG); + WRITE_PPS(sps->pcm_sample_bit_depth_luma_minus1 + 1, + PCM_SAMPLE_BIT_DEPTH_LUMA); + WRITE_PPS(sps->pcm_sample_bit_depth_chroma_minus1 + 1, + PCM_SAMPLE_BIT_DEPTH_CHROMA); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED), + PCM_LOOP_FILTER_DISABLED_FLAG); + WRITE_PPS(sps->log2_diff_max_min_pcm_luma_coding_block_size, + LOG2_DIFF_MAX_MIN_PCM_LUMA_CODING_BLOCK_SIZE); + WRITE_PPS(sps->log2_min_pcm_luma_coding_block_size_minus3 + 3, + LOG2_MIN_PCM_LUMA_CODING_BLOCK_SIZE); + } + WRITE_PPS(sps->num_short_term_ref_pic_sets, NUM_SHORT_TERM_REF_PIC_SETS); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT), + LONG_TERM_REF_PICS_PRESENT_FLAG); + WRITE_PPS(sps->num_long_term_ref_pics_sps, NUM_LONG_TERM_REF_PICS_SPS); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED), + SPS_TEMPORAL_MVP_ENABLED_FLAG); + WRITE_PPS(!!(sps->flags & V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED), + STRONG_INTRA_SMOOTHING_ENABLED_FLAG); + + /* write pps */ + WRITE_PPS(pps->pic_parameter_set_id, PIC_PARAMETER_SET_ID); + WRITE_PPS(sps->seq_parameter_set_id, PPS_SEQ_PARAMETER_SET_ID); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED), + DEPENDENT_SLICE_SEGMENTS_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT), + OUTPUT_FLAG_PRESENT_FLAG); + WRITE_PPS(pps->num_extra_slice_header_bits, NUM_EXTRA_SLICE_HEADER_BITS); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED), + SIGN_DATA_HIDING_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT), + CABAC_INIT_PRESENT_FLAG); + WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1 + 1, + NUM_REF_IDX_L0_DEFAULT_ACTIVE); + WRITE_PPS(pps->num_ref_idx_l1_default_active_minus1 + 1, + NUM_REF_IDX_L1_DEFAULT_ACTIVE); + WRITE_PPS(pps->init_qp_minus26, INIT_QP_MINUS26); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED), + CONSTRAINED_INTRA_PRED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED), + TRANSFORM_SKIP_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED), + CU_QP_DELTA_ENABLED_FLAG); + + min_cb_log2_size_y = sps->log2_min_luma_coding_block_size_minus3 + 3; + ctb_log2_size_y = min_cb_log2_size_y + + sps->log2_diff_max_min_luma_coding_block_size; + ctb_size_y = 1 << ctb_log2_size_y; + log2_min_cu_qp_delta_size = ctb_log2_size_y - pps->diff_cu_qp_delta_depth; + WRITE_PPS(log2_min_cu_qp_delta_size, LOG2_MIN_CU_QP_DELTA_SIZE); + WRITE_PPS(pps->pps_cb_qp_offset, PPS_CB_QP_OFFSET); + WRITE_PPS(pps->pps_cr_qp_offset, PPS_CR_QP_OFFSET); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT), + PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED), + WEIGHTED_PRED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED), + WEIGHTED_BIPRED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED), + TRANSQUANT_BYPASS_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED), + TILES_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED), + ENTROPY_CODING_SYNC_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED), + PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED), + LOOP_FILTER_ACROSS_TILES_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED), + DEBLOCKING_FILTER_OVERRIDE_ENABLED_FLAG); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER), + PPS_DEBLOCKING_FILTER_DISABLED_FLAG); + WRITE_PPS(pps->pps_beta_offset_div2, PPS_BETA_OFFSET_DIV2); + WRITE_PPS(pps->pps_tc_offset_div2, PPS_TC_OFFSET_DIV2); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT), + LISTS_MODIFICATION_PRESENT_FLAG); + WRITE_PPS(pps->log2_parallel_merge_level_minus2 + 2, LOG2_PARALLEL_MERGE_LEVEL); + WRITE_PPS(!!(pps->flags & V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT), + SLICE_SEGMENT_HEADER_EXTENSION_PRESENT_FLAG); + WRITE_PPS(pps->num_tile_columns_minus1 + 1, NUM_TILE_COLUMNS); + WRITE_PPS(pps->num_tile_rows_minus1 + 1, NUM_TILE_ROWS); + + if (pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) { + /* Userspace also provide column width and row height for uniform spacing */ + for (i = 0; i <= pps->num_tile_columns_minus1; i++) + WRITE_PPS(pps->column_width_minus1[i], COLUMN_WIDTH(i)); + for (i = 0; i <= pps->num_tile_rows_minus1; i++) + WRITE_PPS(pps->row_height_minus1[i], ROW_HEIGHT(i)); + } else { + WRITE_PPS(((sps->pic_width_in_luma_samples + ctb_size_y - 1) / ctb_size_y) - 1, + COLUMN_WIDTH(0)); + WRITE_PPS(((sps->pic_height_in_luma_samples + ctb_size_y - 1) / ctb_size_y) - 1, + ROW_HEIGHT(0)); + } + + scaling_distance = offsetof(struct rkvdec_hevc_priv_tbl, scaling_list); + scaling_list_address = hevc_ctx->priv_tbl.dma + scaling_distance; + WRITE_PPS(scaling_list_address, SCALING_LIST_ADDRESS); +} + +/* + * Creation of the Reference Picture Set memory blob for the hardware. + * The layout looks like this: + * [0] 32 bits for L0 (6 references + 2 bits of the 7th reference) + * [1] 32 bits for L0 (remaining 3 bits of the 7th reference + 5 references + * + 4 bits of the 13th reference) + * [2] 11 bits for L0 (remaining bit for 13 and 2 references) and + * 21 bits for L1 (4 references + first bit of 5) + * [3] 32 bits of padding with 0s + * [4] 32 bits for L1 (remaining 4 bits for 5 + 5 references + 3 bits of 11) + * [5] 22 bits for L1 (remaining 2 bits of 11 and 4 references) + * lowdelay flag (bit 23), rps bit offset long term (bit 24 - 32) + * [6] rps bit offset long term (bit 1 - 3), rps bit offset short term (bit 4 - 12) + * number of references (bit 13 - 16), remaining 16 bits of padding with 0s + * [7] 32 bits of padding with 0s + * + * Thus we have to set up padding in between reference 5 of the L1 list. + */ +static void assemble_sw_rps(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) +{ + const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params; + const struct v4l2_ctrl_hevc_sps *sps = run->sps; + const struct v4l2_ctrl_hevc_slice_params *sl_params; + const struct v4l2_hevc_dpb_entry *dpb; + struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; + struct rkvdec_hevc_priv_tbl *priv_tbl = hevc_ctx->priv_tbl.cpu; + struct rkvdec_rps_packet *hw_ps; + int i, j; + unsigned int lowdelay; + +#define WRITE_RPS(value, field) set_ps_field(hw_ps->info, field, value) + +#define REF_PIC_LONG_TERM_L0(i) PS_FIELD((i) * 5, 1) +#define REF_PIC_IDX_L0(i) PS_FIELD(1 + ((i) * 5), 4) +#define REF_PIC_LONG_TERM_L1(i) PS_FIELD(((i) < 5 ? 75 : 132) + ((i) * 5), 1) +#define REF_PIC_IDX_L1(i) PS_FIELD(((i) < 4 ? 76 : 128) + ((i) * 5), 4) + +#define LOWDELAY PS_FIELD(182, 1) +#define LONG_TERM_RPS_BIT_OFFSET PS_FIELD(183, 10) +#define SHORT_TERM_RPS_BIT_OFFSET PS_FIELD(193, 9) +#define NUM_RPS_POC PS_FIELD(202, 4) + + for (j = 0; j < run->num_slices; j++) { + uint st_bit_offset = 0; + uint num_l0_refs = 0; + uint num_l1_refs = 0; + + sl_params = &run->slices_params[j]; + dpb = decode_params->dpb; + + if (sl_params->slice_type != V4L2_HEVC_SLICE_TYPE_I) { + num_l0_refs = sl_params->num_ref_idx_l0_active_minus1 + 1; + + if (sl_params->slice_type == V4L2_HEVC_SLICE_TYPE_B) + num_l1_refs = sl_params->num_ref_idx_l1_active_minus1 + 1; + + lowdelay = 1; + } else { + lowdelay = 0; + } + + hw_ps = &priv_tbl->rps[j]; + memset(hw_ps, 0, sizeof(*hw_ps)); + + for (i = 0; i < num_l0_refs; i++) { + const struct v4l2_hevc_dpb_entry dpb_l0 = dpb[sl_params->ref_idx_l0[i]]; + + WRITE_RPS(!!(dpb_l0.flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE), + REF_PIC_LONG_TERM_L0(i)); + WRITE_RPS(sl_params->ref_idx_l0[i], REF_PIC_IDX_L0(i)); + + if (dpb_l0.pic_order_cnt_val > sl_params->slice_pic_order_cnt) + lowdelay = 0; + } + + for (i = 0; i < num_l1_refs; i++) { + const struct v4l2_hevc_dpb_entry dpb_l1 = dpb[sl_params->ref_idx_l1[i]]; + int is_long_term = + !!(dpb_l1.flags & V4L2_HEVC_DPB_ENTRY_LONG_TERM_REFERENCE); + + WRITE_RPS(is_long_term, REF_PIC_LONG_TERM_L1(i)); + WRITE_RPS(sl_params->ref_idx_l1[i], REF_PIC_IDX_L1(i)); + + if (dpb_l1.pic_order_cnt_val > sl_params->slice_pic_order_cnt) + lowdelay = 0; + } + + WRITE_RPS(lowdelay, LOWDELAY); + + if (!(decode_params->flags & V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC)) { + if (sl_params->short_term_ref_pic_set_size) + st_bit_offset = sl_params->short_term_ref_pic_set_size; + else if (sps->num_short_term_ref_pic_sets > 1) + st_bit_offset = fls(sps->num_short_term_ref_pic_sets - 1); + } + + WRITE_RPS(st_bit_offset + sl_params->long_term_ref_pic_set_size, + LONG_TERM_RPS_BIT_OFFSET); + WRITE_RPS(sl_params->short_term_ref_pic_set_size, + SHORT_TERM_RPS_BIT_OFFSET); + + WRITE_RPS(decode_params->num_poc_st_curr_before + + decode_params->num_poc_st_curr_after + + decode_params->num_poc_lt_curr, + NUM_RPS_POC); + } +} + +/* + * Flip one or more matrices along their main diagonal and flatten them + * before writing it to the memory. + * Convert: + * ABCD AEIM + * EFGH => BFJN => AEIMBFJNCGKODHLP + * IJKL CGKO + * MNOP DHLP + */ +static void transpose_and_flatten_matrices(u8 *output, const u8 *input, + int matrices, int row_length) +{ + int i, j, row, x_offset, matrix_offset, rot_index, y_offset, matrix_size, new_value; + + matrix_size = row_length * row_length; + for (i = 0; i < matrices; i++) { + row = 0; + x_offset = 0; + matrix_offset = i * matrix_size; + for (j = 0; j < matrix_size; j++) { + y_offset = j - (row * row_length); + rot_index = y_offset * row_length + x_offset; + new_value = *(input + i * matrix_size + j); + output[matrix_offset + rot_index] = new_value; + if ((j + 1) % row_length == 0) { + row += 1; + x_offset += 1; + } + } + } +} + +static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input) +{ + int offset = 0; + + transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4); + offset = 6 * 16 * sizeof(u8); + transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8); + offset += 6 * 64 * sizeof(u8); + transpose_and_flatten_matrices(output + offset, + (const u8 *)input->scaling_list_16x16, 6, 8); + offset += 6 * 64 * sizeof(u8); + /* Add a 128 byte padding with 0s between the two 32x32 matrices */ + transpose_and_flatten_matrices(output + offset, + (const u8 *)input->scaling_list_32x32, 1, 8); + offset += 64 * sizeof(u8); + memset(output + offset, 0, 128); + offset += 128 * sizeof(u8); + transpose_and_flatten_matrices(output + offset, + (const u8 *)input->scaling_list_32x32 + (64 * sizeof(u8)), + 1, 8); + offset += 64 * sizeof(u8); + memset(output + offset, 0, 128); +} + +/* + * Required layout: + * A = scaling_list_dc_coef_16x16 + * B = scaling_list_dc_coef_32x32 + * 0 = Padding + * + * A, A, A, A, A, A, B, 0, 0, B, 0, 0 + */ +static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input) +{ + u8 list_32x32[6] = {0}; + + memcpy(output, input->scaling_list_dc_coef_16x16, 6 * sizeof(u8)); + list_32x32[0] = input->scaling_list_dc_coef_32x32[0]; + list_32x32[3] = input->scaling_list_dc_coef_32x32[1]; + memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8)); +} + +static void translate_scaling_list(struct scaling_factor *output, + const struct v4l2_ctrl_hevc_scaling_matrix *input) +{ + assemble_scalingfactor0(output->scalingfactor0, input); + memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96); + assemble_scalingdc(output->scalingdc, input); + memset(output->reserved, 0, 4 * sizeof(u8)); +} + +static void assemble_hw_scaling_list(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) +{ + const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix; + struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; + struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu; + u8 *dst; + + if (!memcmp((void *)&hevc_ctx->scaling_matrix_cache, scaling, + sizeof(struct v4l2_ctrl_hevc_scaling_matrix))) + return; + + dst = tbl->scaling_list; + translate_scaling_list((struct scaling_factor *)dst, scaling); + + memcpy((void *)&hevc_ctx->scaling_matrix_cache, scaling, + sizeof(struct v4l2_ctrl_hevc_scaling_matrix)); +} + +static struct vb2_buffer * +get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run, + unsigned int dpb_idx) +{ + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params; + const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb; + struct vb2_queue *cap_q = &m2m_ctx->cap_q_ctx.q; + struct vb2_buffer *buf = NULL; + + if (dpb_idx < decode_params->num_active_dpb_entries) + buf = vb2_find_buffer(cap_q, dpb[dpb_idx].timestamp); + + /* + * If a DPB entry is unused or invalid, the address of current destination + * buffer is returned. + */ + if (!buf) + return &run->base.bufs.dst->vb2_buf; + + return buf; +} + +static void config_registers(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params; + const struct v4l2_ctrl_hevc_sps *sps = run->sps; + const struct v4l2_ctrl_hevc_slice_params *sl_params = &run->slices_params[0]; + const struct v4l2_hevc_dpb_entry *dpb = decode_params->dpb; + struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; + dma_addr_t priv_start_addr = hevc_ctx->priv_tbl.dma; + const struct v4l2_pix_format_mplane *dst_fmt; + struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; + struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; + const struct v4l2_format *f; + dma_addr_t rlc_addr; + dma_addr_t refer_addr; + u32 rlc_len; + u32 hor_virstride; + u32 ver_virstride; + u32 y_virstride; + u32 yuv_virstride = 0; + u32 offset; + dma_addr_t dst_addr; + u32 reg, i; + + reg = RKVDEC_MODE(RKVDEC_MODE_HEVC); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_SYSCTRL); + + f = &ctx->decoded_fmt; + dst_fmt = &f->fmt.pix_mp; + hor_virstride = dst_fmt->plane_fmt[0].bytesperline; + ver_virstride = dst_fmt->height; + y_virstride = hor_virstride * ver_virstride; + + if (sps->chroma_format_idc == 0) + yuv_virstride = y_virstride; + else if (sps->chroma_format_idc == 1) + yuv_virstride = y_virstride + y_virstride / 2; + else if (sps->chroma_format_idc == 2) + yuv_virstride = 2 * y_virstride; + + reg = RKVDEC_Y_HOR_VIRSTRIDE(hor_virstride / 16) | + RKVDEC_UV_HOR_VIRSTRIDE(hor_virstride / 16) | + RKVDEC_SLICE_NUM_LOWBITS(run->num_slices); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_PICPAR); + + /* config rlc base address */ + rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); + writel_relaxed(rlc_addr, rkvdec->regs + RKVDEC_REG_STRM_RLC_BASE); + + rlc_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); + reg = RKVDEC_STRM_LEN(round_up(rlc_len, 16) + 64); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_STRM_LEN); + + /* config cabac table */ + offset = offsetof(struct rkvdec_hevc_priv_tbl, cabac_table); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_CABACTBL_PROB_BASE); + + /* config output base address */ + dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); + writel_relaxed(dst_addr, rkvdec->regs + RKVDEC_REG_DECOUT_BASE); + + reg = RKVDEC_Y_VIRSTRIDE(y_virstride / 16); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_Y_VIRSTRIDE); + + reg = RKVDEC_YUV_VIRSTRIDE(yuv_virstride / 16); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_YUV_VIRSTRIDE); + + /* config ref pic address */ + for (i = 0; i < 15; i++) { + struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); + + if (i < 4 && decode_params->num_active_dpb_entries) { + reg = GENMASK(decode_params->num_active_dpb_entries - 1, 0); + reg = (reg >> (i * 4)) & 0xf; + } else { + reg = 0; + } + + refer_addr = vb2_dma_contig_plane_dma_addr(vb_buf, 0); + writel_relaxed(refer_addr | reg, + rkvdec->regs + RKVDEC_REG_H264_BASE_REFER(i)); + + reg = RKVDEC_POC_REFER(i < decode_params->num_active_dpb_entries ? + dpb[i].pic_order_cnt_val : 0); + writel_relaxed(reg, + rkvdec->regs + RKVDEC_REG_H264_POC_REFER0(i)); + } + + reg = RKVDEC_CUR_POC(sl_params->slice_pic_order_cnt); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_CUR_POC0); + + /* config hw pps address */ + offset = offsetof(struct rkvdec_hevc_priv_tbl, param_set); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_PPS_BASE); + + /* config hw rps address */ + offset = offsetof(struct rkvdec_hevc_priv_tbl, rps); + writel_relaxed(priv_start_addr + offset, + rkvdec->regs + RKVDEC_REG_RPS_BASE); + + reg = RKVDEC_AXI_DDR_RDATA(0); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_RDATA); + + reg = RKVDEC_AXI_DDR_WDATA(0); + writel_relaxed(reg, rkvdec->regs + RKVDEC_REG_AXI_DDR_WDATA); +} + +#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2 + +static int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, + struct v4l2_format *f) +{ + struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; + + fmt->num_planes = 1; + if (!fmt->plane_fmt[0].sizeimage) + fmt->plane_fmt[0].sizeimage = fmt->width * fmt->height * + RKVDEC_HEVC_MAX_DEPTH_IN_BYTES; + return 0; +} + +static enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, + struct v4l2_ctrl *ctrl) +{ + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; + + if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS) + return RKVDEC_IMG_FMT_ANY; + + if (sps->bit_depth_luma_minus8 == 0) { + if (sps->chroma_format_idc == 2) + return RKVDEC_IMG_FMT_422_8BIT; + else + return RKVDEC_IMG_FMT_420_8BIT; + } else if (sps->bit_depth_luma_minus8 == 2) { + if (sps->chroma_format_idc == 2) + return RKVDEC_IMG_FMT_422_10BIT; + else + return RKVDEC_IMG_FMT_420_10BIT; + } + + return RKVDEC_IMG_FMT_ANY; +} + +static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, + const struct v4l2_ctrl_hevc_sps *sps) +{ + if (sps->chroma_format_idc > 1) + /* Only 4:0:0 and 4:2:0 are supported */ + return -EINVAL; + if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) + /* Luma and chroma bit depth mismatch */ + return -EINVAL; + if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) + /* Only 8-bit and 10-bit is supported */ + return -EINVAL; + + if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width || + sps->pic_height_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.height) + return -EINVAL; + + return 0; +} + +static int rkvdec_hevc_start(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_hevc_priv_tbl *priv_tbl; + struct rkvdec_hevc_ctx *hevc_ctx; + + hevc_ctx = kzalloc(sizeof(*hevc_ctx), GFP_KERNEL); + if (!hevc_ctx) + return -ENOMEM; + + priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), + &hevc_ctx->priv_tbl.dma, GFP_KERNEL); + if (!priv_tbl) { + kfree(hevc_ctx); + return -ENOMEM; + } + + hevc_ctx->priv_tbl.size = sizeof(*priv_tbl); + hevc_ctx->priv_tbl.cpu = priv_tbl; + memcpy(priv_tbl->cabac_table, rkvdec_hevc_cabac_table, + sizeof(rkvdec_hevc_cabac_table)); + + ctx->priv = hevc_ctx; + return 0; +} + +static void rkvdec_hevc_stop(struct rkvdec_ctx *ctx) +{ + struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; + struct rkvdec_dev *rkvdec = ctx->dev; + + dma_free_coherent(rkvdec->dev, hevc_ctx->priv_tbl.size, + hevc_ctx->priv_tbl.cpu, hevc_ctx->priv_tbl.dma); + kfree(hevc_ctx); +} + +static void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) +{ + struct v4l2_ctrl *ctrl; + + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_DECODE_PARAMS); + run->decode_params = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_SLICE_PARAMS); + run->slices_params = ctrl ? ctrl->p_cur.p : NULL; + run->num_slices = ctrl ? ctrl->new_elems : 0; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_SPS); + run->sps = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_PPS); + run->pps = ctrl ? ctrl->p_cur.p : NULL; + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_SCALING_MATRIX); + run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL; + + rkvdec_run_preamble(ctx, &run->base); +} + +static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_hevc_run run; + u32 reg; + + rkvdec_hevc_run_preamble(ctx, &run); + + assemble_hw_scaling_list(ctx, &run); + assemble_hw_pps(ctx, &run); + assemble_sw_rps(ctx, &run); + config_registers(ctx, &run); + + rkvdec_run_postamble(ctx, &run.base); + + schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); + + writel(0, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); + writel(0, rkvdec->regs + RKVDEC_REG_H264_ERR_E); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); + writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + + /* Start decoding! */ + reg = (run.pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) ? + 0 : RKVDEC_WR_DDR_ALIGN_EN; + writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | + RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E | reg, + rkvdec->regs + RKVDEC_REG_INTERRUPT); + + return 0; +} + +static int rkvdec_hevc_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl) +{ + if (ctrl->id == V4L2_CID_STATELESS_HEVC_SPS) + return rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps); + + return 0; +} + +const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops = { + .adjust_fmt = rkvdec_hevc_adjust_fmt, + .start = rkvdec_hevc_start, + .stop = rkvdec_hevc_stop, + .run = rkvdec_hevc_run, + .try_ctrl = rkvdec_hevc_try_ctrl, + .get_image_fmt = rkvdec_hevc_get_image_fmt, +}; diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h index 15b9bee92016..540c8bdf24e4 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h @@ -28,6 +28,7 @@ #define RKVDEC_SOFTRST_EN_P BIT(20) #define RKVDEC_FORCE_SOFTRESET_VALID BIT(21) #define RKVDEC_SOFTRESET_RDY BIT(22) +#define RKVDEC_WR_DDR_ALIGN_EN BIT(23) #define RKVDEC_REG_SYSCTRL 0x008 #define RKVDEC_IN_ENDIAN BIT(0) @@ -43,6 +44,7 @@ #define RKVDEC_RLC_MODE BIT(11) #define RKVDEC_STRM_START_BIT(x) (((x) & 0x7f) << 12) #define RKVDEC_MODE(x) (((x) & 0x03) << 20) +#define RKVDEC_MODE_HEVC 0 #define RKVDEC_MODE_H264 1 #define RKVDEC_MODE_VP9 2 #define RKVDEC_RPS_MODE BIT(24) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index cb02c6988602..17770355384d 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -158,6 +158,67 @@ static const struct v4l2_ctrl_ops rkvdec_ctrl_ops = { .s_ctrl = rkvdec_s_ctrl, }; +static const struct rkvdec_ctrl_desc rkvdec_hevc_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_HEVC_SLICE_PARAMS, + .cfg.flags = V4L2_CTRL_FLAG_DYNAMIC_ARRAY, + .cfg.type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS, + .cfg.dims = { 600 }, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_SPS, + .cfg.ops = &rkvdec_ctrl_ops, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_PPS, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE, + .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, + }, + { + .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE, + .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, + .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, + .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, + }, + { + .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, + .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, + .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, + }, + { + .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, + .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, + .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, + }, +}; + +static const struct rkvdec_ctrls rkvdec_hevc_ctrls = { + .ctrls = rkvdec_hevc_ctrl_descs, + .num_ctrls = ARRAY_SIZE(rkvdec_hevc_ctrl_descs), +}; + +static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12, + .image_fmt = RKVDEC_IMG_FMT_420_8BIT, + }, + { + .fourcc = V4L2_PIX_FMT_NV15, + .image_fmt = RKVDEC_IMG_FMT_420_10BIT, + }, +}; + static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { { .cfg.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, @@ -252,6 +313,21 @@ static const struct rkvdec_decoded_fmt_desc rkvdec_vp9_decoded_fmts[] = { }; static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_HEVC_SLICE, + .frmsize = { + .min_width = 64, + .max_width = 4096, + .step_width = 64, + .min_height = 64, + .max_height = 2304, + .step_height = 16, + }, + .ctrls = &rkvdec_hevc_ctrls, + .ops = &rkvdec_hevc_fmt_ops, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), + .decoded_fmts = rkvdec_hevc_decoded_fmts, + }, { .fourcc = V4L2_PIX_FMT_H264_SLICE, .frmsize = { diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h index 481aaa4bffe9..209dd79ce9bd 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h @@ -139,6 +139,7 @@ void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops; extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; #endif /* RKVDEC_H_ */ From 603bf462adff86f37c5d28db7aec7f40ed22429e Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 5 Sep 2025 16:19:20 +0000 Subject: [PATCH 126/249] media: rkvdec: Add variants support Different versions of the Rockchip VDEC IP exists and one way they can differ is what decoding formats are supported. Add a variant implementation in order to support flagging different capabilities. Signed-off-by: Alex Bee Reviewed-by: Nicolas Dufresne Signed-off-by: Jonas Karlman Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkvdec/rkvdec.c | 22 ++++++++++++++++++- .../media/platform/rockchip/rkvdec/rkvdec.h | 11 ++++++++++ 2 files changed, 32 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index 17770355384d..056c827c6b95 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -327,6 +328,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .ops = &rkvdec_hevc_fmt_ops, .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), .decoded_fmts = rkvdec_hevc_decoded_fmts, + .capability = RKVDEC_CAPABILITY_HEVC, }, { .fourcc = V4L2_PIX_FMT_H264_SLICE, @@ -343,6 +345,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), .decoded_fmts = rkvdec_h264_decoded_fmts, .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, + .capability = RKVDEC_CAPABILITY_H264, }, { .fourcc = V4L2_PIX_FMT_VP9_FRAME, @@ -358,6 +361,7 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { .ops = &rkvdec_vp9_fmt_ops, .num_decoded_fmts = ARRAY_SIZE(rkvdec_vp9_decoded_fmts), .decoded_fmts = rkvdec_vp9_decoded_fmts, + .capability = RKVDEC_CAPABILITY_VP9, } }; @@ -1185,8 +1189,18 @@ static void rkvdec_watchdog_func(struct work_struct *work) } } +static const struct rkvdec_variant rk3399_rkvdec_variant = { + .num_regs = 78, + .capabilities = RKVDEC_CAPABILITY_HEVC | + RKVDEC_CAPABILITY_H264 | + RKVDEC_CAPABILITY_VP9, +}; + static const struct of_device_id of_rkvdec_match[] = { - { .compatible = "rockchip,rk3399-vdec" }, + { + .compatible = "rockchip,rk3399-vdec", + .data = &rk3399_rkvdec_variant, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rkvdec_match); @@ -1197,16 +1211,22 @@ static const char * const rkvdec_clk_names[] = { static int rkvdec_probe(struct platform_device *pdev) { + const struct rkvdec_variant *variant; struct rkvdec_dev *rkvdec; unsigned int i; int ret, irq; + variant = of_device_get_match_data(&pdev->dev); + if (!variant) + return -EINVAL; + rkvdec = devm_kzalloc(&pdev->dev, sizeof(*rkvdec), GFP_KERNEL); if (!rkvdec) return -ENOMEM; platform_set_drvdata(pdev, rkvdec); rkvdec->dev = &pdev->dev; + rkvdec->variant = variant; mutex_init(&rkvdec->vdev_lock); INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func); diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h index 209dd79ce9bd..c47457c954e5 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h @@ -22,6 +22,10 @@ #include #include +#define RKVDEC_CAPABILITY_HEVC BIT(0) +#define RKVDEC_CAPABILITY_H264 BIT(1) +#define RKVDEC_CAPABILITY_VP9 BIT(2) + struct rkvdec_ctx; struct rkvdec_ctrl_desc { @@ -63,6 +67,11 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) base.vb.vb2_buf); } +struct rkvdec_variant { + unsigned int num_regs; + unsigned int capabilities; +}; + struct rkvdec_coded_fmt_ops { int (*adjust_fmt)(struct rkvdec_ctx *ctx, struct v4l2_format *f); @@ -98,6 +107,7 @@ struct rkvdec_coded_fmt_desc { unsigned int num_decoded_fmts; const struct rkvdec_decoded_fmt_desc *decoded_fmts; u32 subsystem_flags; + unsigned int capability; }; struct rkvdec_dev { @@ -111,6 +121,7 @@ struct rkvdec_dev { struct mutex vdev_lock; /* serializes ioctls */ struct delayed_work watchdog_work; struct iommu_domain *empty_domain; + const struct rkvdec_variant *variant; }; struct rkvdec_ctx { From b26d95f9c654e894e1901b8765ad3f158a8de9ab Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 5 Sep 2025 16:19:21 +0000 Subject: [PATCH 127/249] media: rkvdec: Implement capability filtering Add filtering of coded formats and controls depending on a variant capabilities. Signed-off-by: Alex Bee Reviewed-by: Nicolas Dufresne Signed-off-by: Jonas Karlman Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkvdec/rkvdec.c | 67 ++++++++++++++----- 1 file changed, 49 insertions(+), 18 deletions(-) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index 056c827c6b95..f5784f00c78e 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -365,13 +365,36 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { } }; +static bool rkvdec_is_capable(struct rkvdec_ctx *ctx, unsigned int capability) +{ + return (ctx->dev->variant->capabilities & capability) == capability; +} + static const struct rkvdec_coded_fmt_desc * -rkvdec_find_coded_fmt_desc(u32 fourcc) +rkvdec_enum_coded_fmt_desc(struct rkvdec_ctx *ctx, int index) +{ + int fmt_idx = -1; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { + if (!rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability)) + continue; + fmt_idx++; + if (index == fmt_idx) + return &rkvdec_coded_fmts[i]; + } + + return NULL; +} + +static const struct rkvdec_coded_fmt_desc * +rkvdec_find_coded_fmt_desc(struct rkvdec_ctx *ctx, u32 fourcc) { unsigned int i; for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { - if (rkvdec_coded_fmts[i].fourcc == fourcc) + if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability) && + rkvdec_coded_fmts[i].fourcc == fourcc) return &rkvdec_coded_fmts[i]; } @@ -382,7 +405,7 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) { struct v4l2_format *f = &ctx->coded_fmt; - ctx->coded_fmt_desc = &rkvdec_coded_fmts[0]; + ctx->coded_fmt_desc = rkvdec_enum_coded_fmt_desc(ctx, 0); rkvdec_reset_fmt(ctx, f, ctx->coded_fmt_desc->fourcc); f->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; @@ -396,21 +419,22 @@ static void rkvdec_reset_coded_fmt(struct rkvdec_ctx *ctx) static int rkvdec_enum_framesizes(struct file *file, void *priv, struct v4l2_frmsizeenum *fsize) { - const struct rkvdec_coded_fmt_desc *fmt; + struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file); + const struct rkvdec_coded_fmt_desc *desc; if (fsize->index != 0) return -EINVAL; - fmt = rkvdec_find_coded_fmt_desc(fsize->pixel_format); - if (!fmt) + desc = rkvdec_find_coded_fmt_desc(ctx, fsize->pixel_format); + if (!desc) return -EINVAL; fsize->type = V4L2_FRMSIZE_TYPE_CONTINUOUS; fsize->stepwise.min_width = 1; - fsize->stepwise.max_width = fmt->frmsize.max_width; + fsize->stepwise.max_width = desc->frmsize.max_width; fsize->stepwise.step_width = 1; fsize->stepwise.min_height = 1; - fsize->stepwise.max_height = fmt->frmsize.max_height; + fsize->stepwise.max_height = desc->frmsize.max_height; fsize->stepwise.step_height = 1; return 0; @@ -470,10 +494,10 @@ static int rkvdec_try_output_fmt(struct file *file, void *priv, struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file); const struct rkvdec_coded_fmt_desc *desc; - desc = rkvdec_find_coded_fmt_desc(pix_mp->pixelformat); + desc = rkvdec_find_coded_fmt_desc(ctx, pix_mp->pixelformat); if (!desc) { - pix_mp->pixelformat = rkvdec_coded_fmts[0].fourcc; - desc = &rkvdec_coded_fmts[0]; + desc = rkvdec_enum_coded_fmt_desc(ctx, 0); + pix_mp->pixelformat = desc->fourcc; } v4l2_apply_frmsize_constraints(&pix_mp->width, @@ -550,7 +574,7 @@ static int rkvdec_s_output_fmt(struct file *file, void *priv, if (ret) return ret; - desc = rkvdec_find_coded_fmt_desc(f->fmt.pix_mp.pixelformat); + desc = rkvdec_find_coded_fmt_desc(ctx, f->fmt.pix_mp.pixelformat); if (!desc) return -EINVAL; ctx->coded_fmt_desc = desc; @@ -602,10 +626,14 @@ static int rkvdec_g_capture_fmt(struct file *file, void *priv, static int rkvdec_enum_output_fmt(struct file *file, void *priv, struct v4l2_fmtdesc *f) { - if (f->index >= ARRAY_SIZE(rkvdec_coded_fmts)) + struct rkvdec_ctx *ctx = file_to_rkvdec_ctx(file); + const struct rkvdec_coded_fmt_desc *desc; + + desc = rkvdec_enum_coded_fmt_desc(ctx, f->index); + if (!desc) return -EINVAL; - f->pixelformat = rkvdec_coded_fmts[f->index].fourcc; + f->pixelformat = desc->fourcc; return 0; } @@ -969,14 +997,17 @@ static int rkvdec_init_ctrls(struct rkvdec_ctx *ctx) int ret; for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) - nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls; + if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability)) + nctrls += rkvdec_coded_fmts[i].ctrls->num_ctrls; v4l2_ctrl_handler_init(&ctx->ctrl_hdl, nctrls); for (i = 0; i < ARRAY_SIZE(rkvdec_coded_fmts); i++) { - ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls); - if (ret) - goto err_free_handler; + if (rkvdec_is_capable(ctx, rkvdec_coded_fmts[i].capability)) { + ret = rkvdec_add_ctrls(ctx, rkvdec_coded_fmts[i].ctrls); + if (ret) + goto err_free_handler; + } } ret = v4l2_ctrl_handler_setup(&ctx->ctrl_hdl); From 3dcfa3d12785290d0c0bb31cb1f10990b476563f Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 5 Sep 2025 16:19:22 +0000 Subject: [PATCH 128/249] media: rkvdec: Add RK3288 variant Add a RK3288 variant, a version of the Rockchip VDEC IP that only support HEVC decoding. Signed-off-by: Alex Bee Reviewed-by: Nicolas Dufresne Signed-off-by: Jonas Karlman Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- drivers/media/platform/rockchip/rkvdec/rkvdec.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index f5784f00c78e..5610ad9cb9d0 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -1220,6 +1220,11 @@ static void rkvdec_watchdog_func(struct work_struct *work) } } +static const struct rkvdec_variant rk3288_rkvdec_variant = { + .num_regs = 68, + .capabilities = RKVDEC_CAPABILITY_HEVC, +}; + static const struct rkvdec_variant rk3399_rkvdec_variant = { .num_regs = 78, .capabilities = RKVDEC_CAPABILITY_HEVC | @@ -1228,6 +1233,10 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { }; static const struct of_device_id of_rkvdec_match[] = { + { + .compatible = "rockchip,rk3288-vdec", + .data = &rk3288_rkvdec_variant, + }, { .compatible = "rockchip,rk3399-vdec", .data = &rk3399_rkvdec_variant, From 664b42898db79c189cf6a8655071572bd67eacf8 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 5 Sep 2025 16:19:23 +0000 Subject: [PATCH 129/249] media: rkvdec: Disable QoS for HEVC and VP9 on RK3328 The RK3328 VDEC has a HW quirk that require QoS to be disabled when HEVC or VP9 is decoded, otherwise the decoded picture may become corrupted. Add a RK3328 variant with a quirk flag to disable QoS when before decoding is started. Signed-off-by: Alex Bee Signed-off-by: Jonas Karlman Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- .../platform/rockchip/rkvdec/rkvdec-hevc.c | 3 +++ .../platform/rockchip/rkvdec/rkvdec-regs.h | 2 ++ .../platform/rockchip/rkvdec/rkvdec-vp9.c | 4 ++++ .../media/platform/rockchip/rkvdec/rkvdec.c | 24 +++++++++++++++++++ .../media/platform/rockchip/rkvdec/rkvdec.h | 5 ++++ 5 files changed, 38 insertions(+) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c index 9b5cf70188db..fc7e6a260b0a 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c @@ -789,6 +789,9 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) writel(1, rkvdec->regs + RKVDEC_REG_PREF_LUMA_CACHE_COMMAND); writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); + if (rkvdec->variant->quirks & RKVDEC_QUIRK_DISABLE_QOS) + rkvdec_quirks_disable_qos(ctx); + /* Start decoding! */ reg = (run.pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) ? 0 : RKVDEC_WR_DDR_ALIGN_EN; diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h index 540c8bdf24e4..c627b6b6f53a 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-regs.h @@ -219,6 +219,8 @@ #define RKVDEC_REG_H264_ERR_E 0x134 #define RKVDEC_H264_ERR_EN_HIGHBITS(x) ((x) & 0x3fffffff) +#define RKVDEC_REG_QOS_CTRL 0x18C + #define RKVDEC_REG_PREF_LUMA_CACHE_COMMAND 0x410 #define RKVDEC_REG_PREF_CHR_CACHE_COMMAND 0x450 diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c index 0e7e16f20eeb..b4bf01e839ef 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vp9.c @@ -824,6 +824,10 @@ static int rkvdec_vp9_run(struct rkvdec_ctx *ctx) writel(1, rkvdec->regs + RKVDEC_REG_PREF_CHR_CACHE_COMMAND); writel(0xe, rkvdec->regs + RKVDEC_REG_STRMD_ERR_EN); + + if (rkvdec->variant->quirks & RKVDEC_QUIRK_DISABLE_QOS) + rkvdec_quirks_disable_qos(ctx); + /* Start decoding! */ writel(RKVDEC_INTERRUPT_DEC_E | RKVDEC_CONFIG_DEC_CLK_GATE_E | RKVDEC_TIMEOUT_E | RKVDEC_BUF_EMPTY_E, diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c index 5610ad9cb9d0..5af9aa5ab353 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c @@ -902,6 +902,18 @@ void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run) v4l2_ctrl_request_complete(src_req, &ctx->ctrl_hdl); } +void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + u32 reg; + + /* Set undocumented swreg_block_gating_e field */ + reg = readl(rkvdec->regs + RKVDEC_REG_QOS_CTRL); + reg &= GENMASK(31, 16); + reg |= 0xEFFF; + writel(reg, rkvdec->regs + RKVDEC_REG_QOS_CTRL); +} + static void rkvdec_device_run(void *priv) { struct rkvdec_ctx *ctx = priv; @@ -1225,6 +1237,14 @@ static const struct rkvdec_variant rk3288_rkvdec_variant = { .capabilities = RKVDEC_CAPABILITY_HEVC, }; +static const struct rkvdec_variant rk3328_rkvdec_variant = { + .num_regs = 109, + .capabilities = RKVDEC_CAPABILITY_HEVC | + RKVDEC_CAPABILITY_H264 | + RKVDEC_CAPABILITY_VP9, + .quirks = RKVDEC_QUIRK_DISABLE_QOS, +}; + static const struct rkvdec_variant rk3399_rkvdec_variant = { .num_regs = 78, .capabilities = RKVDEC_CAPABILITY_HEVC | @@ -1237,6 +1257,10 @@ static const struct of_device_id of_rkvdec_match[] = { .compatible = "rockchip,rk3288-vdec", .data = &rk3288_rkvdec_variant, }, + { + .compatible = "rockchip,rk3328-vdec", + .data = &rk3328_rkvdec_variant, + }, { .compatible = "rockchip,rk3399-vdec", .data = &rk3399_rkvdec_variant, diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h index c47457c954e5..566e06fa2b1e 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h @@ -26,6 +26,8 @@ #define RKVDEC_CAPABILITY_H264 BIT(1) #define RKVDEC_CAPABILITY_VP9 BIT(2) +#define RKVDEC_QUIRK_DISABLE_QOS BIT(0) + struct rkvdec_ctx; struct rkvdec_ctrl_desc { @@ -70,6 +72,7 @@ vb2_to_rkvdec_decoded_buf(struct vb2_buffer *buf) struct rkvdec_variant { unsigned int num_regs; unsigned int capabilities; + unsigned int quirks; }; struct rkvdec_coded_fmt_ops { @@ -149,6 +152,8 @@ struct rkvdec_aux_buf { void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); +void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx); + extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops; extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; From e5aa56161657b5c397ba0ba16bb1939fd6d9e81c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 5 Sep 2025 16:19:24 +0000 Subject: [PATCH 130/249] media: dt-bindings: rockchip,vdec: Add RK3288 compatible Add a RK3288 compatible for a version of the Rockchip VDEC IP that only support HEVC decoding. Signed-off-by: Jonas Karlman Acked-by: Conor Dooley Tested-by: Diederik de Haas # Rock64, RockPro64, Quartz64-B, NanoPi R5S Tested-by: Detlev Casanova # RK3399 Signed-off-by: Nicolas Dufresne Signed-off-by: Hans Verkuil --- Documentation/devicetree/bindings/media/rockchip,vdec.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml index 96b6c8938768..809fda45b3bd 100644 --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -16,6 +16,7 @@ description: |- properties: compatible: oneOf: + - const: rockchip,rk3288-vdec - const: rockchip,rk3399-vdec - const: rockchip,rk3576-vdec - const: rockchip,rk3588-vdec From d907d211c30c2c30aeb53d8d15b532253bee705d Mon Sep 17 00:00:00 2001 From: Frank Li Date: Thu, 4 Sep 2025 12:17:20 -0400 Subject: [PATCH 131/249] MAINTAINERS: Add Frank Li as reviewer for NXP media drivers Frank has been reviewing NXP media drivers for a while, and is volunteering to continue. Add him as a reviewer for the IMX media drivers. Also add the NXP i.MX platform mailing list (imx@lists.linux.dev). Signed-off-by: Frank Li Acked-by: Philipp Zabel Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20250904161720.514889-1-Frank.Li@nxp.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- MAINTAINERS | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c3412b3e9006..8aec054a6ac7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15522,6 +15522,8 @@ F: drivers/media/pci/ddbridge/* MEDIA DRIVERS FOR FREESCALE IMX M: Steve Longerbeam M: Philipp Zabel +R: Frank Li +L: imx@lists.linux.dev L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media.git @@ -15536,6 +15538,8 @@ M: Rui Miguel Silva M: Laurent Pinchart M: Martin Kepplinger R: Purism Kernel Team +R: Frank Li +L: imx@lists.linux.dev L: linux-media@vger.kernel.org S: Maintained T: git git://linuxtv.org/media.git From 4a086f7a0420aacd2d957b4a1592c57129478eac Mon Sep 17 00:00:00 2001 From: Stefan Klug Date: Mon, 22 Sep 2025 20:19:57 +0200 Subject: [PATCH 132/249] media: rkisp1: Improve frame sequence correctness on stats and params buffers On the rkisp1 (in my case on a NXP i.MX8 M Plus) the ISP interrupt handler is sometimes called with RKISP1_CIF_ISP_V_START (start of frame) and RKISP1_CIF_ISP_FRAME (end of frame) being set at the same time. In commit 8524fa22fd2f ("media: staging: rkisp1: isp: add a warning and debugfs var for irq delay") a warning was added for that. There are two cases where this condition can occur: 1. The v-sync and the frame-end belong to the same frame. This means, the irq was heavily delayed and the warning is likely appropriate. 2. The v-sync belongs to the next frame. This can happen if the vertical blanking between two frames is very short. The current code always handles case 1 although case 2 is in my experience the more common case and happens in regular usage. This leads to incorrect sequence numbers on stats and params buffers which in turn breaks the regulation in user space. Fix that by adding a frame_active flag to distinguish between these cases and handle the start of frame either at the beginning or at the end of the rkisp1_isp_isr(). Signed-off-by: Stefan Klug Reviewed-by: Laurent Pinchart Reviewed-by: Kieran Bingham Reviewed-by: Jacopo Mondi Link: https://patch.msgid.link/20250922182003.3712101-2-stefan.klug@ideasonboard.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../platform/rockchip/rkisp1/rkisp1-common.h | 1 + .../platform/rockchip/rkisp1/rkisp1-isp.c | 27 +++++++++++++++---- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h index 6028ecdd23de..5e6a4d5f6fd1 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-common.h @@ -227,6 +227,7 @@ struct rkisp1_isp { struct media_pad pads[RKISP1_ISP_PAD_MAX]; const struct rkisp1_mbus_info *sink_fmt; __u32 frame_sequence; + bool frame_active; }; /* diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c index 147d33eb6ee0..2311672cedb1 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c @@ -965,6 +965,7 @@ static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable) } isp->frame_sequence = -1; + isp->frame_active = false; sd_state = v4l2_subdev_lock_and_get_active_state(sd); @@ -1086,12 +1087,15 @@ void rkisp1_isp_unregister(struct rkisp1_device *rkisp1) * Interrupt handlers */ -static void rkisp1_isp_queue_event_sof(struct rkisp1_isp *isp) +static void rkisp1_isp_sof(struct rkisp1_isp *isp) { struct v4l2_event event = { .type = V4L2_EVENT_FRAME_SYNC, }; + isp->frame_sequence++; + isp->frame_active = true; + event.u.frame_sync.frame_sequence = isp->frame_sequence; v4l2_event_queue(isp->sd.devnode, &event); } @@ -1111,15 +1115,20 @@ irqreturn_t rkisp1_isp_isr(int irq, void *ctx) rkisp1_write(rkisp1, RKISP1_CIF_ISP_ICR, status); - /* Vertical sync signal, starting generating new frame */ - if (status & RKISP1_CIF_ISP_V_START) { - rkisp1->isp.frame_sequence++; - rkisp1_isp_queue_event_sof(&rkisp1->isp); + /* + * Vertical sync signal, starting new frame. Defer handling of vsync + * after RKISP1_CIF_ISP_FRAME if the previous frame was not completed + * yet. + */ + if (status & RKISP1_CIF_ISP_V_START && !rkisp1->isp.frame_active) { + status &= ~RKISP1_CIF_ISP_V_START; + rkisp1_isp_sof(&rkisp1->isp); if (status & RKISP1_CIF_ISP_FRAME) { WARN_ONCE(1, "irq delay is too long, buffers might not be in sync\n"); rkisp1->debug.irq_delay++; } } + if (status & RKISP1_CIF_ISP_PIC_SIZE_ERROR) { /* Clear pic_size_error */ isp_err = rkisp1_read(rkisp1, RKISP1_CIF_ISP_ERR); @@ -1138,6 +1147,7 @@ irqreturn_t rkisp1_isp_isr(int irq, void *ctx) if (status & RKISP1_CIF_ISP_FRAME) { u32 isp_ris; + rkisp1->isp.frame_active = false; rkisp1->debug.complete_frames++; /* New frame from the sensor received */ @@ -1152,5 +1162,12 @@ irqreturn_t rkisp1_isp_isr(int irq, void *ctx) rkisp1_params_isr(rkisp1); } + /* + * Deferred handling of vsync if RKISP1_CIF_ISP_V_START and + * RKISP1_CIF_ISP_FRAME occurred in the same irq. + */ + if (status & RKISP1_CIF_ISP_V_START) + rkisp1_isp_sof(&rkisp1->isp); + return IRQ_HANDLED; } From 014619ac2ce60f1e81735bccc26fb97324504743 Mon Sep 17 00:00:00 2001 From: Alice Yuan Date: Fri, 5 Sep 2025 14:55:58 +0800 Subject: [PATCH 133/249] media: dt-bindings: nxp,imx8-isi: Add i.MX91 ISI compatible string The ISI module on i.MX91 is reused from i.MX93 and implements one channel and one camera input which only can be connected to parallel camera input. So needn't to select camera source like i.MX93 in gasket ops. Signed-off-by: Alice Yuan Reviewed-by: Krzysztof Kozlowski Reviewed-by: Frank Li Signed-off-by: Guoniu Zhou Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20250905-isi_imx93-v2-1-37db5f768c57@nxp.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/nxp,imx8-isi.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml index f43b91984f01..001a0d9b71e0 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml @@ -22,6 +22,7 @@ properties: - fsl,imx8mn-isi - fsl,imx8mp-isi - fsl,imx8ulp-isi + - fsl,imx91-isi - fsl,imx93-isi reg: @@ -66,7 +67,6 @@ required: - interrupts - clocks - clock-names - - fsl,blk-ctrl - ports allOf: @@ -77,6 +77,7 @@ allOf: enum: - fsl,imx8mn-isi - fsl,imx8ulp-isi + - fsl,imx91-isi - fsl,imx93-isi then: properties: @@ -109,6 +110,16 @@ allOf: - port@0 - port@1 + - if: + properties: + compatible: + not: + contains: + const: fsl,imx91-isi + then: + required: + - fsl,blk-ctrl + additionalProperties: false examples: From 556e65b535637c408a8b0a5e525689a2a37206f3 Mon Sep 17 00:00:00 2001 From: Guoniu Zhou Date: Fri, 5 Sep 2025 14:55:59 +0800 Subject: [PATCH 134/249] media: nxp: imx8-isi: Refine code by using helper macro Make code more readable and easier to maintain by using the FIELD_PREP and GENMASK() macros. While at it, replace spaces with tabs for macro indentation. No functional changes. Reviewed-by: Frank Li Signed-off-by: Guoniu Zhou Link: https://patch.msgid.link/20250905-isi_imx93-v2-2-37db5f768c57@nxp.com Reviewed-by: Laurent Pinchart Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c index f69c3b5d4782..085754d361de 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c @@ -3,6 +3,8 @@ * Copyright 2019-2023 NXP */ +#include +#include #include #include @@ -16,8 +18,7 @@ #define GASKET_BASE(n) (0x0060 + (n) * 0x30) #define GASKET_CTRL 0x0000 -#define GASKET_CTRL_DATA_TYPE(dt) ((dt) << 8) -#define GASKET_CTRL_DATA_TYPE_MASK (0x3f << 8) +#define GASKET_CTRL_DATA_TYPE(dt) FIELD_PREP(GENMASK(13, 8), dt) #define GASKET_CTRL_DUAL_COMP_ENABLE BIT(1) #define GASKET_CTRL_ENABLE BIT(0) @@ -57,9 +58,9 @@ const struct mxc_gasket_ops mxc_imx8_gasket_ops = { * i.MX93 gasket */ -#define DISP_MIX_CAMERA_MUX 0x30 -#define DISP_MIX_CAMERA_MUX_DATA_TYPE(x) (((x) & 0x3f) << 3) -#define DISP_MIX_CAMERA_MUX_GASKET_ENABLE BIT(16) +#define DISP_MIX_CAMERA_MUX 0x30 +#define DISP_MIX_CAMERA_MUX_DATA_TYPE(x) FIELD_PREP(GENMASK(8, 3), x) +#define DISP_MIX_CAMERA_MUX_GASKET_ENABLE BIT(16) static void mxc_imx93_gasket_enable(struct mxc_isi_dev *isi, const struct v4l2_mbus_frame_desc *fd, From b2cc5b4ca45081eb059c9e695c98da0ee78aa2ee Mon Sep 17 00:00:00 2001 From: Alice Yuan Date: Fri, 5 Sep 2025 14:56:00 +0800 Subject: [PATCH 135/249] media: nxp: imx8-isi: Add parallel camera input support for i.MX93 The ISI module on i.MX93 implements one camera input which can be connected to either of MIPI CSI-2 or parallel camera. The source type can be selected by setting camera mux control register. Signed-off-by: Alice Yuan Reviewed-by: Frank Li Signed-off-by: Guoniu Zhou Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20250905-isi_imx93-v2-3-37db5f768c57@nxp.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c index 085754d361de..58ec7eddcd3d 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-gasket.c @@ -61,6 +61,7 @@ const struct mxc_gasket_ops mxc_imx8_gasket_ops = { #define DISP_MIX_CAMERA_MUX 0x30 #define DISP_MIX_CAMERA_MUX_DATA_TYPE(x) FIELD_PREP(GENMASK(8, 3), x) #define DISP_MIX_CAMERA_MUX_GASKET_ENABLE BIT(16) +#define DISP_MIX_CAMERA_MUX_GASKET_SOURCE_TYPE BIT(17) static void mxc_imx93_gasket_enable(struct mxc_isi_dev *isi, const struct v4l2_mbus_frame_desc *fd, @@ -71,6 +72,16 @@ static void mxc_imx93_gasket_enable(struct mxc_isi_dev *isi, val = DISP_MIX_CAMERA_MUX_DATA_TYPE(fd->entry[0].bus.csi2.dt); val |= DISP_MIX_CAMERA_MUX_GASKET_ENABLE; + + /* + * CAMERA MUX + * - [17]: Selects source input to gasket + * 0: Data from MIPI CSI + * 1: Data from parallel camera + */ + if (fd->type == V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL) + val |= DISP_MIX_CAMERA_MUX_GASKET_SOURCE_TYPE; + regmap_write(isi->gasket, DISP_MIX_CAMERA_MUX, val); } From a85b8b47c878e690e3631e1f3e58b61a687d512e Mon Sep 17 00:00:00 2001 From: Guoniu Zhou Date: Fri, 5 Sep 2025 14:56:01 +0800 Subject: [PATCH 136/249] media: nxp: imx8-isi: Reorder the platform data Sort platform data in the order of compatible strings in of_match table to make it more convenient to read. No functions changed. Reviewed-by: Frank Li Signed-off-by: Guoniu Zhou Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20250905-isi_imx93-v2-4-37db5f768c57@nxp.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- .../platform/nxp/imx8-isi/imx8-isi-core.c | 44 +++++++++---------- 1 file changed, 22 insertions(+), 22 deletions(-) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c index adc8d9960bf0..0155c75983f0 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c @@ -314,6 +314,28 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = { .has_36bit_dma = true, }; +static const struct mxc_isi_plat_data mxc_imx8qm_data = { + .model = MXC_ISI_IMX8QM, + .num_ports = 5, + .num_channels = 8, + .reg_offset = 0x10000, + .ier_reg = &mxc_imx8_isi_ier_qm, + .set_thd = &mxc_imx8_isi_thd_v1, + .buf_active_reverse = true, + .has_36bit_dma = false, +}; + +static const struct mxc_isi_plat_data mxc_imx8qxp_data = { + .model = MXC_ISI_IMX8QXP, + .num_ports = 5, + .num_channels = 6, + .reg_offset = 0x10000, + .ier_reg = &mxc_imx8_isi_ier_v2, + .set_thd = &mxc_imx8_isi_thd_v1, + .buf_active_reverse = true, + .has_36bit_dma = false, +}; + static const struct mxc_isi_plat_data mxc_imx8ulp_data = { .model = MXC_ISI_IMX8ULP, .num_ports = 1, @@ -337,28 +359,6 @@ static const struct mxc_isi_plat_data mxc_imx93_data = { .has_36bit_dma = false, }; -static const struct mxc_isi_plat_data mxc_imx8qm_data = { - .model = MXC_ISI_IMX8QM, - .num_ports = 5, - .num_channels = 8, - .reg_offset = 0x10000, - .ier_reg = &mxc_imx8_isi_ier_qm, - .set_thd = &mxc_imx8_isi_thd_v1, - .buf_active_reverse = true, - .has_36bit_dma = false, -}; - -static const struct mxc_isi_plat_data mxc_imx8qxp_data = { - .model = MXC_ISI_IMX8QXP, - .num_ports = 5, - .num_channels = 6, - .reg_offset = 0x10000, - .ier_reg = &mxc_imx8_isi_ier_v2, - .set_thd = &mxc_imx8_isi_thd_v1, - .buf_active_reverse = true, - .has_36bit_dma = false, -}; - /* ----------------------------------------------------------------------------- * Power management */ From 55884478976dfeb5d1e90038103879238d9de93f Mon Sep 17 00:00:00 2001 From: Guoniu Zhou Date: Fri, 5 Sep 2025 14:56:02 +0800 Subject: [PATCH 137/249] media: nxp: imx8-isi: Add ISI support for i.MX91 The ISI module on i.MX91 implements only one channel and one parallel camera input. As no input source selection is required, gasket ops are unnecessary. Reviewed-by: Frank Li Signed-off-by: Guoniu Zhou Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20250905-isi_imx93-v2-5-37db5f768c57@nxp.com Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 12 ++++++++++++ drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c index 0155c75983f0..c3d411ddf492 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c @@ -347,6 +347,17 @@ static const struct mxc_isi_plat_data mxc_imx8ulp_data = { .has_36bit_dma = false, }; +static const struct mxc_isi_plat_data mxc_imx91_data = { + .model = MXC_ISI_IMX91, + .num_ports = 1, + .num_channels = 1, + .reg_offset = 0, + .ier_reg = &mxc_imx8_isi_ier_v2, + .set_thd = &mxc_imx8_isi_thd_v1, + .buf_active_reverse = true, + .has_36bit_dma = false, +}; + static const struct mxc_isi_plat_data mxc_imx93_data = { .model = MXC_ISI_IMX93, .num_ports = 1, @@ -547,6 +558,7 @@ static const struct of_device_id mxc_isi_of_match[] = { { .compatible = "fsl,imx8qm-isi", .data = &mxc_imx8qm_data }, { .compatible = "fsl,imx8qxp-isi", .data = &mxc_imx8qxp_data }, { .compatible = "fsl,imx8ulp-isi", .data = &mxc_imx8ulp_data }, + { .compatible = "fsl,imx91-isi", .data = &mxc_imx91_data }, { .compatible = "fsl,imx93-isi", .data = &mxc_imx93_data }, { /* sentinel */ }, }; diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h index e84af5127e4e..3cbd35305af0 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h @@ -160,6 +160,7 @@ enum model { MXC_ISI_IMX8QM, MXC_ISI_IMX8QXP, MXC_ISI_IMX8ULP, + MXC_ISI_IMX91, MXC_ISI_IMX93, }; From 27ca459535af2d00d53b79b9cc2c174fab9bc743 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:00:49 +0200 Subject: [PATCH 138/249] media: imx-mipi-csis: drop unused module alias The driver does not support anything but OF probe since commit f0e7cfbb43f1 ("media: imx: imx7_mipi_csis: Add i.MX8MM support") so drop the unused platform module alias. Signed-off-by: Johan Hovold Reviewed-by: Frank Li Acked-by: Rui Miguel Silva Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20251017060051.8204-1-johan@kernel.org Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-mipi-csis.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/platform/nxp/imx-mipi-csis.c index d5de7854f579..fd399af56e0c 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -1634,4 +1634,3 @@ module_platform_driver(mipi_csis_driver); MODULE_DESCRIPTION("i.MX7 & i.MX8 MIPI CSI-2 receiver driver"); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:imx-mipi-csi2"); From b54de0cc88400284ea5a700cfde11309b9def1ea Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:00:50 +0200 Subject: [PATCH 139/249] media: imx7-media-csi: drop unused module alias The driver has never supported anything but OF probing so drop the unused platform module alias. Signed-off-by: Johan Hovold Reviewed-by: Frank Li Acked-by: Rui Miguel Silva Reviewed-by: Laurent Pinchart Link: https://patch.msgid.link/20251017060051.8204-2-johan@kernel.org Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx7-media-csi.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/nxp/imx7-media-csi.c b/drivers/media/platform/nxp/imx7-media-csi.c index 34a92642bbfe..933a5f39f9f4 100644 --- a/drivers/media/platform/nxp/imx7-media-csi.c +++ b/drivers/media/platform/nxp/imx7-media-csi.c @@ -2290,4 +2290,3 @@ module_platform_driver(imx7_csi_driver); MODULE_DESCRIPTION("i.MX7 CSI subdev driver"); MODULE_AUTHOR("Rui Miguel Silva "); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:imx7-csi"); From 68ea577631d3e538a8e88bb83091c087170b9c86 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:00:51 +0200 Subject: [PATCH 140/249] media: imx8mq-mipi-csi2: drop unused module alias The driver has never supported anything but OF probing so drop the unused platform module alias. Signed-off-by: Johan Hovold Reviewed-by: Frank Li Reviewed-by: Laurent Pinchart Acked-by: Martin Kepplinger-Novakovic Link: https://patch.msgid.link/20251017060051.8204-3-johan@kernel.org Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx8mq-mipi-csi2.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c index d333ff43539f..371b4e81328c 100644 --- a/drivers/media/platform/nxp/imx8mq-mipi-csi2.c +++ b/drivers/media/platform/nxp/imx8mq-mipi-csi2.c @@ -1114,4 +1114,3 @@ module_platform_driver(imx8mq_mipi_csi_driver); MODULE_DESCRIPTION("i.MX8MQ MIPI CSI-2 receiver driver"); MODULE_AUTHOR("Martin Kepplinger "); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:imx8mq-mipi-csi2"); From 445e1658894fd74eab7e53071fa16233887574ed Mon Sep 17 00:00:00 2001 From: Miaoqian Lin Date: Wed, 3 Sep 2025 21:37:29 +0800 Subject: [PATCH 141/249] media: renesas: rcar_drif: fix device node reference leak in rcar_drif_bond_enabled The function calls of_parse_phandle() which returns a device node with an incremented reference count. When the bonded device is not available, the function returns NULL without releasing the reference, causing a reference leak. Add of_node_put(np) to release the device node reference. The of_node_put function handles NULL pointers. Found through static analysis by reviewing the doc of of_parse_phandle() and cross-checking its usage patterns across the codebase. Fixes: 7625ee981af1 ("[media] media: platform: rcar_drif: Add DRIF support") Cc: stable@vger.kernel.org Signed-off-by: Miaoqian Lin Reviewed-by: Geert Uytterhoeven Reviewed-by: Fabrizio Castro Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rcar_drif.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/platform/renesas/rcar_drif.c b/drivers/media/platform/renesas/rcar_drif.c index 11bf47fb8266..0844934f7aa6 100644 --- a/drivers/media/platform/renesas/rcar_drif.c +++ b/drivers/media/platform/renesas/rcar_drif.c @@ -1246,6 +1246,7 @@ static struct device_node *rcar_drif_bond_enabled(struct platform_device *p) if (np && of_device_is_available(np)) return np; + of_node_put(np); return NULL; } From 959d787979e349858a96639415b410fcc1345806 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 4 Sep 2025 17:33:34 +0200 Subject: [PATCH 142/249] media: rcar_jpu: Convert to DEFINE_SIMPLE_DEV_PM_OPS() Convert the Renesas JPEG Processing Unit driver from an open-coded dev_pm_ops structure to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This lets us drop the check for CONFIG_PM_SLEEP, and reduces kernel size in case CONFIG_PM or CONFIG_PM_SLEEP is disabled, while increasing build coverage. Signed-off-by: Geert Uytterhoeven Reviewed-by: Nikita Yushchenko Signed-off-by: Hans Verkuil --- drivers/media/platform/renesas/rcar_jpu.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/media/platform/renesas/rcar_jpu.c b/drivers/media/platform/renesas/rcar_jpu.c index 3d714fec4fad..a6d26b446494 100644 --- a/drivers/media/platform/renesas/rcar_jpu.c +++ b/drivers/media/platform/renesas/rcar_jpu.c @@ -1693,7 +1693,6 @@ static void jpu_remove(struct platform_device *pdev) v4l2_device_unregister(&jpu->v4l2_dev); } -#ifdef CONFIG_PM_SLEEP static int jpu_suspend(struct device *dev) { struct jpu *jpu = dev_get_drvdata(dev); @@ -1717,11 +1716,8 @@ static int jpu_resume(struct device *dev) return 0; } -#endif -static const struct dev_pm_ops jpu_pm_ops = { - SET_SYSTEM_SLEEP_PM_OPS(jpu_suspend, jpu_resume) -}; +static DEFINE_SIMPLE_DEV_PM_OPS(jpu_pm_ops, jpu_suspend, jpu_resume); static struct platform_driver jpu_driver = { .probe = jpu_probe, @@ -1729,7 +1725,7 @@ static struct platform_driver jpu_driver = { .driver = { .of_match_table = jpu_dt_ids, .name = DRV_NAME, - .pm = &jpu_pm_ops, + .pm = pm_sleep_ptr(&jpu_pm_ops), }, }; From ae0e4aa18ff2fd5f5e033b3bd3acc9c1c7025ec1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 4 Sep 2025 17:34:09 +0200 Subject: [PATCH 143/249] media: amphion: Remove dummy PM handling Since commit 63d00be69348fda4 ("PM: runtime: Allow unassigned ->runtime_suspend|resume callbacks"), unassigned .runtime_{suspend,resume}() callbacks are treated the same as dummy callbacks that just return zero. Unassigned system sleep callbacks were always treated the same as dummy callbacks that just return zero. As the driver has no other PM callbacks than dummy callbacks, all PM handling can be removed. Signed-off-by: Geert Uytterhoeven Reviewed-by: Ming Qian Signed-off-by: Hans Verkuil --- drivers/media/platform/amphion/vpu_drv.c | 26 ------------------------ 1 file changed, 26 deletions(-) diff --git a/drivers/media/platform/amphion/vpu_drv.c b/drivers/media/platform/amphion/vpu_drv.c index efbfd2652721..2cca61f41bea 100644 --- a/drivers/media/platform/amphion/vpu_drv.c +++ b/drivers/media/platform/amphion/vpu_drv.c @@ -175,31 +175,6 @@ static void vpu_remove(struct platform_device *pdev) mutex_destroy(&vpu->lock); } -static int __maybe_unused vpu_runtime_resume(struct device *dev) -{ - return 0; -} - -static int __maybe_unused vpu_runtime_suspend(struct device *dev) -{ - return 0; -} - -static int __maybe_unused vpu_resume(struct device *dev) -{ - return 0; -} - -static int __maybe_unused vpu_suspend(struct device *dev) -{ - return 0; -} - -static const struct dev_pm_ops vpu_pm_ops = { - SET_RUNTIME_PM_OPS(vpu_runtime_suspend, vpu_runtime_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(vpu_suspend, vpu_resume) -}; - static struct vpu_resources imx8qxp_res = { .plat_type = IMX8QXP, .mreg_base = 0x40000000, @@ -231,7 +206,6 @@ static struct platform_driver amphion_vpu_driver = { .driver = { .name = "amphion-vpu", .of_match_table = vpu_dt_match, - .pm = &vpu_pm_ops, }, }; From bb10fdfe8d3360692c856f6e528d92c3c2b5f821 Mon Sep 17 00:00:00 2001 From: Xichao Zhao Date: Tue, 9 Sep 2025 14:32:54 +0800 Subject: [PATCH 144/249] media: dvb_ca_en50221: fix "writen"->"written" Trivial fix to spelling mistake in comment text. Signed-off-by: Xichao Zhao Signed-off-by: Hans Verkuil --- drivers/media/dvb-core/dvb_ca_en50221.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb-core/dvb_ca_en50221.c index baf64540dc00..7b591aa1179f 100644 --- a/drivers/media/dvb-core/dvb_ca_en50221.c +++ b/drivers/media/dvb-core/dvb_ca_en50221.c @@ -785,7 +785,7 @@ static int dvb_ca_en50221_read_data(struct dvb_ca_private *ca, int slot, * be written. * @bytes_write: Size of ebuf. * @size_write_flag: A flag on Command Register which says whether the link size - * information will be writen or not. + * information will be written or not. * * return: Number of bytes written, or < 0 on error. */ From f17d28968b7ba8722aa218d2e1362e8b5e010bc6 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 2 Oct 2025 13:32:53 +0300 Subject: [PATCH 145/249] media: v4l2-subdev: Make media_entity_to_v4l2_subdev() const-aware Retain the constness of the object in media_entity_to_v4l2_subdev(), by switching to container_of_const(). Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- include/media/v4l2-subdev.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/media/v4l2-subdev.h b/include/media/v4l2-subdev.h index e0bb58cb6d04..a37d9a847196 100644 --- a/include/media/v4l2-subdev.h +++ b/include/media/v4l2-subdev.h @@ -1103,7 +1103,7 @@ struct v4l2_subdev { typeof(ent) __me_sd_ent = (ent); \ \ __me_sd_ent ? \ - container_of(__me_sd_ent, struct v4l2_subdev, entity) : \ + container_of_const(__me_sd_ent, struct v4l2_subdev, entity) : \ NULL; \ }) From 68871116f961532910ccb97b6f437acf7e00548c Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 2 Oct 2025 13:32:54 +0300 Subject: [PATCH 146/249] media: v4l2-dev: Make macros to obtain containers const-aware Retain the constness of the object in media_entity_to_video_device() and to_video_device(), by switching to container_of_const(). Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- include/media/v4l2-dev.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index a213c3398dcf..2e0f6d2e6a78 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -320,8 +320,8 @@ struct video_device { typeof(__entity) __me_vdev_ent = __entity; \ \ __me_vdev_ent ? \ - container_of(__me_vdev_ent, struct video_device, entity) : \ - NULL; \ + container_of_const(__me_vdev_ent, struct video_device, \ + entity) : NULL; \ }) /** @@ -330,7 +330,7 @@ struct video_device { * * @cd: pointer to &struct device */ -#define to_video_device(cd) container_of(cd, struct video_device, dev) +#define to_video_device(cd) container_of_const(cd, struct video_device, dev) /** * __video_register_device - register video4linux devices From 35f29b44ac0958cb4f4cb042b877d2546f3f6d27 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Thu, 2 Oct 2025 13:32:55 +0300 Subject: [PATCH 147/249] media: mc: Make macros to obtain containers const-aware Retain the constness of the graph objects and interfaces in macros to obtain their containers, by switching to container_of_const(). Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- include/media/media-entity.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/media/media-entity.h b/include/media/media-entity.h index 64cf590b1134..b91ff6f8c3bb 100644 --- a/include/media/media-entity.h +++ b/include/media/media-entity.h @@ -627,7 +627,7 @@ static inline bool media_entity_enum_intersects( * @gobj: Pointer to the struct &media_gobj graph object */ #define gobj_to_entity(gobj) \ - container_of(gobj, struct media_entity, graph_obj) + container_of_const(gobj, struct media_entity, graph_obj) /** * gobj_to_pad - returns the struct &media_pad pointer from the @@ -636,7 +636,7 @@ static inline bool media_entity_enum_intersects( * @gobj: Pointer to the struct &media_gobj graph object */ #define gobj_to_pad(gobj) \ - container_of(gobj, struct media_pad, graph_obj) + container_of_const(gobj, struct media_pad, graph_obj) /** * gobj_to_link - returns the struct &media_link pointer from the @@ -645,7 +645,7 @@ static inline bool media_entity_enum_intersects( * @gobj: Pointer to the struct &media_gobj graph object */ #define gobj_to_link(gobj) \ - container_of(gobj, struct media_link, graph_obj) + container_of_const(gobj, struct media_link, graph_obj) /** * gobj_to_intf - returns the struct &media_interface pointer from the @@ -654,7 +654,7 @@ static inline bool media_entity_enum_intersects( * @gobj: Pointer to the struct &media_gobj graph object */ #define gobj_to_intf(gobj) \ - container_of(gobj, struct media_interface, graph_obj) + container_of_const(gobj, struct media_interface, graph_obj) /** * intf_to_devnode - returns the struct media_intf_devnode pointer from the @@ -663,7 +663,7 @@ static inline bool media_entity_enum_intersects( * @intf: Pointer to struct &media_intf_devnode */ #define intf_to_devnode(intf) \ - container_of(intf, struct media_intf_devnode, intf) + container_of_const(intf, struct media_intf_devnode, intf) /** * media_gobj_create - Initialize a graph object From 17dc8ccd6dd5ffe30aa9b0d36e2af1389344ce2b Mon Sep 17 00:00:00 2001 From: Marek Szyprowski Date: Tue, 14 Oct 2025 12:46:43 +0200 Subject: [PATCH 148/249] media: samsung: exynos4-is: fix potential ABBA deadlock on init v4l2_device_register_subdev_nodes() must called without taking media_dev->graph_mutex to avoid potential AB-BA deadlock on further subdevice driver initialization. Fixes: fa91f1056f17 ("[media] exynos4-is: Add support for asynchronous subdevices registration") Cc: stable@vger.kernel.org Signed-off-by: Marek Szyprowski Acked-by: Sylwester Nawrocki Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/exynos4-is/media-dev.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/samsung/exynos4-is/media-dev.c b/drivers/media/platform/samsung/exynos4-is/media-dev.c index d6f7601de597..bc7087eb761a 100644 --- a/drivers/media/platform/samsung/exynos4-is/media-dev.c +++ b/drivers/media/platform/samsung/exynos4-is/media-dev.c @@ -1399,12 +1399,14 @@ static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) mutex_lock(&fmd->media_dev.graph_mutex); ret = fimc_md_create_links(fmd); - if (ret < 0) - goto unlock; + if (ret < 0) { + mutex_unlock(&fmd->media_dev.graph_mutex); + return ret; + } + + mutex_unlock(&fmd->media_dev.graph_mutex); ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); -unlock: - mutex_unlock(&fmd->media_dev.graph_mutex); if (ret < 0) return ret; From 8a9f914e2e2ec588e537221b20ab35cab1721422 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 16 Oct 2025 12:16:26 -0400 Subject: [PATCH 149/249] media: i2c: ds90ub953: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney Reviewed-by: Tomi Valkeinen Signed-off-by: Hans Verkuil --- drivers/media/i2c/ds90ub953.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/ds90ub953.c b/drivers/media/i2c/ds90ub953.c index 087bb4ea5559..daefdb108fbf 100644 --- a/drivers/media/i2c/ds90ub953.c +++ b/drivers/media/i2c/ds90ub953.c @@ -1023,15 +1023,17 @@ static unsigned long ub953_clkout_recalc_rate(struct clk_hw *hw, return rate; } -static long ub953_clkout_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int ub953_clkout_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct ub953_data *priv = container_of(hw, struct ub953_data, clkout_clk_hw); struct ub953_clkout_data clkout_data; - ub953_calc_clkout_params(priv, rate, &clkout_data); + ub953_calc_clkout_params(priv, req->rate, &clkout_data); - return clkout_data.rate; + req->rate = clkout_data.rate; + + return 0; } static int ub953_clkout_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1050,7 +1052,7 @@ static int ub953_clkout_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops ub953_clkout_ops = { .recalc_rate = ub953_clkout_recalc_rate, - .round_rate = ub953_clkout_round_rate, + .determine_rate = ub953_clkout_determine_rate, .set_rate = ub953_clkout_set_rate, }; From 8b8173f4f578a395e7b7c46b756625279f710266 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 16 Oct 2025 12:16:27 -0400 Subject: [PATCH 150/249] media: i2c: max96717: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney Signed-off-by: Hans Verkuil --- drivers/media/i2c/max96717.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/media/i2c/max96717.c b/drivers/media/i2c/max96717.c index 71ec4fdb8e3d..72f021b1a7b9 100644 --- a/drivers/media/i2c/max96717.c +++ b/drivers/media/i2c/max96717.c @@ -782,21 +782,23 @@ static unsigned int max96717_clk_find_best_index(struct max96717_priv *priv, return idx; } -static long max96717_clk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int max96717_clk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct max96717_priv *priv = clk_hw_to_max96717(hw); struct device *dev = &priv->client->dev; unsigned int idx; - idx = max96717_clk_find_best_index(priv, rate); + idx = max96717_clk_find_best_index(priv, req->rate); - if (rate != max96717_predef_freqs[idx].freq) { + if (req->rate != max96717_predef_freqs[idx].freq) { dev_warn(dev, "Request CLK freq:%lu, found CLK freq:%lu\n", - rate, max96717_predef_freqs[idx].freq); + req->rate, max96717_predef_freqs[idx].freq); } - return max96717_predef_freqs[idx].freq; + req->rate = max96717_predef_freqs[idx].freq; + + return 0; } static int max96717_clk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -847,7 +849,7 @@ static const struct clk_ops max96717_clk_ops = { .unprepare = max96717_clk_unprepare, .set_rate = max96717_clk_set_rate, .recalc_rate = max96717_clk_recalc_rate, - .round_rate = max96717_clk_round_rate, + .determine_rate = max96717_clk_determine_rate, }; static int max96717_register_clkout(struct max96717_priv *priv) From a0df157faf8b2964f5fe719594248d76928a3984 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 16 Oct 2025 12:16:28 -0400 Subject: [PATCH 151/249] media: i2c: tc358746: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney Signed-off-by: Hans Verkuil --- drivers/media/i2c/tc358746.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/media/i2c/tc358746.c b/drivers/media/i2c/tc358746.c index bcfc274cf891..86d9ba3ea4e5 100644 --- a/drivers/media/i2c/tc358746.c +++ b/drivers/media/i2c/tc358746.c @@ -1222,14 +1222,16 @@ tc358746_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) return tc358746->pll_rate / (prediv * postdiv); } -static long tc358746_mclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int tc358746_mclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct tc358746 *tc358746 = clk_hw_to_tc358746(hw); - *parent_rate = tc358746->pll_rate; + req->best_parent_rate = tc358746->pll_rate; - return tc358746_find_mclk_settings(tc358746, rate); + req->rate = tc358746_find_mclk_settings(tc358746, req->rate); + + return 0; } static int tc358746_mclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -1246,7 +1248,7 @@ static const struct clk_ops tc358746_mclk_ops = { .enable = tc358746_mclk_enable, .disable = tc358746_mclk_disable, .recalc_rate = tc358746_recalc_rate, - .round_rate = tc358746_mclk_round_rate, + .determine_rate = tc358746_mclk_determine_rate, .set_rate = tc358746_mclk_set_rate, }; From f6be653b38712a557e9a76defb664928d1bde4f4 Mon Sep 17 00:00:00 2001 From: Brian Masney Date: Thu, 16 Oct 2025 12:16:29 -0400 Subject: [PATCH 152/249] media: platform: ti: omap3isp: isp: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney Signed-off-by: Hans Verkuil --- drivers/media/platform/ti/omap3isp/isp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/ti/omap3isp/isp.c b/drivers/media/platform/ti/omap3isp/isp.c index f51cf6119e97..8ac2bdcdf87b 100644 --- a/drivers/media/platform/ti/omap3isp/isp.c +++ b/drivers/media/platform/ti/omap3isp/isp.c @@ -240,11 +240,11 @@ static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate) return divider; } -static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *parent_rate) +static int isp_xclk_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - isp_xclk_calc_divider(&rate, *parent_rate); - return rate; + isp_xclk_calc_divider(&req->rate, req->best_parent_rate); + return 0; } static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate, @@ -275,7 +275,7 @@ static const struct clk_ops isp_xclk_ops = { .enable = isp_xclk_enable, .disable = isp_xclk_disable, .recalc_rate = isp_xclk_recalc_rate, - .round_rate = isp_xclk_round_rate, + .determine_rate = isp_xclk_determine_rate, .set_rate = isp_xclk_set_rate, }; From 0ef841113724166c3c484d0e9ae6db1eb5634fde Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 07:33:20 +0200 Subject: [PATCH 153/249] media: vpif_capture: fix section mismatch Platform drivers can be probed after their init sections have been discarded (e.g. on probe deferral or manual rebind through sysfs) so the probe function must not live in init. Note that commit ffa1b391c61b ("V4L/DVB: vpif_cap/disp: Removed section mismatch warning") incorrectly suppressed the modpost warning. Fixes: ffa1b391c61b ("V4L/DVB: vpif_cap/disp: Removed section mismatch warning") Fixes: 6ffefff5a9e7 ("V4L/DVB (12906c): V4L : vpif capture driver for DM6467") Cc: stable@vger.kernel.org # 2.6.32 Signed-off-by: Johan Hovold Signed-off-by: Hans Verkuil --- drivers/media/platform/ti/davinci/vpif_capture.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti/davinci/vpif_capture.c b/drivers/media/platform/ti/davinci/vpif_capture.c index d053972888d1..243c6196b024 100644 --- a/drivers/media/platform/ti/davinci/vpif_capture.c +++ b/drivers/media/platform/ti/davinci/vpif_capture.c @@ -1600,7 +1600,7 @@ vpif_capture_get_pdata(struct platform_device *pdev, * This creates device entries by register itself to the V4L2 driver and * initializes fields of each channel objects */ -static __init int vpif_probe(struct platform_device *pdev) +static int vpif_probe(struct platform_device *pdev) { struct vpif_subdev_info *subdevdata; struct i2c_adapter *i2c_adap; @@ -1807,7 +1807,7 @@ static int vpif_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(vpif_pm_ops, vpif_suspend, vpif_resume); -static __refdata struct platform_driver vpif_driver = { +static struct platform_driver vpif_driver = { .driver = { .name = VPIF_DRIVER_NAME, .pm = &vpif_pm_ops, From 59ca64bf98e4209df8ace8057d31ae3c80f948cd Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 07:33:21 +0200 Subject: [PATCH 154/249] media: vpif_display: fix section mismatch Platform drivers can be probed after their init sections have been discarded (e.g. on probe deferral or manual rebind through sysfs) so the probe function must not live in init. Note that commit ffa1b391c61b ("V4L/DVB: vpif_cap/disp: Removed section mismatch warning") incorrectly suppressed the modpost warning. Fixes: ffa1b391c61b ("V4L/DVB: vpif_cap/disp: Removed section mismatch warning") Fixes: e7332e3a552f ("V4L/DVB (12176): davinci/vpif_display: Add VPIF display driver") Cc: stable@vger.kernel.org # 2.6.32 Signed-off-by: Johan Hovold Signed-off-by: Hans Verkuil --- drivers/media/platform/ti/davinci/vpif_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/ti/davinci/vpif_display.c b/drivers/media/platform/ti/davinci/vpif_display.c index 70c89549f4b6..1e7815e9f8e0 100644 --- a/drivers/media/platform/ti/davinci/vpif_display.c +++ b/drivers/media/platform/ti/davinci/vpif_display.c @@ -1214,7 +1214,7 @@ static int vpif_probe_complete(void) * vpif_probe: This function creates device entries by register itself to the * V4L2 driver and initializes fields of each channel objects */ -static __init int vpif_probe(struct platform_device *pdev) +static int vpif_probe(struct platform_device *pdev) { struct vpif_subdev_info *subdevdata; struct i2c_adapter *i2c_adap; @@ -1390,7 +1390,7 @@ static int vpif_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(vpif_pm_ops, vpif_suspend, vpif_resume); -static __refdata struct platform_driver vpif_driver = { +static struct platform_driver vpif_driver = { .driver = { .name = VPIF_DRIVER_NAME, .pm = &vpif_pm_ops, From c349eb64c2711c80b2d88c70417fdb4284e968fb Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:02:48 +0200 Subject: [PATCH 155/249] media: exynos4-is: fimc-is: drop unused module alias The driver has never supported anything but OF probing so drop the unused platform module alias. Signed-off-by: Johan Hovold Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/exynos4-is/fimc-is.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/samsung/exynos4-is/fimc-is.c b/drivers/media/platform/samsung/exynos4-is/fimc-is.c index ed7b7ca16f71..0827fdaf455a 100644 --- a/drivers/media/platform/samsung/exynos4-is/fimc-is.c +++ b/drivers/media/platform/samsung/exynos4-is/fimc-is.c @@ -996,7 +996,6 @@ static void fimc_is_module_exit(void) module_init(fimc_is_module_init); module_exit(fimc_is_module_exit); -MODULE_ALIAS("platform:" FIMC_IS_DRV_NAME); MODULE_AUTHOR("Younghwan Joo "); MODULE_AUTHOR("Sylwester Nawrocki "); MODULE_DESCRIPTION("Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver"); From dd15fedb67dd56b3051e11df4ad6b8f56710ccf0 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:02:49 +0200 Subject: [PATCH 156/249] media: exynos4-is: fimc-lite: drop unused module alias The driver does not support anything but OF probing since commit 47d1f33ff43e ("[media] exynos4-is: Drop drvdata handling in fimc-lite for non-dt platforms") so drop the unused platform module alias. Signed-off-by: Johan Hovold Signed-off-by: Hans Verkuil --- drivers/media/platform/samsung/exynos4-is/fimc-lite.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/samsung/exynos4-is/fimc-lite.c b/drivers/media/platform/samsung/exynos4-is/fimc-lite.c index 0ce293b0718b..8be20fd32d1c 100644 --- a/drivers/media/platform/samsung/exynos4-is/fimc-lite.c +++ b/drivers/media/platform/samsung/exynos4-is/fimc-lite.c @@ -1662,4 +1662,3 @@ static struct platform_driver fimc_lite_driver = { module_platform_driver(fimc_lite_driver); MODULE_DESCRIPTION("Samsung EXYNOS FIMC-LITE (camera host interface) driver"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME); From bc22cd5e076f6b4e1fe727e0cf8339f746b3a696 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Thu, 23 Oct 2025 10:53:13 +0200 Subject: [PATCH 157/249] Documentation: media: fix VIDIOC_REMOVE_BUFS typo Add missing `. The missing backtick messed up the documentation output. Signed-off-by: Hans Verkuil --- Documentation/userspace-api/media/v4l/vidioc-remove-bufs.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/userspace-api/media/v4l/vidioc-remove-bufs.rst b/Documentation/userspace-api/media/v4l/vidioc-remove-bufs.rst index 1995b39af9ba..b498d60752d7 100644 --- a/Documentation/userspace-api/media/v4l/vidioc-remove-bufs.rst +++ b/Documentation/userspace-api/media/v4l/vidioc-remove-bufs.rst @@ -54,7 +54,7 @@ are invoked. - ``count`` - The number of buffers to be removed with indices 'index' until 'index + count - 1'. All buffers in this range must be valid and in DEQUEUED state. - :ref:`VIDIOC_REMOVE_BUFS` will always check the validity of ``type`, if it is + :ref:`VIDIOC_REMOVE_BUFS` will always check the validity of ``type``, if it is invalid it returns ``EINVAL`` error code. If count is set to 0 :ref:`VIDIOC_REMOVE_BUFS` will do nothing and return 0. * - __u32 From ba92a96b1e95a67cb736d095dceb788207b90a7b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 26 Oct 2025 20:08:29 +0200 Subject: [PATCH 158/249] media: saa7146: Replace saa7146_ext_vv.vbi_fops with write function The vbi_fops stored in struct saa7146_ext_vv is a full v4l2_file_operations, but only its .write field is used. Replace it with a single vbi_write function pointer to save memory. Signed-off-by: Laurent Pinchart Signed-off-by: Hans Verkuil --- drivers/media/common/saa7146/saa7146_fops.c | 4 ++-- drivers/staging/media/av7110/av7110_v4l.c | 4 ++-- include/media/drv-intf/saa7146_vv.h | 3 ++- 3 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/media/common/saa7146/saa7146_fops.c b/drivers/media/common/saa7146/saa7146_fops.c index 9d0362a75ecd..a9e3bad76d54 100644 --- a/drivers/media/common/saa7146/saa7146_fops.c +++ b/drivers/media/common/saa7146/saa7146_fops.c @@ -186,11 +186,11 @@ static ssize_t fops_write(struct file *file, const char __user *data, size_t cou struct saa7146_dev *dev = video_drvdata(file); int ret; - if (vdev->vfl_type != VFL_TYPE_VBI || !dev->ext_vv_data->vbi_fops.write) + if (vdev->vfl_type != VFL_TYPE_VBI || !dev->ext_vv_data->vbi_write) return -EINVAL; if (mutex_lock_interruptible(vdev->lock)) return -ERESTARTSYS; - ret = dev->ext_vv_data->vbi_fops.write(file, data, count, ppos); + ret = dev->ext_vv_data->vbi_write(file, data, count, ppos); mutex_unlock(vdev->lock); return ret; } diff --git a/drivers/staging/media/av7110/av7110_v4l.c b/drivers/staging/media/av7110/av7110_v4l.c index 04e659243f02..200a7a29ea31 100644 --- a/drivers/staging/media/av7110/av7110_v4l.c +++ b/drivers/staging/media/av7110/av7110_v4l.c @@ -940,7 +940,7 @@ static struct saa7146_ext_vv av7110_vv_data_st = { .num_stds = ARRAY_SIZE(standard), .std_callback = &std_callback, - .vbi_fops.write = av7110_vbi_write, + .vbi_write = av7110_vbi_write, }; static struct saa7146_ext_vv av7110_vv_data_c = { @@ -953,6 +953,6 @@ static struct saa7146_ext_vv av7110_vv_data_c = { .num_stds = ARRAY_SIZE(standard), .std_callback = &std_callback, - .vbi_fops.write = av7110_vbi_write, + .vbi_write = av7110_vbi_write, }; diff --git a/include/media/drv-intf/saa7146_vv.h b/include/media/drv-intf/saa7146_vv.h index 55c7d70b9feb..f66f4dfccf14 100644 --- a/include/media/drv-intf/saa7146_vv.h +++ b/include/media/drv-intf/saa7146_vv.h @@ -130,7 +130,8 @@ struct saa7146_ext_vv /* pointer to the saa7146 core ops */ const struct v4l2_ioctl_ops *core_ops; - struct v4l2_file_operations vbi_fops; + ssize_t (*vbi_write)(struct file *file, const char __user *data, + size_t count, loff_t *ppos); }; struct saa7146_use_ops { From 94de23a9aa487d7c1372efb161721d7949a177ae Mon Sep 17 00:00:00 2001 From: Haotian Zhang Date: Tue, 28 Oct 2025 14:44:43 +0800 Subject: [PATCH 159/249] media: videobuf2: Fix device reference leak in vb2_dc_alloc error path In vb2_dc_alloc(), get_device() is called to increment the device reference count. However, if subsequent DMA allocation fails (vb2_dc_alloc_coherent or vb2_dc_alloc_non_coherent returns error), the function returns without calling put_device(), causing a device reference leak. Add put_device() call in the error path before kfree() to properly release the device reference acquired earlier. Fixes: de27891f675e ("media: videobuf2: handle non-contiguous DMA allocations") Cc: stable@vger.kernel.org Signed-off-by: Haotian Zhang Reviewed-by: Marek Szyprowski Signed-off-by: Hans Verkuil --- drivers/media/common/videobuf2/videobuf2-dma-contig.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/media/common/videobuf2/videobuf2-dma-contig.c b/drivers/media/common/videobuf2/videobuf2-dma-contig.c index a13ec569c82f..7123c5fae92c 100644 --- a/drivers/media/common/videobuf2/videobuf2-dma-contig.c +++ b/drivers/media/common/videobuf2/videobuf2-dma-contig.c @@ -258,6 +258,7 @@ static void *vb2_dc_alloc(struct vb2_buffer *vb, if (ret) { dev_err(dev, "dma alloc of size %lu failed\n", size); + put_device(buf->dev); kfree(buf); return ERR_PTR(-ENOMEM); } From 2d71d7b5e95120c7f922f2836846d6a0d9c36b11 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20T=C5=AFma?= Date: Wed, 29 Oct 2025 15:12:33 +0100 Subject: [PATCH 160/249] media: pci: mgb4: Fix DV capabilities MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the same value (4096) for the maximum height as used for width. The HW limits are a 4K video, but the orientation does not matter. Fixes issues with some portrait oriented Audi displays that exceed the old height value (2160). Signed-off-by: Martin Tůma Signed-off-by: Hans Verkuil --- drivers/media/pci/mgb4/mgb4_vin.c | 4 ++-- drivers/media/pci/mgb4/mgb4_vout.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/pci/mgb4/mgb4_vin.c b/drivers/media/pci/mgb4/mgb4_vin.c index 42c327bc50e1..4b38076486ff 100644 --- a/drivers/media/pci/mgb4/mgb4_vin.c +++ b/drivers/media/pci/mgb4/mgb4_vin.c @@ -64,10 +64,10 @@ static const struct mgb4_i2c_kv gmsl_i2c[] = { static const struct v4l2_dv_timings_cap video_timings_cap = { .type = V4L2_DV_BT_656_1120, .bt = { - .min_width = 320, + .min_width = 240, .max_width = 4096, .min_height = 240, - .max_height = 2160, + .max_height = 4096, .min_pixelclock = 1843200, /* 320 x 240 x 24Hz */ .max_pixelclock = 530841600, /* 4096 x 2160 x 60Hz */ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | diff --git a/drivers/media/pci/mgb4/mgb4_vout.c b/drivers/media/pci/mgb4/mgb4_vout.c index c179c425e167..fd93fbbaf755 100644 --- a/drivers/media/pci/mgb4/mgb4_vout.c +++ b/drivers/media/pci/mgb4/mgb4_vout.c @@ -44,10 +44,10 @@ static const struct mgb4_i2c_kv fpdl3_i2c[] = { static const struct v4l2_dv_timings_cap video_timings_cap = { .type = V4L2_DV_BT_656_1120, .bt = { - .min_width = 320, + .min_width = 240, .max_width = 4096, .min_height = 240, - .max_height = 2160, + .max_height = 4096, .min_pixelclock = 1843200, /* 320 x 240 x 24Hz */ .max_pixelclock = 530841600, /* 4096 x 2160 x 60Hz */ .standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT | From 1a31cb2782104969e48c7ce7e4fc06e403fcb5cf Mon Sep 17 00:00:00 2001 From: Edward Adam Davis Date: Mon, 3 Nov 2025 19:57:49 +0800 Subject: [PATCH 161/249] media: dvb-usb: pctv452e: move snd/rcv len check before kmalloc syzbot reported a uninit-value in pctv452e_i2c_msg. [1] When the snd_len or rcv_len check fails and jumps to failed, buf is uninitialized, triggering the uninit-value issue. Move the snd/rcv length check before kmalloc, and return -EINVAL directly if the condition is met. [1] BUG: KMSAN: uninit-value in hex_string+0x681/0x740 lib/vsprintf.c:1220 pctv452e_i2c_msg+0x82a/0x8f0 drivers/media/usb/dvb-usb/pctv452e.c:467 pctv452e_i2c_xfer+0x2e6/0x4c0 drivers/media/usb/dvb-usb/pctv452e.c:502 Reported-by: syzbot+480edd2cadb85ddb4bbe@syzkaller.appspotmail.com Closes: https://syzkaller.appspot.com/bug?extid=480edd2cadb85ddb4bbe Signed-off-by: Edward Adam Davis Signed-off-by: Hans Verkuil --- drivers/media/usb/dvb-usb/pctv452e.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/media/usb/dvb-usb/pctv452e.c b/drivers/media/usb/dvb-usb/pctv452e.c index 5094de9a312e..bc7a224d829e 100644 --- a/drivers/media/usb/dvb-usb/pctv452e.c +++ b/drivers/media/usb/dvb-usb/pctv452e.c @@ -422,16 +422,15 @@ static int pctv452e_i2c_msg(struct dvb_usb_device *d, u8 addr, u8 id; int ret; + if (snd_len > 64 - 7 || rcv_len > 64 - 7) + return -EINVAL; + buf = kmalloc(64, GFP_KERNEL); if (!buf) return -ENOMEM; id = state->c++; - ret = -EINVAL; - if (snd_len > 64 - 7 || rcv_len > 64 - 7) - goto failed; - buf[0] = SYNC_BYTE_OUT; buf[1] = id; buf[2] = PCTV_CMD_I2C; From 416acb41d4c773906f91360b07723add9bc6d5f8 Mon Sep 17 00:00:00 2001 From: "Rob Herring (Arm)" Date: Wed, 13 Aug 2025 16:49:48 -0500 Subject: [PATCH 162/249] media: Use of_reserved_mem_region_to_resource() for "memory-region" Use the newly added of_reserved_mem_region_to_resource() function to handle "memory-region" properties. Reviewed-by: Dikshita Agarwal Reviewed-by: Ming Qian Signed-off-by: Rob Herring (Arm) Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/amphion/vpu_core.c | 40 +++++-------------- .../media/platform/qcom/iris/iris_firmware.c | 18 +++------ drivers/media/platform/qcom/venus/firmware.c | 19 +++------ 3 files changed, 21 insertions(+), 56 deletions(-) diff --git a/drivers/media/platform/amphion/vpu_core.c b/drivers/media/platform/amphion/vpu_core.c index da00f5fc0e5d..168f0514851e 100644 --- a/drivers/media/platform/amphion/vpu_core.c +++ b/drivers/media/platform/amphion/vpu_core.c @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include #include #include @@ -542,47 +542,30 @@ const struct vpu_core_resources *vpu_get_resource(struct vpu_inst *inst) static int vpu_core_parse_dt(struct vpu_core *core, struct device_node *np) { - struct device_node *node; struct resource res; int ret; - if (of_count_phandle_with_args(np, "memory-region", NULL) < 2) { - dev_err(core->dev, "need 2 memory-region for boot and rpc\n"); - return -ENODEV; + ret = of_reserved_mem_region_to_resource(np, 0, &res); + if (ret) { + dev_err(core->dev, "Cannot get boot-region\n"); + return ret; } - node = of_parse_phandle(np, "memory-region", 0); - if (!node) { - dev_err(core->dev, "boot-region of_parse_phandle error\n"); - return -ENODEV; - } - if (of_address_to_resource(node, 0, &res)) { - dev_err(core->dev, "boot-region of_address_to_resource error\n"); - of_node_put(node); - return -EINVAL; - } core->fw.phys = res.start; core->fw.length = resource_size(&res); - of_node_put(node); + ret = of_reserved_mem_region_to_resource(np, 1, &res); + if (ret) { + dev_err(core->dev, "Cannot get rpc-region\n"); + return ret; + } - node = of_parse_phandle(np, "memory-region", 1); - if (!node) { - dev_err(core->dev, "rpc-region of_parse_phandle error\n"); - return -ENODEV; - } - if (of_address_to_resource(node, 0, &res)) { - dev_err(core->dev, "rpc-region of_address_to_resource error\n"); - of_node_put(node); - return -EINVAL; - } core->rpc.phys = res.start; core->rpc.length = resource_size(&res); if (core->rpc.length < core->res->rpc_size + core->res->fwlog_size) { dev_err(core->dev, "the rpc-region <%pad, 0x%x> is not enough\n", &core->rpc.phys, core->rpc.length); - of_node_put(node); return -EINVAL; } @@ -594,7 +577,6 @@ static int vpu_core_parse_dt(struct vpu_core *core, struct device_node *np) if (ret != VPU_CORE_MEMORY_UNCACHED) { dev_err(core->dev, "rpc region<%pad, 0x%x> isn't uncached\n", &core->rpc.phys, core->rpc.length); - of_node_put(node); return -EINVAL; } @@ -606,8 +588,6 @@ static int vpu_core_parse_dt(struct vpu_core *core, struct device_node *np) core->act.length = core->rpc.length - core->res->rpc_size - core->log.length; core->rpc.length = core->res->rpc_size; - of_node_put(node); - return 0; } diff --git a/drivers/media/platform/qcom/iris/iris_firmware.c b/drivers/media/platform/qcom/iris/iris_firmware.c index 9ab499fad946..679444327ed7 100644 --- a/drivers/media/platform/qcom/iris/iris_firmware.c +++ b/drivers/media/platform/qcom/iris/iris_firmware.c @@ -19,8 +19,7 @@ static int iris_load_fw_to_memory(struct iris_core *core, const char *fw_name) u32 pas_id = core->iris_platform_data->pas_id; const struct firmware *firmware = NULL; struct device *dev = core->dev; - struct reserved_mem *rmem; - struct device_node *node; + struct resource res; phys_addr_t mem_phys; size_t res_size; ssize_t fw_size; @@ -30,17 +29,12 @@ static int iris_load_fw_to_memory(struct iris_core *core, const char *fw_name) if (strlen(fw_name) >= MAX_FIRMWARE_NAME_SIZE - 4) return -EINVAL; - node = of_parse_phandle(dev->of_node, "memory-region", 0); - if (!node) - return -EINVAL; + ret = of_reserved_mem_region_to_resource(dev->of_node, 0, &res); + if (ret) + return ret; - rmem = of_reserved_mem_lookup(node); - of_node_put(node); - if (!rmem) - return -EINVAL; - - mem_phys = rmem->base; - res_size = rmem->size; + mem_phys = res.start; + res_size = resource_size(&res); ret = request_firmware(&firmware, fw_name, dev); if (ret) diff --git a/drivers/media/platform/qcom/venus/firmware.c b/drivers/media/platform/qcom/venus/firmware.c index af0ac40bec9b..1de7436713ed 100644 --- a/drivers/media/platform/qcom/venus/firmware.c +++ b/drivers/media/platform/qcom/venus/firmware.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -83,8 +82,7 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, phys_addr_t *mem_phys, size_t *mem_size) { const struct firmware *mdt; - struct reserved_mem *rmem; - struct device_node *node; + struct resource res; struct device *dev; ssize_t fw_size; void *mem_va; @@ -94,15 +92,8 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, *mem_size = 0; dev = core->dev; - node = of_parse_phandle(dev->of_node, "memory-region", 0); - if (!node) { - dev_err(dev, "no memory-region specified\n"); - return -EINVAL; - } - - rmem = of_reserved_mem_lookup(node); - of_node_put(node); - if (!rmem) { + ret = of_reserved_mem_region_to_resource(dev->of_node, 0, &res); + if (ret) { dev_err(dev, "failed to lookup reserved memory-region\n"); return -EINVAL; } @@ -117,8 +108,8 @@ static int venus_load_fw(struct venus_core *core, const char *fwname, goto err_release_fw; } - *mem_phys = rmem->base; - *mem_size = rmem->size; + *mem_phys = res.start; + *mem_size = resource_size(&res); if (*mem_size < fw_size || fw_size > VENUS_FW_MEM_SIZE) { ret = -EINVAL; From 6e971cfe62e7a56593b22ab1ad0050ac49551696 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 07:58:09 +0200 Subject: [PATCH 163/249] media: venus: drop bogus probe deferrals The encoder and decoder platform devices are registered by the venus driver as children of the venus device, but even if someone were to mess this up no amount of probe deferring is going to conjure up a parent. Relatedly, the venus driver sets its driver data before registering the child devices and if this ever breaks we want to learn about it by failing probe. Signed-off-by: Johan Hovold Reviewed-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/venus/vdec.c | 5 +---- drivers/media/platform/qcom/venus/venc.c | 5 +---- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index bb0b4f6639c5..0597e11c4afa 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -1776,12 +1776,9 @@ static int vdec_probe(struct platform_device *pdev) struct venus_core *core; int ret; - if (!dev->parent) - return -EPROBE_DEFER; - core = dev_get_drvdata(dev->parent); if (!core) - return -EPROBE_DEFER; + return -EINVAL; platform_set_drvdata(pdev, core); diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 8a89c01c5dbb..98092a9f3cbf 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -1558,12 +1558,9 @@ static int venc_probe(struct platform_device *pdev) struct venus_core *core; int ret; - if (!dev->parent) - return -EPROBE_DEFER; - core = dev_get_drvdata(dev->parent); if (!core) - return -EPROBE_DEFER; + return -EINVAL; platform_set_drvdata(pdev, core); From bcaaa08dda6cd4477c3895c5841c73c4b1f45328 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:05:40 +0200 Subject: [PATCH 164/249] media: venus: drop unused module aliases The driver has never supported anything but OF probing so drop the unused platform module aliases. Signed-off-by: Johan Hovold Reviewed-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/venus/core.c | 1 - drivers/media/platform/qcom/venus/vdec.c | 1 - drivers/media/platform/qcom/venus/venc.c | 1 - 3 files changed, 3 deletions(-) diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c index abf959b8f3a6..24d2b2fd0340 100644 --- a/drivers/media/platform/qcom/venus/core.c +++ b/drivers/media/platform/qcom/venus/core.c @@ -1146,6 +1146,5 @@ static struct platform_driver qcom_venus_driver = { }; module_platform_driver(qcom_venus_driver); -MODULE_ALIAS("platform:qcom-venus"); MODULE_DESCRIPTION("Qualcomm Venus video encoder and decoder driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c index 0597e11c4afa..4a6641fdffcf 100644 --- a/drivers/media/platform/qcom/venus/vdec.c +++ b/drivers/media/platform/qcom/venus/vdec.c @@ -1877,6 +1877,5 @@ static struct platform_driver qcom_venus_dec_driver = { }; module_platform_driver(qcom_venus_dec_driver); -MODULE_ALIAS("platform:qcom-venus-decoder"); MODULE_DESCRIPTION("Qualcomm Venus video decoder driver"); MODULE_LICENSE("GPL v2"); diff --git a/drivers/media/platform/qcom/venus/venc.c b/drivers/media/platform/qcom/venus/venc.c index 98092a9f3cbf..b478b982a80d 100644 --- a/drivers/media/platform/qcom/venus/venc.c +++ b/drivers/media/platform/qcom/venus/venc.c @@ -1659,6 +1659,5 @@ static struct platform_driver qcom_venus_enc_driver = { }; module_platform_driver(qcom_venus_enc_driver); -MODULE_ALIAS("platform:qcom-venus-encoder"); MODULE_DESCRIPTION("Qualcomm Venus video encoder driver"); MODULE_LICENSE("GPL v2"); From 7c1f3bd58fa02f427ff4ef611fa49b56bc6f8f76 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 8 Oct 2025 15:22:25 +0530 Subject: [PATCH 165/249] media: iris: Add support for HFI_PROP_OPB_ENABLE to control split mode Add handling for the HFI_PROP_OPB_ENABLE property, which allows enabling or disabling split mode in the firmware. When HFI_PROP_OPB_ENABLE is set to true, the firmware activates split mode for output picture buffers (OPB). The OPB format is determined by the HFI_PROP_COLOR_FORMAT property, supporting NV12 or QC08C formats. Signed-off-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../platform/qcom/iris/iris_hfi_gen2_command.c | 15 +++++++++++++++ .../platform/qcom/iris/iris_hfi_gen2_defines.h | 1 + .../media/platform/qcom/iris/iris_platform_gen2.c | 1 + 3 files changed, 17 insertions(+) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 4ce71a142508..56ced61de924 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -422,6 +422,20 @@ static int iris_hfi_gen2_set_level(struct iris_inst *inst, u32 plane) sizeof(u32)); } +static int iris_hfi_gen2_set_opb_enable(struct iris_inst *inst, u32 plane) +{ + u32 port = iris_hfi_gen2_get_port(inst, plane); + u32 opb_enable = iris_split_mode_enabled(inst); + + return iris_hfi_gen2_session_set_property(inst, + HFI_PROP_OPB_ENABLE, + HFI_HOST_FLAGS_NONE, + port, + HFI_PAYLOAD_U32, + &opb_enable, + sizeof(u32)); +} + static int iris_hfi_gen2_set_colorformat(struct iris_inst *inst, u32 plane) { u32 port = iris_hfi_gen2_get_port(inst, plane); @@ -527,6 +541,7 @@ static int iris_hfi_gen2_session_set_config_params(struct iris_inst *inst, u32 p {HFI_PROP_SIGNAL_COLOR_INFO, iris_hfi_gen2_set_colorspace }, {HFI_PROP_PROFILE, iris_hfi_gen2_set_profile }, {HFI_PROP_LEVEL, iris_hfi_gen2_set_level }, + {HFI_PROP_OPB_ENABLE, iris_hfi_gen2_set_opb_enable }, {HFI_PROP_COLOR_FORMAT, iris_hfi_gen2_set_colorformat }, {HFI_PROP_LINEAR_STRIDE_SCANLINE, iris_hfi_gen2_set_linear_stride_scanline }, {HFI_PROP_TIER, iris_hfi_gen2_set_tier }, diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index aa1f795f5626..1b6a4dbac828 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -91,6 +91,7 @@ enum hfi_seq_header_mode { #define HFI_PROP_BUFFER_MARK 0x0300016c #define HFI_PROP_RAW_RESOLUTION 0x03000178 #define HFI_PROP_TOTAL_PEAK_BITRATE 0x0300017C +#define HFI_PROP_OPB_ENABLE 0x03000184 #define HFI_PROP_COMV_BUFFER_COUNT 0x03000193 #define HFI_PROP_END 0x03FFFFFF diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 36d69cc73986..69c952c68e93 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -691,6 +691,7 @@ static const u32 sm8550_venc_input_config_params[] = { }; static const u32 sm8550_vdec_output_config_params[] = { + HFI_PROP_OPB_ENABLE, HFI_PROP_COLOR_FORMAT, HFI_PROP_LINEAR_STRIDE_SCANLINE, }; From cfd71b14b0d6f62d97338a524c858c63cf699c3f Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 8 Oct 2025 15:22:26 +0530 Subject: [PATCH 166/249] media: iris: Add support for QC08C format for decoder Introduce handling for the QC08C format in the decoder. QC08C format is NV12 with UBWC compression. Update format checks and configuration to enable decoding of QC08C streams. Signed-off-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../media/platform/qcom/iris/iris_buffer.c | 5 +- .../qcom/iris/iris_hfi_gen1_command.c | 12 ++-- .../qcom/iris/iris_hfi_gen2_command.c | 3 +- .../media/platform/qcom/iris/iris_instance.h | 7 ++- drivers/media/platform/qcom/iris/iris_utils.c | 3 +- drivers/media/platform/qcom/iris/iris_vdec.c | 61 +++++++++++++++---- 6 files changed, 72 insertions(+), 19 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media/platform/qcom/iris/iris_buffer.c index c0900038e7de..83dcf49e57ec 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -261,7 +261,10 @@ int iris_get_buffer_size(struct iris_inst *inst, case BUF_INPUT: return iris_dec_bitstream_buffer_size(inst); case BUF_OUTPUT: - return iris_yuv_buffer_size_nv12(inst); + if (inst->fmt_dst->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_QC08C) + return iris_yuv_buffer_size_qc08c(inst); + else + return iris_yuv_buffer_size_nv12(inst); case BUF_DPB: return iris_yuv_buffer_size_qc08c(inst); default: diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c index e1788c266bb1..e458d3349ce0 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -774,20 +774,21 @@ static int iris_hfi_gen1_set_raw_format(struct iris_inst *inst, u32 plane) pixelformat = inst->fmt_dst->fmt.pix_mp.pixelformat; if (iris_split_mode_enabled(inst)) { fmt.buffer_type = HFI_BUFFER_OUTPUT; - fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? - HFI_COLOR_FORMAT_NV12_UBWC : 0; + fmt.format = HFI_COLOR_FORMAT_NV12_UBWC; ret = hfi_gen1_set_property(inst, ptype, &fmt, sizeof(fmt)); if (ret) return ret; fmt.buffer_type = HFI_BUFFER_OUTPUT2; - fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FORMAT_NV12 : 0; + fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? + HFI_COLOR_FORMAT_NV12 : HFI_COLOR_FORMAT_NV12_UBWC; ret = hfi_gen1_set_property(inst, ptype, &fmt, sizeof(fmt)); } else { fmt.buffer_type = HFI_BUFFER_OUTPUT; - fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FORMAT_NV12 : 0; + fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? + HFI_COLOR_FORMAT_NV12 : HFI_COLOR_FORMAT_NV12_UBWC; ret = hfi_gen1_set_property(inst, ptype, &fmt, sizeof(fmt)); } @@ -806,6 +807,9 @@ static int iris_hfi_gen1_set_format_constraints(struct iris_inst *inst, u32 plan const u32 ptype = HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO; struct hfi_uncompressed_plane_actual_constraints_info pconstraint; + if (inst->fmt_dst->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_QC08C) + return 0; + pconstraint.buffer_type = HFI_BUFFER_OUTPUT2; pconstraint.num_planes = 2; pconstraint.plane_format[0].stride_multiples = 128; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 56ced61de924..5ad202d3fcdc 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -443,7 +443,8 @@ static int iris_hfi_gen2_set_colorformat(struct iris_inst *inst, u32 plane) if (inst->domain == DECODER) { pixelformat = inst->fmt_dst->fmt.pix_mp.pixelformat; - hfi_colorformat = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FMT_NV12 : 0; + hfi_colorformat = pixelformat == V4L2_PIX_FMT_NV12 ? + HFI_COLOR_FMT_NV12 : HFI_COLOR_FMT_NV12_UBWC; } else { pixelformat = inst->fmt_src->fmt.pix_mp.pixelformat; hfi_colorformat = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FMT_NV12 : 0; diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/media/platform/qcom/iris/iris_instance.h index 5982d7adefea..62fbb30691ff 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -15,12 +15,17 @@ #define DEFAULT_WIDTH 320 #define DEFAULT_HEIGHT 240 -enum iris_fmt_type { +enum iris_fmt_type_out { IRIS_FMT_H264, IRIS_FMT_HEVC, IRIS_FMT_VP9, }; +enum iris_fmt_type_cap { + IRIS_FMT_NV12, + IRIS_FMT_QC08C, +}; + struct iris_fmt { u32 pixfmt; u32 type; diff --git a/drivers/media/platform/qcom/iris/iris_utils.c b/drivers/media/platform/qcom/iris/iris_utils.c index 85c70a62b1fd..e2f1131de431 100644 --- a/drivers/media/platform/qcom/iris/iris_utils.c +++ b/drivers/media/platform/qcom/iris/iris_utils.c @@ -34,7 +34,8 @@ int iris_get_mbpf(struct iris_inst *inst) bool iris_split_mode_enabled(struct iris_inst *inst) { - return inst->fmt_dst->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_NV12; + return inst->fmt_dst->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_NV12 || + inst->fmt_dst->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_QC08C; } void iris_helper_buffers_done(struct iris_inst *inst, unsigned int type, diff --git a/drivers/media/platform/qcom/iris/iris_vdec.c b/drivers/media/platform/qcom/iris/iris_vdec.c index 3926ed513f08..69ffe52590d3 100644 --- a/drivers/media/platform/qcom/iris/iris_vdec.c +++ b/drivers/media/platform/qcom/iris/iris_vdec.c @@ -67,7 +67,7 @@ void iris_vdec_inst_deinit(struct iris_inst *inst) kfree(inst->fmt_src); } -static const struct iris_fmt iris_vdec_formats[] = { +static const struct iris_fmt iris_vdec_formats_out[] = { [IRIS_FMT_H264] = { .pixfmt = V4L2_PIX_FMT_H264, .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, @@ -82,12 +82,35 @@ static const struct iris_fmt iris_vdec_formats[] = { }, }; +static const struct iris_fmt iris_vdec_formats_cap[] = { + [IRIS_FMT_NV12] = { + .pixfmt = V4L2_PIX_FMT_NV12, + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, + }, + [IRIS_FMT_QC08C] = { + .pixfmt = V4L2_PIX_FMT_QC08C, + .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, + }, +}; + static const struct iris_fmt * find_format(struct iris_inst *inst, u32 pixfmt, u32 type) { - unsigned int size = ARRAY_SIZE(iris_vdec_formats); - const struct iris_fmt *fmt = iris_vdec_formats; + const struct iris_fmt *fmt = NULL; + unsigned int size = 0; unsigned int i; + switch (type) { + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + fmt = iris_vdec_formats_out; + size = ARRAY_SIZE(iris_vdec_formats_out); + break; + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + fmt = iris_vdec_formats_cap; + size = ARRAY_SIZE(iris_vdec_formats_cap); + break; + default: + return NULL; + } for (i = 0; i < size; i++) { if (fmt[i].pixfmt == pixfmt) @@ -103,8 +126,21 @@ find_format(struct iris_inst *inst, u32 pixfmt, u32 type) static const struct iris_fmt * find_format_by_index(struct iris_inst *inst, u32 index, u32 type) { - const struct iris_fmt *fmt = iris_vdec_formats; - unsigned int size = ARRAY_SIZE(iris_vdec_formats); + const struct iris_fmt *fmt = NULL; + unsigned int size = 0; + + switch (type) { + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + fmt = iris_vdec_formats_out; + size = ARRAY_SIZE(iris_vdec_formats_out); + break; + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + fmt = iris_vdec_formats_cap; + size = ARRAY_SIZE(iris_vdec_formats_cap); + break; + default: + return NULL; + } if (index >= size || fmt[index].type != type) return NULL; @@ -126,9 +162,10 @@ int iris_vdec_enum_fmt(struct iris_inst *inst, struct v4l2_fmtdesc *f) f->flags = V4L2_FMT_FLAG_COMPRESSED | V4L2_FMT_FLAG_DYN_RESOLUTION; break; case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: - if (f->index) + fmt = find_format_by_index(inst, f->index, f->type); + if (!fmt) return -EINVAL; - f->pixelformat = V4L2_PIX_FMT_NV12; + f->pixelformat = fmt->pixfmt; break; default: return -EINVAL; @@ -157,7 +194,7 @@ int iris_vdec_try_fmt(struct iris_inst *inst, struct v4l2_format *f) } break; case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: - if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_NV12) { + if (!fmt) { f_inst = inst->fmt_dst; f->fmt.pix_mp.pixelformat = f_inst->fmt.pix_mp.pixelformat; f->fmt.pix_mp.width = f_inst->fmt.pix_mp.width; @@ -236,10 +273,11 @@ int iris_vdec_s_fmt(struct iris_inst *inst, struct v4l2_format *f) inst->crop.height = f->fmt.pix_mp.height; break; case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + if (!(find_format(inst, f->fmt.pix_mp.pixelformat, f->type))) + return -EINVAL; + fmt = inst->fmt_dst; fmt->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; - if (fmt->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_NV12) - return -EINVAL; fmt->fmt.pix_mp.pixelformat = f->fmt.pix_mp.pixelformat; fmt->fmt.pix_mp.width = ALIGN(f->fmt.pix_mp.width, 128); fmt->fmt.pix_mp.height = ALIGN(f->fmt.pix_mp.height, 32); @@ -266,7 +304,8 @@ int iris_vdec_validate_format(struct iris_inst *inst, u32 pixelformat) { const struct iris_fmt *fmt = NULL; - if (pixelformat != V4L2_PIX_FMT_NV12) { + fmt = find_format(inst, pixelformat, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); + if (!fmt) { fmt = find_format(inst, pixelformat, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); if (!fmt) return -EINVAL; From 456c99da41cb6f39c5c8420710b72fb9fd1450b4 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 8 Oct 2025 15:22:27 +0530 Subject: [PATCH 167/249] media: iris: Add support for QC08C format for encoder Introduce handling for the QC08C format in the encoder. QC08C format is NV12 with UBWC compression. Update format checks and configuration to enable encoding to QC08C streams. Signed-off-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../media/platform/qcom/iris/iris_buffer.c | 12 +++- .../qcom/iris/iris_hfi_gen1_command.c | 3 +- .../qcom/iris/iris_hfi_gen2_command.c | 3 +- drivers/media/platform/qcom/iris/iris_venc.c | 59 +++++++++++++++---- 4 files changed, 63 insertions(+), 14 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_buffer.c b/drivers/media/platform/qcom/iris/iris_buffer.c index 83dcf49e57ec..b89b1ee06cce 100644 --- a/drivers/media/platform/qcom/iris/iris_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_buffer.c @@ -171,9 +171,14 @@ static u32 iris_yuv_buffer_size_nv12(struct iris_inst *inst) static u32 iris_yuv_buffer_size_qc08c(struct iris_inst *inst) { u32 y_plane, uv_plane, y_stride, uv_stride; - struct v4l2_format *f = inst->fmt_dst; u32 uv_meta_stride, uv_meta_plane; u32 y_meta_stride, y_meta_plane; + struct v4l2_format *f = NULL; + + if (inst->domain == DECODER) + f = inst->fmt_dst; + else + f = inst->fmt_src; y_meta_stride = ALIGN(DIV_ROUND_UP(f->fmt.pix_mp.width, META_STRIDE_ALIGNED >> 1), META_STRIDE_ALIGNED); @@ -273,7 +278,10 @@ int iris_get_buffer_size(struct iris_inst *inst, } else { switch (buffer_type) { case BUF_INPUT: - return iris_yuv_buffer_size_nv12(inst); + if (inst->fmt_src->fmt.pix_mp.pixelformat == V4L2_PIX_FMT_QC08C) + return iris_yuv_buffer_size_qc08c(inst); + else + return iris_yuv_buffer_size_nv12(inst); case BUF_OUTPUT: return iris_enc_bitstream_buffer_size(inst); default: diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c index e458d3349ce0..52da7ef7bab0 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -795,7 +795,8 @@ static int iris_hfi_gen1_set_raw_format(struct iris_inst *inst, u32 plane) } else { pixelformat = inst->fmt_src->fmt.pix_mp.pixelformat; fmt.buffer_type = HFI_BUFFER_INPUT; - fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FORMAT_NV12 : 0; + fmt.format = pixelformat == V4L2_PIX_FMT_NV12 ? + HFI_COLOR_FORMAT_NV12 : HFI_COLOR_FORMAT_NV12_UBWC; ret = hfi_gen1_set_property(inst, ptype, &fmt, sizeof(fmt)); } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c index 5ad202d3fcdc..6a772db2ec33 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_command.c @@ -447,7 +447,8 @@ static int iris_hfi_gen2_set_colorformat(struct iris_inst *inst, u32 plane) HFI_COLOR_FMT_NV12 : HFI_COLOR_FMT_NV12_UBWC; } else { pixelformat = inst->fmt_src->fmt.pix_mp.pixelformat; - hfi_colorformat = pixelformat == V4L2_PIX_FMT_NV12 ? HFI_COLOR_FMT_NV12 : 0; + hfi_colorformat = pixelformat == V4L2_PIX_FMT_NV12 ? + HFI_COLOR_FMT_NV12 : HFI_COLOR_FMT_NV12_UBWC; } return iris_hfi_gen2_session_set_property(inst, diff --git a/drivers/media/platform/qcom/iris/iris_venc.c b/drivers/media/platform/qcom/iris/iris_venc.c index 8a65c9cc6010..5830eba93c68 100644 --- a/drivers/media/platform/qcom/iris/iris_venc.c +++ b/drivers/media/platform/qcom/iris/iris_venc.c @@ -80,7 +80,7 @@ void iris_venc_inst_deinit(struct iris_inst *inst) kfree(inst->fmt_src); } -static const struct iris_fmt iris_venc_formats[] = { +static const struct iris_fmt iris_venc_formats_cap[] = { [IRIS_FMT_H264] = { .pixfmt = V4L2_PIX_FMT_H264, .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE, @@ -91,12 +91,35 @@ static const struct iris_fmt iris_venc_formats[] = { }, }; +static const struct iris_fmt iris_venc_formats_out[] = { + [IRIS_FMT_NV12] = { + .pixfmt = V4L2_PIX_FMT_NV12, + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, + }, + [IRIS_FMT_QC08C] = { + .pixfmt = V4L2_PIX_FMT_QC08C, + .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, + }, +}; + static const struct iris_fmt * find_format(struct iris_inst *inst, u32 pixfmt, u32 type) { - const struct iris_fmt *fmt = iris_venc_formats; - unsigned int size = ARRAY_SIZE(iris_venc_formats); + const struct iris_fmt *fmt = NULL; + unsigned int size = 0; unsigned int i; + switch (type) { + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + fmt = iris_venc_formats_out; + size = ARRAY_SIZE(iris_venc_formats_out); + break; + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + fmt = iris_venc_formats_cap; + size = ARRAY_SIZE(iris_venc_formats_cap); + break; + default: + return NULL; + } for (i = 0; i < size; i++) { if (fmt[i].pixfmt == pixfmt) @@ -112,8 +135,21 @@ find_format(struct iris_inst *inst, u32 pixfmt, u32 type) static const struct iris_fmt * find_format_by_index(struct iris_inst *inst, u32 index, u32 type) { - const struct iris_fmt *fmt = iris_venc_formats; - unsigned int size = ARRAY_SIZE(iris_venc_formats); + const struct iris_fmt *fmt = NULL; + unsigned int size = 0; + + switch (type) { + case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: + fmt = iris_venc_formats_out; + size = ARRAY_SIZE(iris_venc_formats_out); + break; + case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: + fmt = iris_venc_formats_cap; + size = ARRAY_SIZE(iris_venc_formats_cap); + break; + default: + return NULL; + } if (index >= size || fmt[index].type != type) return NULL; @@ -127,9 +163,11 @@ int iris_venc_enum_fmt(struct iris_inst *inst, struct v4l2_fmtdesc *f) switch (f->type) { case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: - if (f->index) + fmt = find_format_by_index(inst, f->index, f->type); + if (!fmt) return -EINVAL; - f->pixelformat = V4L2_PIX_FMT_NV12; + + f->pixelformat = fmt->pixfmt; break; case V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE: fmt = find_format_by_index(inst, f->index, f->type); @@ -156,7 +194,7 @@ int iris_venc_try_fmt(struct iris_inst *inst, struct v4l2_format *f) fmt = find_format(inst, pixmp->pixelformat, f->type); switch (f->type) { case V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE: - if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_NV12) { + if (!fmt) { f_inst = inst->fmt_src; f->fmt.pix_mp.width = f_inst->fmt.pix_mp.width; f->fmt.pix_mp.height = f_inst->fmt.pix_mp.height; @@ -221,7 +259,7 @@ static int iris_venc_s_fmt_input(struct iris_inst *inst, struct v4l2_format *f) iris_venc_try_fmt(inst, f); - if (f->fmt.pix_mp.pixelformat != V4L2_PIX_FMT_NV12) + if (!(find_format(inst, f->fmt.pix_mp.pixelformat, f->type))) return -EINVAL; fmt = inst->fmt_src; @@ -287,7 +325,8 @@ int iris_venc_validate_format(struct iris_inst *inst, u32 pixelformat) { const struct iris_fmt *fmt = NULL; - if (pixelformat != V4L2_PIX_FMT_NV12) { + fmt = find_format(inst, pixelformat, V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE); + if (!fmt) { fmt = find_format(inst, pixelformat, V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE); if (!fmt) return -EINVAL; From e5894eeefdebf5a6d7512cd23efec78071985738 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:20 +0200 Subject: [PATCH 168/249] media: iris: turn platform caps into constants Make all struct platform_inst_fw_cap instances constant, they are not modified at runtime. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_ctrls.c | 2 +- drivers/media/platform/qcom/iris/iris_platform_common.h | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_qcs8300.h | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_sm8250.c | 4 ++-- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c index 754a5ad718bc..9da050aa1f7c 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -301,7 +301,7 @@ int iris_ctrls_init(struct iris_inst *inst) void iris_session_init_caps(struct iris_core *core) { - struct platform_inst_fw_cap *caps; + const struct platform_inst_fw_cap *caps; u32 i, num_cap, cap_id; caps = core->iris_platform_data->inst_fw_caps_dec; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 58d05e0a112e..17ed86bf78bb 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -215,9 +215,9 @@ struct iris_platform_data { const char *fwname; u32 pas_id; struct platform_inst_caps *inst_caps; - struct platform_inst_fw_cap *inst_fw_caps_dec; + const struct platform_inst_fw_cap *inst_fw_caps_dec; u32 inst_fw_caps_dec_size; - struct platform_inst_fw_cap *inst_fw_caps_enc; + const struct platform_inst_fw_cap *inst_fw_caps_enc; u32 inst_fw_caps_enc_size; struct tz_cp_config *tz_cp_config_data; u32 core_arch; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 69c952c68e93..1f5807c98e4c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -19,7 +19,7 @@ #define VIDEO_ARCH_LX 1 #define BITRATE_MAX 245000000 -static struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] = { +static const struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] = { { .cap_id = PROFILE_H264, .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, @@ -203,7 +203,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] = { }, }; -static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = { +static const struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = { { .cap_id = PROFILE_H264, .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h index 35ea0efade73..87517361a1cf 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -5,7 +5,7 @@ #define BITRATE_MAX 245000000 -static struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = { +static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = { { .cap_id = PROFILE_H264, .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, @@ -189,7 +189,7 @@ static struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = { }, }; -static struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] = { +static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] = { { .cap_id = PROFILE_H264, .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c index 16486284f8ac..e29cba993fde 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -17,7 +17,7 @@ #define BITRATE_PEAK_DEFAULT (BITRATE_DEFAULT * 2) #define BITRATE_STEP 100 -static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = { +static const struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = { { .cap_id = PIPE, .min = PIPE_1, @@ -38,7 +38,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = { }, }; -static struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = { +static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = { { .cap_id = STAGE, .min = STAGE_1, From 7a02a8b98419c992faf8ab714cf4df7da99b2c46 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:21 +0200 Subject: [PATCH 169/249] media: iris: turn platform data into constants Make all struct iris_platform_data instances constant, they are not modified at runtime. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../media/platform/qcom/iris/iris_platform_common.h | 10 +++++----- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 8 ++++---- .../media/platform/qcom/iris/iris_platform_sm8250.c | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 17ed86bf78bb..5ffc1874e8c6 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -41,11 +41,11 @@ enum pipe_type { PIPE_4 = 4, }; -extern struct iris_platform_data qcs8300_data; -extern struct iris_platform_data sm8250_data; -extern struct iris_platform_data sm8550_data; -extern struct iris_platform_data sm8650_data; -extern struct iris_platform_data sm8750_data; +extern const struct iris_platform_data qcs8300_data; +extern const struct iris_platform_data sm8250_data; +extern const struct iris_platform_data sm8550_data; +extern const struct iris_platform_data sm8650_data; +extern const struct iris_platform_data sm8750_data; enum platform_clk_type { IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 1f5807c98e4c..00e7b3b7d735 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -738,7 +738,7 @@ static const u32 sm8550_enc_op_int_buf_tbl[] = { BUF_SCRATCH_2, }; -struct iris_platform_data sm8550_data = { +const struct iris_platform_data sm8550_data = { .get_instance = iris_hfi_gen2_get_instance, .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, @@ -828,7 +828,7 @@ struct iris_platform_data sm8550_data = { * - controller_rst_tbl to sm8650_controller_reset_table * - fwname to "qcom/vpu/vpu33_p4.mbn" */ -struct iris_platform_data sm8650_data = { +const struct iris_platform_data sm8650_data = { .get_instance = iris_hfi_gen2_get_instance, .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, @@ -913,7 +913,7 @@ struct iris_platform_data sm8650_data = { .enc_op_int_buf_tbl_size = ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; -struct iris_platform_data sm8750_data = { +const struct iris_platform_data sm8750_data = { .get_instance = iris_hfi_gen2_get_instance, .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, @@ -999,7 +999,7 @@ struct iris_platform_data sm8750_data = { * - inst_caps to platform_inst_cap_qcs8300 * - inst_fw_caps to inst_fw_cap_qcs8300 */ -struct iris_platform_data qcs8300_data = { +const struct iris_platform_data qcs8300_data = { .get_instance = iris_hfi_gen2_get_instance, .init_hfi_command_ops = iris_hfi_gen2_command_ops_init, .init_hfi_response_ops = iris_hfi_gen2_response_ops_init, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c index e29cba993fde..66a5bdd24d8a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -314,7 +314,7 @@ static const u32 sm8250_enc_ip_int_buf_tbl[] = { BUF_SCRATCH_2, }; -struct iris_platform_data sm8250_data = { +const struct iris_platform_data sm8250_data = { .get_instance = iris_hfi_gen1_get_instance, .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init, .init_hfi_response_ops = iris_hfi_gen1_response_ops_init, From 6c67d1cf18dce081f126a6aeb9f7cbd328805591 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:22 +0200 Subject: [PATCH 170/249] media: iris: stop encoding PIPE value into fw_caps The value of the PIPE property depends on the number of pipes available on the platform and is frequently the only difference between several fw_caps. In order to reduce duplication, use num_vpp_pipe from the iris_platform_data rather than hardcoding the value into the fw_cap. Reviewed-by: Konrad Dybcio Reviewed-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Signed-off-by: Dmitry Baryshkov [bod: duplciation -> duplication] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_ctrls.c | 16 +++++++++++++--- .../platform/qcom/iris/iris_platform_gen2.c | 4 +--- .../platform/qcom/iris/iris_platform_qcs8300.h | 4 +--- .../platform/qcom/iris/iris_platform_sm8250.c | 4 +--- 4 files changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/platform/qcom/iris/iris_ctrls.c index 9da050aa1f7c..c0b3a09ad3e3 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -313,13 +313,23 @@ void iris_session_init_caps(struct iris_core *core) continue; core->inst_fw_caps_dec[cap_id].cap_id = caps[i].cap_id; - core->inst_fw_caps_dec[cap_id].min = caps[i].min; - core->inst_fw_caps_dec[cap_id].max = caps[i].max; core->inst_fw_caps_dec[cap_id].step_or_mask = caps[i].step_or_mask; - core->inst_fw_caps_dec[cap_id].value = caps[i].value; core->inst_fw_caps_dec[cap_id].flags = caps[i].flags; core->inst_fw_caps_dec[cap_id].hfi_id = caps[i].hfi_id; core->inst_fw_caps_dec[cap_id].set = caps[i].set; + + if (cap_id == PIPE) { + core->inst_fw_caps_dec[cap_id].value = + core->iris_platform_data->num_vpp_pipe; + core->inst_fw_caps_dec[cap_id].min = + core->iris_platform_data->num_vpp_pipe; + core->inst_fw_caps_dec[cap_id].max = + core->iris_platform_data->num_vpp_pipe; + } else { + core->inst_fw_caps_dec[cap_id].min = caps[i].min; + core->inst_fw_caps_dec[cap_id].max = caps[i].max; + core->inst_fw_caps_dec[cap_id].value = caps[i].value; + } } caps = core->iris_platform_data->inst_fw_caps_enc; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 00e7b3b7d735..8337018fd118 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -160,10 +160,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] = { }, { .cap_id = PIPE, - .min = PIPE_1, - .max = PIPE_4, + /* .max, .min and .value are set via platform data */ .step_or_mask = 1, - .value = PIPE_4, .hfi_id = HFI_PROP_PIPE, .set = iris_set_pipe, }, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h index 87517361a1cf..7ae50ab22f8c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -146,10 +146,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = { }, { .cap_id = PIPE, - .min = PIPE_1, - .max = PIPE_2, + /* .max, .min and .value are set via platform data */ .step_or_mask = 1, - .value = PIPE_2, .hfi_id = HFI_PROP_PIPE, .set = iris_set_pipe, }, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c index 66a5bdd24d8a..805179fba0c4 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -20,10 +20,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = { { .cap_id = PIPE, - .min = PIPE_1, - .max = PIPE_4, + /* .max, .min and .value are set via platform data */ .step_or_mask = 1, - .value = PIPE_4, .hfi_id = HFI_PROPERTY_PARAM_WORK_ROUTE, .set = iris_set_pipe, }, From 69dfada4c9d077fefc968cca8186ce975d874d49 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:23 +0200 Subject: [PATCH 171/249] media: iris: remove duplication between generic gen2 data and qcs8300 Now as we have removed PIPE value from inst_fw_caps_dec there should be no difference between inst_fw_caps of QCS8300 and SM8550+. Drop the QCS8300-specific tables and use generic one instead. The differences between QCS8300 and SM8550 data comes from a non-conflict merge of commit d22037f3fd33 ("media: iris: Set platform capabilities to firmware for encoder video device") (which added .set callbacks), and commit 6bdfa3f947a7 ("media: iris: Add platform-specific capabilities for encoder video device") (which added QCS8300 data, but not the callbacks). Reviewed-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Signed-off-by: Dmitry Baryshkov Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../platform/qcom/iris/iris_platform_gen2.c | 9 +- .../qcom/iris/iris_platform_qcs8300.h | 533 +----------------- 2 files changed, 8 insertions(+), 534 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c index 8337018fd118..c1989240c248 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -995,7 +995,6 @@ const struct iris_platform_data sm8750_data = { /* * Shares most of SM8550 data except: * - inst_caps to platform_inst_cap_qcs8300 - * - inst_fw_caps to inst_fw_cap_qcs8300 */ const struct iris_platform_data qcs8300_data = { .get_instance = iris_hfi_gen2_get_instance, @@ -1021,10 +1020,10 @@ const struct iris_platform_data qcs8300_data = { .fwname = "qcom/vpu/vpu30_p4_s6.mbn", .pas_id = IRIS_PAS_ID, .inst_caps = &platform_inst_cap_qcs8300, - .inst_fw_caps_dec = inst_fw_cap_qcs8300_dec, - .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_qcs8300_dec), - .inst_fw_caps_enc = inst_fw_cap_qcs8300_enc, - .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_qcs8300_enc), + .inst_fw_caps_dec = inst_fw_cap_sm8550_dec, + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8550_dec), + .inst_fw_caps_enc = inst_fw_cap_sm8550_enc, + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8550_enc), .tz_cp_config_data = &tz_cp_config_sm8550, .core_arch = VIDEO_ARCH_LX, .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h index 7ae50ab22f8c..61025f1e965b 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -3,535 +3,8 @@ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ -#define BITRATE_MAX 245000000 - -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] = { - { - .cap_id = PROFILE_H264, - .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH), - .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - .hfi_id = HFI_PROP_PROFILE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = PROFILE_HEVC, - .min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), - .value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .hfi_id = HFI_PROP_PROFILE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = PROFILE_VP9, - .min = V4L2_MPEG_VIDEO_VP9_PROFILE_0, - .max = V4L2_MPEG_VIDEO_VP9_PROFILE_2, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - .value = V4L2_MPEG_VIDEO_VP9_PROFILE_0, - .hfi_id = HFI_PROP_PROFILE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = LEVEL_H264, - .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - .value = V4L2_MPEG_VIDEO_H264_LEVEL_6_1, - .hfi_id = HFI_PROP_LEVEL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = LEVEL_HEVC, - .min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - .max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - .value = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, - .hfi_id = HFI_PROP_LEVEL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = LEVEL_VP9, - .min = V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - .max = V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - .value = V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - .hfi_id = HFI_PROP_LEVEL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = TIER, - .min = V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - .max = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - .value = V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - .hfi_id = HFI_PROP_TIER, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set = iris_set_u32_enum, - }, - { - .cap_id = INPUT_BUF_HOST_MAX_COUNT, - .min = DEFAULT_MAX_HOST_BUF_COUNT, - .max = DEFAULT_MAX_HOST_BURST_BUF_COUNT, - .step_or_mask = 1, - .value = DEFAULT_MAX_HOST_BUF_COUNT, - .hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT, - .flags = CAP_FLAG_INPUT_PORT, - .set = iris_set_u32, - }, - { - .cap_id = STAGE, - .min = STAGE_1, - .max = STAGE_2, - .step_or_mask = 1, - .value = STAGE_2, - .hfi_id = HFI_PROP_STAGE, - .set = iris_set_stage, - }, - { - .cap_id = PIPE, - /* .max, .min and .value are set via platform data */ - .step_or_mask = 1, - .hfi_id = HFI_PROP_PIPE, - .set = iris_set_pipe, - }, - { - .cap_id = POC, - .min = 0, - .max = 2, - .step_or_mask = 1, - .value = 1, - .hfi_id = HFI_PROP_PIC_ORDER_CNT_TYPE, - }, - { - .cap_id = CODED_FRAMES, - .min = CODED_FRAMES_PROGRESSIVE, - .max = CODED_FRAMES_PROGRESSIVE, - .step_or_mask = 0, - .value = CODED_FRAMES_PROGRESSIVE, - .hfi_id = HFI_PROP_CODED_FRAMES, - }, - { - .cap_id = BIT_DEPTH, - .min = BIT_DEPTH_8, - .max = BIT_DEPTH_8, - .step_or_mask = 1, - .value = BIT_DEPTH_8, - .hfi_id = HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - }, - { - .cap_id = RAP_FRAME, - .min = 0, - .max = 1, - .step_or_mask = 1, - .value = 1, - .hfi_id = HFI_PROP_DEC_START_FROM_RAP_FRAME, - .flags = CAP_FLAG_INPUT_PORT, - .set = iris_set_u32, - }, -}; - -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] = { - { - .cap_id = PROFILE_H264, - .min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - .max = V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - .value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - .hfi_id = HFI_PROP_PROFILE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = PROFILE_HEVC, - .min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), - .value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .hfi_id = HFI_PROP_PROFILE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = LEVEL_H264, - .min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - .max = V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - .value = V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - .hfi_id = HFI_PROP_LEVEL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = LEVEL_HEVC, - .min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - .max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - .value = V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - .hfi_id = HFI_PROP_LEVEL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = STAGE, - .min = STAGE_1, - .max = STAGE_2, - .step_or_mask = 1, - .value = STAGE_2, - .hfi_id = HFI_PROP_STAGE, - }, - { - .cap_id = HEADER_MODE, - .min = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - .max = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - .value = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - .hfi_id = HFI_PROP_SEQ_HEADER_MODE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = PREPEND_SPSPPS_TO_IDR, - .min = 0, - .max = 1, - .step_or_mask = 1, - .value = 0, - }, - { - .cap_id = BITRATE, - .min = 1, - .max = BITRATE_MAX, - .step_or_mask = 1, - .value = BITRATE_DEFAULT, - .hfi_id = HFI_PROP_TOTAL_BITRATE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = BITRATE_PEAK, - .min = 1, - .max = BITRATE_MAX, - .step_or_mask = 1, - .value = BITRATE_DEFAULT, - .hfi_id = HFI_PROP_TOTAL_PEAK_BITRATE, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = BITRATE_MODE, - .min = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - .max = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - .value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - .hfi_id = HFI_PROP_RATE_CONTROL, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = FRAME_SKIP_MODE, - .min = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - .max = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - .value = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = FRAME_RC_ENABLE, - .min = 0, - .max = 1, - .step_or_mask = 1, - .value = 1, - }, - { - .cap_id = GOP_SIZE, - .min = 0, - .max = INT_MAX, - .step_or_mask = 1, - .value = 2 * DEFAULT_FPS - 1, - .hfi_id = HFI_PROP_MAX_GOP_FRAMES, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = ENTROPY_MODE, - .min = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - .max = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - .step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - .value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - .hfi_id = HFI_PROP_CABAC_SESSION, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id = MIN_FRAME_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - .hfi_id = HFI_PROP_MIN_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id = MIN_FRAME_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - .hfi_id = HFI_PROP_MIN_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id = MAX_FRAME_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - .hfi_id = HFI_PROP_MAX_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id = MAX_FRAME_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - .hfi_id = HFI_PROP_MAX_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id = I_FRAME_MIN_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = I_FRAME_MIN_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = P_FRAME_MIN_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = P_FRAME_MIN_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = B_FRAME_MIN_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = B_FRAME_MIN_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MIN_QP_8BIT, - }, - { - .cap_id = I_FRAME_MAX_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = I_FRAME_MAX_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = P_FRAME_MAX_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = P_FRAME_MAX_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = B_FRAME_MAX_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = B_FRAME_MAX_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = MAX_QP, - }, - { - .cap_id = I_FRAME_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = I_FRAME_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = P_FRAME_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = P_FRAME_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = B_FRAME_QP_H264, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id = B_FRAME_QP_HEVC, - .min = MIN_QP_8BIT, - .max = MAX_QP, - .step_or_mask = 1, - .value = DEFAULT_QP, - .hfi_id = HFI_PROP_QP_PACKED, - .flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, -}; +#ifndef __IRIS_PLATFORM_QCS8300_H__ +#define __IRIS_PLATFORM_QCS8300_H__ static struct platform_inst_caps platform_inst_cap_qcs8300 = { .min_frame_width = 96, @@ -546,3 +19,5 @@ static struct platform_inst_caps platform_inst_cap_qcs8300 = { .max_frame_rate = MAXIMUM_FPS, .max_operating_rate = MAXIMUM_FPS, }; + +#endif From 3b72f5e206e65d57df99677dc3142be913cc2114 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:24 +0200 Subject: [PATCH 172/249] media: iris: rename sm8250 platform file to gen1 In preparation to adding more Gen1 platforms, which will share a significant amount of data, rename the SM8250 platform file to iris_platform_gen1.c. Reviewed-by: Konrad Dybcio Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/Makefile | 2 +- .../qcom/iris/{iris_platform_sm8250.c => iris_platform_gen1.c} | 0 2 files changed, 1 insertion(+), 1 deletion(-) rename drivers/media/platform/qcom/iris/{iris_platform_sm8250.c => iris_platform_gen1.c} (100%) diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/platform/qcom/iris/Makefile index 13270cd6d899..fad3be044e5f 100644 --- a/drivers/media/platform/qcom/iris/Makefile +++ b/drivers/media/platform/qcom/iris/Makefile @@ -26,7 +26,7 @@ qcom-iris-objs += iris_buffer.o \ iris_vpu_common.o \ ifeq ($(CONFIG_VIDEO_QCOM_VENUS),) -qcom-iris-objs += iris_platform_sm8250.o +qcom-iris-objs += iris_platform_gen1.o endif obj-$(CONFIG_VIDEO_QCOM_IRIS) += qcom-iris.o diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c similarity index 100% rename from drivers/media/platform/qcom/iris/iris_platform_sm8250.c rename to drivers/media/platform/qcom/iris/iris_platform_gen1.c From 542e3540ddd75f0a46dd365978476bcc1dda5b5a Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2025 13:46:25 +0200 Subject: [PATCH 173/249] media: iris: enable support for SC7280 platform As a part of migrating code from the old Venus driver to the new Iris one, add support for the SC7280 platform. It is very similar to SM8250, but it (currently) uses no reset controls (there is an optional GCC-generated reset, it will be added later) and no AON registers region. Extend the VPU ops to support optional clocks and skip the AON shutdown for this platform. Signed-off-by: Dmitry Baryshkov Reviewed-by: Vikash Garodia Reviewed-by: Dikshita Agarwal Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../platform/qcom/iris/iris_platform_common.h | 4 ++ .../platform/qcom/iris/iris_platform_gen1.c | 53 +++++++++++++++++++ .../platform/qcom/iris/iris_platform_sc7280.h | 26 +++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ .../media/platform/qcom/iris/iris_resources.c | 2 +- drivers/media/platform/qcom/iris/iris_vpu2.c | 6 +++ .../platform/qcom/iris/iris_vpu_common.c | 34 ++++++++---- 7 files changed, 119 insertions(+), 10 deletions(-) create mode 100644 drivers/media/platform/qcom/iris/iris_platform_sc7280.h diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/drivers/media/platform/qcom/iris/iris_platform_common.h index 5ffc1874e8c6..8d8cdb56a3c7 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -42,6 +42,7 @@ enum pipe_type { }; extern const struct iris_platform_data qcs8300_data; +extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; extern const struct iris_platform_data sm8550_data; extern const struct iris_platform_data sm8650_data; @@ -50,7 +51,9 @@ extern const struct iris_platform_data sm8750_data; enum platform_clk_type { IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ IRIS_CTRL_CLK, + IRIS_AHB_CLK, IRIS_HW_CLK, + IRIS_HW_AHB_CLK, IRIS_AXI1_CLK, IRIS_CTRL_FREERUN_CLK, IRIS_HW_FREERUN_CLK, @@ -224,6 +227,7 @@ struct iris_platform_data { u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; u32 num_vpp_pipe; + bool no_aon; u32 max_session_count; /* max number of macroblocks per frame supported */ u32 max_core_mbpf; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c index 805179fba0c4..34cbeb8f52e2 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -12,6 +12,8 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" +#include "iris_platform_sc7280.h" + #define BITRATE_MIN 32000 #define BITRATE_MAX 160000000 #define BITRATE_PEAK_DEFAULT (BITRATE_DEFAULT * 2) @@ -362,3 +364,54 @@ const struct iris_platform_data sm8250_data = { .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl, .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), }; + +const struct iris_platform_data sc7280_data = { + .get_instance = iris_hfi_gen1_get_instance, + .init_hfi_command_ops = &iris_hfi_gen1_command_ops_init, + .init_hfi_response_ops = iris_hfi_gen1_response_ops_init, + .get_vpu_buffer_size = iris_vpu_buf_size, + .vpu_ops = &iris_vpu2_ops, + .set_preset_registers = iris_set_sm8250_preset_registers, + .icc_tbl = sm8250_icc_table, + .icc_tbl_size = ARRAY_SIZE(sm8250_icc_table), + .bw_tbl_dec = sc7280_bw_table_dec, + .bw_tbl_dec_size = ARRAY_SIZE(sc7280_bw_table_dec), + .pmdomain_tbl = sm8250_pmdomain_table, + .pmdomain_tbl_size = ARRAY_SIZE(sm8250_pmdomain_table), + .opp_pd_tbl = sc7280_opp_pd_table, + .opp_pd_tbl_size = ARRAY_SIZE(sc7280_opp_pd_table), + .clk_tbl = sc7280_clk_table, + .clk_tbl_size = ARRAY_SIZE(sc7280_clk_table), + /* Upper bound of DMA address range */ + .dma_mask = 0xe0000000 - 1, + .fwname = "qcom/vpu/vpu20_p1.mbn", + .pas_id = IRIS_PAS_ID, + .inst_caps = &platform_inst_cap_sm8250, + .inst_fw_caps_dec = inst_fw_cap_sm8250_dec, + .inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec), + .inst_fw_caps_enc = inst_fw_cap_sm8250_enc, + .inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc), + .tz_cp_config_data = &tz_cp_config_sm8250, + .hw_response_timeout = HW_RESPONSE_TIMEOUT_VALUE, + .num_vpp_pipe = 1, + .no_aon = true, + .max_session_count = 16, + .max_core_mbpf = 4096 * 2176 / 256 * 2 + 1920 * 1088 / 256, + /* max spec for SC7280 is 4096x2176@60fps */ + .max_core_mbps = 4096 * 2176 / 256 * 60, + .dec_input_config_params_default = + sm8250_vdec_input_config_param_default, + .dec_input_config_params_default_size = + ARRAY_SIZE(sm8250_vdec_input_config_param_default), + .enc_input_config_params = sm8250_venc_input_config_param, + .enc_input_config_params_size = + ARRAY_SIZE(sm8250_venc_input_config_param), + + .dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl), + + .enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), +}; diff --git a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h new file mode 100644 index 000000000000..f1bef4d4bcfe --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#ifndef __IRIS_PLATFORM_SC7280_H__ +#define __IRIS_PLATFORM_SC7280_H__ + +static const struct bw_info sc7280_bw_table_dec[] = { + { ((3840 * 2160) / 256) * 60, 1896000, }, + { ((3840 * 2160) / 256) * 30, 968000, }, + { ((1920 * 1080) / 256) * 60, 618000, }, + { ((1920 * 1080) / 256) * 30, 318000, }, +}; + +static const char * const sc7280_opp_pd_table[] = { "cx" }; + +static const struct platform_clk_data sc7280_clk_table[] = { + {IRIS_CTRL_CLK, "core" }, + {IRIS_AXI_CLK, "iface" }, + {IRIS_AHB_CLK, "bus" }, + {IRIS_HW_CLK, "vcodec_core" }, + {IRIS_HW_AHB_CLK, "vcodec_bus" }, +}; + +#endif diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/platform/qcom/iris/iris_probe.c index 00e99be16e08..9bc9b34c2576 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -357,6 +357,10 @@ static const struct of_device_id iris_dt_match[] = { .data = &qcs8300_data, }, #if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) + { + .compatible = "qcom,sc7280-venus", + .data = &sc7280_data, + }, { .compatible = "qcom,sm8250-venus", .data = &sm8250_data, diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/media/platform/qcom/iris/iris_resources.c index cf32f268b703..164490c49c95 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -112,7 +112,7 @@ int iris_prepare_enable_clock(struct iris_core *core, enum platform_clk_type clk clock = iris_get_clk_by_type(core, clk_type); if (!clock) - return -EINVAL; + return -ENOENT; return clk_prepare_enable(clock); } diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/platform/qcom/iris/iris_vpu2.c index de7d142316d2..9c103a2e4e4e 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -3,9 +3,15 @@ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include +#include + #include "iris_instance.h" #include "iris_vpu_common.h" +#include "iris_vpu_register_defines.h" + static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size) { struct platform_inst_caps *caps = inst->core->iris_platform_data->inst_caps; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c index bb98950e018f..515dd55a3377 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -222,12 +222,14 @@ int iris_vpu_power_off_controller(struct iris_core *core) writel(MSK_SIGNAL_FROM_TENSILICA | MSK_CORE_POWER_ON, core->reg_base + CPU_CS_X2RPMH); - writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); + if (!core->iris_platform_data->no_aon) { + writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONTROL); - ret = readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, - val, val & BIT(0), 200, 2000); - if (ret) - goto disable_power; + ret = readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATUS, + val, val & BIT(0), 200, 2000); + if (ret) + goto disable_power; + } writel(REQ_POWER_DOWN_PREP, core->reg_base + WRAPPER_IRIS_CPU_NOC_LPI_CONTROL); @@ -250,6 +252,7 @@ int iris_vpu_power_off_controller(struct iris_core *core) writel(0x0, core->reg_base + WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG); disable_power: + iris_disable_unprepare_clock(core, IRIS_AHB_CLK); iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); iris_disable_unprepare_clock(core, IRIS_AXI_CLK); iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); @@ -261,6 +264,7 @@ void iris_vpu_power_off_hw(struct iris_core *core) { dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], false); iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); iris_disable_unprepare_clock(core, IRIS_HW_CLK); } @@ -294,11 +298,17 @@ int iris_vpu_power_on_controller(struct iris_core *core) ret = iris_prepare_enable_clock(core, IRIS_CTRL_CLK); if (ret) - goto err_disable_clock; + goto err_disable_axi_clock; + + ret = iris_prepare_enable_clock(core, IRIS_AHB_CLK); + if (ret && ret != -ENOENT) + goto err_disable_ctrl_clock; return 0; -err_disable_clock: +err_disable_ctrl_clock: + iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); +err_disable_axi_clock: iris_disable_unprepare_clock(core, IRIS_AXI_CLK); err_disable_power: iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_POWER_DOMAIN]); @@ -318,13 +328,19 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret) goto err_disable_power; + ret = iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK); + if (ret && ret != -ENOENT) + goto err_disable_hw_clock; + ret = dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN], true); if (ret) - goto err_disable_clock; + goto err_disable_hw_ahb_clock; return 0; -err_disable_clock: +err_disable_hw_ahb_clock: + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); +err_disable_hw_clock: iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_power: iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]); From e81b60c4a88e428b43ad53e7729fa5157ad6e5f2 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Sun, 26 Oct 2025 20:11:38 +0200 Subject: [PATCH 174/249] media: iris: Constify iris_v4l2_file_ops The iris_v4l2_file_ops structure is never modified. Make it const. Signed-off-by: Laurent Pinchart Reviewed-by: Dikshita Agarwal Reviewed-by: Abel Vesa [bod: drop qcom from patch title for consistency with other patches] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_vidc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_vidc.c b/drivers/media/platform/qcom/iris/iris_vidc.c index d38d0f6961cd..c9b881923ef1 100644 --- a/drivers/media/platform/qcom/iris/iris_vidc.c +++ b/drivers/media/platform/qcom/iris/iris_vidc.c @@ -630,7 +630,7 @@ static int iris_enc_cmd(struct file *filp, void *fh, return ret; } -static struct v4l2_file_operations iris_v4l2_file_ops = { +static const struct v4l2_file_operations iris_v4l2_file_ops = { .owner = THIS_MODULE, .open = iris_open, .release = iris_close, From aec75e355c633e4b0967c99580bd8ef93e0cdc98 Mon Sep 17 00:00:00 2001 From: Dikshita Agarwal Date: Wed, 5 Nov 2025 11:17:37 +0530 Subject: [PATCH 175/249] media: iris: Refine internal buffer reconfiguration logic for resolution change Improve the condition used to determine when input internal buffers need to be reconfigured during streamon on the capture port. Previously, the check relied on the INPUT_PAUSE sub-state, which was also being set during seek operations. This led to input buffers being queued multiple times to the firmware, causing session errors due to duplicate buffer submissions. This change introduces a more accurate check using the FIRST_IPSC and DRC sub-states to ensure that input buffer reconfiguration is triggered only during resolution change scenarios, such as streamoff/on on the capture port. This avoids duplicate buffer queuing during seek operations. Fixes: c1f8b2cc72ec ("media: iris: handle streamoff/on from client in dynamic resolution change") Cc: stable@vger.kernel.org Reported-by: Val Packett Closes: https://gitlab.freedesktop.org/gstreamer/gstreamer/-/issues/4700 Signed-off-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_common.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_common.c b/drivers/media/platform/qcom/iris/iris_common.c index 9fc663bdaf3f..7f1c7fe144f7 100644 --- a/drivers/media/platform/qcom/iris/iris_common.c +++ b/drivers/media/platform/qcom/iris/iris_common.c @@ -91,12 +91,14 @@ int iris_process_streamon_input(struct iris_inst *inst) int iris_process_streamon_output(struct iris_inst *inst) { const struct iris_hfi_command_ops *hfi_ops = inst->core->hfi_ops; - bool drain_active = false, drc_active = false; enum iris_inst_sub_state clear_sub_state = 0; + bool drain_active, drc_active, first_ipsc; int ret = 0; iris_scale_power(inst); + first_ipsc = inst->sub_state & IRIS_INST_SUB_FIRST_IPSC; + drain_active = inst->sub_state & IRIS_INST_SUB_DRAIN && inst->sub_state & IRIS_INST_SUB_DRAIN_LAST; @@ -108,7 +110,8 @@ int iris_process_streamon_output(struct iris_inst *inst) else if (drain_active) clear_sub_state = IRIS_INST_SUB_DRAIN | IRIS_INST_SUB_DRAIN_LAST; - if (inst->domain == DECODER && inst->sub_state & IRIS_INST_SUB_INPUT_PAUSE) { + /* Input internal buffer reconfiguration required in case of resolution change */ + if (first_ipsc || drc_active) { ret = iris_alloc_and_queue_input_int_bufs(inst); if (ret) return ret; From ad699fa78b59241c9d71a8cafb51525f3dab04d4 Mon Sep 17 00:00:00 2001 From: Wangao Wang Date: Mon, 27 Oct 2025 17:35:59 +0800 Subject: [PATCH 176/249] media: iris: Add sanity check for stop streaming Add sanity check in iris_vb2_stop_streaming. If inst->state is already IRIS_INST_ERROR, we should skip the stream_off operation because it would still send packets to the firmware. In iris_kill_session, inst->state is set to IRIS_INST_ERROR and session_close is executed, which will kfree(inst_hfi_gen2->packet). If stop_streaming is called afterward, it will cause a crash. Fixes: 11712ce70f8e5 ("media: iris: implement vb2 streaming ops") Cc: stable@vger.kernel.org Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Signed-off-by: Wangao Wang Reviewed-by: Vikash Garodia [bod: remove qcom from patch title] Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/iris/iris_vb2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_vb2.c b/drivers/media/platform/qcom/iris/iris_vb2.c index 139b821f7952..db8768d8a8f6 100644 --- a/drivers/media/platform/qcom/iris/iris_vb2.c +++ b/drivers/media/platform/qcom/iris/iris_vb2.c @@ -231,6 +231,8 @@ void iris_vb2_stop_streaming(struct vb2_queue *q) return; mutex_lock(&inst->lock); + if (inst->state == IRIS_INST_ERROR) + goto exit; if (!V4L2_TYPE_IS_OUTPUT(q->type) && !V4L2_TYPE_IS_CAPTURE(q->type)) @@ -241,10 +243,10 @@ void iris_vb2_stop_streaming(struct vb2_queue *q) goto exit; exit: - iris_helper_buffers_done(inst, q->type, VB2_BUF_STATE_ERROR); - if (ret) + if (ret) { + iris_helper_buffers_done(inst, q->type, VB2_BUF_STATE_ERROR); iris_inst_change_state(inst, IRIS_INST_ERROR); - + } mutex_unlock(&inst->lock); } From 52862dc98932fff8fc3da6e3c12594f389cc892e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 28 Oct 2025 12:11:16 +0100 Subject: [PATCH 177/249] media: dt-bindings: qcom,x1e80100-camss: Fix typo in CSIPHY supply description Correct description of the CSIPHY 1.2 V supply ("vdd-csiphy-1p2-supply"), because it supplies 1.2 V, confirmed with DTS on the mailing lists. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring (Arm) Acked-by: Bryan O'Donoghue Reviewed-by: Konrad Dybcio Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../devicetree/bindings/media/qcom,x1e80100-camss.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml index b075341caafc..b87a13479a4b 100644 --- a/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml @@ -124,7 +124,7 @@ properties: vdd-csiphy-1p2-supply: description: - Phandle to 1.8V regulator supply to a PHY. + Phandle to 1.2V regulator supply to a PHY. ports: $ref: /schemas/graph.yaml#/properties/ports From c38d1d7033f05438ddf6d2d6312ff9d7ac2fb84a Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:04:35 +0200 Subject: [PATCH 178/249] media: qcom: camss: drop unused module alias The driver has never supported anything but OF probing so drop the unused platform module alias. Signed-off-by: Johan Hovold Reviewed-by: Vladimir Zapolskiy Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/camss/camss.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 2fbcd0e343aa..0705e92541fc 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -4537,7 +4537,6 @@ static struct platform_driver qcom_camss_driver = { module_platform_driver(qcom_camss_driver); -MODULE_ALIAS("platform:qcom-camss"); MODULE_DESCRIPTION("Qualcomm Camera Subsystem driver"); MODULE_AUTHOR("Todor Tomov "); MODULE_LICENSE("GPL v2"); From d5479f002fe7181fa249fab9c5268ecf38258ab2 Mon Sep 17 00:00:00 2001 From: Hangxiang Ma Date: Thu, 30 Oct 2025 23:24:56 +0000 Subject: [PATCH 179/249] media: qcom: camss: Use a macro to specify the initial buffer count Replace the hardcoded buffer count value with a macro to enable operating on these buffers elsewhere in the CAMSS driver based on this count. Some of the hardware architectures require deferring the AUP and REG update until after the CSID configuration and this macro is expected to be useful in such scenarios. Signed-off-by: Hangxiang Ma Reviewed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/camss/camss-vfe.c | 2 +- drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index dff8d0a1e8c2..15a1524cd2df 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -541,7 +541,7 @@ int vfe_enable_output_v2(struct vfe_line *line) ops->vfe_wm_start(vfe, output->wm_idx[0], line); - for (i = 0; i < 2; i++) { + for (i = 0; i < CAMSS_INIT_BUF_COUNT; i++) { output->buf[i] = vfe_buf_get_pending(output); if (!output->buf[i]) break; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index a70fbc78ccc3..901f84efaf7d 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -41,6 +41,7 @@ (to_camss_index(ptr_module, index)->dev) #define CAMSS_RES_MAX 17 +#define CAMSS_INIT_BUF_COUNT 2 struct camss_subdev_resources { char *regulators[CAMSS_RES_MAX]; From ec697196d6b1c292feec12e3d9c0bd45b63ce5d3 Mon Sep 17 00:00:00 2001 From: Hangxiang Ma Date: Thu, 30 Oct 2025 23:38:28 +0000 Subject: [PATCH 180/249] media: qcom: camss: Enable setting the rate to camnoc_rt_axi clock On hardware architectures where a single CAMNOC module is split into two, one for each of the real time (RT) and non real time (NRT) modules within camera sub system, processing VFE output over the AXI bus requires enabling and setting the appropriate clock rate for the RT CAMNOC. This change lays the groundwork for supporting such configurations. Signed-off-by: Hangxiang Ma Reviewed-by: Bryan O'Donoghue Reviewed-by: Vijay Kumar Tumati Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/camss/camss-vfe.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 15a1524cd2df..55fb7547f84f 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -914,7 +914,8 @@ static int vfe_match_clock_names(struct vfe_device *vfe, return (!strcmp(clock->name, vfe_name) || !strcmp(clock->name, vfe_lite_name) || !strcmp(clock->name, "vfe_lite") || - !strcmp(clock->name, "camnoc_axi")); + !strcmp(clock->name, "camnoc_axi") || + !strcmp(clock->name, "camnoc_rt_axi")); } /* From bbad9ae1ccc05333ef05b7ac4a06b32c13e1e2aa Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Fri, 17 Oct 2025 06:11:28 +0300 Subject: [PATCH 181/249] dt-bindings: media: Describe Qualcomm SM8650 CAMSS IP Add device tree bindings for Qualcomm SM8650 camera subsystem. Qualcomm SM8650 CAMSS IP contains the next subdevices: * 6 x CSIPHY, * 3 x CSID, 2 x CSID Lite, * 3 x IFE, 2 x IFE Lite. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Bryan O'Donoghue Reviewed-by: Krzysztof Kozlowski Tested-by: Neil Armstrong # on SM8650-QRD Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,sm8650-camss.yaml | 375 ++++++++++++++++++ 1 file changed, 375 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml new file mode 100644 index 000000000000..9c8de722601e --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sm8650-camss.yaml @@ -0,0 +1,375 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sm8650-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8650 Camera Subsystem (CAMSS) + +maintainers: + - Vladimir Zapolskiy + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. + +properties: + compatible: + const: qcom,sm8650-camss + + reg: + maxItems: 17 + + reg-names: + items: + - const: csid_wrapper + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: csiphy5 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + + clocks: + maxItems: 33 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: cpas_fast_ahb + - const: cpas_vfe0 + - const: cpas_vfe1 + - const: cpas_vfe2 + - const: cpas_vfe_lite + - const: csid + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy3 + - const: csiphy3_timer + - const: csiphy4 + - const: csiphy4_timer + - const: csiphy5 + - const: csiphy5_timer + - const: csiphy_rx + - const: gcc_axi_hf + - const: qdss_debug_xo + - const: vfe0 + - const: vfe0_fast_ahb + - const: vfe1 + - const: vfe1_fast_ahb + - const: vfe2 + - const: vfe2_fast_ahb + - const: vfe_lite + - const: vfe_lite_ahb + - const: vfe_lite_cphy_rx + - const: vfe_lite_csid + + interrupts: + maxItems: 16 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csid_lite0 + - const: csid_lite1 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: csiphy4 + - const: csiphy5 + - const: vfe0 + - const: vfe1 + - const: vfe2 + - const: vfe_lite0 + - const: vfe_lite1 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ahb + - const: hf_mnoc + + iommus: + maxItems: 3 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE2 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: ife2 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-5]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data from a CSIPHY. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 1 # MEDIA_BUS_TYPE_CSI2_CPHY + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + + vdd-csiphy01-0p9-supply: + description: + Phandle to a 0.9V regulator supply to CSIPHY0 and CSIPHY1 IP blocks. + + vdd-csiphy01-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY0 and CSIPHY1 IP blocks. + + vdd-csiphy24-0p9-supply: + description: + Phandle to a 0.9V regulator supply to CSIPHY2 and CSIPHY4 IP blocks. + + vdd-csiphy24-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY2 and CSIPHY4 IP blocks. + + vdd-csiphy35-0p9-supply: + description: + Phandle to a 0.9V regulator supply to CSIPHY3 and CSIPHY5 IP blocks. + + vdd-csiphy35-1p2-supply: + description: + Phandle to a 1.2V regulator supply to CSIPHY3 and CSIPHY5 IP blocks. + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interconnects + - interconnect-names + - interrupts + - interrupt-names + - iommus + - power-domains + - power-domain-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + isp@acb6000 { + compatible = "qcom,sm8650-camss"; + reg = <0 0x0acb6000 0 0x1000>, + <0 0x0acb8000 0 0x1000>, + <0 0x0acba000 0 0x1000>, + <0 0x0acbc000 0 0x1000>, + <0 0x0accb000 0 0x1000>, + <0 0x0acd0000 0 0x1000>, + <0 0x0ace4000 0 0x2000>, + <0 0x0ace6000 0 0x2000>, + <0 0x0ace8000 0 0x2000>, + <0 0x0acea000 0 0x2000>, + <0 0x0acec000 0 0x2000>, + <0 0x0acee000 0 0x2000>, + <0 0x0ac62000 0 0xf000>, + <0 0x0ac71000 0 0xf000>, + <0 0x0ac80000 0 0xf000>, + <0 0x0accc000 0 0x2000>, + <0 0x0acd1000 0 0x2000>; + reg-names = "csid_wrapper", + "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + clocks = <&camcc CAM_CC_CAMNOC_AXI_RT_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CPAS_FAST_AHB_CLK>, + <&camcc CAM_CC_CPAS_IFE_0_CLK>, + <&camcc CAM_CC_CPAS_IFE_1_CLK>, + <&camcc CAM_CC_CPAS_IFE_2_CLK>, + <&camcc CAM_CC_CPAS_IFE_LITE_CLK>, + <&camcc CAM_CC_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI4PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY4_CLK>, + <&camcc CAM_CC_CSI5PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY5_CLK>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_QDSS_DEBUG_XO_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_2_CLK>, + <&camcc CAM_CC_IFE_2_FAST_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_AHB_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>; + clock-names = "camnoc_axi", + "cpas_ahb", + "cpas_fast_ahb", + "cpas_vfe0", + "cpas_vfe1", + "cpas_vfe2", + "cpas_vfe_lite", + "csid", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "csiphy4", + "csiphy4_timer", + "csiphy5", + "csiphy5_timer", + "csiphy_rx", + "gcc_axi_hf", + "qdss_debug_xo", + "vfe0", + "vfe0_fast_ahb", + "vfe1", + "vfe1_fast_ahb", + "vfe2", + "vfe2_fast_ahb", + "vfe_lite", + "vfe_lite_ahb", + "vfe_lite_cphy_rx", + "vfe_lite_csid"; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "csid0", + "csid1", + "csid2", + "csid_lite0", + "csid_lite1", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "csiphy4", + "csiphy5", + "vfe0", + "vfe1", + "vfe2", + "vfe_lite0", + "vfe_lite1"; + interconnects = <&gem_noc MASTER_APPSS_PROC 0 + &config_noc SLAVE_CAMERA_CFG 0>, + <&mmss_noc MASTER_CAMNOC_HF 0 + &mc_virt SLAVE_EBI1 0>; + interconnect-names = "ahb", "hf_mnoc"; + iommus = <&apps_smmu 0x800 0x20>, + <&apps_smmu 0x18a0 0x40>, + <&apps_smmu 0x1860 0x00>; + power-domains = <&camcc CAM_CC_IFE_0_GDSC>, + <&camcc CAM_CC_IFE_1_GDSC>, + <&camcc CAM_CC_IFE_2_GDSC>, + <&camcc CAM_CC_TITAN_TOP_GDSC>; + power-domain-names = "ife0", "ife1", "ife2", "top"; + vdd-csiphy01-0p9-supply = <&vreg_0p9>; + vdd-csiphy01-1p2-supply = <&vreg_1p2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csiphy1_ep: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&camera_sensor>; + }; + }; + }; + }; + }; From 6a0b9d3f111ed8008ce676af7bff6539afea880c Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Fri, 17 Oct 2025 06:11:29 +0300 Subject: [PATCH 182/249] media: qcom: camss: Add Qualcomm SM8650 CAMSS support Add the basic support of CAMSS IP on Qualcomm SM8650 SoC powered boards. SM8650 CAMSS provides: - 6 x CSIPHY, - 3 x CSID, 2 x CSID Lite, - 3 x VFE, 2 x VFE Lite. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Bryan O'Donoghue Tested-by: Neil Armstrong # on SM8650-QRD Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/camss/camss-vfe.c | 2 + drivers/media/platform/qcom/camss/camss.c | 326 ++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 3 files changed, 329 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 55fb7547f84f..ffa695a9cd94 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -348,6 +348,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, case CAMSS_8300: case CAMSS_845: case CAMSS_8550: + case CAMSS_8650: case CAMSS_8775P: case CAMSS_X1E80100: switch (sink_code) { @@ -1996,6 +1997,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) case CAMSS_8300: case CAMSS_845: case CAMSS_8550: + case CAMSS_8650: case CAMSS_8775P: case CAMSS_X1E80100: ret = 16; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 0705e92541fc..0c919a311f11 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2617,6 +2617,317 @@ static const struct resources_icc icc_res_sm8550[] = { }, }; +static const struct camss_subdev_resources csiphy_res_sm8650[] = { + /* CSIPHY0 */ + { + .regulators = { "vdd-csiphy01-0p9", "vdd-csiphy01-1p2", }, + .clock = { "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .id = 0, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, + /* CSIPHY1 */ + { + .regulators = { "vdd-csiphy01-0p9", "vdd-csiphy01-1p2", }, + .clock = { "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .id = 1, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, + /* CSIPHY2 */ + { + .regulators = { "vdd-csiphy24-0p9", "vdd-csiphy24-1p2", }, + .clock = { "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .id = 2, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, + /* CSIPHY3 */ + { + .regulators = { "vdd-csiphy35-0p9", "vdd-csiphy35-1p2", }, + .clock = { "csiphy3", "csiphy3_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy3" }, + .interrupt = { "csiphy3" }, + .csiphy = { + .id = 3, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, + /* CSIPHY4 */ + { + .regulators = { "vdd-csiphy24-0p9", "vdd-csiphy24-1p2", }, + .clock = { "csiphy4", "csiphy4_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy4" }, + .interrupt = { "csiphy4" }, + .csiphy = { + .id = 4, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, + /* CSIPHY5 */ + { + .regulators = { "vdd-csiphy35-0p9", "vdd-csiphy35-1p2", }, + .clock = { "csiphy5", "csiphy5_timer" }, + .clock_rate = { { 400000000 }, + { 400000000 } }, + .reg = { "csiphy5" }, + .interrupt = { "csiphy5" }, + .csiphy = { + .id = 5, + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845, + }, + }, +}; + +static const struct camss_subdev_resources csid_res_sm8650[] = { + /* CSID0 */ + { + .regulators = { }, + .clock = { "csid", "csiphy_rx" }, + .clock_rate = { { 400000000 }, + { 400000000, 480000000 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .parent_dev_ops = &vfe_parent_dev_ops, + .hw_ops = &csid_ops_gen3, + .formats = &csid_formats_gen2, + }, + }, + /* CSID1 */ + { + .regulators = { }, + .clock = { "csid", "csiphy_rx" }, + .clock_rate = { { 400000000 }, + { 400000000, 480000000 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .parent_dev_ops = &vfe_parent_dev_ops, + .hw_ops = &csid_ops_gen3, + .formats = &csid_formats_gen2, + }, + }, + /* CSID2 */ + { + .regulators = { }, + .clock = { "csid", "csiphy_rx" }, + .clock_rate = { { 400000000 }, + { 400000000, 480000000 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .parent_dev_ops = &vfe_parent_dev_ops, + .hw_ops = &csid_ops_gen3, + .formats = &csid_formats_gen2, + }, + }, + /* CSID3 lite */ + { + .regulators = { }, + .clock = { "vfe_lite_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx" }, + .clock_rate = { { 0 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "csid_lite0" }, + .interrupt = { "csid_lite0" }, + .csid = { + .is_lite = true, + .parent_dev_ops = &vfe_parent_dev_ops, + .hw_ops = &csid_ops_gen3, + .formats = &csid_formats_gen2, + }, + }, + /* CSID4 lite */ + { + .regulators = { }, + .clock = { "vfe_lite_ahb", "vfe_lite_csid", "vfe_lite_cphy_rx" }, + .clock_rate = { { 0 }, + { 400000000, 480000000 }, + { 0 } }, + .reg = { "csid_lite1" }, + .interrupt = { "csid_lite1" }, + .csid = { + .is_lite = true, + .parent_dev_ops = &vfe_parent_dev_ops, + .hw_ops = &csid_ops_gen3, + .formats = &csid_formats_gen2, + }, + }, +}; + +static const struct camss_subdev_resources vfe_res_sm8650[] = { + /* VFE0 */ + { + .regulators = { }, + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb", + "camnoc_axi", "vfe0_fast_ahb", "vfe0", "cpas_vfe0", + "qdss_debug_xo", + }, + .clock_rate = { { 0 }, + { 80000000 }, + { 300000000, 400000000 }, + { 300000000, 400000000 }, + { 0 }, + { 466000000, 594000000, 675000000, 785000000 }, + { 0 }, + { 0 }, + }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_gen3, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + }, + }, + /* VFE1 */ + { + .regulators = { }, + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb", + "camnoc_axi", "vfe1_fast_ahb", "vfe1", "cpas_vfe1", + "qdss_debug_xo", + }, + .clock_rate = { { 0 }, + { 80000000 }, + { 300000000, 400000000 }, + { 300000000, 400000000 }, + { 0 }, + { 466000000, 594000000, 675000000, 785000000 }, + { 0 }, + { 0 }, + }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 3, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_gen3, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + }, + }, + /* VFE2 */ + { + .regulators = { }, + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb", + "camnoc_axi", "vfe2_fast_ahb", "vfe2", "cpas_vfe2", + "qdss_debug_xo", + }, + .clock_rate = { { 0 }, + { 80000000 }, + { 300000000, 400000000 }, + { 300000000, 400000000 }, + { 0 }, + { 466000000, 594000000, 675000000, 785000000 }, + { 0 }, + { 0 }, + }, + .reg = { "vfe2" }, + .interrupt = { "vfe2" }, + .vfe = { + .line_num = 3, + .has_pd = true, + .pd_name = "ife2", + .hw_ops = &vfe_ops_gen3, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + }, + }, + /* VFE3 lite */ + { + .regulators = { }, + .clock = { "gcc_axi_hf", "cpas_ahb", "camnoc_axi", + "vfe_lite_ahb", "vfe_lite", "cpas_vfe_lite", + "qdss_debug_xo", + }, + .clock_rate = { { 0 }, + { 80000000 }, + { 300000000, 400000000 }, + { 0 }, + { 400000000, 480000000 }, + { 0 }, + { 0 }, + }, + .reg = { "vfe_lite0" }, + .interrupt = { "vfe_lite0" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_gen3, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + }, + }, + /* VFE4 lite */ + { + .regulators = { }, + .clock = { "gcc_axi_hf", "cpas_ahb", "camnoc_axi", + "vfe_lite_ahb", "vfe_lite", "cpas_vfe_lite", + "qdss_debug_xo", + }, + .clock_rate = { { 0 }, + { 80000000 }, + { 300000000, 400000000 }, + { 0 }, + { 400000000, 480000000 }, + { 0 }, + { 0 }, + }, + .reg = { "vfe_lite1" }, + .interrupt = { "vfe_lite1" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_gen3, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + }, + }, +}; + +static const struct resources_icc icc_res_sm8650[] = { + { + .name = "ahb", + .icc_bw_tbl.avg = 38400, + .icc_bw_tbl.peak = 76800, + }, + { + .name = "hf_mnoc", + .icc_bw_tbl.avg = 2097152, + .icc_bw_tbl.peak = 2097152, + }, +}; + static const struct camss_subdev_resources csiphy_res_8300[] = { /* CSIPHY0 */ { @@ -4452,6 +4763,20 @@ static const struct camss_resources sm8550_resources = { .vfe_num = ARRAY_SIZE(vfe_res_8550), }; +static const struct camss_resources sm8650_resources = { + .version = CAMSS_8650, + .pd_name = "top", + .csiphy_res = csiphy_res_sm8650, + .csid_res = csid_res_sm8650, + .csid_wrapper_res = &csid_wrapper_res_sm8550, + .vfe_res = vfe_res_sm8650, + .icc_res = icc_res_sm8650, + .icc_path_num = ARRAY_SIZE(icc_res_sm8650), + .csiphy_num = ARRAY_SIZE(csiphy_res_sm8650), + .csid_num = ARRAY_SIZE(csid_res_sm8650), + .vfe_num = ARRAY_SIZE(vfe_res_sm8650), +}; + static const struct camss_resources x1e80100_resources = { .version = CAMSS_X1E80100, .pd_name = "top", @@ -4480,6 +4805,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources }, + { .compatible = "qcom,sm8650-camss", .data = &sm8650_resources }, { .compatible = "qcom,x1e80100-camss", .data = &x1e80100_resources }, { } }; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 901f84efaf7d..205a37bb1ade 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -89,6 +89,7 @@ enum camss_version { CAMSS_8300, CAMSS_845, CAMSS_8550, + CAMSS_8650, CAMSS_8775P, CAMSS_X1E80100, }; From c33f7e61a1c9e9255597102e61add4b4fe91668c Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Fri, 17 Oct 2025 06:11:30 +0300 Subject: [PATCH 183/249] media: qcom: camss: Add CSIPHY 2.2.0 lane configuration for SM8650 Add a configuration for all CSI lanes into D-PHY bus mode on Qualcomm SM8650 CAMSS CSIPHY IPs. Signed-off-by: Vladimir Zapolskiy Reviewed-by: Bryan O'Donoghue Tested-by: Neil Armstrong # on SM8650-QRD Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../qcom/camss/camss-csiphy-3ph-1-0.c | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index a229ba04b158..619abbf60781 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -587,6 +587,102 @@ csiphy_lane_regs lane_regs_sm8550[] = { {0x0C64, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS}, }; +/* GEN2 2.2.0 2PH 4 lane DPHY mode */ +static const struct +csiphy_lane_regs lane_regs_sm8650[] = { + {0x0e94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0ea0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e90, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e94, 0x07, 0xd1, CSIPHY_DEFAULT_PARAMS}, + {0x0e30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e28, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e00, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e0c, 0xff, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e38, 0x1f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e2c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e34, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e1c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e3c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e04, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0e08, 0x19, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0e10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {0x0094, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x00a0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0090, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0098, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0094, 0x07, 0xd1, CSIPHY_DEFAULT_PARAMS}, + {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x8e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0038, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x002c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0034, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x001c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x003c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0004, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0020, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0008, 0x19, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {0x0494, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x04a0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0490, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0498, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0494, 0x07, 0xd1, CSIPHY_DEFAULT_PARAMS}, + {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0400, 0x8e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0438, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x042c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0434, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x041c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x043c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0404, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0420, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0408, 0x19, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {0x0894, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x08a0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0890, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0898, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0894, 0x07, 0xd1, CSIPHY_DEFAULT_PARAMS}, + {0x0830, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x8e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0838, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x082c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0834, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x081c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0814, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x083c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0804, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0820, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0808, 0x19, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0810, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + + {0x0c94, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0ca0, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c90, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c98, 0x08, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c94, 0x07, 0xd1, CSIPHY_DEFAULT_PARAMS}, + {0x0c30, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c00, 0x8e, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c38, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c2c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c34, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c1c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c14, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c3c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c04, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c20, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c08, 0x19, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0c10, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, +}; + /* 4nm 2PH v 2.1.2 2p5Gbps 4 lane DPHY mode */ static const struct csiphy_lane_regs lane_regs_x1e80100[] = { @@ -914,6 +1010,7 @@ static bool csiphy_is_gen2(u32 version) case CAMSS_8300: case CAMSS_845: case CAMSS_8550: + case CAMSS_8650: case CAMSS_8775P: case CAMSS_X1E80100: ret = true; @@ -1018,6 +1115,11 @@ static int csiphy_init(struct csiphy_device *csiphy) regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550); regs->offset = 0x1000; break; + case CAMSS_8650: + regs->lane_regs = &lane_regs_sm8650[0]; + regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8650); + regs->offset = 0x1000; + break; case CAMSS_8300: case CAMSS_8775P: regs->lane_regs = &lane_regs_sa8775p[0]; From 2f1ff4e1320d9909978aaecc26fc3e3cd5f0d68d Mon Sep 17 00:00:00 2001 From: Vincent Knecht Date: Thu, 30 Oct 2025 08:59:12 +0100 Subject: [PATCH 184/249] media: dt-bindings: Add qcom,msm8939-camss MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Signed-off-by: Vincent Knecht [André: Make order of items the same as in 8916] Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: André Apitzsch Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../bindings/media/qcom,msm8939-camss.yaml | 254 ++++++++++++++++++ 1 file changed, 254 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml new file mode 100644 index 000000000000..77b389d76a43 --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml @@ -0,0 +1,254 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm MSM8939 Camera Subsystem (CAMSS) + +maintainers: + - Vincent Knecht + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,msm8939-camss + + reg: + maxItems: 11 + + reg-names: + items: + - const: csiphy0 + - const: csiphy0_clk_mux + - const: csiphy1 + - const: csiphy1_clk_mux + - const: csid0 + - const: csid1 + - const: ispif + - const: csi_clk_mux + - const: vfe0 + - const: csid2 + - const: vfe0_vbif + + clocks: + maxItems: 24 + + clock-names: + items: + - const: top_ahb + - const: ispif_ahb + - const: csiphy0_timer + - const: csiphy1_timer + - const: csi0_ahb + - const: csi0 + - const: csi0_phy + - const: csi0_pix + - const: csi0_rdi + - const: csi1_ahb + - const: csi1 + - const: csi1_phy + - const: csi1_pix + - const: csi1_rdi + - const: ahb + - const: vfe0 + - const: csi_vfe0 + - const: vfe_ahb + - const: vfe_axi + - const: csi2_ahb + - const: csi2 + - const: csi2_phy + - const: csi2_pix + - const: csi2_rdi + + interrupts: + maxItems: 7 + + interrupt-names: + items: + - const: csiphy0 + - const: csiphy1 + - const: csid0 + - const: csid1 + - const: ispif + - const: vfe0 + - const: csid2 + + iommus: + maxItems: 1 + + power-domains: + items: + - description: VFE GDSC - Video Front End, Global Distributed Switch + Controller. + + vdda-supply: + description: + Definition of the regulator used as 1.2V analog power supply. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + patternProperties: + "^port@[0-1]$": + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + minItems: 1 + maxItems: 4 + + bus-type: + enum: + - 4 # MEDIA_BUS_TYPE_CSI2_DPHY + + required: + - data-lanes + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - interrupts + - interrupt-names + - iommus + - power-domains + - vdda-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + isp@1b0ac00 { + compatible = "qcom,msm8939-camss"; + + reg = <0x01b0ac00 0x200>, + <0x01b00030 0x4>, + <0x01b0b000 0x200>, + <0x01b00038 0x4>, + <0x01b08000 0x100>, + <0x01b08400 0x100>, + <0x01b0a000 0x500>, + <0x01b00020 0x10>, + <0x01b10000 0x1000>, + <0x01b08800 0x100>, + <0x01b40000 0x200>; + + reg-names = "csiphy0", + "csiphy0_clk_mux", + "csiphy1", + "csiphy1_clk_mux", + "csid0", + "csid1", + "ispif", + "csi_clk_mux", + "vfe0", + "csid2", + "vfe0_vbif"; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, + <&gcc GCC_CAMSS_CSI0_CLK>, + <&gcc GCC_CAMSS_CSI0PHY_CLK>, + <&gcc GCC_CAMSS_CSI0PIX_CLK>, + <&gcc GCC_CAMSS_CSI0RDI_CLK>, + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, + <&gcc GCC_CAMSS_CSI1_CLK>, + <&gcc GCC_CAMSS_CSI1PHY_CLK>, + <&gcc GCC_CAMSS_CSI1PIX_CLK>, + <&gcc GCC_CAMSS_CSI1RDI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>, + <&gcc GCC_CAMSS_VFE0_CLK>, + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, + <&gcc GCC_CAMSS_VFE_AHB_CLK>, + <&gcc GCC_CAMSS_VFE_AXI_CLK>, + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, + <&gcc GCC_CAMSS_CSI2_CLK>, + <&gcc GCC_CAMSS_CSI2PHY_CLK>, + <&gcc GCC_CAMSS_CSI2PIX_CLK>, + <&gcc GCC_CAMSS_CSI2RDI_CLK>; + + clock-names = "top_ahb", + "ispif_ahb", + "csiphy0_timer", + "csiphy1_timer", + "csi0_ahb", + "csi0", + "csi0_phy", + "csi0_pix", + "csi0_rdi", + "csi1_ahb", + "csi1", + "csi1_phy", + "csi1_pix", + "csi1_rdi", + "ahb", + "vfe0", + "csi_vfe0", + "vfe_ahb", + "vfe_axi", + "csi2_ahb", + "csi2", + "csi2_phy", + "csi2_pix", + "csi2_rdi"; + + interrupts = , + , + , + , + , + , + ; + + interrupt-names = "csiphy0", + "csiphy1", + "csid0", + "csid1", + "ispif", + "vfe0", + "csid2"; + + iommus = <&apps_iommu 3>; + + power-domains = <&gcc VFE_GDSC>; + + vdda-supply = <®_1v2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csiphy1_ep: endpoint { + data-lanes = <0 2>; + remote-endpoint = <&sensor_ep>; + }; + }; + }; + }; From f0e8ffb46b26bfb77aaa2344f4bf7b07aa96d7df Mon Sep 17 00:00:00 2001 From: Vincent Knecht Date: Thu, 30 Oct 2025 08:59:13 +0100 Subject: [PATCH 185/249] media: qcom: camss: vfe: Add VBIF setting support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some devices need writing values to VFE VBIF registers. Add helper functions to do this. Reviewed-by: Bryan O'Donoghue Signed-off-by: Vincent Knecht Signed-off-by: André Apitzsch Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- drivers/media/platform/qcom/camss/Makefile | 1 + .../media/platform/qcom/camss/camss-vfe-4-1.c | 12 +++++++++ .../platform/qcom/camss/camss-vfe-vbif.c | 25 +++++++++++++++++++ .../platform/qcom/camss/camss-vfe-vbif.h | 19 ++++++++++++++ drivers/media/platform/qcom/camss/camss-vfe.c | 9 +++++++ drivers/media/platform/qcom/camss/camss-vfe.h | 3 +++ 6 files changed, 69 insertions(+) create mode 100644 drivers/media/platform/qcom/camss/camss-vfe-vbif.c create mode 100644 drivers/media/platform/qcom/camss/camss-vfe-vbif.h diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/platform/qcom/camss/Makefile index 23960d02877d..5e349b491513 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -23,6 +23,7 @@ qcom-camss-objs += \ camss-vfe-680.o \ camss-vfe-gen3.o \ camss-vfe-gen1.o \ + camss-vfe-vbif.o \ camss-vfe.o \ camss-video.o \ camss-format.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c index 901677293d97..9cf1ccdb2fe7 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-4-1.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-4-1.c @@ -15,6 +15,7 @@ #include "camss.h" #include "camss-vfe.h" #include "camss-vfe-gen1.h" +#include "camss-vfe-vbif.h" #define VFE_0_HW_VERSION 0x000 @@ -733,6 +734,7 @@ static void vfe_set_qos(struct vfe_device *vfe) { u32 val = VFE_0_BUS_BDG_QOS_CFG_0_CFG; u32 val7 = VFE_0_BUS_BDG_QOS_CFG_7_CFG; + int ret; writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_0); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_1); @@ -742,6 +744,16 @@ static void vfe_set_qos(struct vfe_device *vfe) writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_5); writel_relaxed(val, vfe->base + VFE_0_BUS_BDG_QOS_CFG_6); writel_relaxed(val7, vfe->base + VFE_0_BUS_BDG_QOS_CFG_7); + + /* SoC-specific VBIF settings */ + if (vfe->res->has_vbif) { + ret = vfe_vbif_apply_settings(vfe); + if (ret < 0) { + dev_err_ratelimited(vfe->camss->dev, + "VFE: VBIF error %d\n", + ret); + } + } } static void vfe_set_ds(struct vfe_device *vfe) diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c new file mode 100644 index 000000000000..691335f231a6 --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * camss-vfe-vbif.c + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ + +#include + +#include "camss.h" +#include "camss-vfe.h" +#include "camss-vfe-vbif.h" + +void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val) +{ + writel_relaxed(val, vfe->vbif_base + reg); +} + +int vfe_vbif_apply_settings(struct vfe_device *vfe) +{ + return 0; +} diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.h b/drivers/media/platform/qcom/camss/camss-vfe-vbif.h new file mode 100644 index 000000000000..502db629e961 --- /dev/null +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * camss-vfe-vbif.h + * + * Qualcomm MSM Camera Subsystem - VFE VBIF Module + * + * Copyright (c) 2025, The Linux Foundation. All rights reserved. + * + */ +#ifndef QC_MSM_CAMSS_VFE_VBIF_H +#define QC_MSM_CAMSS_VFE_VBIF_H + +#include "camss-vfe.h" + +void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val); + +int vfe_vbif_apply_settings(struct vfe_device *vfe); + +#endif /* QC_MSM_CAMSS_VFE_VBIF_H */ diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index ffa695a9cd94..92d160328307 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -1829,6 +1829,15 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, return PTR_ERR(vfe->base); } + if (vfe->res->has_vbif) { + vfe->vbif_base = devm_platform_ioremap_resource_byname(pdev, + vfe->res->vbif_name); + if (IS_ERR(vfe->vbif_base)) { + dev_err(dev, "could not map vbif memory\n"); + return PTR_ERR(vfe->vbif_base); + } + } + /* Interrupt */ ret = platform_get_irq_byname(pdev, res->interrupt[0]); diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/platform/qcom/camss/camss-vfe.h index 0300efdb1c46..ae9dad353a37 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h @@ -136,6 +136,8 @@ struct vfe_subdev_resources { u8 line_num; bool has_pd; char *pd_name; + bool has_vbif; + char *vbif_name; const struct vfe_hw_ops *hw_ops; const struct camss_formats *formats_rdi; const struct camss_formats *formats_pix; @@ -145,6 +147,7 @@ struct vfe_device { struct camss *camss; u8 id; void __iomem *base; + void __iomem *vbif_base; u32 irq; char irq_name[30]; struct camss_clock *clock; From b4fbb13db86adb0bae1d7f968b61ea8dc9635e33 Mon Sep 17 00:00:00 2001 From: Vincent Knecht Date: Thu, 30 Oct 2025 08:59:14 +0100 Subject: [PATCH 186/249] media: qcom: camss: Add support for MSM8939 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The camera subsystem for the MSM8939 is the same as MSM8916 except with 3 CSID instead of 2, and some higher clock rates. As a quirk, this SoC needs writing values to 2 VFE VBIF registers (see downstream msm8939-camera.dtsi vbif-{regs,settings} properties). This fixes black stripes across sensor and garbage in CSID TPG outputs. Add support for the MSM8939 camera subsystem. Reviewed-by: Bryan O'Donoghue Signed-off-by: Vincent Knecht Signed-off-by: André Apitzsch Signed-off-by: Bryan O'Donoghue Signed-off-by: Hans Verkuil --- .../media/platform/qcom/camss/camss-csiphy.c | 1 + .../media/platform/qcom/camss/camss-ispif.c | 8 +- .../platform/qcom/camss/camss-vfe-vbif.c | 6 + drivers/media/platform/qcom/camss/camss-vfe.c | 1 + drivers/media/platform/qcom/camss/camss.c | 156 ++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 6 files changed, 171 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index 2de97f58f9ae..a734fb7dde0a 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -600,6 +600,7 @@ int msm_csiphy_subdev_init(struct camss *camss, return PTR_ERR(csiphy->base); if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_8x96) { csiphy->base_clk_mux = diff --git a/drivers/media/platform/qcom/camss/camss-ispif.c b/drivers/media/platform/qcom/camss/camss-ispif.c index 2dc585c6123d..aaf3caa42d33 100644 --- a/drivers/media/platform/qcom/camss/camss-ispif.c +++ b/drivers/media/platform/qcom/camss/camss-ispif.c @@ -1112,6 +1112,8 @@ int msm_ispif_subdev_init(struct camss *camss, /* Number of ISPIF lines - same as number of CSID hardware modules */ if (camss->res->version == CAMSS_8x16) ispif->line_num = 2; + else if (camss->res->version == CAMSS_8x39) + ispif->line_num = 3; else if (camss->res->version == CAMSS_8x96 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_660) @@ -1128,7 +1130,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->line[i].ispif = ispif; ispif->line[i].id = i; - if (camss->res->version == CAMSS_8x16) { + if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39) { ispif->line[i].formats = ispif_formats_8x16; ispif->line[i].nformats = ARRAY_SIZE(ispif_formats_8x16); @@ -1162,7 +1165,8 @@ int msm_ispif_subdev_init(struct camss *camss, ispif->irq = ret; snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s", dev_name(dev), MSM_ISPIF_NAME); - if (camss->res->version == CAMSS_8x16) + if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39) ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x16, IRQF_TRIGGER_RISING, ispif->irq_name, ispif); else if (camss->res->version == CAMSS_8x96 || diff --git a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c index 691335f231a6..911f8da02f1f 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-vbif.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-vbif.c @@ -14,6 +14,9 @@ #include "camss-vfe.h" #include "camss-vfe-vbif.h" +#define VBIF_FIXED_SORT_EN 0x30 +#define VBIF_FIXED_SORT_SEL0 0x34 + void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val) { writel_relaxed(val, vfe->vbif_base + reg); @@ -21,5 +24,8 @@ void vfe_vbif_write_reg(struct vfe_device *vfe, u32 reg, u32 val) int vfe_vbif_apply_settings(struct vfe_device *vfe) { + vfe_vbif_write_reg(vfe, VBIF_FIXED_SORT_EN, 0xfff); + vfe_vbif_write_reg(vfe, VBIF_FIXED_SORT_SEL0, 0x555000); + return 0; } diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 92d160328307..9c7ad8aa4058 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -290,6 +290,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, switch (vfe->camss->res->version) { case CAMSS_8x16: + case CAMSS_8x39: case CAMSS_8x53: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 0c919a311f11..fcc2b2c3cba0 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -154,6 +154,149 @@ static const struct camss_subdev_resources vfe_res_8x16[] = { } }; +static const struct camss_subdev_resources csiphy_res_8x39[] = { + /* CSIPHY0 */ + { + .regulators = { "vdda" }, + .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg = { "csiphy0", "csiphy0_clk_mux" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .id = 0, + .hw_ops = &csiphy_ops_2ph_1_0, + .formats = &csiphy_formats_8x16 + } + }, + + /* CSIPHY1 */ + { + .regulators = { "vdda" }, + .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 100000000, 200000000 } }, + .reg = { "csiphy1", "csiphy1_clk_mux" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .id = 1, + .hw_ops = &csiphy_ops_2ph_1_0, + .formats = &csiphy_formats_8x16 + } + } +}; + +static const struct camss_subdev_resources csid_res_8x39[] = { + /* CSID0 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", + "csi0", "csi0_phy", "csi0_pix", "csi0_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, + + /* CSID1 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", + "csi1", "csi1_phy", "csi1_pix", "csi1_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, + + /* CSID2 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", + "csi2", "csi2_phy", "csi2_pix", "csi2_rdi" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 0 }, + { 0 }, + { 100000000, 200000000 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .hw_ops = &csid_ops_4_1, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_4_1 + } + }, +}; + +static const struct camss_subdev_resources ispif_res_8x39 = { + /* ISPIF */ + .clock = { "top_ahb", "ispif_ahb", "ahb", + "csi0", "csi0_pix", "csi0_rdi", + "csi1", "csi1_pix", "csi1_rdi", + "csi2", "csi2_pix", "csi2_rdi" }, + .clock_for_reset = { "vfe0", "csi_vfe0" }, + .reg = { "ispif", "csi_clk_mux" }, + .interrupt = { "ispif" }, +}; + +static const struct camss_subdev_resources vfe_res_8x39[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "top_ahb", "ispif_ahb", "vfe0", "csi_vfe0", + "vfe_ahb", "vfe_axi", "ahb" }, + .clock_rate = { { 0 }, + { 40000000, 80000000 }, + { 50000000, 80000000, 100000000, 160000000, + 177780000, 200000000, 266670000, 320000000, + 400000000, 465000000, 480000000, 600000000 }, + { 0 }, + { 0 }, + { 0 }, + { 0 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .has_vbif = true, + .vbif_name = "vfe0_vbif", + .hw_ops = &vfe_ops_4_1, + .formats_rdi = &vfe_formats_rdi_8x16, + .formats_pix = &vfe_formats_pix_8x16 + } + } +}; + static const struct camss_subdev_resources csid_res_8x53[] = { /* CSID0 */ { @@ -4482,6 +4625,7 @@ static int camss_probe(struct platform_device *pdev) return -ENOMEM; if (camss->res->version == CAMSS_8x16 || + camss->res->version == CAMSS_8x39 || camss->res->version == CAMSS_8x53 || camss->res->version == CAMSS_8x96) { camss->ispif = devm_kcalloc(dev, 1, sizeof(*camss->ispif), GFP_KERNEL); @@ -4613,6 +4757,17 @@ static const struct camss_resources msm8916_resources = { .vfe_num = ARRAY_SIZE(vfe_res_8x16), }; +static const struct camss_resources msm8939_resources = { + .version = CAMSS_8x39, + .csiphy_res = csiphy_res_8x39, + .csid_res = csid_res_8x39, + .ispif_res = &ispif_res_8x39, + .vfe_res = vfe_res_8x39, + .csiphy_num = ARRAY_SIZE(csiphy_res_8x39), + .csid_num = ARRAY_SIZE(csid_res_8x39), + .vfe_num = ARRAY_SIZE(vfe_res_8x39), +}; + static const struct camss_resources msm8953_resources = { .version = CAMSS_8x53, .icc_res = icc_res_8x53, @@ -4793,6 +4948,7 @@ static const struct camss_resources x1e80100_resources = { static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, + { .compatible = "qcom,msm8939-camss", .data = &msm8939_resources }, { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,qcm2290-camss", .data = &qcm2290_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 205a37bb1ade..9d9a62640e25 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -82,6 +82,7 @@ enum camss_version { CAMSS_2290, CAMSS_7280, CAMSS_8x16, + CAMSS_8x39, CAMSS_8x53, CAMSS_8x96, CAMSS_8250, From 674961a9c87903bf2222a2c26809e013903a8960 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Fri, 17 Oct 2025 08:06:26 +0200 Subject: [PATCH 187/249] media: ir-hix5hd2: Drop unused module alias The driver has never supported anything but OF probing so drop the unused platform module alias. Signed-off-by: Johan Hovold Signed-off-by: Sean Young Signed-off-by: Hans Verkuil --- drivers/media/rc/ir-hix5hd2.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/rc/ir-hix5hd2.c b/drivers/media/rc/ir-hix5hd2.c index afd80d2350c6..edc46828509c 100644 --- a/drivers/media/rc/ir-hix5hd2.c +++ b/drivers/media/rc/ir-hix5hd2.c @@ -402,4 +402,3 @@ module_platform_driver(hix5hd2_ir_driver); MODULE_DESCRIPTION("IR controller driver for hix5hd2 platforms"); MODULE_AUTHOR("Guoxiong Yan "); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:hix5hd2-ir"); From 1240abf4b71f632f0117b056e22488e4d9808938 Mon Sep 17 00:00:00 2001 From: Haotian Zhang Date: Fri, 31 Oct 2025 14:03:32 +0800 Subject: [PATCH 188/249] media: rc: st_rc: Fix reset control resource leak The driver calls reset_control_get_optional_exclusive() but never calls reset_control_put() in error paths or in the remove function. This causes a resource leak when probe fails after successfully acquiring the reset control, or when the driver is unloaded. Switch to devm_reset_control_get_optional_exclusive() to automatically manage the reset control resource. Fixes: a4b80242d046 ("media: st-rc: explicitly request exclusive reset control") Cc: stable@vger.kernel.org Signed-off-by: Haotian Zhang Reviewed-by: Patrice Chotard Signed-off-by: Sean Young Signed-off-by: Hans Verkuil --- drivers/media/rc/st_rc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/rc/st_rc.c b/drivers/media/rc/st_rc.c index 6539fa0a6e79..6b70bac5f45d 100644 --- a/drivers/media/rc/st_rc.c +++ b/drivers/media/rc/st_rc.c @@ -284,7 +284,7 @@ static int st_rc_probe(struct platform_device *pdev) else rc_dev->rx_base = rc_dev->base; - rc_dev->rstc = reset_control_get_optional_exclusive(dev, NULL); + rc_dev->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); if (IS_ERR(rc_dev->rstc)) { ret = PTR_ERR(rc_dev->rstc); goto err; From 97e8e73777ab21f2ea9a917a76d2186748e9f9cb Mon Sep 17 00:00:00 2001 From: Liao Yuanhong Date: Thu, 4 Sep 2025 19:30:34 +0800 Subject: [PATCH 189/249] media: siano: Remove redundant ternary operators For ternary operators in the form of "a ? false : true", if 'a' itself returns a boolean result, the ternary operator can be omitted. Remove redundant ternary operators to clean up the code. Signed-off-by: Liao Yuanhong Signed-off-by: Sean Young Signed-off-by: Hans Verkuil --- drivers/media/common/siano/smsir.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/common/siano/smsir.c b/drivers/media/common/siano/smsir.c index d85c78c104b9..af07fed21ae1 100644 --- a/drivers/media/common/siano/smsir.c +++ b/drivers/media/common/siano/smsir.c @@ -28,7 +28,7 @@ void sms_ir_event(struct smscore_device_t *coredev, const char *buf, int len) for (i = 0; i < len >> 2; i++) { struct ir_raw_event ev = { .duration = abs(samples[i]), - .pulse = (samples[i] > 0) ? false : true + .pulse = samples[i] <= 0 }; ir_raw_event_store(coredev->ir.dev, &ev); From 84c56e1cb378f4996870a67b47ff6f5b63a6d85a Mon Sep 17 00:00:00 2001 From: Jimmy Su Date: Mon, 3 Nov 2025 10:42:41 +0100 Subject: [PATCH 190/249] media: ipu-bridge: Add IMX471 to the list of supported sensors Add the IMX471 sensor, which is used with a SONY471A ACPI HID on the Lenovo ThinkPad X9 15 laptop to the list of supported sensors. Link: https://bugzilla.redhat.com/show_bug.cgi?id=2362064 Signed-off-by: Jimmy Su Signed-off-by: Hans de Goede Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu-bridge.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c index 153b2f3685b4..7fd9d637e63a 100644 --- a/drivers/media/pci/intel/ipu-bridge.c +++ b/drivers/media/pci/intel/ipu-bridge.c @@ -90,6 +90,8 @@ static const struct ipu_sensor_config ipu_supported_sensors[] = { IPU_SENSOR_CONFIG("OVTI2680", 1, 331200000), /* Omnivision OV8856 */ IPU_SENSOR_CONFIG("OVTI8856", 3, 180000000, 360000000, 720000000), + /* Sony IMX471 */ + IPU_SENSOR_CONFIG("SONY471A", 1, 200000000), /* Toshiba T4KA3 */ IPU_SENSOR_CONFIG("XMCC0003", 1, 321468000), }; From abe3f43438be8a12ae204ca4ef1fe5ba0da4d086 Mon Sep 17 00:00:00 2001 From: Hao Yao Date: Mon, 3 Nov 2025 10:42:42 +0100 Subject: [PATCH 191/249] media: ipu-bridge: Add OV05C10 to the list of supported sensors Add the OV05C10 sensor to the list of supported sensors. Signed-off-by: Hao Yao Signed-off-by: Hans de Goede Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu-bridge.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/media/pci/intel/ipu-bridge.c b/drivers/media/pci/intel/ipu-bridge.c index 7fd9d637e63a..c9827e9fe6ff 100644 --- a/drivers/media/pci/intel/ipu-bridge.c +++ b/drivers/media/pci/intel/ipu-bridge.c @@ -79,6 +79,8 @@ static const struct ipu_sensor_config ipu_supported_sensors[] = { IPU_SENSOR_CONFIG("OVTI02C1", 1, 400000000), /* Omnivision OV02E10 */ IPU_SENSOR_CONFIG("OVTI02E1", 1, 360000000), + /* Omnivision ov05c10 */ + IPU_SENSOR_CONFIG("OVTI05C1", 1, 480000000), /* Omnivision OV08A10 */ IPU_SENSOR_CONFIG("OVTI08A1", 1, 500000000), /* Omnivision OV08x40 */ From 554f7b8d45e99eb01a498eb6cdd5da4b9ff6e3c3 Mon Sep 17 00:00:00 2001 From: Umang Jain Date: Thu, 30 Oct 2025 14:12:54 +0530 Subject: [PATCH 192/249] media: imx335: Rectify name of mode struct In commit 81495a59baeb ("media: imx335: Fix active area height discrepency") the height for the mode struct was rectified to '1944'. However, the name of mode struct is still reflecting to '1940'. Update it. Signed-off-by: Umang Jain Reviewed-by: Tommaso Merciai Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index 71ed9a0d84a2..a03efa799023 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -252,7 +252,7 @@ static const int imx335_tpg_val[] = { }; /* Sensor mode registers */ -static const struct cci_reg_sequence mode_2592x1940_regs[] = { +static const struct cci_reg_sequence mode_2592x1944_regs[] = { { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, { IMX335_REG_MASTER_MODE, 0x00 }, { IMX335_REG_WINMODE, 0x04 }, @@ -416,8 +416,8 @@ static const struct imx335_mode supported_mode = { .vblank_max = 133060, .pclk = 396000000, .reg_list = { - .num_of_regs = ARRAY_SIZE(mode_2592x1940_regs), - .regs = mode_2592x1940_regs, + .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), + .regs = mode_2592x1944_regs, }, }; From 2581a40115dd295233453c5e53c6d1bccdd0f4ff Mon Sep 17 00:00:00 2001 From: Umang Jain Date: Thu, 30 Oct 2025 14:12:55 +0530 Subject: [PATCH 193/249] media: imx335: Support vertical flip Support vertical flip by setting REG_VREVERSE. Additional registers also needs to be set per mode, according to the readout direction (normal/inverted) as mentioned in the data sheet. Since the register IMX335_REG_AREA3_ST_ADR_1 is based on the flip (and is set via vflip related registers), it has been moved out of the 2592x1944 mode regs. Signed-off-by: Umang Jain Reviewed-by: Tommaso Merciai Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 64 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 62 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index a03efa799023..797821db86a4 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -56,6 +56,9 @@ #define IMX335_AGAIN_STEP 1 #define IMX335_AGAIN_DEFAULT 0 +/* Vertical flip */ +#define IMX335_REG_VREVERSE CCI_REG8(0x304f) + #define IMX335_REG_TPG_TESTCLKEN CCI_REG8(0x3148) #define IMX335_REG_INCLKSEL1 CCI_REG16_LE(0x314c) @@ -155,6 +158,8 @@ static const char * const imx335_supply_name[] = { * @vblank_max: Maximum vertical blanking in lines * @pclk: Sensor pixel clock * @reg_list: Register list for sensor mode + * @vflip_normal: Register list vflip (normal readout) + * @vflip_inverted: Register list vflip (inverted readout) */ struct imx335_mode { u32 width; @@ -166,6 +171,8 @@ struct imx335_mode { u32 vblank_max; u64 pclk; struct imx335_reg_list reg_list; + struct imx335_reg_list vflip_normal; + struct imx335_reg_list vflip_inverted; }; /** @@ -183,6 +190,7 @@ struct imx335_mode { * @pclk_ctrl: Pointer to pixel clock control * @hblank_ctrl: Pointer to horizontal blanking control * @vblank_ctrl: Pointer to vertical blanking control + * @vflip: Pointer to vertical flip control * @exp_ctrl: Pointer to exposure control * @again_ctrl: Pointer to analog gain control * @vblank: Vertical blanking in lines @@ -207,6 +215,7 @@ struct imx335 { struct v4l2_ctrl *pclk_ctrl; struct v4l2_ctrl *hblank_ctrl; struct v4l2_ctrl *vblank_ctrl; + struct v4l2_ctrl *vflip; struct { struct v4l2_ctrl *exp_ctrl; struct v4l2_ctrl *again_ctrl; @@ -259,7 +268,6 @@ static const struct cci_reg_sequence mode_2592x1944_regs[] = { { IMX335_REG_HTRIMMING_START, 48 }, { IMX335_REG_HNUM, 2592 }, { IMX335_REG_Y_OUT_SIZE, 1944 }, - { IMX335_REG_AREA3_ST_ADR_1, 176 }, { IMX335_REG_AREA3_WIDTH_1, 3928 }, { IMX335_REG_OPB_SIZE_V, 0 }, { IMX335_REG_XVS_XHS_DRV, 0x00 }, @@ -333,6 +341,26 @@ static const struct cci_reg_sequence mode_2592x1944_regs[] = { { CCI_REG8(0x3a00), 0x00 }, }; +static const struct cci_reg_sequence mode_2592x1944_vflip_normal[] = { + { IMX335_REG_AREA3_ST_ADR_1, 176 }, + + /* Undocumented V-Flip related registers on Page 55 of datasheet. */ + { CCI_REG8(0x3081), 0x02, }, + { CCI_REG8(0x3083), 0x02, }, + { CCI_REG16_LE(0x30b6), 0x00 }, + { CCI_REG16_LE(0x3116), 0x08 }, +}; + +static const struct cci_reg_sequence mode_2592x1944_vflip_inverted[] = { + { IMX335_REG_AREA3_ST_ADR_1, 4112 }, + + /* Undocumented V-Flip related registers on Page 55 of datasheet. */ + { CCI_REG8(0x3081), 0xfe, }, + { CCI_REG8(0x3083), 0xfe, }, + { CCI_REG16_LE(0x30b6), 0x1fa }, + { CCI_REG16_LE(0x3116), 0x002 }, +}; + static const struct cci_reg_sequence raw10_framefmt_regs[] = { { IMX335_REG_ADBIT, 0x00 }, { IMX335_REG_MDBIT, 0x00 }, @@ -419,6 +447,14 @@ static const struct imx335_mode supported_mode = { .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), .regs = mode_2592x1944_regs, }, + .vflip_normal = { + .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_normal), + .regs = mode_2592x1944_vflip_normal, + }, + .vflip_inverted = { + .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_inverted), + .regs = mode_2592x1944_vflip_inverted, + }, }; /** @@ -492,6 +528,19 @@ static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain) return ret; } +static int imx335_update_vertical_flip(struct imx335 *imx335, u32 vflip) +{ + const struct imx335_reg_list * const vflip_regs = + vflip ? &imx335->cur_mode->vflip_inverted : + &imx335->cur_mode->vflip_normal; + int ret = 0; + + cci_multi_reg_write(imx335->cci, vflip_regs->regs, + vflip_regs->num_of_regs, &ret); + + return cci_write(imx335->cci, IMX335_REG_VREVERSE, vflip, &ret); +} + static int imx335_update_test_pattern(struct imx335 *imx335, u32 pattern_index) { int ret = 0; @@ -593,6 +642,10 @@ static int imx335_set_ctrl(struct v4l2_ctrl *ctrl) ret = imx335_update_exp_gain(imx335, exposure, analog_gain); + break; + case V4L2_CID_VFLIP: + ret = imx335_update_vertical_flip(imx335, ctrl->val); + break; case V4L2_CID_TEST_PATTERN: ret = imx335_update_test_pattern(imx335, ctrl->val); @@ -1175,7 +1228,7 @@ static int imx335_init_controls(struct imx335 *imx335) return ret; /* v4l2_fwnode_device_properties can add two more controls */ - ret = v4l2_ctrl_handler_init(ctrl_hdlr, 9); + ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10); if (ret) return ret; @@ -1210,6 +1263,13 @@ static int imx335_init_controls(struct imx335 *imx335) v4l2_ctrl_cluster(2, &imx335->exp_ctrl); + imx335->vflip = v4l2_ctrl_new_std(ctrl_hdlr, + &imx335_ctrl_ops, + V4L2_CID_VFLIP, + 0, 1, 1, 0); + if (imx335->vflip) + imx335->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + imx335->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, &imx335_ctrl_ops, V4L2_CID_VBLANK, From b82801a11fd6c26cc6c74e277e44bbc4481dde56 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:12:56 +0530 Subject: [PATCH 194/249] media: imx335: Update the native pixel array width The sensor datasheet reports actual total number of pixels as 2696x2044. This becomes important for supporting 2x2 binning modes that can go beyond the current maximum pixel array width set here. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index 797821db86a4..d30fce32cb01 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -124,12 +124,20 @@ #define IMX335_NUM_DATA_LANES 4 /* IMX335 native and active pixel array size. */ -#define IMX335_NATIVE_WIDTH 2616U -#define IMX335_NATIVE_HEIGHT 1964U -#define IMX335_PIXEL_ARRAY_LEFT 12U -#define IMX335_PIXEL_ARRAY_TOP 12U -#define IMX335_PIXEL_ARRAY_WIDTH 2592U -#define IMX335_PIXEL_ARRAY_HEIGHT 1944U +static const struct v4l2_rect imx335_native_area = { + .top = 0, + .left = 0, + .width = 2696, + .height = 2044, +}; + +static const struct v4l2_rect imx335_active_area = { + .top = 50, + .left = 52, + .width = 2592, + .height = 1944, +}; + /** * struct imx335_reg_list - imx335 sensor register list @@ -862,21 +870,13 @@ static int imx335_get_selection(struct v4l2_subdev *sd, { switch (sel->target) { case V4L2_SEL_TGT_NATIVE_SIZE: - sel->r.top = 0; - sel->r.left = 0; - sel->r.width = IMX335_NATIVE_WIDTH; - sel->r.height = IMX335_NATIVE_HEIGHT; - + sel->r = imx335_native_area; return 0; case V4L2_SEL_TGT_CROP: case V4L2_SEL_TGT_CROP_DEFAULT: case V4L2_SEL_TGT_CROP_BOUNDS: - sel->r.top = IMX335_PIXEL_ARRAY_TOP; - sel->r.left = IMX335_PIXEL_ARRAY_LEFT; - sel->r.width = IMX335_PIXEL_ARRAY_WIDTH; - sel->r.height = IMX335_PIXEL_ARRAY_HEIGHT; - + sel->r = imx335_active_area; return 0; } From d64ec84ac01b100619f68929a7e29f00617a6ffd Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:12:57 +0530 Subject: [PATCH 195/249] media: imx335: Update HBLANK range on mode change While switching modes, updating to a different value of HBLANK isn't sufficient, as this is a read-only control with a single allowed value, and thus hblank_min == hblank_max == hblank of the default mode. So to correctly update the user-facing value of the HBLANK parameter, which is necessary for correct framerate calculation, update the whole range when switching modes. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index d30fce32cb01..b03e3e14d088 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -493,7 +493,8 @@ static int imx335_update_controls(struct imx335 *imx335, if (ret) return ret; - ret = __v4l2_ctrl_s_ctrl(imx335->hblank_ctrl, mode->hblank); + ret = __v4l2_ctrl_modify_range(imx335->hblank_ctrl, mode->hblank, + mode->hblank, 1, mode->hblank); if (ret) return ret; From 34af620e67550da1f693914a3a881a024e949014 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:12:58 +0530 Subject: [PATCH 196/249] media: imx335: Handle runtime PM in leaf functions Simplify .s_stream callback implementation by moving the runtime PM calls to the leaf functions. This patch should not affect any functionality. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 51 ++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 29 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index b03e3e14d088..a85174d1defa 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -912,13 +912,17 @@ static int imx335_start_streaming(struct imx335 *imx335) const struct imx335_reg_list *reg_list; int ret; + ret = pm_runtime_resume_and_get(imx335->dev); + if (ret < 0) + return ret; + /* Setup PLL */ reg_list = &link_freq_reglist[__ffs(imx335->link_freq_bitmap)]; ret = cci_multi_reg_write(imx335->cci, reg_list->regs, reg_list->num_of_regs, NULL); if (ret) { dev_err(imx335->dev, "%s failed to set plls\n", __func__); - return ret; + goto err_rpm_put; } /* Write sensor mode registers */ @@ -927,27 +931,27 @@ static int imx335_start_streaming(struct imx335 *imx335) reg_list->num_of_regs, NULL); if (ret) { dev_err(imx335->dev, "fail to write initial registers\n"); - return ret; + goto err_rpm_put; } ret = imx335_set_framefmt(imx335); if (ret) { dev_err(imx335->dev, "%s failed to set frame format: %d\n", __func__, ret); - return ret; + goto err_rpm_put; } /* Configure lanes */ ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, imx335->lane_mode, NULL); if (ret) - return ret; + goto err_rpm_put; /* Setup handler will write actual exposure and gain */ ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler); if (ret) { dev_err(imx335->dev, "fail to setup handler\n"); - return ret; + goto err_rpm_put; } /* Start streaming */ @@ -955,25 +959,29 @@ static int imx335_start_streaming(struct imx335 *imx335) IMX335_MODE_STREAMING, NULL); if (ret) { dev_err(imx335->dev, "fail to start streaming\n"); - return ret; + goto err_rpm_put; } /* Initial regulator stabilization period */ usleep_range(18000, 20000); return 0; + +err_rpm_put: + pm_runtime_put(imx335->dev); + + return ret; } /** * imx335_stop_streaming() - Stop sensor stream * @imx335: pointer to imx335 device - * - * Return: 0 if successful, error code otherwise. */ -static int imx335_stop_streaming(struct imx335 *imx335) +static void imx335_stop_streaming(struct imx335 *imx335) { - return cci_write(imx335->cci, IMX335_REG_MODE_SELECT, - IMX335_MODE_STANDBY, NULL); + cci_write(imx335->cci, IMX335_REG_MODE_SELECT, + IMX335_MODE_STANDBY, NULL); + pm_runtime_put(imx335->dev); } /** @@ -986,32 +994,17 @@ static int imx335_stop_streaming(struct imx335 *imx335) static int imx335_set_stream(struct v4l2_subdev *sd, int enable) { struct imx335 *imx335 = to_imx335(sd); - int ret; + int ret = 0; mutex_lock(&imx335->mutex); - if (enable) { - ret = pm_runtime_resume_and_get(imx335->dev); - if (ret) - goto error_unlock; - + if (enable) ret = imx335_start_streaming(imx335); - if (ret) - goto error_power_off; - } else { + else imx335_stop_streaming(imx335); - pm_runtime_put(imx335->dev); - } mutex_unlock(&imx335->mutex); - return 0; - -error_power_off: - pm_runtime_put(imx335->dev); -error_unlock: - mutex_unlock(&imx335->mutex); - return ret; } From df3ef05b51e02ef9386346288c1e63f366372f5b Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:12:59 +0530 Subject: [PATCH 197/249] media: imx355: Use subdev active state Port the driver to use the subdev active state. This simplifies locking, and makes it easier to support different crop sizes for binned modes, by storing the crop rectangle inside the subdev state. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 79 ++++++++++---------------------------- 1 file changed, 21 insertions(+), 58 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index a85174d1defa..cbb722f758cb 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -204,7 +204,6 @@ struct imx335_mode { * @vblank: Vertical blanking in lines * @lane_mode: Mode for number of connected data lanes * @cur_mode: Pointer to current selected sensor mode - * @mutex: Mutex for serializing sensor controls * @link_freq_bitmap: Menu bitmap for link_freq_ctrl * @cur_mbus_code: Currently selected media bus format code */ @@ -231,7 +230,6 @@ struct imx335 { u32 vblank; u32 lane_mode; const struct imx335_mode *cur_mode; - struct mutex mutex; unsigned long link_freq_bitmap; u32 cur_mbus_code; }; @@ -759,36 +757,6 @@ static void imx335_fill_pad_format(struct imx335 *imx335, fmt->format.xfer_func = V4L2_XFER_FUNC_NONE; } -/** - * imx335_get_pad_format() - Get subdevice pad format - * @sd: pointer to imx335 V4L2 sub-device structure - * @sd_state: V4L2 sub-device configuration - * @fmt: V4L2 sub-device format need to be set - * - * Return: 0 if successful, error code otherwise. - */ -static int imx335_get_pad_format(struct v4l2_subdev *sd, - struct v4l2_subdev_state *sd_state, - struct v4l2_subdev_format *fmt) -{ - struct imx335 *imx335 = to_imx335(sd); - - mutex_lock(&imx335->mutex); - - if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { - struct v4l2_mbus_framefmt *framefmt; - - framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); - fmt->format = *framefmt; - } else { - imx335_fill_pad_format(imx335, imx335->cur_mode, fmt); - } - - mutex_unlock(&imx335->mutex); - - return 0; -} - /** * imx335_set_pad_format() - Set subdevice pad format * @sd: pointer to imx335 V4L2 sub-device structure @@ -802,12 +770,12 @@ static int imx335_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_format *fmt) { struct imx335 *imx335 = to_imx335(sd); + struct v4l2_mbus_framefmt *format; const struct imx335_mode *mode; int i, ret = 0; - mutex_lock(&imx335->mutex); - mode = &supported_mode; + for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { if (imx335_mbus_codes[i] == fmt->format.code) imx335->cur_mbus_code = imx335_mbus_codes[i]; @@ -815,19 +783,15 @@ static int imx335_set_pad_format(struct v4l2_subdev *sd, imx335_fill_pad_format(imx335, mode, fmt); - if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { - struct v4l2_mbus_framefmt *framefmt; + format = v4l2_subdev_state_get_format(sd_state, fmt->pad); + *format = fmt->format; - framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); - *framefmt = fmt->format; - } else { + if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { ret = imx335_update_controls(imx335, mode); if (!ret) imx335->cur_mode = mode; } - mutex_unlock(&imx335->mutex); - return ret; } @@ -847,12 +811,10 @@ static int imx335_init_state(struct v4l2_subdev *sd, fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; imx335_fill_pad_format(imx335, &supported_mode, &fmt); - mutex_lock(&imx335->mutex); __v4l2_ctrl_modify_range(imx335->link_freq_ctrl, 0, __fls(imx335->link_freq_bitmap), ~(imx335->link_freq_bitmap), __ffs(imx335->link_freq_bitmap)); - mutex_unlock(&imx335->mutex); return imx335_set_pad_format(sd, sd_state, &fmt); } @@ -994,16 +956,17 @@ static void imx335_stop_streaming(struct imx335 *imx335) static int imx335_set_stream(struct v4l2_subdev *sd, int enable) { struct imx335 *imx335 = to_imx335(sd); + struct v4l2_subdev_state *state; int ret = 0; - mutex_lock(&imx335->mutex); + state = v4l2_subdev_lock_and_get_active_state(sd); if (enable) ret = imx335_start_streaming(imx335); else imx335_stop_streaming(imx335); - mutex_unlock(&imx335->mutex); + v4l2_subdev_unlock_state(state); return ret; } @@ -1131,7 +1094,7 @@ static const struct v4l2_subdev_pad_ops imx335_pad_ops = { .enum_frame_size = imx335_enum_frame_size, .get_selection = imx335_get_selection, .set_selection = imx335_get_selection, - .get_fmt = imx335_get_pad_format, + .get_fmt = v4l2_subdev_get_fmt, .set_fmt = imx335_set_pad_format, }; @@ -1226,9 +1189,6 @@ static int imx335_init_controls(struct imx335 *imx335) if (ret) return ret; - /* Serialize controls with sensor device */ - ctrl_hdlr->lock = &imx335->mutex; - /* Initialize exposure and gain */ lpfr = mode->vblank + mode->height; imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, @@ -1348,12 +1308,10 @@ static int imx335_probe(struct i2c_client *client) return ret; } - mutex_init(&imx335->mutex); - ret = imx335_power_on(imx335->dev); if (ret) { dev_err(imx335->dev, "failed to power-on the sensor\n"); - goto error_mutex_destroy; + return ret; } /* Check module identity */ @@ -1386,11 +1344,18 @@ static int imx335_probe(struct i2c_client *client) goto error_handler_free; } + imx335->sd.state_lock = imx335->ctrl_handler.lock; + ret = v4l2_subdev_init_finalize(&imx335->sd); + if (ret < 0) { + dev_err(imx335->dev, "subdev init error\n"); + goto error_media_entity; + } + ret = v4l2_async_register_subdev_sensor(&imx335->sd); if (ret < 0) { dev_err(imx335->dev, "failed to register async subdev: %d\n", ret); - goto error_media_entity; + goto error_subdev_cleanup; } pm_runtime_set_active(imx335->dev); @@ -1399,14 +1364,14 @@ static int imx335_probe(struct i2c_client *client) return 0; +error_subdev_cleanup: + v4l2_subdev_cleanup(&imx335->sd); error_media_entity: media_entity_cleanup(&imx335->sd.entity); error_handler_free: v4l2_ctrl_handler_free(imx335->sd.ctrl_handler); error_power_off: imx335_power_off(imx335->dev); -error_mutex_destroy: - mutex_destroy(&imx335->mutex); return ret; } @@ -1420,9 +1385,9 @@ static int imx335_probe(struct i2c_client *client) static void imx335_remove(struct i2c_client *client) { struct v4l2_subdev *sd = i2c_get_clientdata(client); - struct imx335 *imx335 = to_imx335(sd); v4l2_async_unregister_subdev(sd); + v4l2_subdev_cleanup(sd); media_entity_cleanup(&sd->entity); v4l2_ctrl_handler_free(sd->ctrl_handler); @@ -1430,8 +1395,6 @@ static void imx335_remove(struct i2c_client *client) if (!pm_runtime_status_suspended(&client->dev)) imx335_power_off(&client->dev); pm_runtime_set_suspended(&client->dev); - - mutex_destroy(&imx335->mutex); } static const struct dev_pm_ops imx335_pm_ops = { From 8a2451bd20e6f815e46adcc0f21be8124f16289c Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:13:00 +0530 Subject: [PATCH 198/249] media: imx335: Support 2x2 binning Introduce 2x2 binning mode (1312x972@60fps). Since there are multiple modes now, use v4l2_find_nearest_size() to select the appropriate mode in .set_fmt(). For 2x2 binning the minimum shutter value supported is 17 instead of 9. This effects the maximum allowed exposure time, and if not enforced then the sensor produces very dark frames when the minimum shutter limit is violated. Lastly, update the crop size reported to the userspace. When trying 2x2 binning with the datasheet suggested pixel array size (i.e. 2592 / 2 => 1296), on some platforms (Raspberry Pi 5) artefacts are introduced on the right edge of the output image. Instead, using a higher width of 1312 works fine on all platforms. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 273 +++++++++++++++++++++++++++++-------- 1 file changed, 216 insertions(+), 57 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index cbb722f758cb..18d237eef821 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -35,6 +35,7 @@ /* Lines per frame */ #define IMX335_REG_VMAX CCI_REG24_LE(0x3030) +#define IMX335_REG_HMAX CCI_REG16_LE(0x3034) #define IMX335_REG_OPB_SIZE_V CCI_REG8(0x304c) #define IMX335_REG_ADBIT CCI_REG8(0x3050) @@ -42,10 +43,13 @@ #define IMX335_REG_SHUTTER CCI_REG24_LE(0x3058) #define IMX335_EXPOSURE_MIN 1 -#define IMX335_EXPOSURE_OFFSET 9 +#define IMX335_SHUTTER_MIN 9 +#define IMX335_SHUTTER_MIN_BINNED 17 #define IMX335_EXPOSURE_STEP 1 #define IMX335_EXPOSURE_DEFAULT 0x0648 +#define IMX335_REG_AREA2_WIDTH_1 CCI_REG16_LE(0x3072) + #define IMX335_REG_AREA3_ST_ADR_1 CCI_REG16_LE(0x3074) #define IMX335_REG_AREA3_WIDTH_1 CCI_REG16_LE(0x3076) @@ -133,12 +137,11 @@ static const struct v4l2_rect imx335_native_area = { static const struct v4l2_rect imx335_active_area = { .top = 50, - .left = 52, - .width = 2592, + .left = 36, + .width = 2624, .height = 1944, }; - /** * struct imx335_reg_list - imx335 sensor register list * @num_of_regs: Number of registers in the list @@ -155,8 +158,14 @@ static const char * const imx335_supply_name[] = { "dvdd", /* Digital Core (1.2V) supply */ }; +enum imx335_scan_mode { + IMX335_ALL_PIXEL, + IMX335_2_2_BINNING, +}; + /** * struct imx335_mode - imx335 sensor mode structure + * @scan_mode: Configuration scan mode (All pixel / 2x2Binning) * @width: Frame width * @height: Frame height * @code: Format code @@ -170,6 +179,7 @@ static const char * const imx335_supply_name[] = { * @vflip_inverted: Register list vflip (inverted readout) */ struct imx335_mode { + enum imx335_scan_mode scan_mode; u32 width; u32 height; u32 code; @@ -271,12 +281,33 @@ static const struct cci_reg_sequence mode_2592x1944_regs[] = { { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, { IMX335_REG_MASTER_MODE, 0x00 }, { IMX335_REG_WINMODE, 0x04 }, + { IMX335_REG_HMAX, 550 }, { IMX335_REG_HTRIMMING_START, 48 }, { IMX335_REG_HNUM, 2592 }, { IMX335_REG_Y_OUT_SIZE, 1944 }, + { IMX335_REG_AREA2_WIDTH_1, 40 }, { IMX335_REG_AREA3_WIDTH_1, 3928 }, { IMX335_REG_OPB_SIZE_V, 0 }, { IMX335_REG_XVS_XHS_DRV, 0x00 }, +}; + +static const struct cci_reg_sequence mode_1312x972_regs[] = { + { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, + { IMX335_REG_MASTER_MODE, 0x00 }, + { IMX335_REG_WINMODE, 0x01 }, + { IMX335_REG_HMAX, 275 }, + { IMX335_REG_HTRIMMING_START, 48 }, + { IMX335_REG_HNUM, 2600 }, + { IMX335_REG_Y_OUT_SIZE, 972 }, + { IMX335_REG_AREA2_WIDTH_1, 48 }, + { IMX335_REG_AREA3_WIDTH_1, 3936 }, + { IMX335_REG_OPB_SIZE_V, 0 }, + { IMX335_REG_XVS_XHS_DRV, 0x00 }, + { CCI_REG8(0x3300), 1 }, /* TCYCLE */ + { CCI_REG8(0x3199), 0x30 }, /* HADD/VADD */ +}; + +static const struct cci_reg_sequence imx335_common_regs[] = { { CCI_REG8(0x3288), 0x21 }, { CCI_REG8(0x328a), 0x02 }, { CCI_REG8(0x3414), 0x05 }, @@ -367,16 +398,72 @@ static const struct cci_reg_sequence mode_2592x1944_vflip_inverted[] = { { CCI_REG16_LE(0x3116), 0x002 }, }; -static const struct cci_reg_sequence raw10_framefmt_regs[] = { - { IMX335_REG_ADBIT, 0x00 }, - { IMX335_REG_MDBIT, 0x00 }, - { IMX335_REG_ADBIT1, 0x1ff }, +static const struct cci_reg_sequence mode_1312x972_vflip_normal[] = { + { IMX335_REG_AREA3_ST_ADR_1, 176 }, + + /* Undocumented */ + { CCI_REG8(0x3078), 0x04 }, + { CCI_REG8(0x3079), 0xfd }, + { CCI_REG8(0x307a), 0x04 }, + { CCI_REG8(0x307b), 0xfe }, + { CCI_REG8(0x307c), 0x04 }, + { CCI_REG8(0x307d), 0xfb }, + { CCI_REG8(0x307e), 0x04 }, + { CCI_REG8(0x307f), 0x02 }, + { CCI_REG8(0x3080), 0x04 }, + { CCI_REG8(0x3081), 0xfd }, + { CCI_REG8(0x3082), 0x04 }, + { CCI_REG8(0x3083), 0xfe }, + { CCI_REG8(0x3084), 0x04 }, + { CCI_REG8(0x3085), 0xfb }, + { CCI_REG8(0x3086), 0x04 }, + { CCI_REG8(0x3087), 0x02 }, + { CCI_REG8(0x30a4), 0x77 }, + { CCI_REG8(0x30a8), 0x20 }, + { CCI_REG8(0x30a9), 0x00 }, + { CCI_REG8(0x30ac), 0x08 }, + { CCI_REG8(0x30ad), 0x08 }, + { CCI_REG8(0x30b0), 0x20 }, + { CCI_REG8(0x30b1), 0x00 }, + { CCI_REG8(0x30b4), 0x10 }, + { CCI_REG8(0x30b5), 0x10 }, + { CCI_REG16_LE(0x30b6), 0x00 }, + { CCI_REG16_LE(0x3112), 0x10 }, + { CCI_REG16_LE(0x3116), 0x10 }, }; -static const struct cci_reg_sequence raw12_framefmt_regs[] = { - { IMX335_REG_ADBIT, 0x01 }, - { IMX335_REG_MDBIT, 0x01 }, - { IMX335_REG_ADBIT1, 0x47 }, +static const struct cci_reg_sequence mode_1312x972_vflip_inverted[] = { + { IMX335_REG_AREA3_ST_ADR_1, 4112 }, + + /* Undocumented */ + { CCI_REG8(0x3078), 0x04 }, + { CCI_REG8(0x3079), 0xfd }, + { CCI_REG8(0x307a), 0x04 }, + { CCI_REG8(0x307b), 0xfe }, + { CCI_REG8(0x307c), 0x04 }, + { CCI_REG8(0x307d), 0xfb }, + { CCI_REG8(0x307e), 0x04 }, + { CCI_REG8(0x307f), 0x02 }, + { CCI_REG8(0x3080), 0xfc }, + { CCI_REG8(0x3081), 0x05 }, + { CCI_REG8(0x3082), 0xfc }, + { CCI_REG8(0x3083), 0x02 }, + { CCI_REG8(0x3084), 0xfc }, + { CCI_REG8(0x3085), 0x03 }, + { CCI_REG8(0x3086), 0xfc }, + { CCI_REG8(0x3087), 0xfe }, + { CCI_REG8(0x30a4), 0x77 }, + { CCI_REG8(0x30a8), 0x20 }, + { CCI_REG8(0x30a9), 0x00 }, + { CCI_REG8(0x30ac), 0x08 }, + { CCI_REG8(0x30ad), 0x78 }, + { CCI_REG8(0x30b0), 0x20 }, + { CCI_REG8(0x30b1), 0x00 }, + { CCI_REG8(0x30b4), 0x10 }, + { CCI_REG8(0x30b5), 0x70 }, + { CCI_REG16_LE(0x30b6), 0x01f2 }, + { CCI_REG16_LE(0x3112), 0x10 }, + { CCI_REG16_LE(0x3116), 0x02 }, }; static const struct cci_reg_sequence mipi_data_rate_1188Mbps[] = { @@ -441,25 +528,49 @@ static const u32 imx335_mbus_codes[] = { }; /* Supported sensor mode configurations */ -static const struct imx335_mode supported_mode = { - .width = 2592, - .height = 1944, - .hblank = 342, - .vblank = 2556, - .vblank_min = 2556, - .vblank_max = 133060, - .pclk = 396000000, - .reg_list = { - .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), - .regs = mode_2592x1944_regs, - }, - .vflip_normal = { - .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_normal), - .regs = mode_2592x1944_vflip_normal, - }, - .vflip_inverted = { - .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_inverted), - .regs = mode_2592x1944_vflip_inverted, +static const struct imx335_mode supported_modes[] = { + { + .scan_mode = IMX335_ALL_PIXEL, + .width = 2592, + .height = 1944, + .hblank = 342, + .vblank = 2556, + .vblank_min = 2556, + .vblank_max = 133060, + .pclk = 396000000, + .reg_list = { + .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs), + .regs = mode_2592x1944_regs, + }, + .vflip_normal = { + .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_normal), + .regs = mode_2592x1944_vflip_normal, + }, + .vflip_inverted = { + .num_of_regs = ARRAY_SIZE(mode_2592x1944_vflip_inverted), + .regs = mode_2592x1944_vflip_inverted, + } + }, { + .scan_mode = IMX335_2_2_BINNING, + .width = 1312, + .height = 972, + .hblank = 155, + .vblank = 3528, + .vblank_min = 3528, + .vblank_max = 133060, + .pclk = 396000000, + .reg_list = { + .num_of_regs = ARRAY_SIZE(mode_1312x972_regs), + .regs = mode_1312x972_regs, + }, + .vflip_normal = { + .num_of_regs = ARRAY_SIZE(mode_1312x972_vflip_normal), + .regs = mode_1312x972_vflip_normal, + }, + .vflip_inverted = { + .num_of_regs = ARRAY_SIZE(mode_1312x972_vflip_inverted), + .regs = mode_1312x972_vflip_inverted, + }, }, }; @@ -609,18 +720,22 @@ static int imx335_set_ctrl(struct v4l2_ctrl *ctrl) /* Propagate change of current control to all related controls */ if (ctrl->id == V4L2_CID_VBLANK) { + u32 shutter_min = IMX335_SHUTTER_MIN; + u32 lpfr; + imx335->vblank = imx335->vblank_ctrl->val; + lpfr = imx335->vblank + imx335->cur_mode->height; dev_dbg(imx335->dev, "Received vblank %u, new lpfr %u\n", - imx335->vblank, - imx335->vblank + imx335->cur_mode->height); + imx335->vblank, lpfr); + + if (imx335->cur_mode->scan_mode == IMX335_2_2_BINNING) + shutter_min = IMX335_SHUTTER_MIN_BINNED; ret = __v4l2_ctrl_modify_range(imx335->exp_ctrl, IMX335_EXPOSURE_MIN, - imx335->vblank + - imx335->cur_mode->height - - IMX335_EXPOSURE_OFFSET, - 1, IMX335_EXPOSURE_DEFAULT); + lpfr - shutter_min, 1, + IMX335_EXPOSURE_DEFAULT); if (ret) return ret; } @@ -720,17 +835,16 @@ static int imx335_enum_frame_size(struct v4l2_subdev *sd, struct imx335 *imx335 = to_imx335(sd); u32 code; - /* Only a single supported_mode available. */ - if (fsize->index > 0) + if (fsize->index >= ARRAY_SIZE(supported_modes)) return -EINVAL; code = imx335_get_format_code(imx335, fsize->code); if (fsize->code != code) return -EINVAL; - fsize->min_width = supported_mode.width; + fsize->min_width = supported_modes[fsize->index].width; fsize->max_width = fsize->min_width; - fsize->min_height = supported_mode.height; + fsize->min_height = supported_modes[fsize->index].height; fsize->max_height = fsize->min_height; return 0; @@ -772,9 +886,13 @@ static int imx335_set_pad_format(struct v4l2_subdev *sd, struct imx335 *imx335 = to_imx335(sd); struct v4l2_mbus_framefmt *format; const struct imx335_mode *mode; + struct v4l2_rect *crop; int i, ret = 0; - mode = &supported_mode; + mode = v4l2_find_nearest_size(supported_modes, + ARRAY_SIZE(supported_modes), + width, height, + fmt->format.width, fmt->format.height); for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { if (imx335_mbus_codes[i] == fmt->format.code) @@ -786,6 +904,16 @@ static int imx335_set_pad_format(struct v4l2_subdev *sd, format = v4l2_subdev_state_get_format(sd_state, fmt->pad); *format = fmt->format; + crop = v4l2_subdev_state_get_crop(sd_state, fmt->pad); + crop->width = fmt->format.width; + crop->height = fmt->format.height; + if (mode->scan_mode == IMX335_2_2_BINNING) { + crop->width *= 2; + crop->height *= 2; + } + crop->left = (imx335_native_area.width - crop->width) / 2; + crop->top = (imx335_native_area.height - crop->height) / 2; + if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { ret = imx335_update_controls(imx335, mode); if (!ret) @@ -809,7 +937,7 @@ static int imx335_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_format fmt = { 0 }; fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; - imx335_fill_pad_format(imx335, &supported_mode, &fmt); + imx335_fill_pad_format(imx335, &supported_modes[0], &fmt); __v4l2_ctrl_modify_range(imx335->link_freq_ctrl, 0, __fls(imx335->link_freq_bitmap), @@ -832,11 +960,15 @@ static int imx335_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_selection *sel) { switch (sel->target) { + case V4L2_SEL_TGT_CROP: + sel->r = *v4l2_subdev_state_get_crop(sd_state, 0); + + return 0; + case V4L2_SEL_TGT_NATIVE_SIZE: sel->r = imx335_native_area; return 0; - case V4L2_SEL_TGT_CROP: case V4L2_SEL_TGT_CROP_DEFAULT: case V4L2_SEL_TGT_CROP_BOUNDS: sel->r = imx335_active_area; @@ -848,19 +980,35 @@ static int imx335_get_selection(struct v4l2_subdev *sd, static int imx335_set_framefmt(struct imx335 *imx335) { - switch (imx335->cur_mbus_code) { - case MEDIA_BUS_FMT_SRGGB10_1X10: - return cci_multi_reg_write(imx335->cci, raw10_framefmt_regs, - ARRAY_SIZE(raw10_framefmt_regs), - NULL); + /* + * In the all-pixel scan mode the AD conversion shall match the output + * bit width requested. + * + * However, when 2/2 binning is enabled, the AD conversion is always + * 10-bit, so we ensure ADBIT is clear and ADBIT1 is assigned 0x1ff. + * That's as much as the documentation gives us... + */ + int ret = 0; + u8 bpp = imx335->cur_mbus_code == MEDIA_BUS_FMT_SRGGB10_1X10 ? 10 : 12; + u8 ad_conv = bpp; - case MEDIA_BUS_FMT_SRGGB12_1X12: - return cci_multi_reg_write(imx335->cci, raw12_framefmt_regs, - ARRAY_SIZE(raw12_framefmt_regs), - NULL); + /* Start with the output mode */ + cci_write(imx335->cci, IMX335_REG_MDBIT, bpp == 12, &ret); + + /* Enforce 10 bit AD on binning modes */ + if (imx335->cur_mode->scan_mode == IMX335_2_2_BINNING) + ad_conv = 10; + + /* AD Conversion configuration */ + if (ad_conv == 10) { + cci_write(imx335->cci, IMX335_REG_ADBIT, 0x00, &ret); + cci_write(imx335->cci, IMX335_REG_ADBIT1, 0x1ff, &ret); + } else { /* 12 bit AD Conversion */ + cci_write(imx335->cci, IMX335_REG_ADBIT, 0x01, &ret); + cci_write(imx335->cci, IMX335_REG_ADBIT1, 0x47, &ret); } - return -EINVAL; + return ret; } /** @@ -896,6 +1044,14 @@ static int imx335_start_streaming(struct imx335 *imx335) goto err_rpm_put; } + /* Write sensor common registers */ + ret = cci_multi_reg_write(imx335->cci, imx335_common_regs, + ARRAY_SIZE(imx335_common_regs), NULL); + if (ret) { + dev_err(imx335->dev, "fail to write initial registers\n"); + goto err_rpm_put; + } + ret = imx335_set_framefmt(imx335); if (ret) { dev_err(imx335->dev, "%s failed to set frame format: %d\n", @@ -1177,7 +1333,7 @@ static int imx335_init_controls(struct imx335 *imx335) struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler; const struct imx335_mode *mode = imx335->cur_mode; struct v4l2_fwnode_device_properties props; - u32 lpfr; + u32 lpfr, shutter_min; int ret; ret = v4l2_fwnode_device_parse(imx335->dev, &props); @@ -1191,11 +1347,14 @@ static int imx335_init_controls(struct imx335 *imx335) /* Initialize exposure and gain */ lpfr = mode->vblank + mode->height; + shutter_min = IMX335_SHUTTER_MIN; + if (mode->scan_mode == IMX335_2_2_BINNING) + shutter_min = IMX335_SHUTTER_MIN_BINNED; imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, &imx335_ctrl_ops, V4L2_CID_EXPOSURE, IMX335_EXPOSURE_MIN, - lpfr - IMX335_EXPOSURE_OFFSET, + lpfr - shutter_min, IMX335_EXPOSURE_STEP, IMX335_EXPOSURE_DEFAULT); @@ -1322,7 +1481,7 @@ static int imx335_probe(struct i2c_client *client) } /* Set default mode to max resolution */ - imx335->cur_mode = &supported_mode; + imx335->cur_mode = &supported_modes[0]; imx335->cur_mbus_code = imx335_mbus_codes[0]; imx335->vblank = imx335->cur_mode->vblank; From ca042de64800a0bcc3e0866e4efaa4a657e8ddc9 Mon Sep 17 00:00:00 2001 From: Jai Luthra Date: Thu, 30 Oct 2025 14:13:01 +0530 Subject: [PATCH 199/249] media: imx335: Switch to {enable,disable}_streams Switch from s_stream to enable_streams and disable_streams callbacks. Reviewed-by: Kieran Bingham Signed-off-by: Jai Luthra Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx335.c | 53 +++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 29 deletions(-) diff --git a/drivers/media/i2c/imx335.c b/drivers/media/i2c/imx335.c index 18d237eef821..5790aa4fabeb 100644 --- a/drivers/media/i2c/imx335.c +++ b/drivers/media/i2c/imx335.c @@ -1012,13 +1012,19 @@ static int imx335_set_framefmt(struct imx335 *imx335) } /** - * imx335_start_streaming() - Start sensor stream - * @imx335: pointer to imx335 device + * imx335_enable_streams() - Enable sensor streams + * @sd: V4L2 subdevice + * @state: V4L2 subdevice state + * @pad: The pad to enable + * @streams_mask: Bitmask of streams to enable * * Return: 0 if successful, error code otherwise. */ -static int imx335_start_streaming(struct imx335 *imx335) +static int imx335_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) { + struct imx335 *imx335 = to_imx335(sd); const struct imx335_reg_list *reg_list; int ret; @@ -1092,37 +1098,24 @@ static int imx335_start_streaming(struct imx335 *imx335) } /** - * imx335_stop_streaming() - Stop sensor stream - * @imx335: pointer to imx335 device - */ -static void imx335_stop_streaming(struct imx335 *imx335) -{ - cci_write(imx335->cci, IMX335_REG_MODE_SELECT, - IMX335_MODE_STANDBY, NULL); - pm_runtime_put(imx335->dev); -} - -/** - * imx335_set_stream() - Enable sensor streaming - * @sd: pointer to imx335 subdevice - * @enable: set to enable sensor streaming + * imx335_disable_streams() - Disable sensor streams + * @sd: V4L2 subdevice + * @state: V4L2 subdevice state + * @pad: The pad to disable + * @streams_mask: Bitmask of streams to disable * * Return: 0 if successful, error code otherwise. */ -static int imx335_set_stream(struct v4l2_subdev *sd, int enable) +static int imx335_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) { struct imx335 *imx335 = to_imx335(sd); - struct v4l2_subdev_state *state; - int ret = 0; + int ret; - state = v4l2_subdev_lock_and_get_active_state(sd); - - if (enable) - ret = imx335_start_streaming(imx335); - else - imx335_stop_streaming(imx335); - - v4l2_subdev_unlock_state(state); + ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, + IMX335_MODE_STANDBY, NULL); + pm_runtime_put(imx335->dev); return ret; } @@ -1242,7 +1235,7 @@ static int imx335_parse_hw_config(struct imx335 *imx335) /* V4l2 subdevice ops */ static const struct v4l2_subdev_video_ops imx335_video_ops = { - .s_stream = imx335_set_stream, + .s_stream = v4l2_subdev_s_stream_helper, }; static const struct v4l2_subdev_pad_ops imx335_pad_ops = { @@ -1252,6 +1245,8 @@ static const struct v4l2_subdev_pad_ops imx335_pad_ops = { .set_selection = imx335_get_selection, .get_fmt = v4l2_subdev_get_fmt, .set_fmt = imx335_set_pad_format, + .enable_streams = imx335_enable_streams, + .disable_streams = imx335_disable_streams, }; static const struct v4l2_subdev_ops imx335_subdev_ops = { From fd3f646e1c9d783d1f4ef30e5376ccf315a8ae30 Mon Sep 17 00:00:00 2001 From: Isaac Scott Date: Wed, 29 Oct 2025 18:03:18 +0000 Subject: [PATCH 200/249] media: v4l: Add helper to get number of active lanes via a pad Sometimes, users will not use all of the MIPI CSI 2 lanes available when connecting to the MIPI CSI receiver of their device. Add a helper function that checks the mbus_config for the device driver to allow users to define the number of active data lanes through the get_mbus_config op. If the driver does not implement this op, fall back to using the maximum number of lanes available. Reviewed-by: Frank Li Reviewed-by: Laurent Pinchart Signed-off-by: Isaac Scott Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-common.c | 29 +++++++++++++++++++++++++++ include/media/v4l2-common.h | 20 ++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-common.c b/drivers/media/v4l2-core/v4l2-common.c index b367d479d6b3..554c591e1113 100644 --- a/drivers/media/v4l2-core/v4l2-common.c +++ b/drivers/media/v4l2-core/v4l2-common.c @@ -573,6 +573,35 @@ s64 v4l2_get_link_freq(const struct media_pad *pad, unsigned int mul, return v4l2_get_link_freq_ctrl(sd->ctrl_handler, mul, div); } EXPORT_SYMBOL_GPL(v4l2_get_link_freq); + +int v4l2_get_active_data_lanes(const struct media_pad *pad, + unsigned int max_data_lanes) +{ + struct v4l2_mbus_config mbus_config = {}; + struct v4l2_subdev *sd; + unsigned int lanes; + int ret; + + sd = media_entity_to_v4l2_subdev(pad->entity); + ret = v4l2_subdev_call(sd, pad, get_mbus_config, pad->index, + &mbus_config); + if (ret < 0 && ret != -ENOIOCTLCMD) + return ret; + + /* This relies on the mbus_config being zeroed at init time */ + lanes = mbus_config.bus.mipi_csi2.num_data_lanes; + if (!lanes) + return max_data_lanes; + + if (lanes > max_data_lanes) { + dev_dbg(sd->dev, "Active data lanes (%u) exceeds max (%u)\n", + lanes, max_data_lanes); + return -EINVAL; + } + + return lanes; +} +EXPORT_SYMBOL_GPL(v4l2_get_active_data_lanes); #endif /* diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index 5c0a7f6b5bb6..f8b1faced79c 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h @@ -581,6 +581,26 @@ int v4l2_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pixfmt, u32 pixelformat, #ifdef CONFIG_MEDIA_CONTROLLER s64 v4l2_get_link_freq(const struct media_pad *pad, unsigned int mul, unsigned int div); + +/** + * v4l2_get_active_data_lanes - Get number of active data lanes from driver + * + * @pad: The transmitter's media pad. + * @max_data_lanes: The maximum number of active data lanes supported by + * the MIPI CSI link in hardware. + * + * This function is intended for obtaining the number of data lanes that are + * actively being used by the driver for a MIPI CSI-2 device on a given media pad. + * This information is derived from a mbus_config fetched from a device driver + * using the get_mbus_config v4l2_subdev pad op. + * + * Return: + * * >0: Number of active data lanes + * * %-EINVAL: Number of active data lanes is invalid, as it exceeds the maximum + * supported data lanes. + */ +int v4l2_get_active_data_lanes(const struct media_pad *pad, + unsigned int max_data_lanes); #endif void v4l2_simplify_fraction(u32 *numerator, u32 *denominator, From e10d6d961842d1619ca172f11dfb33d1fae46b5b Mon Sep 17 00:00:00 2001 From: Isaac Scott Date: Wed, 29 Oct 2025 18:03:19 +0000 Subject: [PATCH 201/249] media: imx-mipi-csis: Move redundant debug print in probe The number of data lanes is already printed as part of mipi_csis_async_register(), making the first part of this print redundant. Remove the redundant print, and move the debug print for clock frequency to mipi_csis_parse_dt(). Reviewed-by: Frank Li Reviewed-by: Laurent Pinchart Signed-off-by: Isaac Scott Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-mipi-csis.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/platform/nxp/imx-mipi-csis.c index fd399af56e0c..04c586aa9efc 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -1481,6 +1481,7 @@ static int mipi_csis_parse_dt(struct mipi_csis_device *csis) struct device_node *node = csis->dev->of_node; of_property_read_u32(node, "clock-frequency", &csis->clk_frequency); + dev_dbg(csis->dev, "clock frequency: %u\n", csis->clk_frequency); csis->num_channels = 1; of_property_read_u32(node, "fsl,num-channels", &csis->num_channels); @@ -1566,9 +1567,6 @@ static int mipi_csis_probe(struct platform_device *pdev) goto err_unregister_all; } - dev_info(dev, "lanes: %d, freq: %u\n", - csis->bus.num_data_lanes, csis->clk_frequency); - return 0; err_unregister_all: From 5c731dba1d8b92ecb935031cf33dabb2bd6793c4 Mon Sep 17 00:00:00 2001 From: Isaac Scott Date: Wed, 29 Oct 2025 18:03:20 +0000 Subject: [PATCH 202/249] media: imx-mipi-csis: Add num_data_lanes to mipi_csis_device Add the num_data_lanes field to the mipi_csis_device struct, and set it equal to csis->bus.num_data_lanes. This is in preparation to support cases when the data lanes actively used differs from the maximum supported data lanes. No functional changes intended by this commit. Reviewed-by: Frank Li Reviewed-by: Laurent Pinchart Signed-off-by: Isaac Scott Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-mipi-csis.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/platform/nxp/imx-mipi-csis.c index 04c586aa9efc..1569299be4ec 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -351,6 +351,8 @@ struct mipi_csis_device { u32 hs_settle; u32 clk_settle; + unsigned int num_data_lanes; + spinlock_t slock; /* Protect events */ struct mipi_csis_event events[MIPI_CSIS_NUM_EVENTS]; struct dentry *debugfs_root; @@ -573,7 +575,7 @@ static void mipi_csis_system_enable(struct mipi_csis_device *csis, int on) val = mipi_csis_read(csis, MIPI_CSIS_DPHY_CMN_CTRL); val &= ~MIPI_CSIS_DPHY_CMN_CTRL_ENABLE; if (on) { - mask = (1 << (csis->bus.num_data_lanes + 1)) - 1; + mask = (1 << (csis->num_data_lanes + 1)) - 1; val |= (mask & MIPI_CSIS_DPHY_CMN_CTRL_ENABLE); } mipi_csis_write(csis, MIPI_CSIS_DPHY_CMN_CTRL, val); @@ -623,7 +625,7 @@ static int mipi_csis_calculate_params(struct mipi_csis_device *csis, /* Calculate the line rate from the pixel rate. */ link_freq = v4l2_get_link_freq(csis->source.pad, csis_fmt->width, - csis->bus.num_data_lanes * 2); + csis->num_data_lanes * 2); if (link_freq < 0) { dev_err(csis->dev, "Unable to obtain link frequency: %d\n", (int)link_freq); @@ -668,7 +670,7 @@ static void mipi_csis_set_params(struct mipi_csis_device *csis, const struct v4l2_mbus_framefmt *format, const struct csis_pix_format *csis_fmt) { - int lanes = csis->bus.num_data_lanes; + int lanes = csis->num_data_lanes; u32 val; val = mipi_csis_read(csis, MIPI_CSIS_CMN_CTRL); @@ -1366,8 +1368,9 @@ static int mipi_csis_async_register(struct mipi_csis_device *csis) } csis->bus = vep.bus.mipi_csi2; + csis->num_data_lanes = csis->bus.num_data_lanes; - dev_dbg(csis->dev, "data lanes: %d\n", csis->bus.num_data_lanes); + dev_dbg(csis->dev, "max data lanes: %d\n", csis->bus.num_data_lanes); dev_dbg(csis->dev, "flags: 0x%08x\n", csis->bus.flags); asd = v4l2_async_nf_add_fwnode_remote(&csis->notifier, ep, From e687f5cae591dba4a0a968c24cbe7b6141027d93 Mon Sep 17 00:00:00 2001 From: Isaac Scott Date: Wed, 29 Oct 2025 18:03:21 +0000 Subject: [PATCH 203/249] media: imx-mipi-csis: Support active data lanes differing from maximum Call on v4l2_get_active_data_lanes() to check if the driver reports that the number of lanes actively used by the MIPI CSI transmitter differs to the maximum defined in device tree. If the number of active data lanes reported by the driver is invalid, catch and return the error. If the operation is not supported, fall back to the number of allowed data lanes. Signed-off-by: Isaac Scott Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/nxp/imx-mipi-csis.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/media/platform/nxp/imx-mipi-csis.c b/drivers/media/platform/nxp/imx-mipi-csis.c index 1569299be4ec..088b2945aee3 100644 --- a/drivers/media/platform/nxp/imx-mipi-csis.c +++ b/drivers/media/platform/nxp/imx-mipi-csis.c @@ -1034,6 +1034,12 @@ static int mipi_csis_s_stream(struct v4l2_subdev *sd, int enable) format = v4l2_subdev_state_get_format(state, CSIS_PAD_SINK); csis_fmt = find_csis_format(format->code); + ret = v4l2_get_active_data_lanes(csis->source.pad, csis->bus.num_data_lanes); + if (ret < 0) + goto err_unlock; + + csis->num_data_lanes = ret; + ret = mipi_csis_calculate_params(csis, csis_fmt); if (ret < 0) goto err_unlock; From 15ac3d54a8296e027bf176115e36c3cb8c55c8cc Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Mon, 20 Oct 2025 20:18:13 +0000 Subject: [PATCH 204/249] media: i2c: imx214: Rearrange control initialization Smatch is confused by the control initialization logic. It assumes that there can be a case where imx214->link_freq can be NULL and ctrls_init returns 0. Re-arrange the function to make smatch happy. This patch fixes this smatch error: drivers/media/i2c/imx214.c:1109 imx214_ctrls_init() error: we previously assumed 'imx214->link_freq' could be null (see line 1017) Signed-off-by: Ricardo Ribalda Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx214.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/media/i2c/imx214.c b/drivers/media/i2c/imx214.c index 94ebe625c9e6..d4945b192776 100644 --- a/drivers/media/i2c/imx214.c +++ b/drivers/media/i2c/imx214.c @@ -1014,8 +1014,6 @@ static int imx214_ctrls_init(struct imx214 *imx214) V4L2_CID_LINK_FREQ, imx214->bus_cfg.nr_of_link_frequencies - 1, 0, imx214->bus_cfg.link_frequencies); - if (imx214->link_freq) - imx214->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; /* * WARNING! @@ -1038,9 +1036,6 @@ static int imx214_ctrls_init(struct imx214 *imx214) imx214->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx214_ctrl_ops, V4L2_CID_HBLANK, hblank, hblank, 1, hblank); - if (imx214->hblank) - imx214->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; - exposure_max = mode->vts_def - IMX214_EXPOSURE_OFFSET; exposure_def = min(exposure_max, IMX214_EXPOSURE_DEFAULT); imx214->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx214_ctrl_ops, @@ -1060,13 +1055,9 @@ static int imx214_ctrls_init(struct imx214 *imx214) imx214->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx214_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); - if (imx214->hflip) - imx214->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; imx214->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx214_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); - if (imx214->vflip) - imx214->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; v4l2_ctrl_cluster(2, &imx214->hflip); @@ -1106,6 +1097,12 @@ static int imx214_ctrls_init(struct imx214 *imx214) return ret; } + /* Now that the controls have been properly created, set their flags. */ + imx214->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + imx214->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + imx214->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + imx214->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + ret = imx214_pll_update(imx214); if (ret < 0) { v4l2_ctrl_handler_free(ctrl_hdlr); From 4985b66fbd97913998c714fd68b843d4e0feb61b Mon Sep 17 00:00:00 2001 From: Hans de Goede Date: Mon, 20 Oct 2025 17:37:41 +0200 Subject: [PATCH 205/249] media: ipu6: isys: Add support for monochrome media bus formats Add support for monochrome media bus formats, for use with monochrome/IR camera sensors. This has been tested on a Dell XPS 13 9320 with OV1A1B IR sensor. Signed-off-by: Hans de Goede Reviewed-by: Bingbu Cao Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c | 4 +++ .../media/pci/intel/ipu6/ipu6-isys-subdev.c | 34 ++++++++++++++----- .../media/pci/intel/ipu6/ipu6-isys-video.c | 14 ++++++++ 3 files changed, 43 insertions(+), 9 deletions(-) diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c b/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c index d858976112ba..43a2a16a3c2a 100644 --- a/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c +++ b/drivers/media/pci/intel/ipu6/ipu6-isys-csi2.c @@ -42,6 +42,10 @@ static const u32 csi2_supported_codes[] = { MEDIA_BUS_FMT_SGBRG8_1X8, MEDIA_BUS_FMT_SGRBG8_1X8, MEDIA_BUS_FMT_SRGGB8_1X8, + MEDIA_BUS_FMT_Y8_1X8, + MEDIA_BUS_FMT_Y10_1X10, + MEDIA_BUS_FMT_Y12_1X12, + MEDIA_BUS_FMT_Y16_1X16, MEDIA_BUS_FMT_META_8, MEDIA_BUS_FMT_META_10, MEDIA_BUS_FMT_META_12, diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-subdev.c b/drivers/media/pci/intel/ipu6/ipu6-isys-subdev.c index 463a0adf9e13..869e7d4ba572 100644 --- a/drivers/media/pci/intel/ipu6/ipu6-isys-subdev.c +++ b/drivers/media/pci/intel/ipu6/ipu6-isys-subdev.c @@ -25,24 +25,28 @@ unsigned int ipu6_isys_mbus_code_to_bpp(u32 code) case MEDIA_BUS_FMT_RGB565_1X16: case MEDIA_BUS_FMT_UYVY8_1X16: case MEDIA_BUS_FMT_YUYV8_1X16: + case MEDIA_BUS_FMT_Y16_1X16: case MEDIA_BUS_FMT_META_16: return 16; case MEDIA_BUS_FMT_SBGGR12_1X12: case MEDIA_BUS_FMT_SGBRG12_1X12: case MEDIA_BUS_FMT_SGRBG12_1X12: case MEDIA_BUS_FMT_SRGGB12_1X12: + case MEDIA_BUS_FMT_Y12_1X12: case MEDIA_BUS_FMT_META_12: return 12; case MEDIA_BUS_FMT_SBGGR10_1X10: case MEDIA_BUS_FMT_SGBRG10_1X10: case MEDIA_BUS_FMT_SGRBG10_1X10: case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_Y10_1X10: case MEDIA_BUS_FMT_META_10: return 10; case MEDIA_BUS_FMT_SBGGR8_1X8: case MEDIA_BUS_FMT_SGBRG8_1X8: case MEDIA_BUS_FMT_SGRBG8_1X8: case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_Y8_1X8: case MEDIA_BUS_FMT_META_8: return 8; default: @@ -65,21 +69,25 @@ unsigned int ipu6_isys_mbus_code_to_mipi(u32 code) case MEDIA_BUS_FMT_SGBRG16_1X16: case MEDIA_BUS_FMT_SGRBG16_1X16: case MEDIA_BUS_FMT_SRGGB16_1X16: + case MEDIA_BUS_FMT_Y16_1X16: return MIPI_CSI2_DT_RAW16; case MEDIA_BUS_FMT_SBGGR12_1X12: case MEDIA_BUS_FMT_SGBRG12_1X12: case MEDIA_BUS_FMT_SGRBG12_1X12: case MEDIA_BUS_FMT_SRGGB12_1X12: + case MEDIA_BUS_FMT_Y12_1X12: return MIPI_CSI2_DT_RAW12; case MEDIA_BUS_FMT_SBGGR10_1X10: case MEDIA_BUS_FMT_SGBRG10_1X10: case MEDIA_BUS_FMT_SGRBG10_1X10: case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_Y10_1X10: return MIPI_CSI2_DT_RAW10; case MEDIA_BUS_FMT_SBGGR8_1X8: case MEDIA_BUS_FMT_SGBRG8_1X8: case MEDIA_BUS_FMT_SGRBG8_1X8: case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_Y8_1X8: return MIPI_CSI2_DT_RAW8; case MEDIA_BUS_FMT_META_8: case MEDIA_BUS_FMT_META_10: @@ -96,15 +104,23 @@ unsigned int ipu6_isys_mbus_code_to_mipi(u32 code) bool ipu6_isys_is_bayer_format(u32 code) { - switch (ipu6_isys_mbus_code_to_mipi(code)) { - case MIPI_CSI2_DT_RAW8: - case MIPI_CSI2_DT_RAW10: - case MIPI_CSI2_DT_RAW12: - case MIPI_CSI2_DT_RAW14: - case MIPI_CSI2_DT_RAW16: - case MIPI_CSI2_DT_RAW20: - case MIPI_CSI2_DT_RAW24: - case MIPI_CSI2_DT_RAW28: + switch (code) { + case MEDIA_BUS_FMT_SBGGR8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_SBGGR10_1X10: + case MEDIA_BUS_FMT_SGBRG10_1X10: + case MEDIA_BUS_FMT_SGRBG10_1X10: + case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_SBGGR12_1X12: + case MEDIA_BUS_FMT_SGBRG12_1X12: + case MEDIA_BUS_FMT_SGRBG12_1X12: + case MEDIA_BUS_FMT_SRGGB12_1X12: + case MEDIA_BUS_FMT_SRGGB16_1X16: + case MEDIA_BUS_FMT_SGRBG16_1X16: + case MEDIA_BUS_FMT_SGBRG16_1X16: + case MEDIA_BUS_FMT_SBGGR16_1X16: return true; default: return false; diff --git a/drivers/media/pci/intel/ipu6/ipu6-isys-video.c b/drivers/media/pci/intel/ipu6/ipu6-isys-video.c index f3f3bc0615e5..dec8f5ffcfa5 100644 --- a/drivers/media/pci/intel/ipu6/ipu6-isys-video.c +++ b/drivers/media/pci/intel/ipu6/ipu6-isys-video.c @@ -77,6 +77,20 @@ const struct ipu6_isys_pixelformat ipu6_isys_pfmts[] = { IPU6_FW_ISYS_FRAME_FORMAT_RAW10 }, { V4L2_PIX_FMT_SRGGB10P, 10, 10, MEDIA_BUS_FMT_SRGGB10_1X10, IPU6_FW_ISYS_FRAME_FORMAT_RAW10 }, + + { V4L2_PIX_FMT_GREY, 8, 8, MEDIA_BUS_FMT_Y8_1X8, + IPU6_FW_ISYS_FRAME_FORMAT_RAW8 }, + { V4L2_PIX_FMT_Y10, 16, 10, MEDIA_BUS_FMT_Y10_1X10, + IPU6_FW_ISYS_FRAME_FORMAT_RAW16 }, + { V4L2_PIX_FMT_Y12, 16, 12, MEDIA_BUS_FMT_Y12_1X12, + IPU6_FW_ISYS_FRAME_FORMAT_RAW16 }, + { V4L2_PIX_FMT_Y16, 16, 16, MEDIA_BUS_FMT_Y16_1X16, + IPU6_FW_ISYS_FRAME_FORMAT_RAW16 }, + { V4L2_PIX_FMT_Y10P, 10, 10, MEDIA_BUS_FMT_Y10_1X10, + IPU6_FW_ISYS_FRAME_FORMAT_RAW10 }, + { V4L2_PIX_FMT_Y12P, 12, 12, MEDIA_BUS_FMT_Y12_1X12, + IPU6_FW_ISYS_FRAME_FORMAT_RAW12 }, + { V4L2_PIX_FMT_UYVY, 16, 16, MEDIA_BUS_FMT_UYVY8_1X16, IPU6_FW_ISYS_FRAME_FORMAT_UYVY}, { V4L2_PIX_FMT_YUYV, 16, 16, MEDIA_BUS_FMT_YUYV8_1X16, From dff10c7044e8777bd14bba99444ff8a69d9bb2fe Mon Sep 17 00:00:00 2001 From: Tarang Raval Date: Fri, 31 Oct 2025 17:18:34 +0530 Subject: [PATCH 206/249] media: i2c: imx219: Propagate errors from control range updates Propagate return values from __v4l2_ctrl_modify_range() and __v4l2_ctrl_s_ctrl() in imx219_set_ctrl() and imx219_set_pad_format(). This ensures proper error handling instead of ignoring possible failures. Also return the result of imx219_set_pad_format() from imx219_init_state(). Signed-off-by: Tarang Raval Reviewed-by: Isaac Scott Reviewed-by: Dave Stevenson Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx219.c | 61 +++++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 21 deletions(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index 48efdcd2a8f9..40693635c0c3 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -453,10 +453,14 @@ static int imx219_set_ctrl(struct v4l2_ctrl *ctrl) exposure_max = format->height + ctrl->val - 4; exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? exposure_max : IMX219_EXPOSURE_DEFAULT; - __v4l2_ctrl_modify_range(imx219->exposure, - imx219->exposure->minimum, - exposure_max, imx219->exposure->step, - exposure_def); + ret = __v4l2_ctrl_modify_range(imx219->exposure, + imx219->exposure->minimum, + exposure_max, + imx219->exposure->step, + exposure_def); + if (ret) + return ret; + } /* @@ -848,6 +852,7 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, struct v4l2_rect *crop; u8 bin_h, bin_v, binning; u32 prev_line_len; + int ret; format = v4l2_subdev_state_get_format(state, 0); prev_line_len = format->width + imx219->hblank->val; @@ -883,19 +888,28 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, int pixel_rate; /* Update limits and set FPS to default */ - __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN, - IMX219_FLL_MAX - mode->height, 1, + ret = __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN, + IMX219_FLL_MAX - mode->height, 1, + mode->fll_def - mode->height); + if (ret) + return ret; + + ret = __v4l2_ctrl_s_ctrl(imx219->vblank, mode->fll_def - mode->height); - __v4l2_ctrl_s_ctrl(imx219->vblank, - mode->fll_def - mode->height); + if (ret) + return ret; + /* Update max exposure while meeting expected vblanking */ exposure_max = mode->fll_def - 4; exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? exposure_max : IMX219_EXPOSURE_DEFAULT; - __v4l2_ctrl_modify_range(imx219->exposure, - imx219->exposure->minimum, - exposure_max, imx219->exposure->step, - exposure_def); + ret = __v4l2_ctrl_modify_range(imx219->exposure, + imx219->exposure->minimum, + exposure_max, + imx219->exposure->step, + exposure_def); + if (ret) + return ret; /* * With analog binning the default minimum line length of 3448 @@ -906,9 +920,12 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, imx219_get_binning(state, &bin_h, &bin_v); llp_min = (bin_h & bin_v) == IMX219_BINNING_X2_ANALOG ? IMX219_BINNED_LLP_MIN : IMX219_LLP_MIN; - __v4l2_ctrl_modify_range(imx219->hblank, llp_min - mode->width, - IMX219_LLP_MAX - mode->width, 1, - llp_min - mode->width); + ret = __v4l2_ctrl_modify_range(imx219->hblank, + llp_min - mode->width, + IMX219_LLP_MAX - mode->width, 1, + llp_min - mode->width); + if (ret) + return ret; /* * Retain PPL setting from previous mode so that the * line time does not change on a mode change. @@ -917,13 +934,17 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, * mode width subtracted. */ hblank = prev_line_len - mode->width; - __v4l2_ctrl_s_ctrl(imx219->hblank, hblank); + ret = __v4l2_ctrl_s_ctrl(imx219->hblank, hblank); + if (ret) + return ret; /* Scale the pixel rate based on the mode specific factor */ pixel_rate = imx219_get_pixel_rate(imx219) * imx219_get_rate_factor(state); - __v4l2_ctrl_modify_range(imx219->pixel_rate, pixel_rate, - pixel_rate, 1, pixel_rate); + ret = __v4l2_ctrl_modify_range(imx219->pixel_rate, pixel_rate, + pixel_rate, 1, pixel_rate); + if (ret) + return ret; } return 0; @@ -972,9 +993,7 @@ static int imx219_init_state(struct v4l2_subdev *sd, }, }; - imx219_set_pad_format(sd, state, &fmt); - - return 0; + return imx219_set_pad_format(sd, state, &fmt); } static const struct v4l2_subdev_video_ops imx219_video_ops = { From 9a9ba098e7ba6b89efaddeabf0716a84a0f54c99 Mon Sep 17 00:00:00 2001 From: Tarang Raval Date: Fri, 31 Oct 2025 17:18:35 +0530 Subject: [PATCH 207/249] media: i2c: imx219: Replace exposure magic value with named constant Introduce IMX219_EXPOSURE_OFFSET (4) and use it instead of the literal '4' when computing the maximum coarse exposure. The IMX219 datasheet specifies the maximum storage time as frame_length_lines - 4. (Ref: Datasheet section 5-7-1) Also fix one indentation issue for consistency. Signed-off-by: Tarang Raval Reviewed-by: Dave Stevenson Reviewed-by: Kieran Bingham Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/imx219.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c index 40693635c0c3..bc55fe2a93b4 100644 --- a/drivers/media/i2c/imx219.c +++ b/drivers/media/i2c/imx219.c @@ -68,6 +68,7 @@ #define IMX219_EXPOSURE_STEP 1 #define IMX219_EXPOSURE_DEFAULT 0x640 #define IMX219_EXPOSURE_MAX 65535 +#define IMX219_EXPOSURE_OFFSET 4 /* V_TIMING internal */ #define IMX219_REG_FRM_LENGTH_A CCI_REG16(0x0160) @@ -450,9 +451,9 @@ static int imx219_set_ctrl(struct v4l2_ctrl *ctrl) int exposure_max, exposure_def; /* Update max exposure while meeting expected vblanking */ - exposure_max = format->height + ctrl->val - 4; + exposure_max = format->height + ctrl->val - IMX219_EXPOSURE_OFFSET; exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? - exposure_max : IMX219_EXPOSURE_DEFAULT; + exposure_max : IMX219_EXPOSURE_DEFAULT; ret = __v4l2_ctrl_modify_range(imx219->exposure, imx219->exposure->minimum, exposure_max, @@ -579,9 +580,9 @@ static int imx219_init_controls(struct imx219 *imx219) IMX219_LLP_MIN - mode->width, IMX219_LLP_MAX - mode->width, 1, IMX219_LLP_MIN - mode->width); - exposure_max = mode->fll_def - 4; + exposure_max = mode->fll_def - IMX219_EXPOSURE_OFFSET; exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? - exposure_max : IMX219_EXPOSURE_DEFAULT; + exposure_max : IMX219_EXPOSURE_DEFAULT; imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_EXPOSURE, IMX219_EXPOSURE_MIN, exposure_max, @@ -900,9 +901,9 @@ static int imx219_set_pad_format(struct v4l2_subdev *sd, return ret; /* Update max exposure while meeting expected vblanking */ - exposure_max = mode->fll_def - 4; + exposure_max = mode->fll_def - IMX219_EXPOSURE_OFFSET; exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? - exposure_max : IMX219_EXPOSURE_DEFAULT; + exposure_max : IMX219_EXPOSURE_DEFAULT; ret = __v4l2_ctrl_modify_range(imx219->exposure, imx219->exposure->minimum, exposure_max, From 6bd4f9f1cc52948deff52c879d0843e5e873f8d4 Mon Sep 17 00:00:00 2001 From: Lukas Bulwahn Date: Thu, 30 Oct 2025 14:46:37 +0100 Subject: [PATCH 208/249] MAINTAINERS: adjust file entry in TDA1997x MEDIA DRIVER Commit c423487bf667 ("dt-bindings: media: convert nxp,tda1997x.txt to yaml format") renames nxp,tda1997x.txt to nxp,tda19971.yaml as part of this dt-binding conversion, but misses to adjust the file entry in TDA1997x MEDIA DRIVER. Adjust the file entry after the conversion. Signed-off-by: Lukas Bulwahn Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 41c7d9bc22c9..42b20f33f3bb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -25119,7 +25119,7 @@ L: linux-media@vger.kernel.org S: Maintained W: https://linuxtv.org Q: http://patchwork.linuxtv.org/project/linux-media/list/ -F: Documentation/devicetree/bindings/media/i2c/nxp,tda1997x.txt +F: Documentation/devicetree/bindings/media/i2c/nxp,tda19971.yaml F: drivers/media/i2c/tda1997x.* TDA827x MEDIA DRIVER From e4605fe4a61302911e456379fbe265d97ea90e9f Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Mon, 3 Nov 2025 16:56:28 +0200 Subject: [PATCH 209/249] dt-bindings: media: i2c: document Sony IMX111 CMOS sensor Add bindings for Sony IMX111 CMOS Digital Image Sensor found in LG Optimus 4X (P880) and Optimus Vu (P895) smartphones. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Conor Dooley Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/i2c/sony,imx111.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/sony,imx111.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx111.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx111.yaml new file mode 100644 index 000000000000..20f48d5e9b2d --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/sony,imx111.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/sony,imx111.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sony IMX111 8MP CMOS Digital Image Sensor + +maintainers: + - Svyatoslav Ryhel + +description: + IMX111 sensor is a Sony CMOS active pixel digital image sensor with an active + array size of 2464H x 3280V. It is programmable through I2C interface. Image + data is sent through MIPI CSI-2, through 1 or 2 lanes. + +allOf: + - $ref: /schemas/media/video-interface-devices.yaml# + - $ref: /schemas/nvmem/nvmem-consumer.yaml# + +properties: + compatible: + const: sony,imx111 + + reg: + maxItems: 1 + + clocks: + description: EXTCLK with possible frequency from 6 to 54 MHz + maxItems: 1 + + reset-gpios: + maxItems: 1 + + iovdd-supply: + description: Digital IO power supply (1.8V) + + dvdd-supply: + description: Digital power supply (1.2V) + + avdd-supply: + description: Analog power supply (2.7V) + + port: + additionalProperties: false + $ref: /schemas/graph.yaml#/$defs/port-base + + properties: + endpoint: + $ref: /schemas/media/video-interfaces.yaml# + unevaluatedProperties: false + + required: + - data-lanes + - link-frequencies + + required: + - endpoint + +required: + - compatible + - reg + - clocks + - port + +unevaluatedProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera@10 { + compatible = "sony,imx111"; + reg = <0x10>; + + clocks = <&imx111_clk>; + + iovdd-supply = <&camera_vddio_1v8>; + dvdd-supply = <&camera_vddd_1v2>; + avdd-supply = <&camera_vdda_2v7>; + + orientation = <1>; + rotation = <90>; + + nvmem = <&eeprom>; + flash-leds = <&led>; + lens-focus = <&vcm>; + + reset-gpios = <&gpio 84 GPIO_ACTIVE_LOW>; + + port { + imx111_output: endpoint { + data-lanes = <1 2>; + link-frequencies = /bits/ 64 <542400000>; + remote-endpoint = <&csi_input>; + }; + }; + }; + }; +... From d363bdfa0ec6b19a4f40b572cec70430d5b13ad6 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Mon, 3 Nov 2025 16:56:29 +0200 Subject: [PATCH 210/249] media: i2c: add Sony IMX111 CMOS camera sensor driver Add a v4l2 sub-device driver for the Sony IMX111 image sensor. This is a camera sensor using the i2c bus for control and the csi-2 bus for data. The following features are supported: - manual exposure, digital and analog gain control support - pixel rate/link freq control support - supported resolution up to 3280x2464 for single shot capture - supported resolution up to 1920x1080 @ 30fps for video - supported bayer order output SGBRG10 and SGBRG8 Camera module seems to be partially compatible with Nokia SMIA but it lacks a few registers required for clock calculations and has different vendor-specific per-mode configurations which makes it incompatible with existing CCS driver. Signed-off-by: Svyatoslav Ryhel [Sakari Ailus: Fix set_fmt() callback a bit and idle after autosuspend.] Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/i2c/Kconfig | 10 + drivers/media/i2c/Makefile | 1 + drivers/media/i2c/imx111.c | 1610 ++++++++++++++++++++++++++++++++++++ 3 files changed, 1621 insertions(+) create mode 100644 drivers/media/i2c/imx111.c diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index 4c1eb4279dc3..4b4db8c4f496 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig @@ -137,6 +137,16 @@ config VIDEO_HI847 To compile this driver as a module, choose M here: the module will be called hi847. +config VIDEO_IMX111 + tristate "Sony IMX111 sensor support" + select V4L2_CCI_I2C + help + This is a V4L2 sensor driver for the Sony IMX111 camera + sensors. + + To compile this driver as a module, choose M here: the + module will be called imx111. + config VIDEO_IMX208 tristate "Sony IMX208 sensor support" help diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 57cdd8dc96f6..c5f17602454f 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile @@ -46,6 +46,7 @@ obj-$(CONFIG_VIDEO_HI556) += hi556.o obj-$(CONFIG_VIDEO_HI846) += hi846.o obj-$(CONFIG_VIDEO_HI847) += hi847.o obj-$(CONFIG_VIDEO_I2C) += video-i2c.o +obj-$(CONFIG_VIDEO_IMX111) += imx111.o obj-$(CONFIG_VIDEO_IMX208) += imx208.o obj-$(CONFIG_VIDEO_IMX214) += imx214.o obj-$(CONFIG_VIDEO_IMX219) += imx219.o diff --git a/drivers/media/i2c/imx111.c b/drivers/media/i2c/imx111.c new file mode 100644 index 000000000000..8eb919788ef7 --- /dev/null +++ b/drivers/media/i2c/imx111.c @@ -0,0 +1,1610 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/* product information registers */ +#define IMX111_PRODUCT_ID CCI_REG16(0x0000) +#define IMX111_CHIP_ID 0x111 +#define IMX111_REVISION CCI_REG8(0x0002) +#define IMX111_MANUFACTURER_ID CCI_REG8(0x0003) +#define IMX111_FRAME_COUNTER CCI_REG8(0x0005) +#define IMX111_PIXEL_ORDER CCI_REG8(0x0006) + +/* general configuration registers */ +#define IMX111_STREAMING_MODE CCI_REG8(0x0100) +#define IMX111_MODE_STANDBY 0 +#define IMX111_MODE_STREAMING 1 +#define IMX111_IMAGE_ORIENTATION CCI_REG8(0x0101) +#define IMX111_IMAGE_HFLIP BIT(0) +#define IMX111_IMAGE_VFLIP BIT(1) +#define IMX111_SOFTWARE_RESET CCI_REG8(0x0103) +#define IMX111_RESET_ON 1 +#define IMX111_GROUP_WRITE CCI_REG8(0x0104) +#define IMX111_GROUP_WRITE_ON 1 +#define IMX111_FRAME_DROP CCI_REG8(0x0105) +#define IMX111_FRAME_DROP_ON 1 +#define IMX111_CHANNEL_ID CCI_REG8(0x0110) +#define IMX111_SIGNALLING_MODE CCI_REG8(0x0111) +#define IMX111_DATA_DEPTH CCI_REG16(0x0112) +#define IMX111_DATA_DEPTH_RAW8 0x08 +#define IMX111_DATA_DEPTH_RAW10 0x0a + +/* integration time registers */ +#define IMX111_INTEGRATION_TIME CCI_REG16(0x0202) +#define IMX111_INTEGRATION_TIME_MIN 0x1 +#define IMX111_INTEGRATION_TIME_MAX 0xffff +#define IMX111_INTEGRATION_TIME_STEP 1 +#define IMX111_INTEGRATION_TIME_OFFSET 5 + +/* analog gain control */ +#define IMX111_REG_ANALOG_GAIN CCI_REG8(0x0205) +#define IMX111_ANA_GAIN_MIN 0 +#define IMX111_ANA_GAIN_MAX 240 +#define IMX111_ANA_GAIN_STEP 1 +#define IMX111_ANA_GAIN_DEFAULT 0 + +/* digital gain control */ +#define IMX111_REG_DIG_GAIN_GREENR CCI_REG16(0x020e) +#define IMX111_REG_DIG_GAIN_RED CCI_REG16(0x0210) +#define IMX111_REG_DIG_GAIN_BLUE CCI_REG16(0x0212) +#define IMX111_REG_DIG_GAIN_GREENB CCI_REG16(0x0214) +#define IMX111_DGTL_GAIN_MIN 0x0100 +#define IMX111_DGTL_GAIN_MAX 0x0fff +#define IMX111_DGTL_GAIN_DEFAULT 0x0100 +#define IMX111_DGTL_GAIN_STEP 1 + +/* clock configuration registers */ +#define IMX111_PIXEL_CLK_DIVIDER_PLL1 CCI_REG8(0x0301) +#define IMX111_SYSTEM_CLK_DIVIDER_PLL1 CCI_REG8(0x0303) +#define IMX111_PRE_PLL_CLK_DIVIDER_PLL1 CCI_REG8(0x0305) +#define IMX111_PLL_MULTIPLIER_PLL1 CCI_REG8(0x0307) +#define IMX111_PLL_SETTLING_TIME CCI_REG8(0x303c) +#define IMX111_PLL_SETTLING_TIME_DEFAULT 200 +#define IMX111_POST_DIVIDER CCI_REG8(0x30a4) +#define IMX111_POST_DIVIDER_DIV1 2 +#define IMX111_POST_DIVIDER_DIV2 0 +#define IMX111_POST_DIVIDER_DIV4 1 + +/* frame timing registers */ +#define IMX111_VERTICAL_TOTAL_LENGTH CCI_REG16(0x0340) +#define IMX111_VTL_MAX 0x09d8 +#define IMX111_VBLANK_MIN 16 +#define IMX111_HORIZONTAL_TOTAL_LENGTH CCI_REG16(0x0342) +#define IMX111_HTL_MAX 0x0dd0 +#define IMX111_HBLANK_MIN 16 + +/* image size registers */ +#define IMX111_HORIZONTAL_START CCI_REG16(0x0344) +#define IMX111_VERTICAL_START CCI_REG16(0x0346) +#define IMX111_HORIZONTAL_END CCI_REG16(0x0348) +#define IMX111_VERTICAL_END CCI_REG16(0x034a) +#define IMX111_IMAGE_WIDTH CCI_REG16(0x034c) +#define IMX111_IMAGE_HEIGHT CCI_REG16(0x034e) +#define IMX111_H_EVEN_INC CCI_REG8(0x0381) +#define IMX111_H_ODD_INC CCI_REG8(0x0383) +#define IMX111_W_EVEN_INC CCI_REG8(0x0385) +#define IMX111_W_ODD_INC CCI_REG8(0x0387) + +/* test pattern registers */ +#define IMX111_TEST_PATTERN CCI_REG8(0x0601) +#define IMX111_TEST_PATTERN_NONE 0 +#define IMX111_TEST_PATTERN_SOLID 1 +#define IMX111_TEST_PATTERN_BARS 2 +#define IMX111_TEST_PATTERN_FADE 3 +#define IMX111_TEST_PATTERN_PN9 4 +#define IMX111_SOLID_COLOR_RED CCI_REG16(0x0602) +#define IMX111_SOLID_COLOR_GR CCI_REG16(0x0604) +#define IMX111_SOLID_COLOR_BLUE CCI_REG16(0x0606) +#define IMX111_SOLID_COLOR_GB CCI_REG16(0x0608) +#define IMX111_TESTP_COLOUR_MIN 0 +#define IMX111_TESTP_COLOUR_MAX 0x03ff +#define IMX111_TESTP_COLOUR_STEP 1 + +#define IMX111_FRAME_RATE_STEP 5 + +#define IMX111_PIXEL_ARRAY_WIDTH 3280U +#define IMX111_PIXEL_ARRAY_HEIGHT 2464U + +enum { + IMX111_MODE_3280x2464, + IMX111_MODE_3280x1848, + IMX111_MODE_3280x1098, + IMX111_MODE_2100x1200, + IMX111_MODE_1952x1098, + IMX111_MODE_1920x1080, + IMX111_MODE_1640x1232, + IMX111_MODE_1440x1080, + IMX111_MODE_1640x924, + IMX111_MODE_1308x736, + IMX111_MODE_1280x720, + IMX111_MODE_820x614, + IMX111_MODE_640x480, +}; + +static const struct regulator_bulk_data imx111_supplies[] = { + { .supply = "iovdd" }, + { .supply = "dvdd" }, + { .supply = "avdd" }, +}; + +struct imx111_mode { + u32 width; + u32 height; + + /* Default vertical and horizontal total length */ + u32 vtl_def; + u32 htl_def; + + struct { + const struct cci_reg_sequence *regs; + u32 num_of_regs; + } reg_list; +}; + +struct imx111_pll { + u64 extclk_rate; + u8 pre_div; + u8 mult; +}; + +struct imx111 { + struct regmap *regmap; + + struct clk *extclk; + struct gpio_desc *reset; + struct regulator_bulk_data *supplies; + + struct v4l2_fwnode_endpoint bus_cfg; + struct v4l2_subdev sd; + struct media_pad pad; + + /* V4L2 Controls */ + struct v4l2_ctrl_handler hdl; + struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *link_freq; + struct v4l2_ctrl *exposure; + struct v4l2_ctrl *vblank; + struct v4l2_ctrl *hblank; + struct v4l2_ctrl *hflip; + struct v4l2_ctrl *vflip; + + /* Current mode */ + const struct imx111_mode *cur_mode; + const struct imx111_pll *pll; + u32 data_depth; + + u64 pixel_clk_raw; + s64 default_link_freq; +}; + +static const struct imx111_pll imx111_pll[] = { + { .extclk_rate = 6000000, .pre_div = 1, .mult = 113, }, + { .extclk_rate = 12000000, .pre_div = 2, .mult = 113, }, + { .extclk_rate = 13500000, .pre_div = 1, .mult = 50, }, + { .extclk_rate = 18000000, .pre_div = 2, .mult = 75, }, + { .extclk_rate = 24000000, .pre_div = 4, .mult = 113, }, + { .extclk_rate = 27000000, .pre_div = 2, .mult = 50, }, + { .extclk_rate = 36000000, .pre_div = 4, .mult = 75, }, + { .extclk_rate = 54000000, .pre_div = 4, .mult = 50, }, +}; + +/* + * This table MUST contain 4 entries per format, to cover the various flip + * combinations in the order + * - no flip + * - h flip + * - v flip + * - h&v flips + */ +static const u32 imx111_mbus_formats[] = { + MEDIA_BUS_FMT_SGBRG10_1X10, + MEDIA_BUS_FMT_SBGGR10_1X10, + MEDIA_BUS_FMT_SRGGB10_1X10, + MEDIA_BUS_FMT_SGRBG10_1X10, + + MEDIA_BUS_FMT_SGBRG8_1X8, + MEDIA_BUS_FMT_SBGGR8_1X8, + MEDIA_BUS_FMT_SRGGB8_1X8, + MEDIA_BUS_FMT_SGRBG8_1X8, +}; + +static const struct cci_reg_sequence imx111_global_init[] = { + { CCI_REG8(0x3080), 0x50 }, + { CCI_REG8(0x3087), 0x53 }, + { CCI_REG8(0x309d), 0x94 }, + { CCI_REG8(0x30b1), 0x03 }, + { CCI_REG8(0x30c6), 0x00 }, + { CCI_REG8(0x30c7), 0x00 }, + { CCI_REG8(0x3115), 0x0b }, + { CCI_REG8(0x3118), 0x30 }, + { CCI_REG8(0x311d), 0x25 }, + { CCI_REG8(0x3121), 0x0a }, + { CCI_REG8(0x3212), 0xf2 }, + { CCI_REG8(0x3213), 0x0f }, + { CCI_REG8(0x3215), 0x0f }, + { CCI_REG8(0x3217), 0x0b }, + { CCI_REG8(0x3219), 0x0b }, + { CCI_REG8(0x321b), 0x0d }, + { CCI_REG8(0x321d), 0x0d }, + { CCI_REG8(0x32aa), 0x11 }, + { CCI_REG8(0x3032), 0x40 }, +}; + +static const struct cci_reg_sequence mode_820x614[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x0034 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x09cb }, + { IMX111_IMAGE_WIDTH, 0x0334 }, { IMX111_IMAGE_HEIGHT, 0x0266 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x05 }, { IMX111_H_ODD_INC, 0x03 }, + { IMX111_W_EVEN_INC, 0x05 }, { IMX111_W_ODD_INC, 0x03 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x01 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x28 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x09 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x03 }, { CCI_REG8(0x30d5), 0x09 }, + { CCI_REG8(0x30d6), 0x00 }, { CCI_REG8(0x30d7), 0x00 }, + { CCI_REG8(0x30d8), 0x00 }, { CCI_REG8(0x30d9), 0x00 }, + { CCI_REG8(0x30de), 0x04 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x08 }, { CCI_REG8(0x3103), 0x22 }, + { CCI_REG8(0x3104), 0x20 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x87 }, { CCI_REG8(0x3107), 0x00 }, + { CCI_REG8(0x3108), 0x03 }, { CCI_REG8(0x3109), 0x02 }, + { CCI_REG8(0x310a), 0x03 }, { CCI_REG8(0x315c), 0x9c }, + { CCI_REG8(0x315d), 0x9b }, { CCI_REG8(0x316e), 0x9d }, + { CCI_REG8(0x316f), 0x9c }, { CCI_REG8(0x3318), 0x7a }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_1308x736[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0154 }, { IMX111_VERTICAL_START, 0x0220 }, + { IMX111_HORIZONTAL_END, 0x0b8b }, { IMX111_VERTICAL_END, 0x07df }, + { IMX111_IMAGE_WIDTH, 0x051c }, { IMX111_IMAGE_HEIGHT, 0x02e0 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x03 }, + { CCI_REG8(0x3033), 0x84 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x01 }, + { CCI_REG8(0x304c), 0xd7 }, { CCI_REG8(0x304d), 0x01 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x48 }, { CCI_REG8(0x309c), 0x12 }, + { CCI_REG8(0x309e), 0x04 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x0a }, { CCI_REG8(0x30aa), 0x01 }, + { CCI_REG8(0x30b2), 0x05 }, { CCI_REG8(0x30d5), 0x04 }, + { CCI_REG8(0x30d6), 0x85 }, { CCI_REG8(0x30d7), 0x2a }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x00 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x08 }, { CCI_REG8(0x3103), 0x22 }, + { CCI_REG8(0x3104), 0x20 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x87 }, { CCI_REG8(0x3107), 0x00 }, + { CCI_REG8(0x3108), 0x03 }, { CCI_REG8(0x3109), 0x02 }, + { CCI_REG8(0x310a), 0x03 }, { CCI_REG8(0x315c), 0x42 }, + { CCI_REG8(0x315d), 0x41 }, { CCI_REG8(0x316e), 0x43 }, + { CCI_REG8(0x316f), 0x42 }, { CCI_REG8(0x3318), 0x62 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_1640x924[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x0164 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x089b }, + { IMX111_IMAGE_WIDTH, 0x0668 }, { IMX111_IMAGE_HEIGHT, 0x039c }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x03 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x03 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x01 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x28 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x09 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x05 }, { CCI_REG8(0x30d5), 0x09 }, + { CCI_REG8(0x30d6), 0x01 }, { CCI_REG8(0x30d7), 0x01 }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x02 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x08 }, { CCI_REG8(0x3103), 0x22 }, + { CCI_REG8(0x3104), 0x20 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x87 }, { CCI_REG8(0x3107), 0x00 }, + { CCI_REG8(0x3108), 0x03 }, { CCI_REG8(0x3109), 0x02 }, + { CCI_REG8(0x310a), 0x03 }, { CCI_REG8(0x315c), 0x9c }, + { CCI_REG8(0x315d), 0x9b }, { CCI_REG8(0x316e), 0x9d }, + { CCI_REG8(0x316f), 0x9c }, { CCI_REG8(0x3318), 0x72 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_1640x1232[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x0030 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x09cf }, + { IMX111_IMAGE_WIDTH, 0x0668 }, { IMX111_IMAGE_HEIGHT, 0x04d0 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x03 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x03 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x01 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x28 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x09 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x05 }, { CCI_REG8(0x30d5), 0x09 }, + { CCI_REG8(0x30d6), 0x01 }, { CCI_REG8(0x30d7), 0x01 }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x02 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x08 }, { CCI_REG8(0x3103), 0x22 }, + { CCI_REG8(0x3104), 0x20 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x87 }, { CCI_REG8(0x3107), 0x00 }, + { CCI_REG8(0x3108), 0x03 }, { CCI_REG8(0x3109), 0x02 }, + { CCI_REG8(0x310a), 0x03 }, { CCI_REG8(0x315c), 0x9c }, + { CCI_REG8(0x315d), 0x9b }, { CCI_REG8(0x316e), 0x9d }, + { CCI_REG8(0x316f), 0x9c }, { CCI_REG8(0x3318), 0x72 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_1952x1098[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0016 }, { IMX111_VERTICAL_START, 0x016e }, + { IMX111_HORIZONTAL_END, 0x0ccb }, { IMX111_VERTICAL_END, 0x0893 }, + { IMX111_IMAGE_WIDTH, 0x07a0 }, { IMX111_IMAGE_HEIGHT, 0x044a }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x01 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x00 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x91 }, { CCI_REG8(0x3048), 0x00 }, + { CCI_REG8(0x304c), 0x67 }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x10 }, { CCI_REG8(0x3073), 0xa0 }, + { CCI_REG8(0x3074), 0x12 }, { CCI_REG8(0x3075), 0x12 }, + { CCI_REG8(0x3076), 0x12 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x0a }, { CCI_REG8(0x307a), 0x0a }, + { CCI_REG8(0x309b), 0x60 }, { CCI_REG8(0x309e), 0x04 }, + { CCI_REG8(0x30a0), 0x15 }, { CCI_REG8(0x30a1), 0x08 }, + { CCI_REG8(0x30aa), 0x03 }, { CCI_REG8(0x30b2), 0x05 }, + { CCI_REG8(0x30d5), 0x20 }, { CCI_REG8(0x30d6), 0x85 }, + { CCI_REG8(0x30d7), 0x2a }, { CCI_REG8(0x30d8), 0x64 }, + { CCI_REG8(0x30d9), 0x89 }, { CCI_REG8(0x30de), 0x00 }, + { CCI_REG8(0x30df), 0x21 }, { CCI_REG8(0x3102), 0x08 }, + { CCI_REG8(0x3103), 0x1d }, { CCI_REG8(0x3104), 0x1e }, + { CCI_REG8(0x3105), 0x00 }, { CCI_REG8(0x3106), 0x74 }, + { CCI_REG8(0x3107), 0x00 }, { CCI_REG8(0x3108), 0x03 }, + { CCI_REG8(0x3109), 0x02 }, { CCI_REG8(0x310a), 0x03 }, + { CCI_REG8(0x315c), 0x37 }, { CCI_REG8(0x315d), 0x36 }, + { CCI_REG8(0x316e), 0x38 }, { CCI_REG8(0x316f), 0x37 }, + { CCI_REG8(0x3318), 0x63 }, { CCI_REG8(0x3348), 0xA0 }, +}; + +static const struct cci_reg_sequence mode_2100x1200[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0256 }, { IMX111_VERTICAL_START, 0x02a8 }, + { IMX111_HORIZONTAL_END, 0x0a89 }, { IMX111_VERTICAL_END, 0x0757 }, + { IMX111_IMAGE_WIDTH, 0x0834 }, { IMX111_IMAGE_HEIGHT, 0x04b0 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x01 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x00 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x20 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x08 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x07 }, { CCI_REG8(0x30d5), 0x00 }, + { CCI_REG8(0x30d6), 0x85 }, { CCI_REG8(0x30d7), 0x2a }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x00 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x08 }, { CCI_REG8(0x3103), 0x22 }, + { CCI_REG8(0x3104), 0x20 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x87 }, { CCI_REG8(0x3107), 0x00 }, + { CCI_REG8(0x3108), 0x03 }, { CCI_REG8(0x3109), 0x02 }, + { CCI_REG8(0x310a), 0x03 }, { CCI_REG8(0x315c), 0x9c }, + { CCI_REG8(0x315d), 0x9b }, { CCI_REG8(0x316e), 0x9d }, + { CCI_REG8(0x316f), 0x9c }, { CCI_REG8(0x3318), 0x62 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_3280x1098[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x01f6 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x080b }, + { IMX111_IMAGE_WIDTH, 0x0cd0 }, { IMX111_IMAGE_HEIGHT, 0x044a }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x01 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x10 }, + { CCI_REG8(0x303e), 0x40 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x93 }, { CCI_REG8(0x3048), 0x00 }, + { CCI_REG8(0x304c), 0x67 }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0xe0 }, + { CCI_REG8(0x3074), 0x12 }, { CCI_REG8(0x3075), 0x12 }, + { CCI_REG8(0x3076), 0x12 }, { CCI_REG8(0x3077), 0x12 }, + { CCI_REG8(0x3079), 0x2a }, { CCI_REG8(0x307a), 0x0a }, + { CCI_REG8(0x309b), 0x60 }, { CCI_REG8(0x309e), 0x04 }, + { CCI_REG8(0x30a0), 0x15 }, { CCI_REG8(0x30a1), 0x08 }, + { CCI_REG8(0x30aa), 0x03 }, { CCI_REG8(0x30b2), 0x05 }, + { CCI_REG8(0x30d5), 0x00 }, { CCI_REG8(0x30d6), 0x85 }, + { CCI_REG8(0x30d7), 0x2a }, { CCI_REG8(0x30d8), 0x64 }, + { CCI_REG8(0x30d9), 0x89 }, { CCI_REG8(0x30de), 0x00 }, + { CCI_REG8(0x30df), 0x20 }, { CCI_REG8(0x3102), 0x08 }, + { CCI_REG8(0x3103), 0x1d }, { CCI_REG8(0x3104), 0x1e }, + { CCI_REG8(0x3105), 0x00 }, { CCI_REG8(0x3106), 0x74 }, + { CCI_REG8(0x3107), 0x00 }, { CCI_REG8(0x3108), 0x03 }, + { CCI_REG8(0x3109), 0x02 }, { CCI_REG8(0x310a), 0x03 }, + { CCI_REG8(0x315c), 0x37 }, { CCI_REG8(0x315d), 0x36 }, + { CCI_REG8(0x316e), 0x38 }, { CCI_REG8(0x316f), 0x37 }, + { CCI_REG8(0x3318), 0x63 }, { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_3280x1848[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x0164 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x089b }, + { IMX111_IMAGE_WIDTH, 0x0cd0 }, { IMX111_IMAGE_HEIGHT, 0x0738 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x01 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x00 }, + { CCI_REG8(0x303e), 0x41 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x00 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x20 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x08 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x07 }, { CCI_REG8(0x30d5), 0x00 }, + { CCI_REG8(0x30d6), 0x85 }, { CCI_REG8(0x30d7), 0x2a }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x00 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x10 }, { CCI_REG8(0x3103), 0x44 }, + { CCI_REG8(0x3104), 0x40 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x0d }, { CCI_REG8(0x3107), 0x01 }, + { CCI_REG8(0x3108), 0x09 }, { CCI_REG8(0x3109), 0x08 }, + { CCI_REG8(0x310a), 0x0f }, { CCI_REG8(0x315c), 0x5d }, + { CCI_REG8(0x315d), 0x5c }, { CCI_REG8(0x316e), 0x5e }, + { CCI_REG8(0x316f), 0x5d }, { CCI_REG8(0x3318), 0x60 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct cci_reg_sequence mode_3280x2464[] = { + { IMX111_GROUP_WRITE, 1 }, + { IMX111_HORIZONTAL_START, 0x0008 }, { IMX111_VERTICAL_START, 0x0030 }, + { IMX111_HORIZONTAL_END, 0x0cd7 }, { IMX111_VERTICAL_END, 0x09cf }, + { IMX111_IMAGE_WIDTH, 0x0cd0 }, { IMX111_IMAGE_HEIGHT, 0x09a0 }, + { IMX111_GROUP_WRITE, 0 }, + { IMX111_H_EVEN_INC, 0x01 }, { IMX111_H_ODD_INC, 0x01 }, + { IMX111_W_EVEN_INC, 0x01 }, { IMX111_W_ODD_INC, 0x01 }, + { CCI_REG8(0x3033), 0x00 }, { CCI_REG8(0x303d), 0x00 }, + { CCI_REG8(0x303e), 0x41 }, { CCI_REG8(0x3040), 0x08 }, + { CCI_REG8(0x3041), 0x97 }, { CCI_REG8(0x3048), 0x00 }, + { CCI_REG8(0x304c), 0x6f }, { CCI_REG8(0x304d), 0x03 }, + { CCI_REG8(0x3064), 0x12 }, { CCI_REG8(0x3073), 0x00 }, + { CCI_REG8(0x3074), 0x11 }, { CCI_REG8(0x3075), 0x11 }, + { CCI_REG8(0x3076), 0x11 }, { CCI_REG8(0x3077), 0x11 }, + { CCI_REG8(0x3079), 0x00 }, { CCI_REG8(0x307a), 0x00 }, + { CCI_REG8(0x309b), 0x20 }, { CCI_REG8(0x309c), 0x13 }, + { CCI_REG8(0x309e), 0x00 }, { CCI_REG8(0x30a0), 0x14 }, + { CCI_REG8(0x30a1), 0x08 }, { CCI_REG8(0x30aa), 0x03 }, + { CCI_REG8(0x30b2), 0x07 }, { CCI_REG8(0x30d5), 0x00 }, + { CCI_REG8(0x30d6), 0x85 }, { CCI_REG8(0x30d7), 0x2a }, + { CCI_REG8(0x30d8), 0x64 }, { CCI_REG8(0x30d9), 0x89 }, + { CCI_REG8(0x30de), 0x00 }, { CCI_REG8(0x30df), 0x20 }, + { CCI_REG8(0x3102), 0x10 }, { CCI_REG8(0x3103), 0x44 }, + { CCI_REG8(0x3104), 0x40 }, { CCI_REG8(0x3105), 0x00 }, + { CCI_REG8(0x3106), 0x0d }, { CCI_REG8(0x3107), 0x01 }, + { CCI_REG8(0x3108), 0x09 }, { CCI_REG8(0x3109), 0x08 }, + { CCI_REG8(0x310a), 0x0f }, { CCI_REG8(0x315c), 0x5d }, + { CCI_REG8(0x315d), 0x5c }, { CCI_REG8(0x316e), 0x5e }, + { CCI_REG8(0x316f), 0x5d }, { CCI_REG8(0x3318), 0x60 }, + { CCI_REG8(0x3348), 0xe0 }, +}; + +static const struct imx111_mode imx111_modes[] = { + [IMX111_MODE_3280x2464] = { + .width = 3280, + .height = 2464, + .vtl_def = 2490, + .htl_def = 3536, + .reg_list = { + .regs = mode_3280x2464, + .num_of_regs = ARRAY_SIZE(mode_3280x2464), + }, + }, + [IMX111_MODE_3280x1848] = { + .width = 3280, + .height = 1848, + .vtl_def = 1874, + .htl_def = 3536, + .reg_list = { + .regs = mode_3280x1848, + .num_of_regs = ARRAY_SIZE(mode_3280x1848), + }, + }, + [IMX111_MODE_3280x1098] = { + .width = 3280, + .height = 1098, + .vtl_def = 1130, + .htl_def = 3500, + .reg_list = { + .regs = mode_3280x1098, + .num_of_regs = ARRAY_SIZE(mode_3280x1098), + }, + }, + [IMX111_MODE_2100x1200] = { + .width = 2100, + .height = 1200, + .vtl_def = 1260, + .htl_def = 3536, + .reg_list = { + .regs = mode_2100x1200, + .num_of_regs = ARRAY_SIZE(mode_2100x1200), + }, + }, + [IMX111_MODE_1952x1098] = { + .width = 1952, + .height = 1098, + .vtl_def = 1884, + .htl_def = 3500, + .reg_list = { + .regs = mode_1952x1098, + .num_of_regs = ARRAY_SIZE(mode_1952x1098), + }, + }, + [IMX111_MODE_1920x1080] = { + .width = 1920, + .height = 1080, + .vtl_def = 1884, + .htl_def = 3500, + .reg_list = { + .regs = mode_1952x1098, + .num_of_regs = ARRAY_SIZE(mode_1952x1098), + }, + }, + [IMX111_MODE_1640x1232] = { + .width = 1640, + .height = 1232, + .vtl_def = 1254, + .htl_def = 3536, + .reg_list = { + .regs = mode_1640x1232, + .num_of_regs = ARRAY_SIZE(mode_1640x1232), + }, + }, + [IMX111_MODE_1440x1080] = { + .width = 1440, + .height = 1080, + .vtl_def = 1254, + .htl_def = 3536, + .reg_list = { + .regs = mode_1640x1232, + .num_of_regs = ARRAY_SIZE(mode_1640x1232), + }, + }, + [IMX111_MODE_1640x924] = { + .width = 1640, + .height = 924, + .vtl_def = 946, + .htl_def = 3536, + .reg_list = { + .regs = mode_1640x924, + .num_of_regs = ARRAY_SIZE(mode_1640x924), + }, + }, + [IMX111_MODE_1308x736] = { + .width = 1308, + .height = 736, + .vtl_def = 2369, + .htl_def = 1896, + .reg_list = { + .regs = mode_1308x736, + .num_of_regs = ARRAY_SIZE(mode_1308x736), + }, + }, + [IMX111_MODE_1280x720] = { + .width = 1280, + .height = 720, + .vtl_def = 2369, + .htl_def = 1896, + .reg_list = { + .regs = mode_1308x736, + .num_of_regs = ARRAY_SIZE(mode_1308x736), + }, + }, + [IMX111_MODE_820x614] = { + .width = 820, + .height = 614, + .vtl_def = 1260, + .htl_def = 3536, + .reg_list = { + .regs = mode_820x614, + .num_of_regs = ARRAY_SIZE(mode_820x614), + }, + }, + [IMX111_MODE_640x480] = { + .width = 640, + .height = 480, + .vtl_def = 1260, + .htl_def = 3536, + .reg_list = { + .regs = mode_820x614, + .num_of_regs = ARRAY_SIZE(mode_820x614), + }, + }, +}; + +static inline struct imx111 *sd_to_imx111(struct v4l2_subdev *sd) +{ + return container_of_const(sd, struct imx111, sd); +} + +static inline struct imx111 *ctrl_to_imx111(struct v4l2_ctrl *ctrl) +{ + return container_of_const(ctrl->handler, struct imx111, hdl); +} + +static u8 to_settle_delay(u64 extclk_rate) +{ + u64 extclk_mhz = div_u64(extclk_rate, MEGA); + + return DIV_ROUND_UP(IMX111_PLL_SETTLING_TIME_DEFAULT * extclk_mhz - 63, + 64); +} + +static u32 imx111_get_format_code(struct imx111 *sensor, u32 code, bool test) +{ + u32 i; + + for (i = 0; i < ARRAY_SIZE(imx111_mbus_formats); i++) + if (imx111_mbus_formats[i] == code) + break; + + if (i >= ARRAY_SIZE(imx111_mbus_formats)) + i = 0; + + if (test) + return imx111_mbus_formats[i]; + + i = (i & ~3) | (sensor->vflip->val ? 2 : 0) | + (sensor->hflip->val ? 1 : 0); + + return imx111_mbus_formats[i]; +} + +static u32 imx111_get_format_bpp(const struct v4l2_mbus_framefmt *format) +{ + switch (format->code) { + case MEDIA_BUS_FMT_SRGGB8_1X8: + case MEDIA_BUS_FMT_SGRBG8_1X8: + case MEDIA_BUS_FMT_SGBRG8_1X8: + case MEDIA_BUS_FMT_SBGGR8_1X8: + return 8; + + case MEDIA_BUS_FMT_SRGGB10_1X10: + case MEDIA_BUS_FMT_SGRBG10_1X10: + case MEDIA_BUS_FMT_SGBRG10_1X10: + case MEDIA_BUS_FMT_SBGGR10_1X10: + default: + return 10; + } +} + +static int imx111_update_digital_gain(struct imx111 *sensor, u32 val) +{ + int ret = 0; + + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + + cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_GREENR, val, &ret); + cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_RED, val, &ret); + cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_BLUE, val, &ret); + cci_write(sensor->regmap, IMX111_REG_DIG_GAIN_GREENB, val, &ret); + + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + + return ret; +} + +static int imx111_set_ctrl(struct v4l2_ctrl *ctrl) +{ + struct imx111 *sensor = ctrl_to_imx111(ctrl); + struct device *dev = regmap_get_device(sensor->regmap); + int ret = 0; + + if (ctrl->id == V4L2_CID_VBLANK) { + s64 max = sensor->cur_mode->height + ctrl->val - + IMX111_INTEGRATION_TIME_OFFSET; + + ret = __v4l2_ctrl_modify_range(sensor->exposure, + sensor->exposure->minimum, + max, sensor->exposure->step, + max); + if (ret) + return ret; + } + + /* + * Applying V4L2 control value only happens + * when power is up for streaming + */ + if (!pm_runtime_get_if_in_use(dev)) + return 0; + + switch (ctrl->id) { + case V4L2_CID_ANALOGUE_GAIN: + cci_write(sensor->regmap, IMX111_REG_ANALOG_GAIN, ctrl->val, + &ret); + break; + case V4L2_CID_DIGITAL_GAIN: + ret = imx111_update_digital_gain(sensor, ctrl->val); + break; + case V4L2_CID_EXPOSURE: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_INTEGRATION_TIME, ctrl->val, + &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_HBLANK: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_HORIZONTAL_TOTAL_LENGTH, + sensor->cur_mode->width + ctrl->val, &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_VBLANK: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_VERTICAL_TOTAL_LENGTH, + sensor->cur_mode->height + ctrl->val, &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_HFLIP: + case V4L2_CID_VFLIP: + cci_write(sensor->regmap, IMX111_IMAGE_ORIENTATION, + sensor->hflip->val | sensor->vflip->val << 1, &ret); + break; + case V4L2_CID_TEST_PATTERN: + cci_write(sensor->regmap, IMX111_TEST_PATTERN, ctrl->val, + &ret); + break; + case V4L2_CID_TEST_PATTERN_RED: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_SOLID_COLOR_RED, ctrl->val, + &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_TEST_PATTERN_GREENR: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_SOLID_COLOR_GR, ctrl->val, + &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_TEST_PATTERN_BLUE: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_SOLID_COLOR_BLUE, ctrl->val, + &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + case V4L2_CID_TEST_PATTERN_GREENB: + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_SOLID_COLOR_GB, ctrl->val, + &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + break; + default: + ret = -EINVAL; + } + + pm_runtime_put(dev); + + return ret; +} + +static const struct v4l2_ctrl_ops imx111_ctrl_ops = { + .s_ctrl = imx111_set_ctrl, +}; + +static const char * const test_pattern_menu[] = { + "Disabled", + "Solid Color Fill", + "Standard Color Bars", + "Fade To Grey Color Bars", + "Pseudorandom data", +}; + +static int imx111_init_controls(struct imx111 *sensor) +{ + const struct v4l2_ctrl_ops *ops = &imx111_ctrl_ops; + struct device *dev = regmap_get_device(sensor->regmap); + const struct imx111_mode *mode = sensor->cur_mode; + struct v4l2_fwnode_device_properties props; + struct v4l2_ctrl_handler *hdl = &sensor->hdl; + s64 pixel_rate_min, pixel_rate_max; + int i, ret; + + ret = v4l2_fwnode_device_parse(dev, &props); + if (ret < 0) + return ret; + + v4l2_ctrl_handler_init(hdl, 15); + + pixel_rate_min = div_u64(sensor->pixel_clk_raw, + 2 * IMX111_DATA_DEPTH_RAW10); + pixel_rate_max = div_u64(sensor->pixel_clk_raw, + 2 * IMX111_DATA_DEPTH_RAW8); + sensor->pixel_rate = v4l2_ctrl_new_std(hdl, NULL, V4L2_CID_PIXEL_RATE, + pixel_rate_min, pixel_rate_max, + 1, + div_u64(sensor->pixel_clk_raw, + 2 * + sensor->data_depth)); + + sensor->link_freq = v4l2_ctrl_new_int_menu(hdl, NULL, + V4L2_CID_LINK_FREQ, 0, 0, + &sensor->default_link_freq); + if (sensor->link_freq) + sensor->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, + IMX111_ANA_GAIN_MIN, IMX111_ANA_GAIN_MAX, + IMX111_ANA_GAIN_STEP, IMX111_ANA_GAIN_DEFAULT); + + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_DIGITAL_GAIN, + IMX111_DGTL_GAIN_MIN, IMX111_DGTL_GAIN_MAX, + IMX111_DGTL_GAIN_STEP, IMX111_DGTL_GAIN_DEFAULT); + + sensor->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, + 0); + if (sensor->hflip) + sensor->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + + sensor->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, + 0); + if (sensor->vflip) + sensor->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; + + sensor->vblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK, + IMX111_VBLANK_MIN, + IMX111_VTL_MAX - mode->height, 1, + mode->vtl_def - mode->height); + sensor->hblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, + IMX111_HBLANK_MIN, + IMX111_HTL_MAX - mode->width, 1, + mode->htl_def - mode->width); + + /* + * The maximum coarse integration time is the frame length in lines + * minus five. + */ + sensor->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, + IMX111_INTEGRATION_TIME_MIN, + IMX111_PIXEL_ARRAY_HEIGHT - + IMX111_INTEGRATION_TIME_OFFSET, + IMX111_INTEGRATION_TIME_STEP, + IMX111_PIXEL_ARRAY_HEIGHT - + IMX111_INTEGRATION_TIME_OFFSET); + + v4l2_ctrl_new_fwnode_properties(hdl, ops, &props); + + v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(test_pattern_menu) - 1, 0, 0, + test_pattern_menu); + for (i = 0; i < 4; i++) { + /* + * The assumption is that + * TEST_PATTERN_GREENR == TEST_PATTERN_RED + 1 + * TEST_PATTERN_BLUE == TEST_PATTERN_RED + 2 + * TEST_PATTERN_GREENB == TEST_PATTERN_RED + 3 + */ + v4l2_ctrl_new_std(hdl, ops, V4L2_CID_TEST_PATTERN_RED + i, + IMX111_TESTP_COLOUR_MIN, + IMX111_TESTP_COLOUR_MAX, + IMX111_TESTP_COLOUR_STEP, + IMX111_TESTP_COLOUR_MAX); + /* The "Solid color" pattern is white by default */ + } + + if (hdl->error) + return hdl->error; + + sensor->sd.ctrl_handler = hdl; + + return 0; +}; + +static int imx111_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct imx111 *sensor = sd_to_imx111(sd); + struct device *dev = regmap_get_device(sensor->regmap); + const struct imx111_mode *mode = sensor->cur_mode; + int ret; + + ret = pm_runtime_resume_and_get(dev); + if (ret < 0) + return ret; + + /* Apply default values of current mode */ + ret = cci_multi_reg_write(sensor->regmap, mode->reg_list.regs, + mode->reg_list.num_of_regs, NULL); + if (ret < 0) { + dev_err(dev, "Failed to initialize the sensor\n"); + goto err_rpm_put; + } + + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, + IMX111_GROUP_WRITE_ON, &ret); + cci_write(sensor->regmap, IMX111_DATA_DEPTH, + sensor->data_depth | sensor->data_depth << 8, &ret); + cci_update_bits(sensor->regmap, IMX111_GROUP_WRITE, + IMX111_GROUP_WRITE_ON, 0, &ret); + + if (ret) + goto err_rpm_put; + + ret = __v4l2_ctrl_handler_setup(&sensor->hdl); + if (ret) + goto err_rpm_put; + + ret = cci_write(sensor->regmap, IMX111_STREAMING_MODE, + IMX111_MODE_STREAMING, NULL); + if (ret) + dev_err(dev, "failed to start stream"); + + /* vflip and hflip cannot change during streaming */ + __v4l2_ctrl_grab(sensor->vflip, true); + __v4l2_ctrl_grab(sensor->hflip, true); + + msleep(30); + + return 0; + +err_rpm_put: + pm_runtime_put_autosuspend(dev); + return ret; +} + +static int imx111_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct imx111 *sensor = sd_to_imx111(sd); + struct device *dev = regmap_get_device(sensor->regmap); + int ret; + + ret = cci_write(sensor->regmap, IMX111_STREAMING_MODE, + IMX111_MODE_STANDBY, NULL); + if (ret) + dev_err(dev, "failed to stop stream\n"); + + __v4l2_ctrl_grab(sensor->vflip, false); + __v4l2_ctrl_grab(sensor->hflip, false); + + pm_runtime_put_autosuspend(dev); + + return ret; +} + +static int imx111_initialize(struct imx111 *sensor) +{ + struct device *dev = regmap_get_device(sensor->regmap); + int ret = 0; + + /* Configure the PLL. */ + cci_write(sensor->regmap, IMX111_PRE_PLL_CLK_DIVIDER_PLL1, + sensor->pll->pre_div, &ret); + cci_write(sensor->regmap, IMX111_PLL_MULTIPLIER_PLL1, + sensor->pll->mult, &ret); + cci_write(sensor->regmap, IMX111_POST_DIVIDER, + IMX111_POST_DIVIDER_DIV1, &ret); + cci_write(sensor->regmap, IMX111_PLL_SETTLING_TIME, + to_settle_delay(sensor->pll->extclk_rate), &ret); + + cci_multi_reg_write(sensor->regmap, imx111_global_init, + ARRAY_SIZE(imx111_global_init), &ret); + if (ret < 0) { + dev_err(dev, "Failed to initialize the sensor\n"); + return ret; + } + + return 0; +} + +/* ---------------------------------------------------------------------------- + * IMX111 Pad Subdev Init and Operations + */ +static int imx111_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_mbus_code_enum *code) +{ + struct imx111 *sensor = sd_to_imx111(sd); + + if (code->index >= ARRAY_SIZE(imx111_mbus_formats) / 4) + return -EINVAL; + + code->code = imx111_get_format_code(sensor, + imx111_mbus_formats[code->index * + 4], false); + + return 0; +} + +static int imx111_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_frame_size_enum *fse) +{ + struct imx111 *sensor = sd_to_imx111(sd); + u32 code; + + if (fse->index >= ARRAY_SIZE(imx111_modes)) + return -EINVAL; + + code = imx111_get_format_code(sensor, fse->code, true); + if (fse->code != code) + return -EINVAL; + + fse->min_width = imx111_modes[fse->index].width; + fse->max_width = fse->min_width; + fse->min_height = imx111_modes[fse->index].height; + fse->max_height = fse->min_height; + + return 0; +} + +static int imx111_set_format(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct imx111 *sensor = sd_to_imx111(sd); + struct v4l2_mbus_framefmt *mbus_fmt = &format->format; + struct v4l2_mbus_framefmt *fmt; + const struct imx111_mode *mode; + + mode = v4l2_find_nearest_size(imx111_modes, ARRAY_SIZE(imx111_modes), + width, height, + mbus_fmt->width, mbus_fmt->height); + + fmt = v4l2_subdev_state_get_format(state, format->pad); + + if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { + int ret; + + sensor->cur_mode = mode; + sensor->data_depth = imx111_get_format_bpp(fmt); + + ret = __v4l2_ctrl_s_ctrl_int64(sensor->pixel_rate, + div_u64(sensor->pixel_clk_raw, + 2 * + sensor->data_depth)); + if (ret) + return ret; + + ret = __v4l2_ctrl_modify_range(sensor->vblank, + IMX111_VBLANK_MIN, + IMX111_VTL_MAX - mode->height, + 1, + mode->vtl_def - mode->height); + if (ret) + return ret; + + ret = __v4l2_ctrl_s_ctrl(sensor->vblank, mode->vtl_def - + mode->height); + if (ret) + return ret; + + ret = __v4l2_ctrl_modify_range(sensor->hblank, + IMX111_HBLANK_MIN, + IMX111_HTL_MAX - mode->width, + 1, + mode->htl_def - mode->width); + if (ret) + return ret; + + ret = __v4l2_ctrl_s_ctrl(sensor->hblank, mode->htl_def - + mode->width); + if (ret) + return ret; + } + + fmt->code = imx111_get_format_code(sensor, mbus_fmt->code, false); + fmt->width = mode->width; + fmt->height = mode->height; + fmt->colorspace = V4L2_COLORSPACE_RAW; + + *mbus_fmt = *fmt; + + return 0; +} + +static int imx111_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *sd_state) +{ + struct imx111 *sensor = sd_to_imx111(sd); + const struct imx111_mode *mode = sensor->cur_mode; + struct v4l2_mbus_framefmt *fmt; + + fmt = v4l2_subdev_state_get_format(sd_state, 0); + + fmt->code = MEDIA_BUS_FMT_SGBRG10_1X10; + fmt->width = mode->width; + fmt->height = mode->height; + fmt->field = V4L2_FIELD_NONE; + fmt->colorspace = V4L2_COLORSPACE_RAW; + fmt->ycbcr_enc = V4L2_YCBCR_ENC_601; + fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; + fmt->xfer_func = V4L2_XFER_FUNC_NONE; + + return 0; +} + +static const struct v4l2_subdev_video_ops imx111_video_ops = { + .s_stream = v4l2_subdev_s_stream_helper, +}; + +static const struct v4l2_subdev_pad_ops imx111_pad_ops = { + .enum_mbus_code = imx111_enum_mbus_code, + .enum_frame_size = imx111_enum_frame_size, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = imx111_set_format, + .enable_streams = imx111_enable_streams, + .disable_streams = imx111_disable_streams, +}; + +static const struct v4l2_subdev_ops imx111_subdev_ops = { + .video = &imx111_video_ops, + .pad = &imx111_pad_ops, +}; + +static const struct media_entity_operations imx111_subdev_entity_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +static const struct v4l2_subdev_internal_ops imx111_internal_ops = { + .init_state = imx111_init_state, +}; + +static int imx111_init_subdev(struct imx111 *sensor, struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct v4l2_subdev *sd = &sensor->sd; + struct media_pad *pad = &sensor->pad; + struct v4l2_ctrl_handler *hdl = &sensor->hdl; + int ret; + + /* Initialize the subdev. */ + v4l2_i2c_subdev_init(sd, client, &imx111_subdev_ops); + + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; + sd->internal_ops = &imx111_internal_ops; + + /* Initialize the media entity. */ + sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; + sd->entity.ops = &imx111_subdev_entity_ops; + pad->flags = MEDIA_PAD_FL_SOURCE; + + ret = media_entity_pads_init(&sd->entity, 1, pad); + if (ret < 0) { + dev_err(dev, "failed to init entity pads: %d", ret); + return ret; + } + + /* Initialize the control handler. */ + ret = imx111_init_controls(sensor); + if (ret) + goto error; + + return 0; +error: + v4l2_ctrl_handler_free(hdl); + media_entity_cleanup(&sd->entity); + return ret; +}; + +/* ---------------------------------------------------------------------------- + * Power Management + */ + +static int imx111_power_on(struct imx111 *sensor) +{ + int ret; + + if (sensor->reset) + gpiod_set_value(sensor->reset, 1); + + ret = regulator_bulk_enable(ARRAY_SIZE(imx111_supplies), + sensor->supplies); + if (ret < 0) + return ret; + + usleep_range(500, 600); + + if (sensor->reset) + gpiod_set_value(sensor->reset, 0); + + usleep_range(200, 250); + + ret = clk_prepare_enable(sensor->extclk); + if (ret < 0) + goto error_regulator; + + usleep_range(200, 250); + + return 0; + +error_regulator: + regulator_bulk_disable(ARRAY_SIZE(imx111_supplies), sensor->supplies); + return ret; +} + +static void imx111_power_off(struct imx111 *sensor) +{ + if (sensor->reset) + gpiod_set_value(sensor->reset, 1); + usleep_range(1000, 2000); + + clk_disable_unprepare(sensor->extclk); + regulator_bulk_disable(ARRAY_SIZE(imx111_supplies), sensor->supplies); +} + +static int __maybe_unused imx111_pm_runtime_resume(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct imx111 *sensor = sd_to_imx111(sd); + int ret; + + ret = imx111_power_on(sensor); + if (ret) + return ret; + + ret = imx111_initialize(sensor); + if (ret) { + imx111_power_off(sensor); + return ret; + } + + return 0; +} + +static int __maybe_unused imx111_pm_runtime_suspend(struct device *dev) +{ + struct v4l2_subdev *sd = dev_get_drvdata(dev); + struct imx111 *sensor = sd_to_imx111(sd); + + imx111_power_off(sensor); + + return 0; +} + +static const struct dev_pm_ops imx111_pm_ops = { + SET_RUNTIME_PM_OPS(imx111_pm_runtime_suspend, + imx111_pm_runtime_resume, NULL) +}; + +/* ---------------------------------------------------------------------------- + * Probe & Remove + */ + +static int imx111_identify_module(struct imx111 *sensor) +{ + struct device *dev = regmap_get_device(sensor->regmap); + u64 value, revision, manufacturer; + int ret = 0; + + ret = cci_read(sensor->regmap, IMX111_PRODUCT_ID, &value, NULL); + if (ret) + return ret; + + if (value != IMX111_CHIP_ID) { + dev_err(dev, "chip id mismatch: %x!=%04llx", IMX111_CHIP_ID, + value); + return -ENXIO; + } + + cci_read(sensor->regmap, IMX111_REVISION, &revision, &ret); + cci_read(sensor->regmap, IMX111_MANUFACTURER_ID, &manufacturer, &ret); + + dev_dbg(dev, "module IMX%03llx rev. %llu manufacturer %llu\n", + value, revision, manufacturer); + + return ret; +} + +static int imx111_clk_init(struct imx111 *sensor) +{ + struct device *dev = regmap_get_device(sensor->regmap); + u32 ndata_lanes = sensor->bus_cfg.bus.mipi_csi2.num_data_lanes; + u64 extclk_rate, system_clk; + unsigned int i; + + extclk_rate = clk_get_rate(sensor->extclk); + if (!extclk_rate) + return dev_err_probe(dev, -EINVAL, "EXTCLK rate unknown\n"); + + for (i = 0; i < ARRAY_SIZE(imx111_pll); i++) { + if (clk_get_rate(sensor->extclk) == + imx111_pll[i].extclk_rate) { + sensor->pll = &imx111_pll[i]; + break; + } + } + if (!sensor->pll) + return dev_err_probe(dev, -EINVAL, + "Unsupported EXTCLK rate %llu\n", + extclk_rate); + + system_clk = div_u64(extclk_rate, sensor->pll->pre_div) * + sensor->pll->mult; + + /* + * Pixel clock or Logic clock is used for internal image processing is + * generated by dividing into 1/10 or 1/8 frequency according to the + * word length of the CSI2 interface. This clock is designating the + * pixel rate and used as the base of integration time, frame rate etc. + */ + sensor->pixel_clk_raw = system_clk * ndata_lanes; + + /* + * The CSI-2 bus is clocked for 16-bit per pixel, transmitted in DDR + * over n lanes for RAW10 default format. + */ + sensor->default_link_freq = div_u64(sensor->pixel_clk_raw * 8, + 2 * IMX111_DATA_DEPTH_RAW10); + + if (sensor->bus_cfg.nr_of_link_frequencies != 1 || + sensor->bus_cfg.link_frequencies[0] != sensor->default_link_freq) + return dev_err_probe(dev, -EINVAL, + "Invalid link-frequency, expected %llu\n", + sensor->default_link_freq); + + return 0; +} + +static int imx111_parse_dt(struct imx111 *sensor) +{ + struct device *dev = regmap_get_device(sensor->regmap); + struct fwnode_handle *fwnode = dev_fwnode(dev); + struct fwnode_handle *ep; + int ret; + + ep = fwnode_graph_get_next_endpoint(fwnode, NULL); + if (!ep) { + dev_err(dev, "No endpoint found\n"); + return -EINVAL; + } + + ret = v4l2_fwnode_endpoint_alloc_parse(ep, &sensor->bus_cfg); + fwnode_handle_put(ep); + if (ret < 0) { + dev_err(dev, "Failed to parse endpoint\n"); + goto error; + } + + sensor->bus_cfg.bus_type = V4L2_MBUS_CSI2_DPHY; + + /* Check the number of MIPI CSI2 data lanes */ + if (sensor->bus_cfg.bus.mipi_csi2.num_data_lanes > 2) { + dev_err(dev, "number of lanes is more than 2\n"); + ret = -EINVAL; + goto error; + } + + return 0; + +error: + v4l2_fwnode_endpoint_free(&sensor->bus_cfg); + return ret; +} + +static int imx111_probe(struct i2c_client *client) +{ + struct device *dev = &client->dev; + struct imx111 *sensor; + int ret; + + sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL); + if (!sensor) + return -ENOMEM; + + sensor->regmap = devm_cci_regmap_init_i2c(client, 16); + if (IS_ERR(sensor->regmap)) + return dev_err_probe(dev, PTR_ERR(sensor->regmap), + "Failed to allocate register map\n"); + + sensor->extclk = devm_v4l2_sensor_clk_get(dev, NULL); + if (IS_ERR(sensor->extclk)) + return dev_err_probe(dev, PTR_ERR(sensor->extclk), + "Failed to get clock\n"); + + sensor->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(sensor->reset)) + return dev_err_probe(dev, PTR_ERR(sensor->reset), + "Failed to get reset GPIO\n"); + + ret = devm_regulator_bulk_get_const(dev, ARRAY_SIZE(imx111_supplies), + imx111_supplies, + &sensor->supplies); + if (ret < 0) + return dev_err_probe(dev, ret, "Failed to get regulators\n"); + + ret = imx111_parse_dt(sensor); + if (ret < 0) + return ret; + + ret = imx111_clk_init(sensor); + if (ret < 0) + goto error_ep_free; + + ret = imx111_power_on(sensor); + if (ret < 0) { + dev_err_probe(dev, ret, "Could not power on the device\n"); + goto error_ep_free; + } + + ret = imx111_identify_module(sensor); + if (ret < 0) { + dev_err_probe(dev, ret, "Could not identify module\n"); + goto error_power_off; + } + + sensor->cur_mode = &imx111_modes[IMX111_MODE_3280x2464]; + sensor->data_depth = IMX111_DATA_DEPTH_RAW10; + + ret = imx111_initialize(sensor); + if (ret < 0) + goto error_power_off; + + ret = imx111_init_subdev(sensor, client); + if (ret < 0) { + dev_err(dev, "failed to init controls: %d", ret); + goto error_v4l2_ctrl_handler_free; + } + + ret = v4l2_subdev_init_finalize(&sensor->sd); + if (ret) + goto error_v4l2_ctrl_handler_free; + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + ret = v4l2_async_register_subdev_sensor(&sensor->sd); + if (ret < 0) { + dev_err(dev, "failed to register V4L2 subdev: %d", ret); + goto error_pm; + } + + pm_runtime_set_autosuspend_delay(dev, 1000); + pm_runtime_use_autosuspend(dev); + pm_runtime_idle(dev); + + return 0; + +error_pm: + v4l2_subdev_cleanup(&sensor->sd); + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + +error_v4l2_ctrl_handler_free: + v4l2_ctrl_handler_free(&sensor->hdl); + media_entity_cleanup(&sensor->sd.entity); + +error_power_off: + imx111_power_off(sensor); + +error_ep_free: + v4l2_fwnode_endpoint_free(&sensor->bus_cfg); + + return ret; +} + +static void imx111_remove(struct i2c_client *client) +{ + struct v4l2_subdev *sd = i2c_get_clientdata(client); + struct imx111 *sensor = sd_to_imx111(sd); + + v4l2_async_unregister_subdev(&sensor->sd); + v4l2_subdev_cleanup(sd); + media_entity_cleanup(&sensor->sd.entity); + v4l2_ctrl_handler_free(&sensor->hdl); + v4l2_fwnode_endpoint_free(&sensor->bus_cfg); + + /* + * Disable runtime PM. In case runtime PM is disabled in the kernel, + * make sure to turn power off manually. + */ + pm_runtime_disable(&client->dev); + if (!pm_runtime_status_suspended(&client->dev)) { + imx111_power_off(sensor); + pm_runtime_set_suspended(&client->dev); + } +} + +static const struct of_device_id imx111_of_match[] = { + { .compatible = "sony,imx111" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx111_of_match); + +static struct i2c_driver imx111_i2c_driver = { + .driver = { + .name = "imx111", + .of_match_table = imx111_of_match, + .pm = &imx111_pm_ops, + }, + .probe = imx111_probe, + .remove = imx111_remove, +}; +module_i2c_driver(imx111_i2c_driver); + +MODULE_AUTHOR("Svyatoslav Ryhel "); +MODULE_DESCRIPTION("Sony IMX111 CMOS Image Sensor driver"); +MODULE_LICENSE("GPL"); From e36dbd1cf3dfc4ce18e9f7a80183b53cae257e30 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Fri, 4 Jul 2025 17:43:19 +0200 Subject: [PATCH 211/249] media: uapi: Introduce V4L2 generic ISP types Introduce v4l2-isp.h in the Linux kernel uAPI. The header includes types for generic ISP configuration parameters and will be extended in the future with support for generic ISP statistics formats. Generic ISP parameters support is provided by introducing two new types that represent an extensible and versioned buffer of ISP configuration parameters. The v4l2_params_buffer represents the container for the ISP configuration data block. The generic type is defined with a 0-sized data member that the ISP driver implementations shall properly size according to their capabilities. The v4l2_params_block_header structure represents the header to be prepend to each ISP configuration block. Signed-off-by: Daniel Scally Reviewed-by: Daniel Scally Reviewed-by: Laurent Pinchart Reviewed-by: Michael Riesch Acked-by: Sakari Ailus Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- MAINTAINERS | 6 ++ include/uapi/linux/media/v4l2-isp.h | 102 ++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+) create mode 100644 include/uapi/linux/media/v4l2-isp.h diff --git a/MAINTAINERS b/MAINTAINERS index 42b20f33f3bb..97c8a4cdbc2c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26885,6 +26885,12 @@ F: drivers/media/i2c/vd55g1.c F: drivers/media/i2c/vd56g3.c F: drivers/media/i2c/vgxy61.c +V4L2 GENERIC ISP PARAMETERS AND STATISTIC FORMATS +M: Jacopo Mondi +L: linux-media@vger.kernel.org +S: Maintained +F: include/uapi/linux/media/v4l2-isp.h + VF610 NAND DRIVER M: Stefan Agner L: linux-mtd@lists.infradead.org diff --git a/include/uapi/linux/media/v4l2-isp.h b/include/uapi/linux/media/v4l2-isp.h new file mode 100644 index 000000000000..779168f9058e --- /dev/null +++ b/include/uapi/linux/media/v4l2-isp.h @@ -0,0 +1,102 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Video4Linux2 generic ISP parameters and statistics support + * + * Copyright (C) 2025 Ideas On Board Oy + * Author: Jacopo Mondi + */ + +#ifndef _UAPI_V4L2_ISP_H_ +#define _UAPI_V4L2_ISP_H_ + +#include +#include + +/** + * enum v4l2_isp_params_version - V4L2 ISP parameters versioning + * + * @V4L2_ISP_PARAMS_VERSION_V0: First version of the V4L2 ISP parameters format + * (for compatibility) + * @V4L2_ISP_PARAMS_VERSION_V1: First version of the V4L2 ISP parameters format + * + * V0 and V1 are identical in order to support drivers compatible with the V4L2 + * ISP parameters format already upstreamed which use either 0 or 1 as their + * versioning identifier. Both V0 and V1 refers to the first version of the + * V4L2 ISP parameters format. + * + * Future revisions of the V4L2 ISP parameters format should start from the + * value of 2. + */ +enum v4l2_isp_params_version { + V4L2_ISP_PARAMS_VERSION_V0 = 0, + V4L2_ISP_PARAMS_VERSION_V1 +}; + +#define V4L2_ISP_PARAMS_FL_BLOCK_DISABLE (1U << 0) +#define V4L2_ISP_PARAMS_FL_BLOCK_ENABLE (1U << 1) + +/* + * Reserve the first 8 bits for V4L2_ISP_PARAMS_FL_* flag. + * + * Driver-specific flags should be defined as: + * #define DRIVER_SPECIFIC_FLAG0 ((1U << V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(0)) + * #define DRIVER_SPECIFIC_FLAG1 ((1U << V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(1)) + */ +#define V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(n) ((n) + 8) + +/** + * struct v4l2_isp_params_block_header - V4L2 extensible parameters block header + * @type: The parameters block type (driver-specific) + * @flags: A bitmask of block flags (driver-specific) + * @size: Size (in bytes) of the parameters block, including this header + * + * This structure represents the common part of all the ISP configuration + * blocks. Each parameters block shall embed an instance of this structure type + * as its first member, followed by the block-specific configuration data. + * + * The @type field is an ISP driver-specific value that identifies the block + * type. The @size field specifies the size of the parameters block. + * + * The @flags field is a bitmask of per-block flags V4L2_PARAMS_ISP_FL_* and + * driver-specific flags specified by the driver header. + */ +struct v4l2_isp_params_block_header { + __u16 type; + __u16 flags; + __u32 size; +} __attribute__((aligned(8))); + +/** + * struct v4l2_isp_params_buffer - V4L2 extensible parameters configuration + * @version: The parameters buffer version (driver-specific) + * @data_size: The configuration data effective size, excluding this header + * @data: The configuration data + * + * This structure contains the configuration parameters of the ISP algorithms, + * serialized by userspace into a data buffer. Each configuration parameter + * block is represented by a block-specific structure which contains a + * :c:type:`v4l2_isp_params_block_header` entry as first member. Userspace + * populates the @data buffer with configuration parameters for the blocks that + * it intends to configure. As a consequence, the data buffer effective size + * changes according to the number of ISP blocks that userspace intends to + * configure and is set by userspace in the @data_size field. + * + * The parameters buffer is versioned by the @version field to allow modifying + * and extending its definition. Userspace shall populate the @version field to + * inform the driver about the version it intends to use. The driver will parse + * and handle the @data buffer according to the data layout specific to the + * indicated version and return an error if the desired version is not + * supported. + * + * For each ISP block that userspace wants to configure, a block-specific + * structure is appended to the @data buffer, one after the other without gaps + * in between. Userspace shall populate the @data_size field with the effective + * size, in bytes, of the @data buffer. + */ +struct v4l2_isp_params_buffer { + __u32 version; + __u32 data_size; + __u8 data[] __counted_by(data_size); +}; + +#endif /* _UAPI_V4L2_ISP_H_ */ From 1e8152db64bdee9f13e84e516c2b8a9bb10f025e Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Mon, 7 Jul 2025 14:13:53 +0200 Subject: [PATCH 212/249] media: uapi: Convert RkISP1 to V4L2 extensible params With the introduction of common types for extensible parameters format, convert the rkisp1-config.h header to use the new types. Factor out the documentation that is now part of the common header and only keep the driver-specific on in place. The conversion to use common types doesn't impact userspace as the new types are either identical to the ones already existing in the RkISP1 uAPI or are 1-to-1 type convertible. Reviewed-by: Daniel Scally Reviewed-by: Laurent Pinchart Reviewed-by: Michael Riesch Acked-by: Sakari Ailus Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- include/uapi/linux/rkisp1-config.h | 107 +++++++---------------------- 1 file changed, 24 insertions(+), 83 deletions(-) diff --git a/include/uapi/linux/rkisp1-config.h b/include/uapi/linux/rkisp1-config.h index 3b060ea6eed7..b2d2a71f7baf 100644 --- a/include/uapi/linux/rkisp1-config.h +++ b/include/uapi/linux/rkisp1-config.h @@ -7,8 +7,13 @@ #ifndef _UAPI_RKISP1_CONFIG_H #define _UAPI_RKISP1_CONFIG_H +#ifdef __KERNEL__ +#include +#endif /* __KERNEL__ */ #include +#include + /* Defect Pixel Cluster Detection */ #define RKISP1_CIF_ISP_MODULE_DPCC (1U << 0) /* Black Level Subtraction */ @@ -1158,79 +1163,26 @@ enum rkisp1_ext_params_block_type { RKISP1_EXT_PARAMS_BLOCK_TYPE_WDR, }; -#define RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE (1U << 0) -#define RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE (1U << 1) +/* For backward compatibility */ +#define RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE V4L2_ISP_PARAMS_FL_BLOCK_DISABLE +#define RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE V4L2_ISP_PARAMS_FL_BLOCK_ENABLE /* A bitmask of parameters blocks supported on the current hardware. */ #define RKISP1_CID_SUPPORTED_PARAMS_BLOCKS (V4L2_CID_USER_RKISP1_BASE + 0x01) /** - * struct rkisp1_ext_params_block_header - RkISP1 extensible parameters block - * header + * rkisp1_ext_params_block_header - RkISP1 extensible parameters block header * * This structure represents the common part of all the ISP configuration - * blocks. Each parameters block shall embed an instance of this structure type - * as its first member, followed by the block-specific configuration data. The - * driver inspects this common header to discern the block type and its size and - * properly handle the block content by casting it to the correct block-specific - * type. + * blocks and is identical to :c:type:`v4l2_isp_params_block_header`. * - * The @type field is one of the values enumerated by + * The type field is one of the values enumerated by * :c:type:`rkisp1_ext_params_block_type` and specifies how the data should be - * interpreted by the driver. The @size field specifies the size of the - * parameters block and is used by the driver for validation purposes. + * interpreted by the driver. * - * The @flags field is a bitmask of per-block flags RKISP1_EXT_PARAMS_FL_*. - * - * When userspace wants to configure and enable an ISP block it shall fully - * populate the block configuration and set the - * RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE bit in the @flags field. - * - * When userspace simply wants to disable an ISP block the - * RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bit should be set in @flags field. The - * driver ignores the rest of the block configuration structure in this case. - * - * If a new configuration of an ISP block has to be applied userspace shall - * fully populate the ISP block configuration and omit setting the - * RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE and RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bits - * in the @flags field. - * - * Setting both the RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE and - * RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bits in the @flags field is not allowed - * and not accepted by the driver. - * - * Userspace is responsible for correctly populating the parameters block header - * fields (@type, @flags and @size) and the block-specific parameters. - * - * For example: - * - * .. code-block:: c - * - * void populate_bls(struct rkisp1_ext_params_block_header *block) { - * struct rkisp1_ext_params_bls_config *bls = - * (struct rkisp1_ext_params_bls_config *)block; - * - * bls->header.type = RKISP1_EXT_PARAMS_BLOCK_ID_BLS; - * bls->header.flags = RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE; - * bls->header.size = sizeof(*bls); - * - * bls->config.enable_auto = 0; - * bls->config.fixed_val.r = blackLevelRed_; - * bls->config.fixed_val.gr = blackLevelGreenR_; - * bls->config.fixed_val.gb = blackLevelGreenB_; - * bls->config.fixed_val.b = blackLevelBlue_; - * } - * - * @type: The parameters block type, see - * :c:type:`rkisp1_ext_params_block_type` - * @flags: A bitmask of block flags - * @size: Size (in bytes) of the parameters block, including this header + * The flags field is a bitmask of per-block flags RKISP1_EXT_PARAMS_FL_*. */ -struct rkisp1_ext_params_block_header { - __u16 type; - __u16 flags; - __u32 size; -}; +#define rkisp1_ext_params_block_header v4l2_isp_params_block_header /** * struct rkisp1_ext_params_bls_config - RkISP1 extensible params BLS config @@ -1588,27 +1540,14 @@ struct rkisp1_ext_params_wdr_config { * @RKISP1_EXT_PARAM_BUFFER_V1: First version of RkISP1 extensible parameters */ enum rksip1_ext_param_buffer_version { - RKISP1_EXT_PARAM_BUFFER_V1 = 1, + RKISP1_EXT_PARAM_BUFFER_V1 = V4L2_ISP_PARAMS_VERSION_V1, }; /** * struct rkisp1_ext_params_cfg - RkISP1 extensible parameters configuration * - * This struct contains the configuration parameters of the RkISP1 ISP - * algorithms, serialized by userspace into a data buffer. Each configuration - * parameter block is represented by a block-specific structure which contains a - * :c:type:`rkisp1_ext_params_block_header` entry as first member. Userspace - * populates the @data buffer with configuration parameters for the blocks that - * it intends to configure. As a consequence, the data buffer effective size - * changes according to the number of ISP blocks that userspace intends to - * configure and is set by userspace in the @data_size field. - * - * The parameters buffer is versioned by the @version field to allow modifying - * and extending its definition. Userspace shall populate the @version field to - * inform the driver about the version it intends to use. The driver will parse - * and handle the @data buffer according to the data layout specific to the - * indicated version and return an error if the desired version is not - * supported. + * This is the driver-specific implementation of + * :c:type:`v4l2_isp_params_buffer`. * * Currently the single RKISP1_EXT_PARAM_BUFFER_V1 version is supported. * When a new format version will be added, a mechanism for userspace to query @@ -1624,11 +1563,6 @@ enum rksip1_ext_param_buffer_version { * the maximum value represents the blocks supported by the kernel driver, * independently of the device instance. * - * For each ISP block that userspace wants to configure, a block-specific - * structure is appended to the @data buffer, one after the other without gaps - * in between nor overlaps. Userspace shall populate the @data_size field with - * the effective size, in bytes, of the @data buffer. - * * The expected memory layout of the parameters buffer is:: * * +-------------------- struct rkisp1_ext_params_cfg -------------------+ @@ -1678,4 +1612,11 @@ struct rkisp1_ext_params_cfg { __u8 data[RKISP1_EXT_PARAMS_MAX_SIZE]; }; +#ifdef __KERNEL__ +/* Make sure the header is type-convertible to the generic v4l2 params one */ +static_assert((sizeof(struct rkisp1_ext_params_cfg) - + RKISP1_EXT_PARAMS_MAX_SIZE) == + sizeof(struct v4l2_isp_params_buffer)); +#endif /* __KERNEL__ */ + #endif /* _UAPI_RKISP1_CONFIG_H */ From 45662082855c6acd1719c11e077388cbccf3baf2 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Mon, 7 Jul 2025 14:18:52 +0200 Subject: [PATCH 213/249] media: uapi: Convert Amlogic C3 to V4L2 extensible params With the introduction of common types for extensible parameters format, convert the c3-isp-config.h header to use the new types. Factor-out the documentation that is now part of the common header and only keep the driver-specific on in place. The conversion to use common types doesn't impact userspace as the new types are either identical to the ones already existing in the C3 ISP uAPI or are 1-to-1 type convertible. Reviewed-by: Daniel Scally Reviewed-by: Keke Li Reviewed-by: Laurent Pinchart Acked-by: Sakari Ailus Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../uapi/linux/media/amlogic/c3-isp-config.h | 90 +++++-------------- 1 file changed, 23 insertions(+), 67 deletions(-) diff --git a/include/uapi/linux/media/amlogic/c3-isp-config.h b/include/uapi/linux/media/amlogic/c3-isp-config.h index ed085ea62a57..0a3c1cc55ccb 100644 --- a/include/uapi/linux/media/amlogic/c3-isp-config.h +++ b/include/uapi/linux/media/amlogic/c3-isp-config.h @@ -6,8 +6,13 @@ #ifndef _UAPI_C3_ISP_CONFIG_H_ #define _UAPI_C3_ISP_CONFIG_H_ +#ifdef __KERNEL__ +#include +#endif /* __KERNEL__ */ #include +#include + /* * Frames are split into zones of almost equal width and height - a zone is a * rectangular tile of a frame. The metering blocks within the ISP collect @@ -141,7 +146,7 @@ struct c3_isp_stats_info { * @C3_ISP_PARAMS_BUFFER_V0: First version of C3 ISP parameters block */ enum c3_isp_params_buffer_version { - C3_ISP_PARAMS_BUFFER_V0, + C3_ISP_PARAMS_BUFFER_V0 = V4L2_ISP_PARAMS_VERSION_V0, }; /** @@ -176,62 +181,23 @@ enum c3_isp_params_block_type { C3_ISP_PARAMS_BLOCK_SENTINEL }; -#define C3_ISP_PARAMS_BLOCK_FL_DISABLE (1U << 0) -#define C3_ISP_PARAMS_BLOCK_FL_ENABLE (1U << 1) +/* For backward compatibility */ +#define C3_ISP_PARAMS_BLOCK_FL_DISABLE V4L2_ISP_PARAMS_FL_BLOCK_DISABLE +#define C3_ISP_PARAMS_BLOCK_FL_ENABLE V4L2_ISP_PARAMS_FL_BLOCK_ENABLE /** * struct c3_isp_params_block_header - C3 ISP parameter block header * * This structure represents the common part of all the ISP configuration - * blocks. Each parameters block shall embed an instance of this structure type - * as its first member, followed by the block-specific configuration data. The - * driver inspects this common header to discern the block type and its size and - * properly handle the block content by casting it to the correct block-specific - * type. + * blocks and is identical to :c:type:`v4l2_isp_params_block_header`. * - * The @type field is one of the values enumerated by + * The type field is one of the values enumerated by * :c:type:`c3_isp_params_block_type` and specifies how the data should be - * interpreted by the driver. The @size field specifies the size of the - * parameters block and is used by the driver for validation purposes. The - * @flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL*. + * interpreted by the driver. * - * When userspace wants to disable an ISP block the - * C3_ISP_PARAMS_BLOCK_FL_DISABLED bit should be set in the @flags field. In - * this case userspace may optionally omit the remainder of the configuration - * block, which will be ignored by the driver. - * - * When a new configuration of an ISP block needs to be applied userspace - * shall fully populate the ISP block and omit setting the - * C3_ISP_PARAMS_BLOCK_FL_DISABLED bit in the @flags field. - * - * Userspace is responsible for correctly populating the parameters block header - * fields (@type, @flags and @size) and the block-specific parameters. - * - * For example: - * - * .. code-block:: c - * - * void populate_pst_gamma(struct c3_isp_params_block_header *block) { - * struct c3_isp_params_pst_gamma *gamma = - * (struct c3_isp_params_pst_gamma *)block; - * - * gamma->header.type = C3_ISP_PARAMS_BLOCK_PST_GAMMA; - * gamma->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE; - * gamma->header.size = sizeof(*gamma); - * - * for (unsigned int i = 0; i < 129; i++) - * gamma->pst_gamma_lut[i] = i; - * } - * - * @type: The parameters block type from :c:type:`c3_isp_params_block_type` - * @flags: A bitmask of block flags - * @size: Size (in bytes) of the parameters block, including this header + * The flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL_*. */ -struct c3_isp_params_block_header { - __u16 type; - __u16 flags; - __u32 size; -}; +#define c3_isp_params_block_header v4l2_isp_params_block_header /** * struct c3_isp_params_awb_gains - Gains for auto-white balance @@ -498,26 +464,10 @@ struct c3_isp_params_blc { /** * struct c3_isp_params_cfg - C3 ISP configuration parameters * - * This struct contains the configuration parameters of the C3 ISP - * algorithms, serialized by userspace into an opaque data buffer. Each - * configuration parameter block is represented by a block-specific structure - * which contains a :c:type:`c3_isp_param_block_header` entry as first - * member. Userspace populates the @data buffer with configuration parameters - * for the blocks that it intends to configure. As a consequence, the data - * buffer effective size changes according to the number of ISP blocks that - * userspace intends to configure. + * This is the driver-specific implementation of + * :c:type:`v4l2_isp_params_buffer`. * - * The parameters buffer is versioned by the @version field to allow modifying - * and extending its definition. Userspace should populate the @version field to - * inform the driver about the version it intends to use. The driver will parse - * and handle the @data buffer according to the data layout specific to the - * indicated revision and return an error if the desired revision is not - * supported. - * - * For each ISP block that userspace wants to configure, a block-specific - * structure is appended to the @data buffer, one after the other without gaps - * in between nor overlaps. Userspace shall populate the @total_size field with - * the effective size, in bytes, of the @data buffer. + * Currently only C3_ISP_PARAM_BUFFER_V0 is supported. * * The expected memory layout of the parameters buffer is:: * @@ -561,4 +511,10 @@ struct c3_isp_params_cfg { __u8 data[C3_ISP_PARAMS_MAX_SIZE]; }; +#ifdef __KERNEL__ +/* Make sure the header is type-convertible to the generic v4l2 params one */ +static_assert((sizeof(struct c3_isp_params_cfg) - C3_ISP_PARAMS_MAX_SIZE) == + sizeof(struct v4l2_isp_params_buffer)); +#endif /* __KERNEL__ */ + #endif From 8923679cd47e1b743a75a98ca78f608bec92c5e5 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Fri, 4 Jul 2025 17:50:24 +0200 Subject: [PATCH 214/249] media: Documentation: uapi: Add V4L2 ISP documentation Add userspace documentation for V4L2 ISP generic parameters and statistics formats. Reviewed-by: Daniel Scally Reviewed-by: Michael Riesch Acked-by: Sakari Ailus Reviewed-by: Laurent Pinchart Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../userspace-api/media/v4l/meta-formats.rst | 1 + .../userspace-api/media/v4l/v4l2-isp.rst | 67 +++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 69 insertions(+) create mode 100644 Documentation/userspace-api/media/v4l/v4l2-isp.rst diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index d9868ee88a07..7b758ea9eb4a 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -25,3 +25,4 @@ These formats are used for the :ref:`metadata` interface only. metafmt-vivid metafmt-vsp1-hgo metafmt-vsp1-hgt + v4l2-isp diff --git a/Documentation/userspace-api/media/v4l/v4l2-isp.rst b/Documentation/userspace-api/media/v4l/v4l2-isp.rst new file mode 100644 index 000000000000..facf6dba1ca7 --- /dev/null +++ b/Documentation/userspace-api/media/v4l/v4l2-isp.rst @@ -0,0 +1,67 @@ +.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later + +.. _v4l2-isp: + +************************ +Generic V4L2 ISP formats +************************ + +Generic ISP formats are metadata formats that define a mechanism to pass ISP +parameters and statistics between userspace and drivers in V4L2 buffers. They +are designed to allow extending them in a backward-compatible way. + +ISP parameters +============== + +The generic ISP configuration parameters format is realized by a defining a +single C structure that contains a header, followed by a binary buffer where +userspace programs a variable number of ISP configuration data block, one for +each supported ISP feature. + +The :c:type:`v4l2_isp_params_buffer` structure defines the buffer header which +is followed by a binary buffer of ISP configuration data. Userspace shall +correctly populate the buffer header with the generic parameters format version +and with the size (in bytes) of the binary data buffer where it will store the +ISP blocks configuration. + +Each *ISP configuration block* is preceded by an header implemented by the +:c:type:`v4l2_isp_params_block_header` structure, followed by the configuration +parameters for that specific block, defined by the ISP driver specific data +types. + +Userspace applications are responsible for correctly populating each block's +header fields (type, flags and size) and the block-specific parameters. + +ISP block enabling, disabling and configuration +----------------------------------------------- + +When userspace wants to configure and enable an ISP block it shall fully +populate the block configuration and set the V4L2_ISP_PARAMS_FL_BLOCK_ENABLE +bit in the block header's `flags` field. + +When userspace simply wants to disable an ISP block the +V4L2_ISP_PARAMS_FL_BLOCK_DISABLE bit should be set in block header's `flags` +field. Drivers accept a configuration parameters block with no additional +data after the header in this case. + +If the configuration of an already active ISP block has to be updated, +userspace shall fully populate the ISP block parameters and omit setting the +V4L2_ISP_PARAMS_FL_BLOCK_ENABLE and V4L2_ISP_PARAMS_FL_BLOCK_DISABLE bits in the +header's `flags` field. + +Setting both the V4L2_ISP_PARAMS_FL_BLOCK_ENABLE and +V4L2_ISP_PARAMS_FL_BLOCK_DISABLE bits in the flags field is not allowed and +returns an error. + +Extension to the parameters format can be implemented by adding new blocks +definition without invalidating the existing ones. + +ISP statistics +============== + +Support for generic statistics format is not yet implemented in Video4Linux2. + +V4L2 ISP uAPI data types +======================== + +.. kernel-doc:: include/uapi/linux/media/v4l2-isp.h diff --git a/MAINTAINERS b/MAINTAINERS index 97c8a4cdbc2c..a22249166e4a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26889,6 +26889,7 @@ V4L2 GENERIC ISP PARAMETERS AND STATISTIC FORMATS M: Jacopo Mondi L: linux-media@vger.kernel.org S: Maintained +F: Documentation/userspace-api/media/v4l/v4l2-isp.rst F: include/uapi/linux/media/v4l2-isp.h VF610 NAND DRIVER From 3cb6de6fafb8fca55b14313e63f13ce10ecc6fc4 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Tue, 1 Jul 2025 18:57:17 +0200 Subject: [PATCH 215/249] media: v4l2-core: Introduce v4l2-isp.c Add to the V4L2 framework helper functions to support drivers when validating a buffer of V4L2 ISP parameters. Driver shall use v4l2_isp_params_validate_buffer_size() to verify the size correctness of the data received from userspace, and after having copied the data to a kernel-only memory location, complete the validation by calling v4l2_isp_params_validate_buffer(). Reviewed-by: Daniel Scally Reviewed-by: Laurent Pinchart Reviewed-by: Michael Riesch Acked-by: Sakari Ailus Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- MAINTAINERS | 2 + drivers/media/v4l2-core/Kconfig | 4 + drivers/media/v4l2-core/Makefile | 1 + drivers/media/v4l2-core/v4l2-isp.c | 132 +++++++++++++++++++++++++++++ include/media/v4l2-isp.h | 91 ++++++++++++++++++++ 5 files changed, 230 insertions(+) create mode 100644 drivers/media/v4l2-core/v4l2-isp.c create mode 100644 include/media/v4l2-isp.h diff --git a/MAINTAINERS b/MAINTAINERS index a22249166e4a..e4c8b2d533bd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26890,6 +26890,8 @@ M: Jacopo Mondi L: linux-media@vger.kernel.org S: Maintained F: Documentation/userspace-api/media/v4l/v4l2-isp.rst +F: drivers/media/v4l2-core/v4l2-isp.c +F: include/media/v4l2-isp.h F: include/uapi/linux/media/v4l2-isp.h VF610 NAND DRIVER diff --git a/drivers/media/v4l2-core/Kconfig b/drivers/media/v4l2-core/Kconfig index 331b8e535e5b..d50ccac9733c 100644 --- a/drivers/media/v4l2-core/Kconfig +++ b/drivers/media/v4l2-core/Kconfig @@ -82,3 +82,7 @@ config V4L2_CCI_I2C depends on I2C select REGMAP_I2C select V4L2_CCI + +config V4L2_ISP + tristate + depends on VIDEOBUF2_CORE diff --git a/drivers/media/v4l2-core/Makefile b/drivers/media/v4l2-core/Makefile index 2177b9d63a8f..329f0eadce99 100644 --- a/drivers/media/v4l2-core/Makefile +++ b/drivers/media/v4l2-core/Makefile @@ -29,6 +29,7 @@ obj-$(CONFIG_V4L2_CCI) += v4l2-cci.o obj-$(CONFIG_V4L2_FLASH_LED_CLASS) += v4l2-flash-led-class.o obj-$(CONFIG_V4L2_FWNODE) += v4l2-fwnode.o obj-$(CONFIG_V4L2_H264) += v4l2-h264.o +obj-$(CONFIG_V4L2_ISP) += v4l2-isp.o obj-$(CONFIG_V4L2_JPEG_HELPER) += v4l2-jpeg.o obj-$(CONFIG_V4L2_MEM2MEM_DEV) += v4l2-mem2mem.o obj-$(CONFIG_V4L2_VP9) += v4l2-vp9.o diff --git a/drivers/media/v4l2-core/v4l2-isp.c b/drivers/media/v4l2-core/v4l2-isp.c new file mode 100644 index 000000000000..756d2b4996cc --- /dev/null +++ b/drivers/media/v4l2-core/v4l2-isp.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Video4Linux2 generic ISP parameters and statistics support + * + * Copyright (C) 2025 Ideas On Board Oy + * Author: Jacopo Mondi + */ + +#include + +#include +#include + +#include + +int v4l2_isp_params_validate_buffer_size(struct device *dev, + struct vb2_buffer *vb, + size_t max_size) +{ + size_t header_size = offsetof(struct v4l2_isp_params_buffer, data); + size_t payload_size = vb2_get_plane_payload(vb, 0); + + /* Payload size can't be greater than the destination buffer size */ + if (payload_size > max_size) { + dev_dbg(dev, "Payload size is too large: %zu\n", payload_size); + return -EINVAL; + } + + /* Payload size can't be smaller than the header size */ + if (payload_size < header_size) { + dev_dbg(dev, "Payload size is too small: %zu\n", payload_size); + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(v4l2_isp_params_validate_buffer_size); + +int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, + const struct v4l2_isp_params_buffer *buffer, + const struct v4l2_isp_params_block_info *info, + size_t num_blocks) +{ + size_t header_size = offsetof(struct v4l2_isp_params_buffer, data); + size_t payload_size = vb2_get_plane_payload(vb, 0); + size_t block_offset = 0; + size_t buffer_size; + + /* + * Currently only the first version of the V4L2 ISP parameters format is + * supported. We accept both V0 and V1 to support existing drivers + * compatible with V4L2 ISP that use either 0 or 1 as their "first + * version" identifiers. + */ + if (buffer->version != V4L2_ISP_PARAMS_VERSION_V0 && + buffer->version != V4L2_ISP_PARAMS_VERSION_V1) { + dev_dbg(dev, + "Unsupported V4L2 ISP parameters format version: %u\n", + buffer->version); + return -EINVAL; + } + + /* Validate the size reported in the header */ + buffer_size = header_size + buffer->data_size; + if (buffer_size != payload_size) { + dev_dbg(dev, "Data size %zu and payload size %zu are different\n", + buffer_size, payload_size); + return -EINVAL; + } + + /* Walk the list of ISP configuration blocks and validate them. */ + buffer_size = buffer->data_size; + while (buffer_size >= sizeof(struct v4l2_isp_params_block_header)) { + const struct v4l2_isp_params_block_info *block_info; + const struct v4l2_isp_params_block_header *block; + + block = (const struct v4l2_isp_params_block_header *) + (buffer->data + block_offset); + + if (block->type >= num_blocks) { + dev_dbg(dev, + "Invalid block type %u at offset %zu\n", + block->type, block_offset); + return -EINVAL; + } + + if (block->size > buffer_size) { + dev_dbg(dev, "Premature end of parameters data\n"); + return -EINVAL; + } + + /* It's invalid to specify both ENABLE and DISABLE. */ + if ((block->flags & (V4L2_ISP_PARAMS_FL_BLOCK_ENABLE | + V4L2_ISP_PARAMS_FL_BLOCK_DISABLE)) == + (V4L2_ISP_PARAMS_FL_BLOCK_ENABLE | + V4L2_ISP_PARAMS_FL_BLOCK_DISABLE)) { + dev_dbg(dev, "Invalid block flags %x at offset %zu\n", + block->flags, block_offset); + return -EINVAL; + } + + /* + * Match the block reported size against the info provided + * one, but allow the block to only contain the header in + * case it is going to be disabled. + */ + block_info = &info[block->type]; + if (block->size != block_info->size && + (!(block->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) || + block->size != sizeof(*block))) { + dev_dbg(dev, + "Invalid block size %u (expected %zu) at offset %zu\n", + block->size, block_info->size, block_offset); + return -EINVAL; + } + + block_offset += block->size; + buffer_size -= block->size; + } + + if (buffer_size) { + dev_dbg(dev, "Unexpected data after the parameters buffer end\n"); + return -EINVAL; + } + + return 0; +} +EXPORT_SYMBOL_GPL(v4l2_isp_params_validate_buffer); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Jacopo Mondi + */ + +#ifndef _V4L2_ISP_H_ +#define _V4L2_ISP_H_ + +#include + +struct device; +struct vb2_buffer; + +/** + * v4l2_isp_params_buffer_size - Calculate size of v4l2_isp_params_buffer + * @max_params_size: The total size of the ISP configuration blocks + * + * Users of the v4l2 extensible parameters will have differing sized data arrays + * depending on their specific parameter buffers. Drivers and userspace will + * need to be able to calculate the appropriate size of the struct to + * accommodate all ISP configuration blocks provided by the platform. + * This macro provides a convenient tool for the calculation. + */ +#define v4l2_isp_params_buffer_size(max_params_size) \ + (offsetof(struct v4l2_isp_params_buffer, data) + (max_params_size)) + +/** + * v4l2_isp_params_validate_buffer_size - Validate a V4L2 ISP buffer sizes + * @dev: the driver's device pointer + * @vb: the videobuf2 buffer + * @max_size: the maximum allowed buffer size + * + * This function performs validation of the size of a V4L2 ISP parameters buffer + * before the driver can access the actual data buffer content. + * + * After the sizes validation, drivers should copy the buffer content to a + * kernel-only memory area to prevent userspace from modifying it, + * before completing validation using v4l2_isp_params_validate_buffer(). + * + * The @vb buffer as received from the vb2 .buf_prepare() operation is checked + * against @max_size and it's validated to be large enough to accommodate at + * least one ISP configuration block. + */ +int v4l2_isp_params_validate_buffer_size(struct device *dev, + struct vb2_buffer *vb, + size_t max_size); + +/** + * struct v4l2_isp_params_block_info - V4L2 ISP per-block info + * @size: the block expected size + * + * The v4l2_isp_params_block_info collects information of the ISP configuration + * blocks for validation purposes. It currently only contains the expected + * block size. + * + * Drivers shall prepare a list of block info, indexed by block type, one for + * each supported ISP block and correctly populate them with the expected block + * size. + */ +struct v4l2_isp_params_block_info { + size_t size; +}; + +/** + * v4l2_isp_params_validate_buffer - Validate a V4L2 ISP parameters buffer + * @dev: the driver's device pointer + * @vb: the videobuf2 buffer + * @buffer: the V4L2 ISP parameters buffer + * @info: the list of per-block validation info + * @num_blocks: the number of blocks + * + * This function completes the validation of a V4L2 ISP parameters buffer, + * verifying each configuration block correctness before the driver can use + * them to program the hardware. + * + * Drivers should use this function after having validated the correctness of + * the vb2 buffer sizes by using the v4l2_isp_params_validate_buffer_size() + * helper first. Once the buffer size has been validated, drivers should + * perform a copy of the user provided buffer into a kernel-only memory buffer + * to prevent userspace from modifying its content after it has been submitted + * to the driver, and then call this function to complete validation. + */ +int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, + const struct v4l2_isp_params_buffer *buffer, + const struct v4l2_isp_params_block_info *info, + size_t num_blocks); + +#endif /* _V4L2_ISP_H_ */ From 3a2730a45020cca8a504a96432d9c7f0ccf9dcf9 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Mon, 7 Jul 2025 10:49:06 +0200 Subject: [PATCH 216/249] media: rkisp1: Use v4l2-isp for validation Convert rkisp1-params.c to use the helpers defined in v4l2-isp.h to perform validation of a ISP parameters buffer. Reviewed-by: Daniel Scally Acked-by: Sakari Ailus Reviewed-by: Laurent Pinchart Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkisp1/Kconfig | 1 + .../platform/rockchip/rkisp1/rkisp1-params.c | 150 +++++------------- 2 files changed, 44 insertions(+), 107 deletions(-) diff --git a/drivers/media/platform/rockchip/rkisp1/Kconfig b/drivers/media/platform/rockchip/rkisp1/Kconfig index 731c9acbf6ef..f53eb1f3f3e7 100644 --- a/drivers/media/platform/rockchip/rkisp1/Kconfig +++ b/drivers/media/platform/rockchip/rkisp1/Kconfig @@ -10,6 +10,7 @@ config VIDEO_ROCKCHIP_ISP1 select VIDEOBUF2_VMALLOC select V4L2_FWNODE select GENERIC_PHY_MIPI_DPHY + select V4L2_ISP default n help Enable this to support the Image Signal Processing (ISP) module diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c index f1585f8fa0f4..2dde0c62c8e6 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c @@ -6,12 +6,14 @@ */ #include +#include #include #include #include #include #include +#include #include #include /* for ISP params */ @@ -2097,122 +2099,132 @@ typedef void (*rkisp1_block_handler)(struct rkisp1_params *params, const union rkisp1_ext_params_config *config); static const struct rkisp1_ext_params_handler { - size_t size; rkisp1_block_handler handler; unsigned int group; unsigned int features; } rkisp1_ext_params_handlers[] = { [RKISP1_EXT_PARAMS_BLOCK_TYPE_BLS] = { - .size = sizeof(struct rkisp1_ext_params_bls_config), .handler = rkisp1_ext_params_bls, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, .features = RKISP1_FEATURE_BLS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_DPCC] = { - .size = sizeof(struct rkisp1_ext_params_dpcc_config), .handler = rkisp1_ext_params_dpcc, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_SDG] = { - .size = sizeof(struct rkisp1_ext_params_sdg_config), .handler = rkisp1_ext_params_sdg, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_GAIN] = { - .size = sizeof(struct rkisp1_ext_params_awb_gain_config), .handler = rkisp1_ext_params_awbg, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_FLT] = { - .size = sizeof(struct rkisp1_ext_params_flt_config), .handler = rkisp1_ext_params_flt, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_BDM] = { - .size = sizeof(struct rkisp1_ext_params_bdm_config), .handler = rkisp1_ext_params_bdm, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_CTK] = { - .size = sizeof(struct rkisp1_ext_params_ctk_config), .handler = rkisp1_ext_params_ctk, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_GOC] = { - .size = sizeof(struct rkisp1_ext_params_goc_config), .handler = rkisp1_ext_params_goc, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_DPF] = { - .size = sizeof(struct rkisp1_ext_params_dpf_config), .handler = rkisp1_ext_params_dpf, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_DPF_STRENGTH] = { - .size = sizeof(struct rkisp1_ext_params_dpf_strength_config), .handler = rkisp1_ext_params_dpfs, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_CPROC] = { - .size = sizeof(struct rkisp1_ext_params_cproc_config), .handler = rkisp1_ext_params_cproc, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_IE] = { - .size = sizeof(struct rkisp1_ext_params_ie_config), .handler = rkisp1_ext_params_ie, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_LSC] = { - .size = sizeof(struct rkisp1_ext_params_lsc_config), .handler = rkisp1_ext_params_lsc, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_LSC, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_AWB_MEAS] = { - .size = sizeof(struct rkisp1_ext_params_awb_meas_config), .handler = rkisp1_ext_params_awbm, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_HST_MEAS] = { - .size = sizeof(struct rkisp1_ext_params_hst_config), .handler = rkisp1_ext_params_hstm, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_AEC_MEAS] = { - .size = sizeof(struct rkisp1_ext_params_aec_config), .handler = rkisp1_ext_params_aecm, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_AFC_MEAS] = { - .size = sizeof(struct rkisp1_ext_params_afc_config), .handler = rkisp1_ext_params_afcm, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_COMPAND_BLS] = { - .size = sizeof(struct rkisp1_ext_params_compand_bls_config), .handler = rkisp1_ext_params_compand_bls, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, .features = RKISP1_FEATURE_COMPAND, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_COMPAND_EXPAND] = { - .size = sizeof(struct rkisp1_ext_params_compand_curve_config), .handler = rkisp1_ext_params_compand_expand, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, .features = RKISP1_FEATURE_COMPAND, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_COMPAND_COMPRESS] = { - .size = sizeof(struct rkisp1_ext_params_compand_curve_config), .handler = rkisp1_ext_params_compand_compress, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, .features = RKISP1_FEATURE_COMPAND, }, [RKISP1_EXT_PARAMS_BLOCK_TYPE_WDR] = { - .size = sizeof(struct rkisp1_ext_params_wdr_config), .handler = rkisp1_ext_params_wdr, .group = RKISP1_EXT_PARAMS_BLOCK_GROUP_OTHERS, }, }; +#define RKISP1_PARAMS_BLOCK_INFO(block, data) \ + [RKISP1_EXT_PARAMS_BLOCK_TYPE_ ## block] = { \ + .size = sizeof(struct rkisp1_ext_params_ ## data ## _config), \ + } + +static const struct v4l2_isp_params_block_info rkisp1_ext_params_blocks_info[] = { + RKISP1_PARAMS_BLOCK_INFO(BLS, bls), + RKISP1_PARAMS_BLOCK_INFO(DPCC, dpcc), + RKISP1_PARAMS_BLOCK_INFO(SDG, sdg), + RKISP1_PARAMS_BLOCK_INFO(AWB_GAIN, awb_gain), + RKISP1_PARAMS_BLOCK_INFO(FLT, flt), + RKISP1_PARAMS_BLOCK_INFO(BDM, bdm), + RKISP1_PARAMS_BLOCK_INFO(CTK, ctk), + RKISP1_PARAMS_BLOCK_INFO(GOC, goc), + RKISP1_PARAMS_BLOCK_INFO(DPF, dpf), + RKISP1_PARAMS_BLOCK_INFO(DPF_STRENGTH, dpf_strength), + RKISP1_PARAMS_BLOCK_INFO(CPROC, cproc), + RKISP1_PARAMS_BLOCK_INFO(IE, ie), + RKISP1_PARAMS_BLOCK_INFO(LSC, lsc), + RKISP1_PARAMS_BLOCK_INFO(AWB_MEAS, awb_meas), + RKISP1_PARAMS_BLOCK_INFO(HST_MEAS, hst), + RKISP1_PARAMS_BLOCK_INFO(AEC_MEAS, aec), + RKISP1_PARAMS_BLOCK_INFO(AFC_MEAS, afc), + RKISP1_PARAMS_BLOCK_INFO(COMPAND_BLS, compand_bls), + RKISP1_PARAMS_BLOCK_INFO(COMPAND_EXPAND, compand_curve), + RKISP1_PARAMS_BLOCK_INFO(COMPAND_COMPRESS, compand_curve), + RKISP1_PARAMS_BLOCK_INFO(WDR, wdr), +}; + +static_assert(ARRAY_SIZE(rkisp1_ext_params_handlers) == + ARRAY_SIZE(rkisp1_ext_params_blocks_info)); + static void rkisp1_ext_params_config(struct rkisp1_params *params, struct rkisp1_ext_params_cfg *cfg, u32 block_group_mask) @@ -2646,31 +2658,16 @@ static int rkisp1_params_prepare_ext_params(struct rkisp1_params *params, { struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); struct rkisp1_params_buffer *params_buf = to_rkisp1_params_buffer(vbuf); - size_t header_size = offsetof(struct rkisp1_ext_params_cfg, data); struct rkisp1_ext_params_cfg *cfg = params_buf->cfg; size_t payload_size = vb2_get_plane_payload(vb, 0); struct rkisp1_ext_params_cfg *usr_cfg = vb2_plane_vaddr(&vbuf->vb2_buf, 0); - size_t block_offset = 0; - size_t cfg_size; + int ret; - /* - * Validate the buffer payload size before copying the parameters. The - * payload has to be smaller than the destination buffer size and larger - * than the header size. - */ - if (payload_size > params->metafmt->buffersize) { - dev_dbg(params->rkisp1->dev, - "Too large buffer payload size %zu\n", payload_size); - return -EINVAL; - } - - if (payload_size < header_size) { - dev_dbg(params->rkisp1->dev, - "Buffer payload %zu smaller than header size %zu\n", - payload_size, header_size); - return -EINVAL; - } + ret = v4l2_isp_params_validate_buffer_size(params->rkisp1->dev, vb, + params->metafmt->buffersize); + if (ret) + return ret; /* * Copy the parameters buffer to the internal scratch buffer to avoid @@ -2678,71 +2675,10 @@ static int rkisp1_params_prepare_ext_params(struct rkisp1_params *params, */ memcpy(cfg, usr_cfg, payload_size); - /* Only v1 is supported at the moment. */ - if (cfg->version != RKISP1_EXT_PARAM_BUFFER_V1) { - dev_dbg(params->rkisp1->dev, - "Unsupported extensible format version: %u\n", - cfg->version); - return -EINVAL; - } - - /* Validate the size reported in the parameters buffer header. */ - cfg_size = header_size + cfg->data_size; - if (cfg_size != payload_size) { - dev_dbg(params->rkisp1->dev, - "Data size %zu different than buffer payload size %zu\n", - cfg_size, payload_size); - return -EINVAL; - } - - /* Walk the list of parameter blocks and validate them. */ - cfg_size = cfg->data_size; - while (cfg_size >= sizeof(struct rkisp1_ext_params_block_header)) { - const struct rkisp1_ext_params_block_header *block; - const struct rkisp1_ext_params_handler *handler; - - block = (const struct rkisp1_ext_params_block_header *) - &cfg->data[block_offset]; - - if (block->type >= ARRAY_SIZE(rkisp1_ext_params_handlers)) { - dev_dbg(params->rkisp1->dev, - "Invalid parameters block type\n"); - return -EINVAL; - } - - if (block->size > cfg_size) { - dev_dbg(params->rkisp1->dev, - "Premature end of parameters data\n"); - return -EINVAL; - } - - if ((block->flags & (RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE | - RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE)) == - (RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE | - RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE)) { - dev_dbg(params->rkisp1->dev, - "Invalid parameters block flags\n"); - return -EINVAL; - } - - handler = &rkisp1_ext_params_handlers[block->type]; - if (block->size != handler->size) { - dev_dbg(params->rkisp1->dev, - "Invalid parameters block size\n"); - return -EINVAL; - } - - block_offset += block->size; - cfg_size -= block->size; - } - - if (cfg_size) { - dev_dbg(params->rkisp1->dev, - "Unexpected data after the parameters buffer end\n"); - return -EINVAL; - } - - return 0; + return v4l2_isp_params_validate_buffer(params->rkisp1->dev, vb, + (struct v4l2_isp_params_buffer *)cfg, + rkisp1_ext_params_blocks_info, + ARRAY_SIZE(rkisp1_ext_params_blocks_info)); } static int rkisp1_params_vb2_buf_prepare(struct vb2_buffer *vb) From 9f7d23d558c745794cf355201afde9a0bb91ba3e Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Mon, 7 Jul 2025 16:39:53 +0200 Subject: [PATCH 217/249] media: amlogic-c3: Use v4l2-isp for validation Convert c3-isp-params.c to use the helpers defined in v4l2-isp.h to perform validation of a ISP parameters buffer. Reviewed-by: Keke Li Reviewed-by: Daniel Scally Acked-by: Sakari Ailus Reviewed-by: Laurent Pinchart Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- drivers/media/platform/amlogic/c3/isp/Kconfig | 1 + .../platform/amlogic/c3/isp/c3-isp-params.c | 165 +++++------------- 2 files changed, 44 insertions(+), 122 deletions(-) diff --git a/drivers/media/platform/amlogic/c3/isp/Kconfig b/drivers/media/platform/amlogic/c3/isp/Kconfig index 02c62a50a5e8..809208cd7e3a 100644 --- a/drivers/media/platform/amlogic/c3/isp/Kconfig +++ b/drivers/media/platform/amlogic/c3/isp/Kconfig @@ -10,6 +10,7 @@ config VIDEO_C3_ISP select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC + select V4L2_ISP help Video4Linux2 driver for Amlogic C3 ISP pipeline. The C3 ISP is used for processing raw images and diff --git a/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c b/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c index c80667dd7662..c2339d6dc107 100644 --- a/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c +++ b/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c @@ -3,11 +3,13 @@ * Copyright (C) 2024 Amlogic, Inc. All rights reserved */ +#include #include #include #include #include +#include #include #include @@ -51,11 +53,6 @@ union c3_isp_params_block { typedef void (*c3_isp_block_handler)(struct c3_isp_device *isp, const union c3_isp_params_block *block); -struct c3_isp_params_handler { - size_t size; - c3_isp_block_handler handler; -}; - #define to_c3_isp_params_buffer(vbuf) \ container_of(vbuf, struct c3_isp_params_buffer, vb) @@ -523,41 +520,36 @@ static void c3_isp_params_cfg_blc(struct c3_isp_device *isp, ISP_TOP_BEO_CTRL_BLC_EN); } -static const struct c3_isp_params_handler c3_isp_params_handlers[] = { - [C3_ISP_PARAMS_BLOCK_AWB_GAINS] = { - .size = sizeof(struct c3_isp_params_awb_gains), - .handler = c3_isp_params_cfg_awb_gains, - }, - [C3_ISP_PARAMS_BLOCK_AWB_CONFIG] = { - .size = sizeof(struct c3_isp_params_awb_config), - .handler = c3_isp_params_cfg_awb_config, - }, - [C3_ISP_PARAMS_BLOCK_AE_CONFIG] = { - .size = sizeof(struct c3_isp_params_ae_config), - .handler = c3_isp_params_cfg_ae_config, - }, - [C3_ISP_PARAMS_BLOCK_AF_CONFIG] = { - .size = sizeof(struct c3_isp_params_af_config), - .handler = c3_isp_params_cfg_af_config, - }, - [C3_ISP_PARAMS_BLOCK_PST_GAMMA] = { - .size = sizeof(struct c3_isp_params_pst_gamma), - .handler = c3_isp_params_cfg_pst_gamma, - }, - [C3_ISP_PARAMS_BLOCK_CCM] = { - .size = sizeof(struct c3_isp_params_ccm), - .handler = c3_isp_params_cfg_ccm, - }, - [C3_ISP_PARAMS_BLOCK_CSC] = { - .size = sizeof(struct c3_isp_params_csc), - .handler = c3_isp_params_cfg_csc, - }, - [C3_ISP_PARAMS_BLOCK_BLC] = { - .size = sizeof(struct c3_isp_params_blc), - .handler = c3_isp_params_cfg_blc, - }, +static const c3_isp_block_handler c3_isp_params_handlers[] = { + [C3_ISP_PARAMS_BLOCK_AWB_GAINS] = c3_isp_params_cfg_awb_gains, + [C3_ISP_PARAMS_BLOCK_AWB_CONFIG] = c3_isp_params_cfg_awb_config, + [C3_ISP_PARAMS_BLOCK_AE_CONFIG] = c3_isp_params_cfg_ae_config, + [C3_ISP_PARAMS_BLOCK_AF_CONFIG] = c3_isp_params_cfg_af_config, + [C3_ISP_PARAMS_BLOCK_PST_GAMMA] = c3_isp_params_cfg_pst_gamma, + [C3_ISP_PARAMS_BLOCK_CCM] = c3_isp_params_cfg_ccm, + [C3_ISP_PARAMS_BLOCK_CSC] = c3_isp_params_cfg_csc, + [C3_ISP_PARAMS_BLOCK_BLC] = c3_isp_params_cfg_blc, }; +#define C3_ISP_PARAMS_BLOCK_INFO(block, data) \ + [C3_ISP_PARAMS_BLOCK_ ## block] = { \ + .size = sizeof(struct c3_isp_params_ ## data), \ + } + +static const struct v4l2_isp_params_block_info c3_isp_params_blocks_info[] = { + C3_ISP_PARAMS_BLOCK_INFO(AWB_GAINS, awb_gains), + C3_ISP_PARAMS_BLOCK_INFO(AWB_CONFIG, awb_config), + C3_ISP_PARAMS_BLOCK_INFO(AE_CONFIG, ae_config), + C3_ISP_PARAMS_BLOCK_INFO(AF_CONFIG, af_config), + C3_ISP_PARAMS_BLOCK_INFO(PST_GAMMA, pst_gamma), + C3_ISP_PARAMS_BLOCK_INFO(CCM, ccm), + C3_ISP_PARAMS_BLOCK_INFO(CSC, csc), + C3_ISP_PARAMS_BLOCK_INFO(BLC, blc), +}; + +static_assert(ARRAY_SIZE(c3_isp_params_handlers) == + ARRAY_SIZE(c3_isp_params_blocks_info)); + static void c3_isp_params_cfg_blocks(struct c3_isp_params *params) { struct c3_isp_params_cfg *config = params->buff->cfg; @@ -568,14 +560,14 @@ static void c3_isp_params_cfg_blocks(struct c3_isp_params *params) /* Walk the list of parameter blocks and process them */ while (block_offset < config->data_size) { - const struct c3_isp_params_handler *block_handler; const union c3_isp_params_block *block; + c3_isp_block_handler block_handler; block = (const union c3_isp_params_block *) &config->data[block_offset]; - block_handler = &c3_isp_params_handlers[block->header.type]; - block_handler->handler(params->isp, block); + block_handler = c3_isp_params_handlers[block->header.type]; + block_handler(params->isp, block); block_offset += block->header.size; } @@ -771,26 +763,15 @@ static int c3_isp_params_vb2_buf_prepare(struct vb2_buffer *vb) struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); struct c3_isp_params_buffer *buf = to_c3_isp_params_buffer(vbuf); struct c3_isp_params *params = vb2_get_drv_priv(vb->vb2_queue); - struct c3_isp_params_cfg *cfg = buf->cfg; struct c3_isp_params_cfg *usr_cfg = vb2_plane_vaddr(vb, 0); size_t payload_size = vb2_get_plane_payload(vb, 0); - size_t header_size = offsetof(struct c3_isp_params_cfg, data); - size_t block_offset = 0; - size_t cfg_size; + struct c3_isp_params_cfg *cfg = buf->cfg; + int ret; - /* Payload size can't be greater than the destination buffer size */ - if (payload_size > params->vfmt.fmt.meta.buffersize) { - dev_dbg(params->isp->dev, - "Payload size is too large: %zu\n", payload_size); - return -EINVAL; - } - - /* Payload size can't be smaller than the header size */ - if (payload_size < header_size) { - dev_dbg(params->isp->dev, - "Payload size is too small: %zu\n", payload_size); - return -EINVAL; - } + ret = v4l2_isp_params_validate_buffer_size(params->isp->dev, vb, + params->vfmt.fmt.meta.buffersize); + if (ret) + return ret; /* * Use the internal scratch buffer to avoid userspace modifying @@ -798,70 +779,10 @@ static int c3_isp_params_vb2_buf_prepare(struct vb2_buffer *vb) */ memcpy(cfg, usr_cfg, payload_size); - /* Only v0 is supported at the moment */ - if (cfg->version != C3_ISP_PARAMS_BUFFER_V0) { - dev_dbg(params->isp->dev, - "Invalid params buffer version: %u\n", cfg->version); - return -EINVAL; - } - - /* Validate the size reported in the parameter buffer header */ - cfg_size = header_size + cfg->data_size; - if (cfg_size != payload_size) { - dev_dbg(params->isp->dev, - "Data size %zu and payload size %zu are different\n", - cfg_size, payload_size); - return -EINVAL; - } - - /* Walk the list of parameter blocks and validate them */ - cfg_size = cfg->data_size; - while (cfg_size >= sizeof(struct c3_isp_params_block_header)) { - const struct c3_isp_params_block_header *block; - const struct c3_isp_params_handler *handler; - - block = (struct c3_isp_params_block_header *) - &cfg->data[block_offset]; - - if (block->type >= ARRAY_SIZE(c3_isp_params_handlers)) { - dev_dbg(params->isp->dev, - "Invalid params block type\n"); - return -EINVAL; - } - - if (block->size > cfg_size) { - dev_dbg(params->isp->dev, - "Block size is greater than cfg size\n"); - return -EINVAL; - } - - if ((block->flags & (C3_ISP_PARAMS_BLOCK_FL_ENABLE | - C3_ISP_PARAMS_BLOCK_FL_DISABLE)) == - (C3_ISP_PARAMS_BLOCK_FL_ENABLE | - C3_ISP_PARAMS_BLOCK_FL_DISABLE)) { - dev_dbg(params->isp->dev, - "Invalid parameters block flags\n"); - return -EINVAL; - } - - handler = &c3_isp_params_handlers[block->type]; - if (block->size != handler->size) { - dev_dbg(params->isp->dev, - "Invalid params block size\n"); - return -EINVAL; - } - - block_offset += block->size; - cfg_size -= block->size; - } - - if (cfg_size) { - dev_dbg(params->isp->dev, - "Unexpected data after the params buffer end\n"); - return -EINVAL; - } - - return 0; + return v4l2_isp_params_validate_buffer(params->isp->dev, vb, + (struct v4l2_isp_params_buffer *)cfg, + c3_isp_params_blocks_info, + ARRAY_SIZE(c3_isp_params_blocks_info)); } static int c3_isp_params_vb2_buf_init(struct vb2_buffer *vb) From 76799be6eb56e7f95d2d6aeebab7c7ec94b12f85 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Mon, 7 Jul 2025 17:55:35 +0200 Subject: [PATCH 218/249] media: Documentation: kapi: Add v4l2 generic ISP support Add to the driver-api documentation the v4l2-isp.h types and helpers documentation. Reviewed-by: Daniel Scally Reviewed-by: Michael Riesch Acked-by: Sakari Ailus Reviewed-by: Laurent Pinchart Tested-by: Lad Prabhakar Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- Documentation/driver-api/media/v4l2-core.rst | 1 + Documentation/driver-api/media/v4l2-isp.rst | 49 ++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 51 insertions(+) create mode 100644 Documentation/driver-api/media/v4l2-isp.rst diff --git a/Documentation/driver-api/media/v4l2-core.rst b/Documentation/driver-api/media/v4l2-core.rst index ad987c34ad2a..a5f5102c64cc 100644 --- a/Documentation/driver-api/media/v4l2-core.rst +++ b/Documentation/driver-api/media/v4l2-core.rst @@ -27,3 +27,4 @@ Video4Linux devices v4l2-common v4l2-tveeprom v4l2-jpeg + v4l2-isp diff --git a/Documentation/driver-api/media/v4l2-isp.rst b/Documentation/driver-api/media/v4l2-isp.rst new file mode 100644 index 000000000000..618ae614ff79 --- /dev/null +++ b/Documentation/driver-api/media/v4l2-isp.rst @@ -0,0 +1,49 @@ +.. SPDX-License-Identifier: GPL-2.0 + +V4L2 generic ISP parameters and statistics support +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Design rationale +================ + +ISP configuration parameters and statistics are processed and collected by +drivers and exchanged with userspace through data types that usually +reflect the ISP peripheral registers layout. + +Each ISP driver defines its own metadata output format for parameters and +a metadata capture format for statistics. The buffer layout is realized by a +set of C structures that reflects the registers layout. The number and types +of C structures is fixed by the format definition and becomes part of the Linux +kernel uAPI/uABI interface. + +Because of the hard requirement of backward compatibility when extending the +user API/ABI interface, modifying an ISP driver capture or output metadata +format after it has been accepted by mainline is very hard if not impossible. + +It generally happens, in fact, that after the first accepted revision of an ISP +driver the buffers layout need to be modified, either to support new hardware +blocks, to fix bugs or to support different revisions of the hardware. + +Each of these situations would require defining a new metadata format, making it +really hard to maintain and extend drivers and requiring userspace to use +the correct format depending on the kernel revision in use. + +V4L2 ISP configuration parameters +================================= + +For these reasons, Video4Linux2 defines generic types for ISP configuration +parameters and statistics. Drivers are still expected to define their own +formats for their metadata output and capture nodes, but the buffers layout can +be defined using the extensible and versioned types defined by +include/uapi/linux/media/v4l2-isp.h. + +Drivers are expected to provide the definitions of their supported ISP blocks +and the expected maximum size of a buffer. + +For driver developers a set of helper functions to assist them with validation +of the buffer received from userspace is available in +drivers/media/v4l2-core/v4l2-isp.c + +V4L2 ISP support driver documentation +===================================== +.. kernel-doc:: include/media/v4l2-isp.h diff --git a/MAINTAINERS b/MAINTAINERS index e4c8b2d533bd..ebe6e75b1a2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26889,6 +26889,7 @@ V4L2 GENERIC ISP PARAMETERS AND STATISTIC FORMATS M: Jacopo Mondi L: linux-media@vger.kernel.org S: Maintained +F: Documentation/driver-api/media/v4l2-isp.rst F: Documentation/userspace-api/media/v4l/v4l2-isp.rst F: drivers/media/v4l2-core/v4l2-isp.c F: include/media/v4l2-isp.h From ec4ac3cb7198070611987a6e91829fce0f4ce6d0 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:45 +0000 Subject: [PATCH 219/249] media: uapi: Add MEDIA_BUS_FMT_RGB202020_1X60 format code The Mali-C55 ISP by ARM requires 20-bits per colour channel input on the bus. Add a new media bus format code to represent it. Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- .../media/v4l/subdev-formats.rst | 168 ++++++++++++++++++ include/uapi/linux/media-bus-format.h | 3 +- 2 files changed, 170 insertions(+), 1 deletion(-) diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst b/Documentation/userspace-api/media/v4l/subdev-formats.rst index 1904390df830..894592e15a2b 100644 --- a/Documentation/userspace-api/media/v4l/subdev-formats.rst +++ b/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -2225,6 +2225,174 @@ The following table list existing packed 48bit wide RGB formats. \endgroup +The following table list existing packed 60bit wide RGB formats. + +.. tabularcolumns:: |p{4.0cm}|p{0.7cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}| + +.. _v4l2-mbus-pixelcode-rgb-60: + +.. raw:: latex + + \begingroup + \tiny + \setlength{\tabcolsep}{2pt} + +.. flat-table:: 60bit RGB formats + :header-rows: 3 + :stub-columns: 0 + :widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 + + * - Identifier + - Code + - + - :cspan:`31` Data organization + * - + - + - Bit + - + - + - + - + - 59 + - 58 + - 57 + - 56 + - 55 + - 54 + - 53 + - 52 + - 51 + - 50 + - 49 + - 48 + - 47 + - 46 + - 45 + - 44 + - 43 + - 42 + - 41 + - 40 + - 39 + - 38 + - 37 + - 36 + - 35 + - 34 + - 33 + - 32 + * - + - + - + - 31 + - 30 + - 29 + - 28 + - 27 + - 26 + - 25 + - 24 + - 23 + - 22 + - 21 + - 20 + - 19 + - 18 + - 17 + - 16 + - 15 + - 14 + - 13 + - 12 + - 11 + - 10 + - 9 + - 8 + - 7 + - 6 + - 5 + - 4 + - 3 + - 2 + - 1 + - 0 + * .. _MEDIA-BUS-FMT-RGB202020-1X60: + + - MEDIA_BUS_FMT_RGB202020_1X60 + - 0x1026 + - + - + - + - + - + - r\ :sub:`19` + - r\ :sub:`18` + - r\ :sub:`17` + - r\ :sub:`16` + - r\ :sub:`15` + - r\ :sub:`14` + - r\ :sub:`13` + - r\ :sub:`12` + - r\ :sub:`11` + - r\ :sub:`10` + - r\ :sub:`9` + - r\ :sub:`8` + - r\ :sub:`7` + - r\ :sub:`6` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + - g\ :sub:`19` + - g\ :sub:`18` + - g\ :sub:`17` + - g\ :sub:`16` + - g\ :sub:`15` + - g\ :sub:`14` + - g\ :sub:`13` + - g\ :sub:`12` + * - + - + - + - g\ :sub:`11` + - g\ :sub:`10` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + - b\ :sub:`19` + - b\ :sub:`18` + - b\ :sub:`17` + - b\ :sub:`16` + - b\ :sub:`15` + - b\ :sub:`14` + - b\ :sub:`13` + - b\ :sub:`12` + - b\ :sub:`11` + - b\ :sub:`10` + - b\ :sub:`9` + - b\ :sub:`8` + - b\ :sub:`7` + - b\ :sub:`6` + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + +.. raw:: latex + + \endgroup + On LVDS buses, usually each sample is transferred serialized in seven time slots per pixel clock, on three (18-bit) or four (24-bit) or five (30-bit) differential data pairs at the same time. The remaining bits are used diff --git a/include/uapi/linux/media-bus-format.h b/include/uapi/linux/media-bus-format.h index ff62056feed5..62ad82fd285a 100644 --- a/include/uapi/linux/media-bus-format.h +++ b/include/uapi/linux/media-bus-format.h @@ -34,7 +34,7 @@ #define MEDIA_BUS_FMT_FIXED 0x0001 -/* RGB - next is 0x1028 */ +/* RGB - next is 0x1029 */ #define MEDIA_BUS_FMT_RGB444_1X12 0x1016 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001 #define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002 @@ -74,6 +74,7 @@ #define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021 #define MEDIA_BUS_FMT_RGB121212_1X36 0x1019 #define MEDIA_BUS_FMT_RGB161616_1X48 0x101a +#define MEDIA_BUS_FMT_RGB202020_1X60 0x1028 /* YUV (including grey) - next is 0x202f */ #define MEDIA_BUS_FMT_Y8_1X8 0x2001 From 2477ab037621632c3ec167187dc9e7afac2ba7f2 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:46 +0000 Subject: [PATCH 220/249] media: uapi: Add 20-bit bayer formats The Mali-C55 requires input data be in 20-bit format, MSB aligned. Add some new media bus format macros to represent that input format. Reviewed-by: Lad Prabhakar Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- .../media/v4l/subdev-formats.rst | 252 +++++++++++++++++- include/uapi/linux/media-bus-format.h | 6 +- 2 files changed, 255 insertions(+), 3 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/subdev-formats.rst b/Documentation/userspace-api/media/v4l/subdev-formats.rst index 894592e15a2b..cf970750dd4c 100644 --- a/Documentation/userspace-api/media/v4l/subdev-formats.rst +++ b/Documentation/userspace-api/media/v4l/subdev-formats.rst @@ -2817,7 +2817,7 @@ organization is given as an example for the first pixel only. \tiny \setlength{\tabcolsep}{2pt} -.. tabularcolumns:: |p{6.0cm}|p{0.7cm}|p{0.3cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}| +.. tabularcolumns:: |p{6.0cm}|p{0.7cm}|p{0.3cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}|p{0.22cm}| .. _v4l2-mbus-pixelcode-bayer: @@ -2830,10 +2830,14 @@ organization is given as an example for the first pixel only. * - Identifier - Code - - - :cspan:`15` Data organization + - :cspan:`19` Data organization * - - - Bit + - 19 + - 18 + - 17 + - 16 - 15 - 14 - 13 @@ -2863,6 +2867,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`7` - b\ :sub:`6` - b\ :sub:`5` @@ -2884,6 +2892,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -2905,6 +2917,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -2926,6 +2942,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`7` - r\ :sub:`6` - r\ :sub:`5` @@ -2947,6 +2967,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`7` - b\ :sub:`6` - b\ :sub:`5` @@ -2968,6 +2992,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -2989,6 +3017,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -3010,6 +3042,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`7` - r\ :sub:`6` - r\ :sub:`5` @@ -3031,6 +3067,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`7` - b\ :sub:`6` - b\ :sub:`5` @@ -3052,6 +3092,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -3073,6 +3117,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`7` - g\ :sub:`6` - g\ :sub:`5` @@ -3094,6 +3142,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`7` - r\ :sub:`6` - r\ :sub:`5` @@ -3115,6 +3167,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - 0 - 0 - 0 @@ -3134,6 +3190,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`7` - b\ :sub:`6` - b\ :sub:`5` @@ -3155,6 +3215,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`7` - b\ :sub:`6` - b\ :sub:`5` @@ -3174,6 +3238,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - 0 - 0 - 0 @@ -3195,6 +3263,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`9` - b\ :sub:`8` - b\ :sub:`7` @@ -3214,6 +3286,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`1` - b\ :sub:`0` - 0 @@ -3235,6 +3311,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`1` - b\ :sub:`0` - 0 @@ -3254,6 +3334,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`9` - b\ :sub:`8` - b\ :sub:`7` @@ -3273,6 +3357,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`9` - b\ :sub:`8` - b\ :sub:`7` @@ -3294,6 +3382,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`9` - g\ :sub:`8` - g\ :sub:`7` @@ -3315,6 +3407,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`9` - g\ :sub:`8` - g\ :sub:`7` @@ -3336,6 +3432,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`9` - r\ :sub:`8` - r\ :sub:`7` @@ -3355,6 +3455,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`11` - b\ :sub:`10` - b\ :sub:`9` @@ -3376,6 +3480,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`11` - g\ :sub:`10` - g\ :sub:`9` @@ -3397,6 +3505,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`11` - g\ :sub:`10` - g\ :sub:`9` @@ -3418,6 +3530,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`11` - r\ :sub:`10` - r\ :sub:`9` @@ -3437,6 +3553,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - b\ :sub:`13` - b\ :sub:`12` - b\ :sub:`11` @@ -3458,6 +3578,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`13` - g\ :sub:`12` - g\ :sub:`11` @@ -3479,6 +3603,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - g\ :sub:`13` - g\ :sub:`12` - g\ :sub:`11` @@ -3500,6 +3628,10 @@ organization is given as an example for the first pixel only. - - - + - + - + - + - - r\ :sub:`13` - r\ :sub:`12` - r\ :sub:`11` @@ -3519,6 +3651,10 @@ organization is given as an example for the first pixel only. - MEDIA_BUS_FMT_SBGGR16_1X16 - 0x301d - + - + - + - + - - b\ :sub:`15` - b\ :sub:`14` - b\ :sub:`13` @@ -3540,6 +3676,10 @@ organization is given as an example for the first pixel only. - MEDIA_BUS_FMT_SGBRG16_1X16 - 0x301e - + - + - + - + - - g\ :sub:`15` - g\ :sub:`14` - g\ :sub:`13` @@ -3561,6 +3701,10 @@ organization is given as an example for the first pixel only. - MEDIA_BUS_FMT_SGRBG16_1X16 - 0x301f - + - + - + - + - - g\ :sub:`15` - g\ :sub:`14` - g\ :sub:`13` @@ -3582,6 +3726,110 @@ organization is given as an example for the first pixel only. - MEDIA_BUS_FMT_SRGGB16_1X16 - 0x3020 - + - + - + - + - + - r\ :sub:`15` + - r\ :sub:`14` + - r\ :sub:`13` + - r\ :sub:`12` + - r\ :sub:`11` + - r\ :sub:`10` + - r\ :sub:`9` + - r\ :sub:`8` + - r\ :sub:`7` + - r\ :sub:`6` + - r\ :sub:`5` + - r\ :sub:`4` + - r\ :sub:`3` + - r\ :sub:`2` + - r\ :sub:`1` + - r\ :sub:`0` + * .. _MEDIA-BUS-FMT-SBGGR20-1X20: + + - MEDIA_BUS_FMT_SBGGR20_1X20 + - 0x3021 + - + - b\ :sub:`19` + - b\ :sub:`18` + - b\ :sub:`17` + - b\ :sub:`16` + - b\ :sub:`15` + - b\ :sub:`14` + - b\ :sub:`13` + - b\ :sub:`12` + - b\ :sub:`11` + - b\ :sub:`10` + - b\ :sub:`9` + - b\ :sub:`8` + - b\ :sub:`7` + - b\ :sub:`6` + - b\ :sub:`5` + - b\ :sub:`4` + - b\ :sub:`3` + - b\ :sub:`2` + - b\ :sub:`1` + - b\ :sub:`0` + * .. _MEDIA-BUS-FMT-SGBRG20-1X20: + + - MEDIA_BUS_FMT_SGBRG20_1X20 + - 0x3022 + - + - g\ :sub:`19` + - g\ :sub:`18` + - g\ :sub:`17` + - g\ :sub:`16` + - g\ :sub:`15` + - g\ :sub:`14` + - g\ :sub:`13` + - g\ :sub:`12` + - g\ :sub:`11` + - g\ :sub:`10` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + * .. _MEDIA-BUS-FMT-SGRBG20-1X20: + + - MEDIA_BUS_FMT_SGRBG20_1X20 + - 0x3023 + - + - g\ :sub:`19` + - g\ :sub:`18` + - g\ :sub:`17` + - g\ :sub:`16` + - g\ :sub:`15` + - g\ :sub:`14` + - g\ :sub:`13` + - g\ :sub:`12` + - g\ :sub:`11` + - g\ :sub:`10` + - g\ :sub:`9` + - g\ :sub:`8` + - g\ :sub:`7` + - g\ :sub:`6` + - g\ :sub:`5` + - g\ :sub:`4` + - g\ :sub:`3` + - g\ :sub:`2` + - g\ :sub:`1` + - g\ :sub:`0` + * .. _MEDIA-BUS-FMT-SRGGB20-1X20: + + - MEDIA_BUS_FMT_SRGGB20_1X20 + - 0x3024 + - + - r\ :sub:`19` + - r\ :sub:`18` + - r\ :sub:`17` + - r\ :sub:`16` - r\ :sub:`15` - r\ :sub:`14` - r\ :sub:`13` diff --git a/include/uapi/linux/media-bus-format.h b/include/uapi/linux/media-bus-format.h index 62ad82fd285a..6005f033e62c 100644 --- a/include/uapi/linux/media-bus-format.h +++ b/include/uapi/linux/media-bus-format.h @@ -124,7 +124,7 @@ #define MEDIA_BUS_FMT_YUV16_1X48 0x202a #define MEDIA_BUS_FMT_UYYVYY16_0_5X48 0x202b -/* Bayer - next is 0x3021 */ +/* Bayer - next is 0x3025 */ #define MEDIA_BUS_FMT_SBGGR8_1X8 0x3001 #define MEDIA_BUS_FMT_SGBRG8_1X8 0x3013 #define MEDIA_BUS_FMT_SGRBG8_1X8 0x3002 @@ -157,6 +157,10 @@ #define MEDIA_BUS_FMT_SGBRG16_1X16 0x301e #define MEDIA_BUS_FMT_SGRBG16_1X16 0x301f #define MEDIA_BUS_FMT_SRGGB16_1X16 0x3020 +#define MEDIA_BUS_FMT_SBGGR20_1X20 0x3021 +#define MEDIA_BUS_FMT_SGBRG20_1X20 0x3022 +#define MEDIA_BUS_FMT_SGRBG20_1X20 0x3023 +#define MEDIA_BUS_FMT_SRGGB20_1X20 0x3024 /* JPEG compressed formats - next is 0x4002 */ #define MEDIA_BUS_FMT_JPEG_1X8 0x4001 From 3743764750fb0122622c277ce1b6770d25e43929 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:47 +0000 Subject: [PATCH 221/249] dt-bindings: media: Add bindings for ARM mali-c55 Add the yaml binding for ARM's Mali-C55 Image Signal Processor. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Reviewed-by: Krzysztof Kozlowski Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- .../bindings/media/arm,mali-c55.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/arm,mali-c55.yaml diff --git a/Documentation/devicetree/bindings/media/arm,mali-c55.yaml b/Documentation/devicetree/bindings/media/arm,mali-c55.yaml new file mode 100644 index 000000000000..fc4fcd19922a --- /dev/null +++ b/Documentation/devicetree/bindings/media/arm,mali-c55.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/arm,mali-c55.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali-C55 Image Signal Processor + +maintainers: + - Daniel Scally + - Jacopo Mondi + +properties: + compatible: + const: arm,mali-c55 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ISP Video Clock + - description: ISP AXI clock + - description: ISP AHB-lite clock + + clock-names: + items: + - const: vclk + - const: aclk + - const: hclk + + resets: + items: + - description: vclk domain reset + - description: aclk domain reset + - description: hclk domain reset + + reset-names: + items: + - const: vresetn + - const: aresetn + - const: hresetn + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Input parallel video bus + + properties: + endpoint: + $ref: /schemas/graph.yaml#/properties/endpoint + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - resets + - reset-names + - port + +additionalProperties: false + +examples: + - | + #include + + isp@400000 { + compatible = "arm,mali-c55"; + reg = <0x400000 0x200000>; + clocks = <&clk 0>, <&clk 1>, <&clk 2>; + clock-names = "vclk", "aclk", "hclk"; + resets = <&resets 0>, <&resets 1>, <&resets 2>; + reset-names = "vresetn", "aresetn", "hresetn"; + interrupts = ; + + port { + isp_in: endpoint { + remote-endpoint = <&csi2_rx_out>; + }; + }; + }; +... From 8d0bbed21ef737195277c0af8c30511fb72e608b Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:48 +0000 Subject: [PATCH 222/249] media: uapi: Add controls for Mali-C55 ISP Add definitions and documentation for the custom control that will be needed by the Mali-C55 ISP driver. This will be a read only bitmask of the driver's capabilities, informing userspace of which blocks are fitted and which are absent. Tested-by: Lad Prabhakar Reviewed-by: Lad Prabhakar Reviewed-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../userspace-api/media/drivers/index.rst | 1 + .../userspace-api/media/drivers/mali-c55.rst | 55 +++++++++++++++++++ .../uapi/linux/media/arm/mali-c55-config.h | 26 +++++++++ include/uapi/linux/v4l2-controls.h | 6 ++ 4 files changed, 88 insertions(+) create mode 100644 Documentation/userspace-api/media/drivers/mali-c55.rst create mode 100644 include/uapi/linux/media/arm/mali-c55-config.h diff --git a/Documentation/userspace-api/media/drivers/index.rst b/Documentation/userspace-api/media/drivers/index.rst index d706cb47b112..02967c9b18d6 100644 --- a/Documentation/userspace-api/media/drivers/index.rst +++ b/Documentation/userspace-api/media/drivers/index.rst @@ -32,6 +32,7 @@ For more details see the file COPYING in the source distribution of Linux. cx2341x-uapi dw100 imx-uapi + mali-c55 max2175 npcm-video omap3isp-uapi diff --git a/Documentation/userspace-api/media/drivers/mali-c55.rst b/Documentation/userspace-api/media/drivers/mali-c55.rst new file mode 100644 index 000000000000..21148b187856 --- /dev/null +++ b/Documentation/userspace-api/media/drivers/mali-c55.rst @@ -0,0 +1,55 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +Arm Mali-C55 ISP driver +======================= + +The Arm Mali-C55 ISP driver implements a single driver-specific control: + +``V4L2_CID_MALI_C55_CAPABILITIES (bitmask)`` + Detail the capabilities of the ISP by giving detail about the fitted blocks. + + .. flat-table:: Bitmask meaning definitions + :header-rows: 1 + :widths: 2 4 8 + + * - Bit + - Macro + - Meaning + * - 0 + - MALI_C55_PONG + - Pong configuration space is fitted in the ISP + * - 1 + - MALI_C55_WDR + - WDR Framestitch, offset and gain is fitted in the ISP + * - 2 + - MALI_C55_COMPRESSION + - Temper compression is fitted in the ISP + * - 3 + - MALI_C55_TEMPER + - Temper is fitted in the ISP + * - 4 + - MALI_C55_SINTER_LITE + - Sinter Lite is fitted in the ISP instead of the full Sinter version + * - 5 + - MALI_C55_SINTER + - Sinter is fitted in the ISP + * - 6 + - MALI_C55_IRIDIX_LTM + - Iridix local tone mappine is fitted in the ISP + * - 7 + - MALI_C55_IRIDIX_GTM + - Iridix global tone mapping is fitted in the ISP + * - 8 + - MALI_C55_CNR + - Colour noise reduction is fitted in the ISP + * - 9 + - MALI_C55_FRSCALER + - The full resolution pipe scaler is fitted in the ISP + * - 10 + - MALI_C55_DS_PIPE + - The downscale pipe is fitted in the ISP + + The Mali-C55 ISP can be configured in a number of ways to include or exclude + blocks which may not be necessary. This control provides a way for the + driver to communicate to userspace which of the blocks are fitted in the + design. \ No newline at end of file diff --git a/include/uapi/linux/media/arm/mali-c55-config.h b/include/uapi/linux/media/arm/mali-c55-config.h new file mode 100644 index 000000000000..7fddece54ada --- /dev/null +++ b/include/uapi/linux/media/arm/mali-c55-config.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * ARM Mali-C55 ISP Driver - Userspace API + * + * Copyright (C) 2023 Ideas on Board Oy + */ + +#ifndef __UAPI_MALI_C55_CONFIG_H +#define __UAPI_MALI_C55_CONFIG_H + +#include + +#define V4L2_CID_MALI_C55_CAPABILITIES (V4L2_CID_USER_MALI_C55_BASE + 0x0) +#define MALI_C55_GPS_PONG (1U << 0) +#define MALI_C55_GPS_WDR (1U << 1) +#define MALI_C55_GPS_COMPRESSION (1U << 2) +#define MALI_C55_GPS_TEMPER (1U << 3) +#define MALI_C55_GPS_SINTER_LITE (1U << 4) +#define MALI_C55_GPS_SINTER (1U << 5) +#define MALI_C55_GPS_IRIDIX_LTM (1U << 6) +#define MALI_C55_GPS_IRIDIX_GTM (1U << 7) +#define MALI_C55_GPS_CNR (1U << 8) +#define MALI_C55_GPS_FRSCALER (1U << 9) +#define MALI_C55_GPS_DS_PIPE (1U << 10) + +#endif /* __UAPI_MALI_C55_CONFIG_H */ diff --git a/include/uapi/linux/v4l2-controls.h b/include/uapi/linux/v4l2-controls.h index 2d30107e047e..f84ed133a6c9 100644 --- a/include/uapi/linux/v4l2-controls.h +++ b/include/uapi/linux/v4l2-controls.h @@ -228,6 +228,12 @@ enum v4l2_colorfx { */ #define V4L2_CID_USER_RKISP1_BASE (V4L2_CID_USER_BASE + 0x1220) +/* + * The base for the Arm Mali-C55 ISP driver controls. + * We reserve 16 controls for this driver + */ +#define V4L2_CID_USER_MALI_C55_BASE (V4L2_CID_USER_BASE + 0x1230) + /* MPEG-class control IDs */ /* The MPEG controls are applicable to all codec controls * and the 'MPEG' part of the define is historical */ From d5f281f3dd2988998daf45f591920c6013a620d8 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:49 +0000 Subject: [PATCH 223/249] media: mali-c55: Add Mali-C55 ISP driver Add a driver for Arm's Mali-C55 Image Signal Processor. The driver is V4L2 and Media Controller compliant and creates subdevices to manage the ISP itself, its internal test pattern generator as well as the crop, scaler and output format functionality for each of its two output devices. Tested-by: Lad Prabhakar Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil [hverkuil: remove deprecated vb2_ops_wait_prepare/finish callbacks] --- drivers/media/platform/Kconfig | 1 + drivers/media/platform/Makefile | 1 + drivers/media/platform/arm/Kconfig | 5 + drivers/media/platform/arm/Makefile | 2 + drivers/media/platform/arm/mali-c55/Kconfig | 17 + drivers/media/platform/arm/mali-c55/Makefile | 9 + .../platform/arm/mali-c55/mali-c55-capture.c | 959 ++++++++++++++ .../platform/arm/mali-c55/mali-c55-common.h | 254 ++++ .../platform/arm/mali-c55/mali-c55-core.c | 864 ++++++++++++ .../platform/arm/mali-c55/mali-c55-isp.c | 633 +++++++++ .../arm/mali-c55/mali-c55-registers.h | 318 +++++ .../platform/arm/mali-c55/mali-c55-resizer.c | 1156 +++++++++++++++++ .../platform/arm/mali-c55/mali-c55-tpg.c | 437 +++++++ 13 files changed, 4656 insertions(+) create mode 100644 drivers/media/platform/arm/Kconfig create mode 100644 drivers/media/platform/arm/Makefile create mode 100644 drivers/media/platform/arm/mali-c55/Kconfig create mode 100644 drivers/media/platform/arm/mali-c55/Makefile create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-capture.c create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-common.h create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-core.c create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-isp.c create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-registers.h create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-resizer.c create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-tpg.c diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 9287faafdce5..3f0b7bb68cc9 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -65,6 +65,7 @@ config VIDEO_MUX source "drivers/media/platform/allegro-dvt/Kconfig" source "drivers/media/platform/amlogic/Kconfig" source "drivers/media/platform/amphion/Kconfig" +source "drivers/media/platform/arm/Kconfig" source "drivers/media/platform/aspeed/Kconfig" source "drivers/media/platform/atmel/Kconfig" source "drivers/media/platform/broadcom/Kconfig" diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 6fd7db0541c7..6d5f79ddfcc3 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -8,6 +8,7 @@ obj-y += allegro-dvt/ obj-y += amlogic/ obj-y += amphion/ +obj-y += arm/ obj-y += aspeed/ obj-y += atmel/ obj-y += broadcom/ diff --git a/drivers/media/platform/arm/Kconfig b/drivers/media/platform/arm/Kconfig new file mode 100644 index 000000000000..4f0764c329c7 --- /dev/null +++ b/drivers/media/platform/arm/Kconfig @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-only + +comment "ARM media platform drivers" + +source "drivers/media/platform/arm/mali-c55/Kconfig" diff --git a/drivers/media/platform/arm/Makefile b/drivers/media/platform/arm/Makefile new file mode 100644 index 000000000000..8cc4918725ef --- /dev/null +++ b/drivers/media/platform/arm/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += mali-c55/ diff --git a/drivers/media/platform/arm/mali-c55/Kconfig b/drivers/media/platform/arm/mali-c55/Kconfig new file mode 100644 index 000000000000..9928039fa522 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0-only +config VIDEO_MALI_C55 + tristate "ARM Mali-C55 Image Signal Processor driver" + depends on ARCH_VEXPRESS || ARCH_RENESAS || COMPILE_TEST + depends on V4L_PLATFORM_DRIVERS + depends on VIDEO_DEV && OF + select GENERIC_PHY_MIPI_DPHY + select MEDIA_CONTROLLER + select V4L2_FWNODE + select VIDEO_V4L2_SUBDEV_API + select VIDEOBUF2_DMA_CONTIG + select VIDEOBUF2_VMALLOC + help + Enable this to support Arm's Mali-C55 Image Signal Processor. + + To compile this driver as a module, choose M here: the module + will be called mali-c55. diff --git a/drivers/media/platform/arm/mali-c55/Makefile b/drivers/media/platform/arm/mali-c55/Makefile new file mode 100644 index 000000000000..9178ac35e50e --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0 + +mali-c55-y := mali-c55-capture.o \ + mali-c55-core.o \ + mali-c55-isp.o \ + mali-c55-resizer.o \ + mali-c55-tpg.o + +obj-$(CONFIG_VIDEO_MALI_C55) += mali-c55.o diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-capture.c b/drivers/media/platform/arm/mali-c55/mali-c55-capture.c new file mode 100644 index 000000000000..7aaa5c3f7354 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-capture.c @@ -0,0 +1,959 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Video capture devices + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +static const struct mali_c55_format_info mali_c55_fmts[] = { + /* + * This table is missing some entries which need further work or + * investigation: + * + * Base mode 5 is "Generic Data" + * Base mode 8 is a backwards V4L2_PIX_FMT_XYUV32 - no V4L2 equivalent + * Base mode 9 seems to have no V4L2 equivalent + * Base mode 17, 19 and 20 describe formats which seem to have no V4L2 + * equivalent + */ + { + .fourcc = V4L2_PIX_FMT_XBGR32, + .mbus_codes = { + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_RGB202020_1X60, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_RGB32, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_ARGB2101010, + .mbus_codes = { + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_RGB202020_1X60, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_A2R10G10B10, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_RGB565, + .mbus_codes = { + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_RGB202020_1X60, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_RGB565, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_BGR24, + .mbus_codes = { + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_RGB202020_1X60, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_RGB24, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_YUYV, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_YUY2, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_UYVY, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_UYVY, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_Y210, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_Y210, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + /* + * This is something of a hack, the ISP thinks it's running NV12M but + * by setting uv_plane = 0 we simply discard that planes and only output + * the Y-plane. + */ + { + .fourcc = V4L2_PIX_FMT_GREY, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_NV12_21, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_NV12M, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_NV12_21, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT1 + } + }, + { + .fourcc = V4L2_PIX_FMT_NV21M, + .mbus_codes = { + MEDIA_BUS_FMT_YUV10_1X30, + }, + .is_raw = false, + .registers = { + .base_mode = MALI_C55_OUTPUT_NV12_21, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT2 + } + }, + /* + * RAW uncompressed formats are all packed in 16 bpp. + * TODO: Expand this list to encompass all possible RAW formats. + */ + { + .fourcc = V4L2_PIX_FMT_SRGGB16, + .mbus_codes = { + MEDIA_BUS_FMT_SRGGB16_1X16, + }, + .is_raw = true, + .registers = { + .base_mode = MALI_C55_OUTPUT_RAW16, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR16, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR16_1X16, + }, + .is_raw = true, + .registers = { + .base_mode = MALI_C55_OUTPUT_RAW16, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG16, + .mbus_codes = { + MEDIA_BUS_FMT_SGBRG16_1X16, + }, + .is_raw = true, + .registers = { + .base_mode = MALI_C55_OUTPUT_RAW16, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG16, + .mbus_codes = { + MEDIA_BUS_FMT_SGRBG16_1X16, + }, + .is_raw = true, + .registers = { + .base_mode = MALI_C55_OUTPUT_RAW16, + .uv_plane = MALI_C55_OUTPUT_PLANE_ALT0 + } + }, +}; + +void mali_c55_cap_dev_write(struct mali_c55_cap_dev *cap_dev, unsigned int addr, + u32 val) +{ + mali_c55_ctx_write(cap_dev->mali_c55, addr + cap_dev->reg_offset, val); +} + +static u32 mali_c55_cap_dev_read(struct mali_c55_cap_dev *cap_dev, unsigned int addr) +{ + return mali_c55_ctx_read(cap_dev->mali_c55, addr + cap_dev->reg_offset); +} + +static void mali_c55_cap_dev_update_bits(struct mali_c55_cap_dev *cap_dev, + unsigned int addr, u32 mask, u32 val) +{ + u32 orig, tmp; + + orig = mali_c55_cap_dev_read(cap_dev, addr); + + tmp = orig & ~mask; + tmp |= val & mask; + + if (tmp != orig) + mali_c55_cap_dev_write(cap_dev, addr, tmp); +} + +static bool +mali_c55_mbus_code_can_produce_fmt(const struct mali_c55_format_info *fmt, + u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(fmt->mbus_codes); i++) { + if (fmt->mbus_codes[i] == code) + return true; + } + + return false; +} + +bool mali_c55_format_is_raw(unsigned int mbus_code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_fmts); i++) { + if (mali_c55_fmts[i].mbus_codes[0] == mbus_code) + return mali_c55_fmts[i].is_raw; + } + + return false; +} + +static const struct mali_c55_format_info * +mali_c55_format_from_pix(const u32 pixelformat) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_fmts); i++) { + if (mali_c55_fmts[i].fourcc == pixelformat) + return &mali_c55_fmts[i]; + } + + /* + * If we find no matching pixelformat, we'll just default to the first + * one for now. + */ + + return &mali_c55_fmts[0]; +} + +static const char * const capture_device_names[] = { + "mali-c55 fr", + "mali-c55 ds", +}; + +static int mali_c55_link_validate(struct media_link *link) +{ + struct video_device *vdev = + media_entity_to_video_device(link->sink->entity); + struct mali_c55_cap_dev *cap_dev = video_get_drvdata(vdev); + struct v4l2_subdev *sd = + media_entity_to_v4l2_subdev(link->source->entity); + const struct v4l2_pix_format_mplane *pix_mp; + const struct mali_c55_format_info *cap_fmt; + struct v4l2_subdev_format sd_fmt = { + .which = V4L2_SUBDEV_FORMAT_ACTIVE, + .pad = link->source->index, + }; + int ret; + + ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sd_fmt); + if (ret) + return ret; + + pix_mp = &cap_dev->format.format; + cap_fmt = cap_dev->format.info; + + if (sd_fmt.format.width != pix_mp->width || + sd_fmt.format.height != pix_mp->height) { + dev_dbg(cap_dev->mali_c55->dev, + "link '%s':%u -> '%s':%u not valid: %ux%u != %ux%u\n", + link->source->entity->name, link->source->index, + link->sink->entity->name, link->sink->index, + sd_fmt.format.width, sd_fmt.format.height, + pix_mp->width, pix_mp->height); + return -EPIPE; + } + + if (!mali_c55_mbus_code_can_produce_fmt(cap_fmt, sd_fmt.format.code)) { + dev_dbg(cap_dev->mali_c55->dev, + "link '%s':%u -> '%s':%u not valid: mbus_code 0x%04x cannot produce pixel format %p4cc\n", + link->source->entity->name, link->source->index, + link->sink->entity->name, link->sink->index, + sd_fmt.format.code, &pix_mp->pixelformat); + return -EPIPE; + } + + return 0; +} + +static const struct media_entity_operations mali_c55_media_ops = { + .link_validate = mali_c55_link_validate, +}; + +static int mali_c55_vb2_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, + unsigned int *num_planes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct mali_c55_cap_dev *cap_dev = q->drv_priv; + unsigned int i; + + if (*num_planes) { + if (*num_planes != cap_dev->format.format.num_planes) + return -EINVAL; + + for (i = 0; i < cap_dev->format.format.num_planes; i++) + if (sizes[i] < cap_dev->format.format.plane_fmt[i].sizeimage) + return -EINVAL; + } else { + *num_planes = cap_dev->format.format.num_planes; + for (i = 0; i < cap_dev->format.format.num_planes; i++) + sizes[i] = cap_dev->format.format.plane_fmt[i].sizeimage; + } + + return 0; +} + +static void mali_c55_buf_queue(struct vb2_buffer *vb) +{ + struct mali_c55_cap_dev *cap_dev = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_buffer *buf = container_of(vbuf, + struct mali_c55_buffer, vb); + unsigned int i; + + buf->planes_pending = cap_dev->format.format.num_planes; + + for (i = 0; i < cap_dev->format.format.num_planes; i++) { + unsigned long size = cap_dev->format.format.plane_fmt[i].sizeimage; + + vb2_set_plane_payload(vb, i, size); + } + + buf->vb.field = V4L2_FIELD_NONE; + + guard(spinlock)(&cap_dev->buffers.lock); + list_add_tail(&buf->queue, &cap_dev->buffers.input); +} + +static int mali_c55_buf_init(struct vb2_buffer *vb) +{ + struct mali_c55_cap_dev *cap_dev = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_buffer *buf = container_of(vbuf, + struct mali_c55_buffer, vb); + unsigned int i; + + for (i = 0; i < cap_dev->format.format.num_planes; i++) + buf->addrs[i] = vb2_dma_contig_plane_dma_addr(vb, i); + + return 0; +} + +void mali_c55_set_next_buffer(struct mali_c55_cap_dev *cap_dev) +{ + struct v4l2_pix_format_mplane *pix_mp; + struct mali_c55_buffer *buf; + dma_addr_t *addrs; + + scoped_guard(spinlock, &cap_dev->buffers.lock) { + buf = list_first_entry_or_null(&cap_dev->buffers.input, + struct mali_c55_buffer, queue); + if (buf) + list_del(&buf->queue); + } + + if (!buf) { + /* + * If we underflow then we can tell the ISP that we don't want + * to write out the next frame. + */ + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_Y_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, + 0x00); + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_UV_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, + 0x00); + return; + } + + pix_mp = &cap_dev->format.format; + + mali_c55_cap_dev_update_bits(cap_dev, MALI_C55_REG_Y_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, + MALI_C55_WRITER_FRAME_WRITE_ENABLE); + if (cap_dev->format.info->registers.uv_plane) + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_UV_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, + MALI_C55_WRITER_FRAME_WRITE_ENABLE); + + addrs = buf->addrs; + mali_c55_cap_dev_write(cap_dev, + MALI_C55_REG_Y_WRITER_BANKS_BASE, + addrs[MALI_C55_PLANE_Y]); + mali_c55_cap_dev_write(cap_dev, + MALI_C55_REG_UV_WRITER_BANKS_BASE, + addrs[MALI_C55_PLANE_UV]); + + mali_c55_cap_dev_write(cap_dev, + MALI_C55_REG_Y_WRITER_OFFSET, + pix_mp->plane_fmt[MALI_C55_PLANE_Y].bytesperline); + mali_c55_cap_dev_write(cap_dev, + MALI_C55_REG_UV_WRITER_OFFSET, + pix_mp->plane_fmt[MALI_C55_PLANE_UV].bytesperline); + + guard(spinlock)(&cap_dev->buffers.processing_lock); + list_add_tail(&buf->queue, &cap_dev->buffers.processing); +} + +/** + * mali_c55_set_plane_done - mark the plane as written and process the buffer if + * both planes are finished. + * @cap_dev: pointer to the fr or ds pipe output + * @plane: the plane to mark as completed + * + * The Mali C55 ISP has muliplanar outputs for some formats that come with two + * separate "buffer write completed" interrupts - we need to flag each plane's + * completion and check whether both planes are done - if so, complete the buf + * in vb2. + */ +void mali_c55_set_plane_done(struct mali_c55_cap_dev *cap_dev, + enum mali_c55_planes plane) +{ + struct mali_c55_isp *isp = &cap_dev->mali_c55->isp; + struct mali_c55_buffer *buf; + + scoped_guard(spinlock, &cap_dev->buffers.processing_lock) { + buf = list_first_entry_or_null(&cap_dev->buffers.processing, + struct mali_c55_buffer, queue); + + /* + * If the stream was stopped, the buffer might have been sent + * back to userspace already. + */ + if (!buf || --buf->planes_pending) + return; + + list_del(&buf->queue); + } + + /* If the other plane is also done... */ + buf->vb.vb2_buf.timestamp = ktime_get_boottime_ns(); + buf->vb.sequence = isp->frame_sequence++; + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); +} + +static void mali_c55_cap_dev_stream_disable(struct mali_c55_cap_dev *cap_dev) +{ + mali_c55_cap_dev_update_bits(cap_dev, MALI_C55_REG_Y_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, 0x00); + mali_c55_cap_dev_update_bits(cap_dev, MALI_C55_REG_UV_WRITER_MODE, + MALI_C55_WRITER_FRAME_WRITE_MASK, 0x00); +} + +static void mali_c55_cap_dev_stream_enable(struct mali_c55_cap_dev *cap_dev) +{ + /* + * The Mali ISP can hold up to 5 buffer addresses and simply cycle + * through them, but it's not clear to me that the vb2 queue _guarantees_ + * it will queue buffers to the driver in a fixed order, and ensuring + * we call vb2_buffer_done() for the right buffer seems to me to add + * pointless complexity given in multi-context mode we'd need to + * re-write those registers every frame anyway...so we tell the ISP to + * use a single register and update it for each frame. + */ + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_Y_WRITER_BANKS_CONFIG, + MALI_C55_REG_Y_WRITER_MAX_BANKS_MASK, 0); + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_UV_WRITER_BANKS_CONFIG, + MALI_C55_REG_UV_WRITER_MAX_BANKS_MASK, 0); + + mali_c55_set_next_buffer(cap_dev); +} + +static void mali_c55_cap_dev_return_buffers(struct mali_c55_cap_dev *cap_dev, + enum vb2_buffer_state state) +{ + struct mali_c55_buffer *buf, *tmp; + + scoped_guard(spinlock, &cap_dev->buffers.lock) { + list_for_each_entry_safe(buf, tmp, &cap_dev->buffers.input, + queue) { + list_del(&buf->queue); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } + } + + guard(spinlock)(&cap_dev->buffers.processing_lock); + list_for_each_entry_safe(buf, tmp, &cap_dev->buffers.processing, queue) { + list_del(&buf->queue); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } +} + +static void mali_c55_cap_dev_format_configure(struct mali_c55_cap_dev *cap_dev) +{ + const struct mali_c55_format_info *capture_format = cap_dev->format.info; + const struct v4l2_pix_format_mplane *pix_mp = &cap_dev->format.format; + const struct v4l2_format_info *info; + + info = v4l2_format_info(pix_mp->pixelformat); + if (WARN_ON(!info)) + return; + + mali_c55_cap_dev_write(cap_dev, MALI_C55_REG_Y_WRITER_MODE, + capture_format->registers.base_mode); + mali_c55_cap_dev_write(cap_dev, MALI_C55_REG_ACTIVE_OUT_Y_SIZE, + MALI_C55_REG_ACTIVE_OUT_SIZE_W(pix_mp->width) | + MALI_C55_REG_ACTIVE_OUT_SIZE_H(pix_mp->height)); + + if (info->mem_planes > 1) { + mali_c55_cap_dev_write(cap_dev, MALI_C55_REG_UV_WRITER_MODE, + capture_format->registers.base_mode); + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_UV_WRITER_MODE, + MALI_C55_WRITER_SUBMODE_MASK, + MALI_C55_WRITER_SUBMODE(capture_format->registers.uv_plane)); + + mali_c55_cap_dev_write(cap_dev, MALI_C55_REG_ACTIVE_OUT_UV_SIZE, + MALI_C55_REG_ACTIVE_OUT_SIZE_W(pix_mp->width) | + MALI_C55_REG_ACTIVE_OUT_SIZE_H(pix_mp->height)); + } + + if (info->pixel_enc == V4L2_PIXEL_ENC_YUV) { + mali_c55_cap_dev_write(cap_dev, MALI_C55_REG_CS_CONV_CONFIG, + MALI_C55_CS_CONV_MATRIX_MASK); + + if (info->hdiv > 1) + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_CS_CONV_CONFIG, + MALI_C55_CS_CONV_HORZ_DOWNSAMPLE_MASK, + MALI_C55_CS_CONV_HORZ_DOWNSAMPLE_ENABLE); + if (info->vdiv > 1) + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_CS_CONV_CONFIG, + MALI_C55_CS_CONV_VERT_DOWNSAMPLE_MASK, + MALI_C55_CS_CONV_VERT_DOWNSAMPLE_ENABLE); + if (info->hdiv > 1 || info->vdiv > 1) + mali_c55_cap_dev_update_bits(cap_dev, + MALI_C55_REG_CS_CONV_CONFIG, + MALI_C55_CS_CONV_FILTER_MASK, + MALI_C55_CS_CONV_FILTER_ENABLE); + } +} + +static int mali_c55_vb2_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct mali_c55_cap_dev *cap_dev = q->drv_priv; + struct mali_c55 *mali_c55 = cap_dev->mali_c55; + struct mali_c55_resizer *rsz = cap_dev->rsz; + struct mali_c55_isp *isp = &mali_c55->isp; + int ret; + + guard(mutex)(&isp->capture_lock); + + ret = pm_runtime_resume_and_get(mali_c55->dev); + if (ret) + goto err_return_buffers; + + ret = video_device_pipeline_alloc_start(&cap_dev->vdev); + if (ret) { + dev_dbg(mali_c55->dev, "%s failed to start media pipeline\n", + cap_dev->vdev.name); + goto err_pm_put; + } + + mali_c55_cap_dev_format_configure(cap_dev); + mali_c55_cap_dev_stream_enable(cap_dev); + + ret = v4l2_subdev_enable_streams(&rsz->sd, MALI_C55_RSZ_SOURCE_PAD, + BIT(0)); + if (ret) + goto err_disable_cap_dev; + + if (mali_c55_pipeline_ready(mali_c55)) { + ret = v4l2_subdev_enable_streams(&mali_c55->isp.sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + if (ret < 0) + goto err_disable_rsz; + } + + return 0; + +err_disable_rsz: + v4l2_subdev_disable_streams(&rsz->sd, MALI_C55_RSZ_SOURCE_PAD, BIT(0)); +err_disable_cap_dev: + mali_c55_cap_dev_stream_disable(cap_dev); + video_device_pipeline_stop(&cap_dev->vdev); +err_pm_put: + pm_runtime_put_autosuspend(mali_c55->dev); +err_return_buffers: + mali_c55_cap_dev_return_buffers(cap_dev, VB2_BUF_STATE_QUEUED); + + return ret; +} + +static void mali_c55_vb2_stop_streaming(struct vb2_queue *q) +{ + struct mali_c55_cap_dev *cap_dev = q->drv_priv; + struct mali_c55 *mali_c55 = cap_dev->mali_c55; + struct mali_c55_resizer *rsz = cap_dev->rsz; + struct mali_c55_isp *isp = &mali_c55->isp; + + guard(mutex)(&isp->capture_lock); + + if (mali_c55_pipeline_ready(mali_c55)) { + if (v4l2_subdev_is_streaming(&isp->sd)) + v4l2_subdev_disable_streams(&isp->sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + } + + v4l2_subdev_disable_streams(&rsz->sd, MALI_C55_RSZ_SOURCE_PAD, BIT(0)); + mali_c55_cap_dev_stream_disable(cap_dev); + mali_c55_cap_dev_return_buffers(cap_dev, VB2_BUF_STATE_ERROR); + video_device_pipeline_stop(&cap_dev->vdev); + pm_runtime_put_autosuspend(mali_c55->dev); +} + +static const struct vb2_ops mali_c55_vb2_ops = { + .queue_setup = &mali_c55_vb2_queue_setup, + .buf_queue = &mali_c55_buf_queue, + .buf_init = &mali_c55_buf_init, + .start_streaming = &mali_c55_vb2_start_streaming, + .stop_streaming = &mali_c55_vb2_stop_streaming, +}; + +static const struct v4l2_file_operations mali_c55_v4l2_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +static void mali_c55_try_fmt(struct v4l2_pix_format_mplane *pix_mp) +{ + const struct mali_c55_format_info *capture_format; + const struct v4l2_format_info *info; + struct v4l2_plane_pix_format *plane, *y_plane; + unsigned int padding; + unsigned int i; + + capture_format = mali_c55_format_from_pix(pix_mp->pixelformat); + pix_mp->pixelformat = capture_format->fourcc; + + pix_mp->width = clamp(pix_mp->width, MALI_C55_MIN_WIDTH, + MALI_C55_MAX_WIDTH); + pix_mp->height = clamp(pix_mp->height, MALI_C55_MIN_HEIGHT, + MALI_C55_MAX_HEIGHT); + + pix_mp->field = V4L2_FIELD_NONE; + pix_mp->colorspace = V4L2_COLORSPACE_DEFAULT; + pix_mp->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; + pix_mp->quantization = V4L2_QUANTIZATION_DEFAULT; + + info = v4l2_format_info(pix_mp->pixelformat); + pix_mp->num_planes = info->mem_planes; + memset(pix_mp->plane_fmt, 0, sizeof(pix_mp->plane_fmt)); + + y_plane = &pix_mp->plane_fmt[0]; + y_plane->bytesperline = clamp(y_plane->bytesperline, + info->bpp[0] * pix_mp->width, 65535U); + + /* + * The ISP requires that the stride be aligned to 16-bytes. This is not + * detailed in the documentation but has been verified experimentally. + */ + y_plane->bytesperline = ALIGN(y_plane->bytesperline, 16); + y_plane->sizeimage = y_plane->bytesperline * pix_mp->height; + + padding = y_plane->bytesperline - (pix_mp->width * info->bpp[0]); + + for (i = 1; i < info->comp_planes; i++) { + plane = &pix_mp->plane_fmt[i]; + + plane->bytesperline = DIV_ROUND_UP(info->bpp[i] * pix_mp->width, + info->hdiv) + padding; + plane->sizeimage = DIV_ROUND_UP(plane->bytesperline * + pix_mp->height, info->vdiv); + } + + if (info->mem_planes == 1) { + for (i = 1; i < info->comp_planes; i++) { + plane = &pix_mp->plane_fmt[i]; + y_plane->sizeimage += plane->sizeimage; + } + } +} + +static int mali_c55_try_fmt_vid_cap_mplane(struct file *file, void *fh, + struct v4l2_format *f) +{ + mali_c55_try_fmt(&f->fmt.pix_mp); + + return 0; +} + +static void mali_c55_set_format(struct mali_c55_cap_dev *cap_dev, + struct v4l2_pix_format_mplane *pix_mp) +{ + mali_c55_try_fmt(pix_mp); + + cap_dev->format.format = *pix_mp; + cap_dev->format.info = mali_c55_format_from_pix(pix_mp->pixelformat); +} + +static int mali_c55_s_fmt_vid_cap_mplane(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct mali_c55_cap_dev *cap_dev = video_drvdata(file); + + if (vb2_is_busy(&cap_dev->queue)) + return -EBUSY; + + mali_c55_set_format(cap_dev, &f->fmt.pix_mp); + + return 0; +} + +static int mali_c55_g_fmt_vid_cap_mplane(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct mali_c55_cap_dev *cap_dev = video_drvdata(file); + + f->fmt.pix_mp = cap_dev->format.format; + + return 0; +} + +static int mali_c55_enum_fmt_vid_cap_mplane(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + struct mali_c55_cap_dev *cap_dev = video_drvdata(file); + unsigned int j = 0; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_fmts); i++) { + if (f->mbus_code && + !mali_c55_mbus_code_can_produce_fmt(&mali_c55_fmts[i], + f->mbus_code)) + continue; + + /* Downscale pipe can't output RAW formats */ + if (mali_c55_fmts[i].is_raw && + cap_dev->reg_offset == MALI_C55_CAP_DEV_DS_REG_OFFSET) + continue; + + if (j++ == f->index) { + f->pixelformat = mali_c55_fmts[i].fourcc; + return 0; + } + } + + return -EINVAL; +} + +static int mali_c55_querycap(struct file *file, void *fh, + struct v4l2_capability *cap) +{ + strscpy(cap->driver, MALI_C55_DRIVER_NAME, sizeof(cap->driver)); + strscpy(cap->card, "ARM Mali-C55 ISP", sizeof(cap->card)); + + return 0; +} + +static const struct v4l2_ioctl_ops mali_c55_v4l2_ioctl_ops = { + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_try_fmt_vid_cap_mplane = mali_c55_try_fmt_vid_cap_mplane, + .vidioc_s_fmt_vid_cap_mplane = mali_c55_s_fmt_vid_cap_mplane, + .vidioc_g_fmt_vid_cap_mplane = mali_c55_g_fmt_vid_cap_mplane, + .vidioc_enum_fmt_vid_cap = mali_c55_enum_fmt_vid_cap_mplane, + .vidioc_querycap = mali_c55_querycap, + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static int mali_c55_register_cap_dev(struct mali_c55 *mali_c55, + enum mali_c55_cap_devs cap_dev_id) +{ + struct mali_c55_cap_dev *cap_dev = &mali_c55->cap_devs[cap_dev_id]; + struct v4l2_pix_format_mplane pix_mp; + struct video_device *vdev; + struct vb2_queue *vb2q; + int ret; + + vdev = &cap_dev->vdev; + vb2q = &cap_dev->queue; + + cap_dev->mali_c55 = mali_c55; + mutex_init(&cap_dev->lock); + INIT_LIST_HEAD(&cap_dev->buffers.input); + INIT_LIST_HEAD(&cap_dev->buffers.processing); + spin_lock_init(&cap_dev->buffers.lock); + spin_lock_init(&cap_dev->buffers.processing_lock); + + switch (cap_dev_id) { + case MALI_C55_CAP_DEV_FR: + cap_dev->rsz = &mali_c55->resizers[MALI_C55_RSZ_FR]; + cap_dev->reg_offset = MALI_C55_CAP_DEV_FR_REG_OFFSET; + break; + case MALI_C55_CAP_DEV_DS: + cap_dev->rsz = &mali_c55->resizers[MALI_C55_RSZ_DS]; + cap_dev->reg_offset = MALI_C55_CAP_DEV_DS_REG_OFFSET; + break; + default: + ret = -EINVAL; + goto err_destroy_mutex; + } + + cap_dev->pad.flags = MEDIA_PAD_FL_SINK; + ret = media_entity_pads_init(&cap_dev->vdev.entity, 1, &cap_dev->pad); + if (ret) { + mutex_destroy(&cap_dev->lock); + goto err_destroy_mutex; + } + + vb2q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + vb2q->io_modes = VB2_MMAP | VB2_DMABUF; + vb2q->drv_priv = cap_dev; + vb2q->mem_ops = &vb2_dma_contig_memops; + vb2q->ops = &mali_c55_vb2_ops; + vb2q->buf_struct_size = sizeof(struct mali_c55_buffer); + vb2q->min_queued_buffers = 1; + vb2q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + vb2q->lock = &cap_dev->lock; + vb2q->dev = mali_c55->dev; + + ret = vb2_queue_init(vb2q); + if (ret) { + dev_err(mali_c55->dev, "%s vb2 queue init failed\n", + cap_dev->vdev.name); + goto err_cleanup_media_entity; + } + + strscpy(cap_dev->vdev.name, capture_device_names[cap_dev_id], + sizeof(cap_dev->vdev.name)); + vdev->release = video_device_release_empty; + vdev->fops = &mali_c55_v4l2_fops; + vdev->ioctl_ops = &mali_c55_v4l2_ioctl_ops; + vdev->lock = &cap_dev->lock; + vdev->v4l2_dev = &mali_c55->v4l2_dev; + vdev->queue = &cap_dev->queue; + vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | + V4L2_CAP_STREAMING | V4L2_CAP_IO_MC; + vdev->entity.ops = &mali_c55_media_ops; + video_set_drvdata(vdev, cap_dev); + + memset(&pix_mp, 0, sizeof(pix_mp)); + pix_mp.pixelformat = V4L2_PIX_FMT_RGB565; + pix_mp.width = MALI_C55_DEFAULT_WIDTH; + pix_mp.height = MALI_C55_DEFAULT_HEIGHT; + mali_c55_set_format(cap_dev, &pix_mp); + + ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); + if (ret) { + dev_err(mali_c55->dev, + "%s failed to register video device\n", + cap_dev->vdev.name); + goto err_release_vb2q; + } + + return 0; + +err_release_vb2q: + vb2_queue_release(vb2q); +err_cleanup_media_entity: + media_entity_cleanup(&cap_dev->vdev.entity); +err_destroy_mutex: + mutex_destroy(&cap_dev->lock); + + return ret; +} + +int mali_c55_register_capture_devs(struct mali_c55 *mali_c55) +{ + int ret; + + ret = mali_c55_register_cap_dev(mali_c55, MALI_C55_CAP_DEV_FR); + if (ret) + return ret; + + if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) { + ret = mali_c55_register_cap_dev(mali_c55, MALI_C55_CAP_DEV_DS); + if (ret) { + mali_c55_unregister_capture_devs(mali_c55); + return ret; + } + } + + return 0; +} + +static void mali_c55_unregister_cap_dev(struct mali_c55 *mali_c55, + enum mali_c55_cap_devs cap_dev_id) +{ + struct mali_c55_cap_dev *cap_dev = &mali_c55->cap_devs[cap_dev_id]; + + if (!video_is_registered(&cap_dev->vdev)) + return; + + vb2_video_unregister_device(&cap_dev->vdev); + media_entity_cleanup(&cap_dev->vdev.entity); + mutex_destroy(&cap_dev->lock); +} + +void mali_c55_unregister_capture_devs(struct mali_c55 *mali_c55) +{ + mali_c55_unregister_cap_dev(mali_c55, MALI_C55_CAP_DEV_FR); + if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) + mali_c55_unregister_cap_dev(mali_c55, MALI_C55_CAP_DEV_DS); +} diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-common.h b/drivers/media/platform/arm/mali-c55/mali-c55-common.h new file mode 100644 index 000000000000..0c713c7d2f7e --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-common.h @@ -0,0 +1,254 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * ARM Mali-C55 ISP Driver - Common definitions + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#ifndef _MALI_C55_COMMON_H +#define _MALI_C55_COMMON_H + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MALI_C55_DRIVER_NAME "mali-c55" + +/* min and max values for the image sizes */ +#define MALI_C55_MIN_WIDTH 640U +#define MALI_C55_MIN_HEIGHT 480U +#define MALI_C55_MAX_WIDTH 8192U +#define MALI_C55_MAX_HEIGHT 8192U +#define MALI_C55_DEFAULT_WIDTH 1920U +#define MALI_C55_DEFAULT_HEIGHT 1080U + +#define MALI_C55_DEFAULT_MEDIA_BUS_FMT MEDIA_BUS_FMT_RGB121212_1X36 + +#define MALI_C55_NUM_CLKS 3 +#define MALI_C55_NUM_RESETS 3 + +struct device; +struct mali_c55; +struct mali_c55_cap_dev; +struct media_pipeline; +struct platform_device; +struct resource; + +enum mali_c55_isp_pads { + MALI_C55_ISP_PAD_SINK_VIDEO, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + MALI_C55_ISP_PAD_SOURCE_BYPASS, + MALI_C55_ISP_NUM_PADS, +}; + +struct mali_c55_tpg { + struct mali_c55 *mali_c55; + struct v4l2_subdev sd; + struct media_pad pad; + struct mali_c55_tpg_ctrls { + struct v4l2_ctrl_handler handler; + struct v4l2_ctrl *vblank; + } ctrls; +}; + +struct mali_c55_isp { + struct mali_c55 *mali_c55; + struct v4l2_subdev sd; + struct media_pad pads[MALI_C55_ISP_NUM_PADS]; + struct v4l2_ctrl_handler handler; + struct media_pad *remote_src; + /* Mutex to guard vb2 start/stop streaming */ + struct mutex capture_lock; + unsigned int frame_sequence; +}; + +enum mali_c55_resizer_ids { + MALI_C55_RSZ_FR, + MALI_C55_RSZ_DS, + MALI_C55_NUM_RSZS, +}; + +enum mali_c55_rsz_pads { + MALI_C55_RSZ_SINK_PAD, + MALI_C55_RSZ_SOURCE_PAD, + MALI_C55_RSZ_SINK_BYPASS_PAD, + MALI_C55_RSZ_NUM_PADS +}; + +struct mali_c55_resizer { + struct mali_c55 *mali_c55; + struct mali_c55_cap_dev *cap_dev; + enum mali_c55_resizer_ids id; + struct v4l2_subdev sd; + struct media_pad pads[MALI_C55_RSZ_NUM_PADS]; + unsigned int num_routes; +}; + +enum mali_c55_cap_devs { + MALI_C55_CAP_DEV_FR, + MALI_C55_CAP_DEV_DS, + MALI_C55_NUM_CAP_DEVS +}; + +struct mali_c55_format_info { + u32 fourcc; + /* + * The output formats can be produced by a couple of different media bus + * formats, depending on how the ISP is configured. + */ + unsigned int mbus_codes[2]; + bool is_raw; + struct { + u32 base_mode; + u32 uv_plane; + } registers; +}; + +struct mali_c55_isp_format_info { + u32 code; + u32 shifted_code; + bool bypass; + u32 order; +}; + +enum mali_c55_planes { + MALI_C55_PLANE_Y, + MALI_C55_PLANE_UV, + MALI_C55_NUM_PLANES +}; + +struct mali_c55_buffer { + struct vb2_v4l2_buffer vb; + unsigned int planes_pending; + struct list_head queue; + dma_addr_t addrs[MALI_C55_NUM_PLANES]; +}; + +struct mali_c55_cap_dev { + struct mali_c55 *mali_c55; + struct mali_c55_resizer *rsz; + struct video_device vdev; + struct media_pad pad; + struct vb2_queue queue; + /* Mutex to provide to vb2 */ + struct mutex lock; + unsigned int reg_offset; + + struct { + const struct mali_c55_format_info *info; + struct v4l2_pix_format_mplane format; + } format; + + struct { + /* Spinlock to guard buffer queue */ + spinlock_t lock; + /* Spinlock to guard the queue of buffers being processed */ + spinlock_t processing_lock; + struct list_head input; + struct list_head processing; + } buffers; +}; + +enum mali_c55_config_spaces { + MALI_C55_CONFIG_PONG, + MALI_C55_CONFIG_PING, +}; + +/** + * struct mali_c55_context - Fields relating to a single camera context + * + * @mali_c55: Pointer to the main struct mali_c55 + * @registers: A pointer to some allocated memory holding register + * values to be written to the hardware at frame interrupt + * @base: Base address of the config space in the hardware + * @lock: A spinlock to protect against writes to @registers whilst that + * space is being copied to the hardware + * @list: A list head to facilitate a context queue + */ +struct mali_c55_context { + struct mali_c55 *mali_c55; + u32 *registers; + phys_addr_t base; + /* Spinlock to prevent simultaneous access of register space */ + spinlock_t lock; + struct list_head list; +}; + +struct mali_c55 { + struct device *dev; + void __iomem *base; + struct clk_bulk_data clks[MALI_C55_NUM_CLKS]; + struct reset_control_bulk_data resets[MALI_C55_NUM_RESETS]; + int irqnum; + + u16 capabilities; + bool inline_mode; + struct media_device media_dev; + struct v4l2_device v4l2_dev; + struct v4l2_async_notifier notifier; + struct media_pipeline pipe; + + struct mali_c55_tpg tpg; + struct mali_c55_isp isp; + struct mali_c55_resizer resizers[MALI_C55_NUM_RSZS]; + struct mali_c55_cap_dev cap_devs[MALI_C55_NUM_CAP_DEVS]; + + struct mali_c55_context context; + u32 next_config; +}; + +void mali_c55_write(struct mali_c55 *mali_c55, unsigned int addr, u32 val); +void mali_c55_cap_dev_write(struct mali_c55_cap_dev *cap_dev, unsigned int addr, + u32 val); +void mali_c55_update_bits(struct mali_c55 *mali_c55, unsigned int addr, + u32 mask, u32 val); +u32 mali_c55_read(struct mali_c55 *mali_c55, unsigned int addr); +void mali_c55_ctx_write(struct mali_c55 *mali_c55, unsigned int addr, u32 val); +u32 mali_c55_ctx_read(struct mali_c55 *mali_c55, unsigned int addr); +void mali_c55_ctx_update_bits(struct mali_c55 *mali_c55, unsigned int addr, + u32 mask, u32 val); + +int mali_c55_config_write(struct mali_c55_context *ctx, + enum mali_c55_config_spaces cfg_space, + bool force_synchronous); + +int mali_c55_register_isp(struct mali_c55 *mali_c55); +int mali_c55_register_tpg(struct mali_c55 *mali_c55); +void mali_c55_unregister_tpg(struct mali_c55 *mali_c55); +void mali_c55_unregister_isp(struct mali_c55 *mali_c55); +int mali_c55_register_resizers(struct mali_c55 *mali_c55); +void mali_c55_unregister_resizers(struct mali_c55 *mali_c55); +int mali_c55_register_capture_devs(struct mali_c55 *mali_c55); +void mali_c55_unregister_capture_devs(struct mali_c55 *mali_c55); +struct mali_c55_context *mali_c55_get_active_context(struct mali_c55 *mali_c55); +void mali_c55_set_plane_done(struct mali_c55_cap_dev *cap_dev, + enum mali_c55_planes plane); +void mali_c55_set_next_buffer(struct mali_c55_cap_dev *cap_dev); +void mali_c55_isp_queue_event_sof(struct mali_c55 *mali_c55); + +bool mali_c55_format_is_raw(unsigned int mbus_code); + +const struct mali_c55_isp_format_info * +mali_c55_isp_fmt_next(const struct mali_c55_isp_format_info *fmt); +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_code(u32 code); +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_shifted_code(u32 code); +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_index(u32 index); +bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55); + +#endif /* _MALI_C55_COMMON_H */ diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-core.c b/drivers/media/platform/arm/mali-c55/mali-c55-core.c new file mode 100644 index 000000000000..abeaf2ba8a65 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-core.c @@ -0,0 +1,864 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Core driver code + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +static const char * const mali_c55_interrupt_names[] = { + [MALI_C55_IRQ_ISP_START] = "ISP start", + [MALI_C55_IRQ_ISP_DONE] = "ISP done", + [MALI_C55_IRQ_MCM_ERROR] = "Multi-context management error", + [MALI_C55_IRQ_BROKEN_FRAME_ERROR] = "Broken frame error", + [MALI_C55_IRQ_MET_AF_DONE] = "AF metering done", + [MALI_C55_IRQ_MET_AEXP_DONE] = "AEXP metering done", + [MALI_C55_IRQ_MET_AWB_DONE] = "AWB metering done", + [MALI_C55_IRQ_AEXP_1024_DONE] = "AEXP 1024-bit histogram done", + [MALI_C55_IRQ_IRIDIX_MET_DONE] = "Iridix metering done", + [MALI_C55_IRQ_LUT_INIT_DONE] = "LUT memory init done", + [MALI_C55_IRQ_FR_Y_DONE] = "Full resolution Y plane DMA done", + [MALI_C55_IRQ_FR_UV_DONE] = "Full resolution U/V plane DMA done", + [MALI_C55_IRQ_DS_Y_DONE] = "Downscale Y plane DMA done", + [MALI_C55_IRQ_DS_UV_DONE] = "Downscale U/V plane DMA done", + [MALI_C55_IRQ_LINEARIZATION_DONE] = "Linearisation done", + [MALI_C55_IRQ_RAW_FRONTEND_DONE] = "Raw frontend processing done", + [MALI_C55_IRQ_NOISE_REDUCTION_DONE] = "Noise reduction done", + [MALI_C55_IRQ_IRIDIX_DONE] = "Iridix done", + [MALI_C55_IRQ_BAYER2RGB_DONE] = "Bayer to RGB conversion done", + [MALI_C55_IRQ_WATCHDOG_TIMER] = "Watchdog timer timed out", + [MALI_C55_IRQ_FRAME_COLLISION] = "Frame collision error", + [MALI_C55_IRQ_UNUSED] = "IRQ bit unused", + [MALI_C55_IRQ_DMA_ERROR] = "DMA error", + [MALI_C55_IRQ_INPUT_STOPPED] = "Input port safely stopped", + [MALI_C55_IRQ_MET_AWB_TARGET1_HIT] = "AWB metering target 1 address hit", + [MALI_C55_IRQ_MET_AWB_TARGET2_HIT] = "AWB metering target 2 address hit" +}; + +static const unsigned int config_space_addrs[] = { + [MALI_C55_CONFIG_PING] = 0x0ab6c, + [MALI_C55_CONFIG_PONG] = 0x22b2c, +}; + +static const char * const mali_c55_clk_names[MALI_C55_NUM_CLKS] = { + "vclk", + "aclk", + "hclk", +}; + +static const char * const mali_c55_reset_names[MALI_C55_NUM_RESETS] = { + "vresetn", + "aresetn", + "hresetn", +}; + +/* + * System IO + * + * The Mali-C55 ISP has up to two configuration register spaces (called 'ping' + * and 'pong'), with the expectation that the 'active' space will be left + * untouched whilst a frame is being processed and the 'inactive' space + * configured ready to be switched to during the blanking period before the next + * frame processing starts. These spaces should ideally be set via DMA transfer + * from a buffer rather than through individual register set operations. There + * is also a shared global register space which should be set normally. For now + * though we will simply use a CPU write and target DMA transfers of the config + * space in the future. + * + * As groundwork for that path any read/write call that is made to an address + * within those config spaces should infact be directed to a buffer that was + * allocated to hold them rather than the IO memory itself. The actual copy of + * that buffer to IO mem will happen on interrupt. + */ + +void mali_c55_write(struct mali_c55 *mali_c55, unsigned int addr, u32 val) +{ + WARN_ON(addr >= MALI_C55_REG_CONFIG_SPACES_OFFSET); + + writel(val, mali_c55->base + addr); +} + +u32 mali_c55_read(struct mali_c55 *mali_c55, unsigned int addr) +{ + WARN_ON(addr >= MALI_C55_REG_CONFIG_SPACES_OFFSET); + + return readl(mali_c55->base + addr); +} + +void mali_c55_update_bits(struct mali_c55 *mali_c55, unsigned int addr, + u32 mask, u32 val) +{ + u32 orig, new; + + orig = mali_c55_read(mali_c55, addr); + + new = orig & ~mask; + new |= val & mask; + + if (new != orig) + mali_c55_write(mali_c55, addr, new); +} + +static void __mali_c55_ctx_write(struct mali_c55_context *ctx, + unsigned int addr, u32 val) +{ + addr = (addr - MALI_C55_REG_CONFIG_SPACES_OFFSET) / 4; + ctx->registers[addr] = val; +} + +void mali_c55_ctx_write(struct mali_c55 *mali_c55, unsigned int addr, u32 val) +{ + struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); + + WARN_ON(addr < MALI_C55_REG_CONFIG_SPACES_OFFSET); + + spin_lock(&ctx->lock); + __mali_c55_ctx_write(ctx, addr, val); + spin_unlock(&ctx->lock); +} + +static u32 __mali_c55_ctx_read(struct mali_c55_context *ctx, unsigned int addr) +{ + addr = (addr - MALI_C55_REG_CONFIG_SPACES_OFFSET) / 4; + return ctx->registers[addr]; +} + +u32 mali_c55_ctx_read(struct mali_c55 *mali_c55, unsigned int addr) +{ + struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); + u32 val; + + WARN_ON(addr < MALI_C55_REG_CONFIG_SPACES_OFFSET); + + spin_lock(&ctx->lock); + val = __mali_c55_ctx_read(ctx, addr); + spin_unlock(&ctx->lock); + + return val; +} + +void mali_c55_ctx_update_bits(struct mali_c55 *mali_c55, unsigned int addr, + u32 mask, u32 val) +{ + struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); + u32 orig, tmp; + + WARN_ON(addr < MALI_C55_REG_CONFIG_SPACES_OFFSET); + + spin_lock(&ctx->lock); + + orig = __mali_c55_ctx_read(ctx, addr); + + tmp = orig & ~mask; + tmp |= val & mask; + + if (tmp != orig) + __mali_c55_ctx_write(ctx, addr, tmp); + + spin_unlock(&ctx->lock); +} + +int mali_c55_config_write(struct mali_c55_context *ctx, + enum mali_c55_config_spaces cfg_space, + bool force_synchronous) +{ + struct mali_c55 *mali_c55 = ctx->mali_c55; + + memcpy_toio(mali_c55->base + config_space_addrs[cfg_space], + ctx->registers, MALI_C55_CONFIG_SPACE_SIZE); + + return 0; +} + +struct mali_c55_context *mali_c55_get_active_context(struct mali_c55 *mali_c55) +{ + return &mali_c55->context; +} + +static void mali_c55_remove_links(struct mali_c55 *mali_c55) +{ + unsigned int i; + + media_entity_remove_links(&mali_c55->tpg.sd.entity); + media_entity_remove_links(&mali_c55->isp.sd.entity); + + for (i = 0; i < MALI_C55_NUM_RSZS; i++) + media_entity_remove_links(&mali_c55->resizers[i].sd.entity); + + for (i = 0; i < MALI_C55_NUM_CAP_DEVS; i++) + media_entity_remove_links(&mali_c55->cap_devs[i].vdev.entity); +} + +static int mali_c55_create_links(struct mali_c55 *mali_c55) +{ + int ret; + + /* Test pattern generator to ISP */ + ret = media_create_pad_link(&mali_c55->tpg.sd.entity, 0, + &mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SINK_VIDEO, 0); + if (ret) { + dev_err(mali_c55->dev, "failed to link TPG and ISP\n"); + goto err_remove_links; + } + + /* Full resolution resizer pipe. */ + ret = media_create_pad_link(&mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + &mali_c55->resizers[MALI_C55_RSZ_FR].sd.entity, + MALI_C55_RSZ_SINK_PAD, + MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); + if (ret) { + dev_err(mali_c55->dev, "failed to link ISP and FR resizer\n"); + goto err_remove_links; + } + + /* Full resolution bypass. */ + ret = media_create_pad_link(&mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SOURCE_BYPASS, + &mali_c55->resizers[MALI_C55_RSZ_FR].sd.entity, + MALI_C55_RSZ_SINK_BYPASS_PAD, + MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); + if (ret) { + dev_err(mali_c55->dev, "failed to link ISP and FR resizer\n"); + goto err_remove_links; + } + + /* Resizer pipe to video capture nodes. */ + ret = media_create_pad_link(&mali_c55->resizers[0].sd.entity, + MALI_C55_RSZ_SOURCE_PAD, + &mali_c55->cap_devs[MALI_C55_CAP_DEV_FR].vdev.entity, + 0, MEDIA_LNK_FL_ENABLED); + if (ret) { + dev_err(mali_c55->dev, + "failed to link FR resizer and video device\n"); + goto err_remove_links; + } + + /* The downscale pipe is an optional hardware block */ + if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) { + ret = media_create_pad_link(&mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + &mali_c55->resizers[MALI_C55_RSZ_DS].sd.entity, + MALI_C55_RSZ_SINK_PAD, + MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); + if (ret) { + dev_err(mali_c55->dev, + "failed to link ISP and DS resizer\n"); + goto err_remove_links; + } + + ret = media_create_pad_link(&mali_c55->resizers[1].sd.entity, + MALI_C55_RSZ_SOURCE_PAD, + &mali_c55->cap_devs[MALI_C55_CAP_DEV_DS].vdev.entity, + 0, MEDIA_LNK_FL_ENABLED); + if (ret) { + dev_err(mali_c55->dev, + "failed to link DS resizer and video device\n"); + goto err_remove_links; + } + } + + return 0; + +err_remove_links: + mali_c55_remove_links(mali_c55); + return ret; +} + +static void mali_c55_unregister_entities(struct mali_c55 *mali_c55) +{ + mali_c55_remove_links(mali_c55); + mali_c55_unregister_tpg(mali_c55); + mali_c55_unregister_isp(mali_c55); + mali_c55_unregister_resizers(mali_c55); + mali_c55_unregister_capture_devs(mali_c55); +} + +static void mali_c55_swap_next_config(struct mali_c55 *mali_c55) +{ + struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); + + u32 curr_config; + + curr_config = mali_c55_read(mali_c55, MALI_C55_REG_PING_PONG_READ); + curr_config = (curr_config & MALI_C55_REG_PING_PONG_READ_MASK) + >> (ffs(MALI_C55_REG_PING_PONG_READ_MASK) - 1); + mali_c55->next_config = curr_config ^ 1; + + mali_c55_config_write(ctx, mali_c55->next_config ? + MALI_C55_CONFIG_PING : MALI_C55_CONFIG_PONG, + false); + + mali_c55_update_bits(mali_c55, MALI_C55_REG_MCU_CONFIG, + MALI_C55_REG_MCU_CONFIG_WRITE_MASK, + MALI_C55_MCU_CONFIG_WRITE(mali_c55->next_config)); +} + +static int mali_c55_register_entities(struct mali_c55 *mali_c55) +{ + int ret; + + ret = mali_c55_register_tpg(mali_c55); + if (ret) + return ret; + + ret = mali_c55_register_isp(mali_c55); + if (ret) + goto err_unregister_entities; + + ret = mali_c55_register_resizers(mali_c55); + if (ret) + goto err_unregister_entities; + + ret = mali_c55_register_capture_devs(mali_c55); + if (ret) + goto err_unregister_entities; + + ret = mali_c55_create_links(mali_c55); + if (ret) + goto err_unregister_entities; + + return 0; + +err_unregister_entities: + mali_c55_unregister_entities(mali_c55); + + return ret; +} + +static int mali_c55_notifier_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *subdev, + struct v4l2_async_connection *asc) +{ + struct mali_c55 *mali_c55 = container_of(notifier, + struct mali_c55, notifier); + struct media_pad *pad = &mali_c55->isp.pads[MALI_C55_ISP_PAD_SINK_VIDEO]; + int ret; + + /* + * By default we'll flag this link enabled and the TPG disabled, but + * no immutable flag because we need to be able to switch between the + * two. + */ + ret = v4l2_create_fwnode_links_to_pad(subdev, pad, + MEDIA_LNK_FL_ENABLED); + if (ret) + dev_err(mali_c55->dev, "failed to create link for %s\n", + subdev->name); + + return ret; +} + +static int mali_c55_notifier_complete(struct v4l2_async_notifier *notifier) +{ + struct mali_c55 *mali_c55 = container_of(notifier, + struct mali_c55, notifier); + + return v4l2_device_register_subdev_nodes(&mali_c55->v4l2_dev); +} + +static const struct v4l2_async_notifier_operations mali_c55_notifier_ops = { + .bound = mali_c55_notifier_bound, + .complete = mali_c55_notifier_complete, +}; + +static int mali_c55_parse_endpoint(struct mali_c55 *mali_c55) +{ + struct v4l2_async_connection *asc; + struct fwnode_handle *ep; + + /* + * The ISP should have a single endpoint pointing to some flavour of + * CSI-2 receiver...but for now at least we do want everything to work + * normally even with no sensors connected, as we have the TPG. If we + * don't find a sensor just warn and return success. + */ + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(mali_c55->dev), + 0, 0, 0); + if (!ep) { + dev_warn(mali_c55->dev, "no local endpoint found\n"); + return 0; + } + + asc = v4l2_async_nf_add_fwnode_remote(&mali_c55->notifier, ep, + struct v4l2_async_connection); + fwnode_handle_put(ep); + if (IS_ERR(asc)) { + dev_err(mali_c55->dev, "failed to add remote fwnode\n"); + return PTR_ERR(asc); + } + + return 0; +} + +static int mali_c55_media_frameworks_init(struct mali_c55 *mali_c55) +{ + int ret; + + strscpy(mali_c55->media_dev.model, "ARM Mali-C55 ISP", + sizeof(mali_c55->media_dev.model)); + + media_device_init(&mali_c55->media_dev); + ret = media_device_register(&mali_c55->media_dev); + if (ret) + goto err_cleanup_media_device; + + mali_c55->v4l2_dev.mdev = &mali_c55->media_dev; + ret = v4l2_device_register(mali_c55->dev, &mali_c55->v4l2_dev); + if (ret) { + dev_err(mali_c55->dev, "failed to register V4L2 device\n"); + goto err_unregister_media_device; + }; + + mali_c55->notifier.ops = &mali_c55_notifier_ops; + v4l2_async_nf_init(&mali_c55->notifier, &mali_c55->v4l2_dev); + + ret = mali_c55_register_entities(mali_c55); + if (ret) { + dev_err(mali_c55->dev, "failed to register entities\n"); + goto err_cleanup_nf; + } + + ret = mali_c55_parse_endpoint(mali_c55); + if (ret) + goto err_cleanup_nf; + + ret = v4l2_async_nf_register(&mali_c55->notifier); + if (ret) { + dev_err(mali_c55->dev, "failed to register notifier\n"); + goto err_unregister_entities; + } + + return 0; + +err_unregister_entities: + mali_c55_unregister_entities(mali_c55); +err_cleanup_nf: + v4l2_async_nf_cleanup(&mali_c55->notifier); + v4l2_device_unregister(&mali_c55->v4l2_dev); +err_unregister_media_device: + media_device_unregister(&mali_c55->media_dev); +err_cleanup_media_device: + media_device_cleanup(&mali_c55->media_dev); + + return ret; +} + +static void mali_c55_media_frameworks_deinit(struct mali_c55 *mali_c55) +{ + v4l2_async_nf_unregister(&mali_c55->notifier); + mali_c55_unregister_entities(mali_c55); + v4l2_async_nf_cleanup(&mali_c55->notifier); + v4l2_device_unregister(&mali_c55->v4l2_dev); + media_device_unregister(&mali_c55->media_dev); + media_device_cleanup(&mali_c55->media_dev); +} + +bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55) +{ + struct mali_c55_cap_dev *fr = &mali_c55->cap_devs[MALI_C55_CAP_DEV_FR]; + struct mali_c55_cap_dev *ds = &mali_c55->cap_devs[MALI_C55_CAP_DEV_DS]; + + return vb2_start_streaming_called(&fr->queue) && + (!(mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) || + vb2_start_streaming_called(&ds->queue)); +} + +static int mali_c55_check_hwcfg(struct mali_c55 *mali_c55) +{ + u32 product, version, revision, capabilities; + + product = mali_c55_read(mali_c55, MALI_C55_REG_PRODUCT); + version = mali_c55_read(mali_c55, MALI_C55_REG_VERSION); + revision = mali_c55_read(mali_c55, MALI_C55_REG_REVISION); + + mali_c55->media_dev.hw_revision = version; + + dev_info(mali_c55->dev, "Detected Mali-C55 ISP %u.%u.%u\n", + product, version, revision); + + capabilities = mali_c55_read(mali_c55, + MALI_C55_REG_GLOBAL_PARAMETER_STATUS); + + /* + * In its current iteration, the driver only supports inline mode. Given + * we cannot control input data timing in this mode, we cannot guarantee + * that the vertical blanking periods between frames will be long enough + * for us to write configuration data to the ISP during them. For that + * reason we can't really support single config space configuration + * until memory input mode is implemented. + */ + if (!(capabilities & MALI_C55_GPS_PONG_FITTED)) { + dev_err(mali_c55->dev, "Pong config space not fitted.\n"); + return -EINVAL; + } + + mali_c55->capabilities = capabilities & 0xffff; + + return 0; +} + +static irqreturn_t mali_c55_isr(int irq, void *context) +{ + struct device *dev = context; + struct mali_c55 *mali_c55 = dev_get_drvdata(dev); + unsigned long interrupt_status; + unsigned int i; + + interrupt_status = mali_c55_read(mali_c55, + MALI_C55_REG_INTERRUPT_STATUS_VECTOR); + if (!interrupt_status) + return IRQ_NONE; + + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR_VECTOR, + interrupt_status); + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR, 1); + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR, 0); + + for_each_set_bit(i, &interrupt_status, MALI_C55_NUM_IRQ_BITS) { + switch (i) { + case MALI_C55_IRQ_ISP_START: + mali_c55_isp_queue_event_sof(mali_c55); + + mali_c55_set_next_buffer(&mali_c55->cap_devs[MALI_C55_CAP_DEV_FR]); + if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) + mali_c55_set_next_buffer(&mali_c55->cap_devs[MALI_C55_CAP_DEV_DS]); + + mali_c55_swap_next_config(mali_c55); + + break; + case MALI_C55_IRQ_ISP_DONE: + /* + * TODO: Where the ISP has no Pong config fitted, we'd + * have to do the mali_c55_swap_next_config() call here. + */ + break; + case MALI_C55_IRQ_FR_Y_DONE: + mali_c55_set_plane_done(&mali_c55->cap_devs[MALI_C55_CAP_DEV_FR], + MALI_C55_PLANE_Y); + break; + case MALI_C55_IRQ_FR_UV_DONE: + mali_c55_set_plane_done(&mali_c55->cap_devs[MALI_C55_CAP_DEV_FR], + MALI_C55_PLANE_UV); + break; + case MALI_C55_IRQ_DS_Y_DONE: + mali_c55_set_plane_done(&mali_c55->cap_devs[MALI_C55_CAP_DEV_DS], + MALI_C55_PLANE_Y); + break; + case MALI_C55_IRQ_DS_UV_DONE: + mali_c55_set_plane_done(&mali_c55->cap_devs[MALI_C55_CAP_DEV_DS], + MALI_C55_PLANE_UV); + break; + default: + /* + * Only the above interrupts are currently unmasked. If + * we receive anything else here then something weird + * has gone on. + */ + dev_err(dev, "masked interrupt %s triggered\n", + mali_c55_interrupt_names[i]); + } + } + + return IRQ_HANDLED; +} + +static int mali_c55_init_context(struct mali_c55 *mali_c55, + struct resource *res) +{ + struct mali_c55_context *ctx = &mali_c55->context; + + ctx->base = res->start; + ctx->mali_c55 = mali_c55; + spin_lock_init(&ctx->lock); + + ctx->registers = kzalloc(MALI_C55_CONFIG_SPACE_SIZE, GFP_KERNEL); + if (!ctx->registers) + return -ENOMEM; + + /* + * The allocated memory is empty, we need to load the default + * register settings. We just read Ping; it's identical to Pong. + */ + memcpy_fromio(ctx->registers, + mali_c55->base + config_space_addrs[MALI_C55_CONFIG_PING], + MALI_C55_CONFIG_SPACE_SIZE); + + /* + * Some features of the ISP need to be disabled by default and only + * enabled at the same time as they're configured by a parameters buffer + */ + + /* Bypass the sqrt and square compression and expansion modules */ + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BYPASS_1, + MALI_C55_REG_BYPASS_1_FE_SQRT, + MALI_C55_REG_BYPASS_1_FE_SQRT); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BYPASS_3, + MALI_C55_REG_BYPASS_3_SQUARE_BE, + MALI_C55_REG_BYPASS_3_SQUARE_BE); + + /* Bypass the temper module */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_BYPASS_2, + MALI_C55_REG_BYPASS_2_TEMPER); + + /* Disable the temper module's DMA read/write */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_TEMPER_DMA_IO, 0x0); + + /* Bypass the colour noise reduction */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_BYPASS_4, + MALI_C55_REG_BYPASS_4_CNR); + + /* Disable the sinter module */ + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_SINTER_CONFIG, + MALI_C55_SINTER_ENABLE_MASK, 0); + + /* Disable the RGB Gamma module for each output */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_FR_GAMMA_RGB_ENABLE, 0); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_DS_GAMMA_RGB_ENABLE, 0); + + /* Disable the colour correction matrix */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_CCM_ENABLE, 0); + + return 0; +} + +static void __mali_c55_power_off(struct mali_c55 *mali_c55) +{ + reset_control_bulk_assert(ARRAY_SIZE(mali_c55->resets), mali_c55->resets); + clk_bulk_disable_unprepare(ARRAY_SIZE(mali_c55->clks), mali_c55->clks); +} + +static int mali_c55_runtime_suspend(struct device *dev) +{ + struct mali_c55 *mali_c55 = dev_get_drvdata(dev); + + if (irq_has_action(mali_c55->irqnum)) + free_irq(mali_c55->irqnum, dev); + __mali_c55_power_off(mali_c55); + + return 0; +} + +static int __mali_c55_power_on(struct mali_c55 *mali_c55) +{ + int ret; + u32 val; + + ret = clk_bulk_prepare_enable(ARRAY_SIZE(mali_c55->clks), + mali_c55->clks); + if (ret) { + dev_err(mali_c55->dev, "failed to enable clocks\n"); + return ret; + } + + ret = reset_control_bulk_deassert(ARRAY_SIZE(mali_c55->resets), + mali_c55->resets); + if (ret) { + dev_err(mali_c55->dev, "failed to deassert resets\n"); + return ret; + } + + /* Use "software only" context management. */ + mali_c55_update_bits(mali_c55, MALI_C55_REG_MCU_CONFIG, + MALI_C55_REG_MCU_CONFIG_OVERRIDE_MASK, 0x01); + + /* + * Mask the interrupts and clear any that were set, then unmask the ones + * that we actually want to handle. + */ + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_MASK_VECTOR, + MALI_C55_INTERRUPT_MASK_ALL); + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR_VECTOR, + MALI_C55_INTERRUPT_MASK_ALL); + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR, 0x01); + mali_c55_write(mali_c55, MALI_C55_REG_INTERRUPT_CLEAR, 0x00); + + mali_c55_update_bits(mali_c55, MALI_C55_REG_INTERRUPT_MASK_VECTOR, + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_ISP_START) | + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_ISP_DONE) | + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_FR_Y_DONE) | + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_FR_UV_DONE) | + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_DS_Y_DONE) | + MALI_C55_INTERRUPT_BIT(MALI_C55_IRQ_DS_UV_DONE), + 0x00); + + /* Set safe stop to ensure we're in a non-streaming state */ + mali_c55_write(mali_c55, MALI_C55_REG_INPUT_MODE_REQUEST, + MALI_C55_INPUT_SAFE_STOP); + readl_poll_timeout(mali_c55->base + MALI_C55_REG_MODE_STATUS, + val, !val, 10 * USEC_PER_MSEC, 250 * USEC_PER_MSEC); + + return 0; +} + +static int mali_c55_runtime_resume(struct device *dev) +{ + struct mali_c55 *mali_c55 = dev_get_drvdata(dev); + int ret; + + ret = __mali_c55_power_on(mali_c55); + if (ret) + return ret; + + /* + * The driver needs to transfer large amounts of register settings to + * the ISP each frame, using either a DMA transfer or memcpy. We use a + * threaded IRQ to avoid disabling interrupts the entire time that's + * happening. + */ + ret = request_threaded_irq(mali_c55->irqnum, NULL, mali_c55_isr, + IRQF_ONESHOT, dev_driver_string(dev), dev); + if (ret) { + __mali_c55_power_off(mali_c55); + dev_err(dev, "failed to request irq\n"); + } + + return ret; +} + +static const struct dev_pm_ops mali_c55_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(mali_c55_runtime_suspend, mali_c55_runtime_resume, + NULL) +}; + +static int mali_c55_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct mali_c55 *mali_c55; + struct resource *res; + int ret; + + mali_c55 = devm_kzalloc(dev, sizeof(*mali_c55), GFP_KERNEL); + if (!mali_c55) + return -ENOMEM; + + mali_c55->dev = dev; + platform_set_drvdata(pdev, mali_c55); + + mali_c55->base = devm_platform_get_and_ioremap_resource(pdev, 0, + &res); + if (IS_ERR(mali_c55->base)) + return dev_err_probe(dev, PTR_ERR(mali_c55->base), + "failed to map IO memory\n"); + + for (unsigned int i = 0; i < ARRAY_SIZE(mali_c55_clk_names); i++) + mali_c55->clks[i].id = mali_c55_clk_names[i]; + + ret = devm_clk_bulk_get(dev, ARRAY_SIZE(mali_c55->clks), mali_c55->clks); + if (ret) + return dev_err_probe(dev, ret, "failed to acquire clocks\n"); + + for (unsigned int i = 0; i < ARRAY_SIZE(mali_c55_reset_names); i++) + mali_c55->resets[i].id = mali_c55_reset_names[i]; + + ret = devm_reset_control_bulk_get_optional_shared(dev, + ARRAY_SIZE(mali_c55_reset_names), mali_c55->resets); + if (ret) + return dev_err_probe(dev, ret, "failed to acquire resets\n"); + + of_reserved_mem_device_init(dev); + vb2_dma_contig_set_max_seg_size(dev, UINT_MAX); + + ret = __mali_c55_power_on(mali_c55); + if (ret) + return dev_err_probe(dev, ret, "failed to power on\n"); + + ret = mali_c55_check_hwcfg(mali_c55); + if (ret) + goto err_power_off; + + ret = mali_c55_init_context(mali_c55, res); + if (ret) + goto err_power_off; + + mali_c55->media_dev.dev = dev; + + pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + ret = mali_c55_media_frameworks_init(mali_c55); + if (ret) + goto err_free_context_registers; + + pm_runtime_idle(&pdev->dev); + + mali_c55->irqnum = platform_get_irq(pdev, 0); + if (mali_c55->irqnum < 0) { + ret = mali_c55->irqnum; + dev_err(dev, "failed to get interrupt\n"); + goto err_deinit_media_frameworks; + } + + return 0; + +err_deinit_media_frameworks: + mali_c55_media_frameworks_deinit(mali_c55); + pm_runtime_disable(&pdev->dev); +err_free_context_registers: + kfree(mali_c55->context.registers); +err_power_off: + __mali_c55_power_off(mali_c55); + + return ret; +} + +static void mali_c55_remove(struct platform_device *pdev) +{ + struct mali_c55 *mali_c55 = platform_get_drvdata(pdev); + + kfree(mali_c55->context.registers); + mali_c55_media_frameworks_deinit(mali_c55); +} + +static const struct of_device_id mali_c55_of_match[] = { + { .compatible = "arm,mali-c55", }, + { /* Sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, mali_c55_of_match); + +static struct platform_driver mali_c55_driver = { + .driver = { + .name = "mali-c55", + .of_match_table = mali_c55_of_match, + .pm = &mali_c55_pm_ops, + }, + .probe = mali_c55_probe, + .remove = mali_c55_remove, +}; + +module_platform_driver(mali_c55_driver); + +MODULE_AUTHOR("Daniel Scally "); +MODULE_AUTHOR("Jacopo Mondi "); +MODULE_DESCRIPTION("ARM Mali-C55 ISP platform driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c new file mode 100644 index 000000000000..7a80be328c5d --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c @@ -0,0 +1,633 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Image signal processor + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +static const struct mali_c55_isp_format_info mali_c55_isp_fmts[] = { + { + .code = MEDIA_BUS_FMT_SRGGB20_1X20, + .shifted_code = MEDIA_BUS_FMT_SRGGB16_1X16, + .order = MALI_C55_BAYER_ORDER_RGGB, + .bypass = false, + }, + { + .code = MEDIA_BUS_FMT_SGRBG20_1X20, + .shifted_code = MEDIA_BUS_FMT_SGRBG16_1X16, + .order = MALI_C55_BAYER_ORDER_GRBG, + .bypass = false, + }, + { + .code = MEDIA_BUS_FMT_SGBRG20_1X20, + .shifted_code = MEDIA_BUS_FMT_SGBRG16_1X16, + .order = MALI_C55_BAYER_ORDER_GBRG, + .bypass = false, + }, + { + .code = MEDIA_BUS_FMT_SBGGR20_1X20, + .shifted_code = MEDIA_BUS_FMT_SBGGR16_1X16, + .order = MALI_C55_BAYER_ORDER_BGGR, + .bypass = false, + }, + { + .code = MEDIA_BUS_FMT_RGB202020_1X60, + .shifted_code = 0, /* Not relevant for this format */ + .order = 0, /* Not relevant for this format */ + .bypass = true, + } + /* + * TODO: Support MEDIA_BUS_FMT_YUV20_1X60 here. This is so that we can + * also support YUV input from a sensor passed-through to the output. At + * present we have no mechanism to test that though so it may have to + * wait a while... + */ +}; + +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_index(u32 index) +{ + if (index < ARRAY_SIZE(mali_c55_isp_fmts)) + return &mali_c55_isp_fmts[index]; + + return NULL; +} + +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_code(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_isp_fmts); i++) { + if (mali_c55_isp_fmts[i].code == code) + return &mali_c55_isp_fmts[i]; + } + + return NULL; +} + +const struct mali_c55_isp_format_info * +mali_c55_isp_get_mbus_config_by_shifted_code(u32 code) +{ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_isp_fmts); i++) { + if (mali_c55_isp_fmts[i].shifted_code == code) + return &mali_c55_isp_fmts[i]; + } + + return NULL; +} + +static void mali_c55_isp_stop(struct mali_c55 *mali_c55) +{ + u32 val; + + mali_c55_write(mali_c55, MALI_C55_REG_INPUT_MODE_REQUEST, + MALI_C55_INPUT_SAFE_STOP); + readl_poll_timeout(mali_c55->base + MALI_C55_REG_MODE_STATUS, + val, !val, 10 * USEC_PER_MSEC, 250 * USEC_PER_MSEC); +} + +static int mali_c55_isp_start(struct mali_c55 *mali_c55, + const struct v4l2_subdev_state *state) +{ + struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); + const struct mali_c55_isp_format_info *cfg; + const struct v4l2_mbus_framefmt *format; + const struct v4l2_rect *crop; + u32 val; + int ret; + + mali_c55_update_bits(mali_c55, MALI_C55_REG_MCU_CONFIG, + MALI_C55_REG_MCU_CONFIG_WRITE_MASK, + MALI_C55_REG_MCU_CONFIG_WRITE_PING); + + /* Apply input windowing */ + crop = v4l2_subdev_state_get_crop(state, MALI_C55_ISP_PAD_SINK_VIDEO); + format = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SINK_VIDEO); + cfg = mali_c55_isp_get_mbus_config_by_code(format->code); + + mali_c55_write(mali_c55, MALI_C55_REG_HC_START, + MALI_C55_HC_START(crop->left)); + mali_c55_write(mali_c55, MALI_C55_REG_HC_SIZE, + MALI_C55_HC_SIZE(crop->width)); + mali_c55_write(mali_c55, MALI_C55_REG_VC_START_SIZE, + MALI_C55_VC_START(crop->top) | + MALI_C55_VC_SIZE(crop->height)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BASE_ADDR, + MALI_C55_REG_ACTIVE_WIDTH_MASK, format->width); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BASE_ADDR, + MALI_C55_REG_ACTIVE_HEIGHT_MASK, + format->height << 16); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BAYER_ORDER, + MALI_C55_BAYER_ORDER_MASK, cfg->order); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_INPUT_WIDTH, + MALI_C55_INPUT_WIDTH_MASK, + MALI_C55_INPUT_WIDTH_20BIT); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_ISP_RAW_BYPASS, + MALI_C55_ISP_RAW_BYPASS_BYPASS_MASK, + cfg->bypass ? MALI_C55_ISP_RAW_BYPASS_BYPASS_MASK : + 0x00); + + ret = mali_c55_config_write(ctx, MALI_C55_CONFIG_PING, true); + if (ret) { + dev_err(mali_c55->dev, "failed to write ISP config\n"); + return ret; + } + + mali_c55_write(mali_c55, MALI_C55_REG_INPUT_MODE_REQUEST, + MALI_C55_INPUT_SAFE_START); + + ret = readl_poll_timeout(mali_c55->base + MALI_C55_REG_MODE_STATUS, val, + val, 10 * USEC_PER_MSEC, 250 * USEC_PER_MSEC); + if (ret) { + mali_c55_isp_stop(mali_c55); + dev_err(mali_c55->dev, "timeout starting ISP\n"); + return ret; + } + + return 0; +} + +static int mali_c55_isp_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + /* + * Only the internal RGB processed format is allowed on the regular + * processing source pad. + */ + if (code->pad == MALI_C55_ISP_PAD_SOURCE_VIDEO) { + if (code->index) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_RGB121212_1X36; + return 0; + } + + /* On the sink and bypass pads all the supported formats are allowed. */ + if (code->index >= ARRAY_SIZE(mali_c55_isp_fmts)) + return -EINVAL; + + code->code = mali_c55_isp_fmts[code->index].code; + + return 0; +} + +static int mali_c55_isp_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + const struct mali_c55_isp_format_info *cfg; + + if (fse->index > 0) + return -EINVAL; + + /* + * Only the internal RGB processed format is allowed on the regular + * processing source pad. + * + * On the sink and bypass pads all the supported formats are allowed. + */ + if (fse->pad == MALI_C55_ISP_PAD_SOURCE_VIDEO) { + if (fse->code != MEDIA_BUS_FMT_RGB121212_1X36) + return -EINVAL; + } else { + cfg = mali_c55_isp_get_mbus_config_by_code(fse->code); + if (!cfg) + return -EINVAL; + } + + fse->min_width = MALI_C55_MIN_WIDTH; + fse->min_height = MALI_C55_MIN_HEIGHT; + fse->max_width = MALI_C55_MAX_WIDTH; + fse->max_height = MALI_C55_MAX_HEIGHT; + + return 0; +} + +static int mali_c55_isp_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; + const struct mali_c55_isp_format_info *cfg; + struct v4l2_rect *crop; + + /* + * Disallow set_fmt on the source pads; format is fixed and the sizes + * are the result of applying the sink crop rectangle to the sink + * format. + */ + if (format->pad != MALI_C55_ISP_PAD_SINK_VIDEO) + return v4l2_subdev_get_fmt(sd, state, format); + + sink_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SINK_VIDEO); + + cfg = mali_c55_isp_get_mbus_config_by_code(fmt->code); + sink_fmt->code = cfg ? fmt->code : MEDIA_BUS_FMT_SRGGB20_1X20; + + /* + * Clamp sizes in the accepted limits and clamp the crop rectangle in + * the new sizes. + */ + sink_fmt->width = clamp(fmt->width, MALI_C55_MIN_WIDTH, + MALI_C55_MAX_WIDTH); + sink_fmt->height = clamp(fmt->height, MALI_C55_MIN_HEIGHT, + MALI_C55_MAX_HEIGHT); + + *fmt = *sink_fmt; + + crop = v4l2_subdev_state_get_crop(state, MALI_C55_ISP_PAD_SINK_VIDEO); + crop->left = 0; + crop->top = 0; + crop->width = sink_fmt->width; + crop->height = sink_fmt->height; + + /* + * Propagate format to source pads. On the 'regular' output pad use + * the internal RGB processed format, while on the bypass pad simply + * replicate the ISP sink format. The sizes on both pads are the same as + * the ISP sink crop rectangle. The "field" and "colorspace" fields are + * set in .init_state() and fixed for both source pads, as is the "code" + * field for the processed data source pad. + */ + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_VIDEO); + src_fmt->width = crop->width; + src_fmt->height = crop->height; + + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_BYPASS); + src_fmt->code = sink_fmt->code; + src_fmt->width = crop->width; + src_fmt->height = crop->height; + + return 0; +} + +static int mali_c55_isp_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + if (sel->pad != MALI_C55_ISP_PAD_SINK_VIDEO || + sel->target != V4L2_SEL_TGT_CROP) + return -EINVAL; + + sel->r = *v4l2_subdev_state_get_crop(state, MALI_C55_ISP_PAD_SINK_VIDEO); + + return 0; +} + +static int mali_c55_isp_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + struct v4l2_mbus_framefmt *src_fmt; + const struct v4l2_mbus_framefmt *fmt; + struct v4l2_rect *crop; + + if (sel->pad != MALI_C55_ISP_PAD_SINK_VIDEO || + sel->target != V4L2_SEL_TGT_CROP) + return -EINVAL; + + fmt = v4l2_subdev_state_get_format(state, MALI_C55_ISP_PAD_SINK_VIDEO); + + sel->r.left = clamp_t(unsigned int, sel->r.left, 0, fmt->width); + sel->r.top = clamp_t(unsigned int, sel->r.top, 0, fmt->height); + sel->r.width = clamp_t(unsigned int, sel->r.width, MALI_C55_MIN_WIDTH, + fmt->width - sel->r.left); + sel->r.height = clamp_t(unsigned int, sel->r.height, + MALI_C55_MIN_HEIGHT, + fmt->height - sel->r.top); + + crop = v4l2_subdev_state_get_crop(state, MALI_C55_ISP_PAD_SINK_VIDEO); + *crop = sel->r; + + /* + * Propagate the crop rectangle sizes to the source pad format. The crop + * isn't propagated to the bypass source pad, because the bypassed data + * cannot be cropped. + */ + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_VIDEO); + src_fmt->width = crop->width; + src_fmt->height = crop->height; + + return 0; +} + +static int mali_c55_isp_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct mali_c55_isp *isp = container_of(sd, struct mali_c55_isp, sd); + struct mali_c55 *mali_c55 = isp->mali_c55; + struct v4l2_subdev *src_sd; + struct media_pad *sink_pad; + int ret; + + /* + * We have two source pads, both of which have only a single stream. The + * core v4l2 code already validated those parameters so we can just get + * on with starting the ISP. + */ + + sink_pad = &isp->pads[MALI_C55_ISP_PAD_SINK_VIDEO]; + isp->remote_src = media_pad_remote_pad_unique(sink_pad); + src_sd = media_entity_to_v4l2_subdev(isp->remote_src->entity); + + isp->frame_sequence = 0; + ret = mali_c55_isp_start(mali_c55, state); + if (ret) { + dev_err(mali_c55->dev, "Failed to start ISP\n"); + isp->remote_src = NULL; + return ret; + } + + /* + * We only support a single input stream, so we can just enable the 1st + * entry in the streams mask. + */ + ret = v4l2_subdev_enable_streams(src_sd, isp->remote_src->index, BIT(0)); + if (ret) { + dev_err(mali_c55->dev, "Failed to start ISP source\n"); + mali_c55_isp_stop(mali_c55); + return ret; + } + + return 0; +} + +static int mali_c55_isp_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct mali_c55_isp *isp = container_of(sd, struct mali_c55_isp, sd); + struct mali_c55 *mali_c55 = isp->mali_c55; + struct v4l2_subdev *src_sd; + + if (isp->remote_src) { + src_sd = media_entity_to_v4l2_subdev(isp->remote_src->entity); + v4l2_subdev_disable_streams(src_sd, isp->remote_src->index, + BIT(0)); + } + isp->remote_src = NULL; + + mali_c55_isp_stop(mali_c55); + + return 0; +} + +static const struct v4l2_subdev_pad_ops mali_c55_isp_pad_ops = { + .enum_mbus_code = mali_c55_isp_enum_mbus_code, + .enum_frame_size = mali_c55_isp_enum_frame_size, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = mali_c55_isp_set_fmt, + .get_selection = mali_c55_isp_get_selection, + .set_selection = mali_c55_isp_set_selection, + .link_validate = v4l2_subdev_link_validate_default, + .enable_streams = mali_c55_isp_enable_streams, + .disable_streams = mali_c55_isp_disable_streams, +}; + +void mali_c55_isp_queue_event_sof(struct mali_c55 *mali_c55) +{ + struct v4l2_event event = { + .type = V4L2_EVENT_FRAME_SYNC, + }; + + event.u.frame_sync.frame_sequence = mali_c55->isp.frame_sequence; + v4l2_event_queue(mali_c55->isp.sd.devnode, &event); +} + +static int +mali_c55_isp_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh, + struct v4l2_event_subscription *sub) +{ + switch (sub->type) { + case V4L2_EVENT_FRAME_SYNC: + return v4l2_event_subscribe(fh, sub, 0, NULL); + case V4L2_EVENT_CTRL: + return v4l2_ctrl_subscribe_event(fh, sub); + default: + return -EINVAL; + } +} + +static const struct v4l2_subdev_core_ops mali_c55_isp_core_ops = { + .subscribe_event = mali_c55_isp_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_ops mali_c55_isp_ops = { + .pad = &mali_c55_isp_pad_ops, + .core = &mali_c55_isp_core_ops, +}; + +static int mali_c55_isp_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + struct v4l2_rect *in_crop; + + sink_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SINK_VIDEO); + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_VIDEO); + in_crop = v4l2_subdev_state_get_crop(state, + MALI_C55_ISP_PAD_SINK_VIDEO); + + sink_fmt->width = MALI_C55_DEFAULT_WIDTH; + sink_fmt->height = MALI_C55_DEFAULT_HEIGHT; + sink_fmt->field = V4L2_FIELD_NONE; + sink_fmt->code = MEDIA_BUS_FMT_SRGGB20_1X20; + sink_fmt->colorspace = V4L2_COLORSPACE_RAW; + sink_fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace); + sink_fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace); + sink_fmt->quantization = + V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace, + sink_fmt->ycbcr_enc); + + *v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_BYPASS) = *sink_fmt; + + src_fmt->width = MALI_C55_DEFAULT_WIDTH; + src_fmt->height = MALI_C55_DEFAULT_HEIGHT; + src_fmt->field = V4L2_FIELD_NONE; + src_fmt->code = MEDIA_BUS_FMT_RGB121212_1X36; + src_fmt->colorspace = V4L2_COLORSPACE_SRGB; + src_fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace); + src_fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace); + src_fmt->quantization = + V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace, + sink_fmt->ycbcr_enc); + + in_crop->top = 0; + in_crop->left = 0; + in_crop->width = MALI_C55_DEFAULT_WIDTH; + in_crop->height = MALI_C55_DEFAULT_HEIGHT; + + return 0; +} + +static const struct v4l2_subdev_internal_ops mali_c55_isp_internal_ops = { + .init_state = mali_c55_isp_init_state, +}; + +static const struct media_entity_operations mali_c55_isp_media_ops = { + .link_validate = v4l2_subdev_link_validate, +}; + +static int mali_c55_isp_s_ctrl(struct v4l2_ctrl *ctrl) +{ + /* + * .s_ctrl() is a mandatory operation, but the driver has only a single + * read only control. If we got here, something went badly wrong. + */ + return -EINVAL; +} + +static const struct v4l2_ctrl_ops mali_c55_isp_ctrl_ops = { + .s_ctrl = mali_c55_isp_s_ctrl, +}; + +/* NOT const because the default needs to be filled in at runtime */ +static struct v4l2_ctrl_config mali_c55_isp_v4l2_custom_ctrls[] = { + { + .ops = &mali_c55_isp_ctrl_ops, + .id = V4L2_CID_MALI_C55_CAPABILITIES, + .name = "Mali-C55 ISP Capabilities", + .type = V4L2_CTRL_TYPE_BITMASK, + .min = 0, + .max = MALI_C55_GPS_PONG_FITTED | + MALI_C55_GPS_WDR_FITTED | + MALI_C55_GPS_COMPRESSION_FITTED | + MALI_C55_GPS_TEMPER_FITTED | + MALI_C55_GPS_SINTER_LITE_FITTED | + MALI_C55_GPS_SINTER_FITTED | + MALI_C55_GPS_IRIDIX_LTM_FITTED | + MALI_C55_GPS_IRIDIX_GTM_FITTED | + MALI_C55_GPS_CNR_FITTED | + MALI_C55_GPS_FRSCALER_FITTED | + MALI_C55_GPS_DS_PIPE_FITTED, + .def = 0, + }, +}; + +static int mali_c55_isp_init_controls(struct mali_c55 *mali_c55) +{ + struct v4l2_ctrl_handler *handler = &mali_c55->isp.handler; + struct v4l2_ctrl *capabilities; + int ret; + + ret = v4l2_ctrl_handler_init(handler, 1); + if (ret) + return ret; + + mali_c55_isp_v4l2_custom_ctrls[0].def = mali_c55->capabilities; + + capabilities = v4l2_ctrl_new_custom(handler, + &mali_c55_isp_v4l2_custom_ctrls[0], + NULL); + if (capabilities) + capabilities->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + if (handler->error) { + dev_err(mali_c55->dev, "failed to register capabilities control\n"); + ret = handler->error; + v4l2_ctrl_handler_free(handler); + return ret; + } + + mali_c55->isp.sd.ctrl_handler = handler; + + return 0; +} + +int mali_c55_register_isp(struct mali_c55 *mali_c55) +{ + struct mali_c55_isp *isp = &mali_c55->isp; + struct v4l2_subdev *sd = &isp->sd; + int ret; + + isp->mali_c55 = mali_c55; + + v4l2_subdev_init(sd, &mali_c55_isp_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; + sd->entity.ops = &mali_c55_isp_media_ops; + sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_ISP; + sd->internal_ops = &mali_c55_isp_internal_ops; + strscpy(sd->name, MALI_C55_DRIVER_NAME " isp", sizeof(sd->name)); + + isp->pads[MALI_C55_ISP_PAD_SINK_VIDEO].flags = MEDIA_PAD_FL_SINK | + MEDIA_PAD_FL_MUST_CONNECT; + isp->pads[MALI_C55_ISP_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; + isp->pads[MALI_C55_ISP_PAD_SOURCE_BYPASS].flags = MEDIA_PAD_FL_SOURCE; + + ret = media_entity_pads_init(&sd->entity, MALI_C55_ISP_NUM_PADS, + isp->pads); + if (ret) + return ret; + + ret = mali_c55_isp_init_controls(mali_c55); + if (ret) + goto err_cleanup_media_entity; + + ret = v4l2_subdev_init_finalize(sd); + if (ret) + goto err_free_ctrl_handler; + + ret = v4l2_device_register_subdev(&mali_c55->v4l2_dev, sd); + if (ret) + goto err_cleanup_subdev; + + mutex_init(&isp->capture_lock); + + return 0; + +err_cleanup_subdev: + v4l2_subdev_cleanup(sd); +err_free_ctrl_handler: + v4l2_ctrl_handler_free(&isp->handler); +err_cleanup_media_entity: + media_entity_cleanup(&sd->entity); + isp->mali_c55 = NULL; + + return ret; +} + +void mali_c55_unregister_isp(struct mali_c55 *mali_c55) +{ + struct mali_c55_isp *isp = &mali_c55->isp; + + if (!isp->mali_c55) + return; + + mutex_destroy(&isp->capture_lock); + v4l2_device_unregister_subdev(&isp->sd); + v4l2_subdev_cleanup(&isp->sd); + media_entity_cleanup(&isp->sd.entity); +} diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h new file mode 100644 index 000000000000..66b144c6fe90 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h @@ -0,0 +1,318 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * ARM Mali-C55 ISP Driver - Register definitions + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#ifndef _MALI_C55_REGISTERS_H +#define _MALI_C55_REGISTERS_H + +#include + +/* ISP Common 0x00000 - 0x000ff */ + +#define MALI_C55_REG_API 0x00000 +#define MALI_C55_REG_PRODUCT 0x00004 +#define MALI_C55_REG_VERSION 0x00008 +#define MALI_C55_REG_REVISION 0x0000c +#define MALI_C55_REG_PULSE_MODE 0x0003c +#define MALI_C55_REG_INPUT_MODE_REQUEST 0x0009c +#define MALI_C55_INPUT_SAFE_STOP 0x00 +#define MALI_C55_INPUT_SAFE_START 0x01 +#define MALI_C55_REG_MODE_STATUS 0x000a0 +#define MALI_C55_REG_INTERRUPT_MASK_VECTOR 0x00030 +#define MALI_C55_INTERRUPT_MASK_ALL GENMASK(31, 0) + +#define MALI_C55_REG_GLOBAL_MONITOR 0x00050 + +#define MALI_C55_REG_GEN_VIDEO 0x00080 +#define MALI_C55_REG_GEN_VIDEO_ON_MASK BIT(0) +#define MALI_C55_REG_GEN_VIDEO_MULTI_MASK BIT(1) +#define MALI_C55_REG_GEN_PREFETCH_MASK GENMASK(31, 16) + +#define MALI_C55_REG_MCU_CONFIG 0x00020 +#define MALI_C55_REG_MCU_CONFIG_OVERRIDE_MASK BIT(0) +#define MALI_C55_REG_MCU_CONFIG_WRITE_MASK BIT(1) +#define MALI_C55_MCU_CONFIG_WRITE(x) ((x) << 1) +#define MALI_C55_REG_MCU_CONFIG_WRITE_PING BIT(1) +#define MALI_C55_REG_MCU_CONFIG_WRITE_PONG 0x00 +#define MALI_C55_REG_MULTI_CONTEXT_MODE_MASK BIT(8) +#define MALI_C55_REG_PING_PONG_READ 0x00024 +#define MALI_C55_REG_PING_PONG_READ_MASK BIT(2) + +#define MALI_C55_REG_INTERRUPT_CLEAR_VECTOR 0x00034 +#define MALI_C55_REG_INTERRUPT_CLEAR 0x00040 +#define MALI_C55_REG_INTERRUPT_STATUS_VECTOR 0x00044 + +enum mali_c55_interrupts { + MALI_C55_IRQ_ISP_START, + MALI_C55_IRQ_ISP_DONE, + MALI_C55_IRQ_MCM_ERROR, + MALI_C55_IRQ_BROKEN_FRAME_ERROR, + MALI_C55_IRQ_MET_AF_DONE, + MALI_C55_IRQ_MET_AEXP_DONE, + MALI_C55_IRQ_MET_AWB_DONE, + MALI_C55_IRQ_AEXP_1024_DONE, + MALI_C55_IRQ_IRIDIX_MET_DONE, + MALI_C55_IRQ_LUT_INIT_DONE, + MALI_C55_IRQ_FR_Y_DONE, + MALI_C55_IRQ_FR_UV_DONE, + MALI_C55_IRQ_DS_Y_DONE, + MALI_C55_IRQ_DS_UV_DONE, + MALI_C55_IRQ_LINEARIZATION_DONE, + MALI_C55_IRQ_RAW_FRONTEND_DONE, + MALI_C55_IRQ_NOISE_REDUCTION_DONE, + MALI_C55_IRQ_IRIDIX_DONE, + MALI_C55_IRQ_BAYER2RGB_DONE, + MALI_C55_IRQ_WATCHDOG_TIMER, + MALI_C55_IRQ_FRAME_COLLISION, + MALI_C55_IRQ_UNUSED, + MALI_C55_IRQ_DMA_ERROR, + MALI_C55_IRQ_INPUT_STOPPED, + MALI_C55_IRQ_MET_AWB_TARGET1_HIT, + MALI_C55_IRQ_MET_AWB_TARGET2_HIT, + MALI_C55_NUM_IRQ_BITS +}; + +#define MALI_C55_INTERRUPT_BIT(x) BIT(x) + +#define MALI_C55_REG_GLOBAL_PARAMETER_STATUS 0x00068 +#define MALI_C55_GPS_PONG_FITTED BIT(0) +#define MALI_C55_GPS_WDR_FITTED BIT(1) +#define MALI_C55_GPS_COMPRESSION_FITTED BIT(2) +#define MALI_C55_GPS_TEMPER_FITTED BIT(3) +#define MALI_C55_GPS_SINTER_LITE_FITTED BIT(4) +#define MALI_C55_GPS_SINTER_FITTED BIT(5) +#define MALI_C55_GPS_IRIDIX_LTM_FITTED BIT(6) +#define MALI_C55_GPS_IRIDIX_GTM_FITTED BIT(7) +#define MALI_C55_GPS_CNR_FITTED BIT(8) +#define MALI_C55_GPS_FRSCALER_FITTED BIT(9) +#define MALI_C55_GPS_DS_PIPE_FITTED BIT(10) + +#define MALI_C55_REG_BLANKING 0x00084 +#define MALI_C55_REG_HBLANK_MASK GENMASK(15, 0) +#define MALI_C55_REG_VBLANK_MASK GENMASK(31, 16) +#define MALI_C55_VBLANK(x) ((x) << 16) + +#define MALI_C55_REG_HC_START 0x00088 +#define MALI_C55_HC_START(h) (((h) & 0xffff) << 16) +#define MALI_C55_REG_HC_SIZE 0x0008c +#define MALI_C55_HC_SIZE(h) ((h) & 0xffff) +#define MALI_C55_REG_VC_START_SIZE 0x00094 +#define MALI_C55_VC_START(v) ((v) & 0xffff) +#define MALI_C55_VC_SIZE(v) (((v) & 0xffff) << 16) + +/* Ping/Pong Configuration Space */ +#define MALI_C55_REG_BASE_ADDR 0x18e88 +#define MALI_C55_REG_BYPASS_0 0x18eac +#define MALI_C55_REG_BYPASS_0_VIDEO_TEST BIT(0) +#define MALI_C55_REG_BYPASS_0_INPUT_FMT BIT(1) +#define MALI_C55_REG_BYPASS_0_DECOMPANDER BIT(2) +#define MALI_C55_REG_BYPASS_0_SENSOR_OFFSET_WDR BIT(3) +#define MALI_C55_REG_BYPASS_0_GAIN_WDR BIT(4) +#define MALI_C55_REG_BYPASS_0_FRAME_STITCH BIT(5) +#define MALI_C55_REG_BYPASS_1 0x18eb0 +#define MALI_C55_REG_BYPASS_1_DIGI_GAIN BIT(0) +#define MALI_C55_REG_BYPASS_1_FE_SENSOR_OFFS BIT(1) +#define MALI_C55_REG_BYPASS_1_FE_SQRT BIT(2) +#define MALI_C55_REG_BYPASS_1_RAW_FE BIT(3) +#define MALI_C55_REG_BYPASS_2 0x18eb8 +#define MALI_C55_REG_BYPASS_2_SINTER BIT(0) +#define MALI_C55_REG_BYPASS_2_TEMPER BIT(1) +#define MALI_C55_REG_BYPASS_3 0x18ebc +#define MALI_C55_REG_BYPASS_3_SQUARE_BE BIT(0) +#define MALI_C55_REG_BYPASS_3_SENSOR_OFFSET_PRE_SH BIT(1) +#define MALI_C55_REG_BYPASS_3_MESH_SHADING BIT(3) +#define MALI_C55_REG_BYPASS_3_WHITE_BALANCE BIT(4) +#define MALI_C55_REG_BYPASS_3_IRIDIX BIT(5) +#define MALI_C55_REG_BYPASS_3_IRIDIX_GAIN BIT(6) +#define MALI_C55_REG_BYPASS_4 0x18ec0 +#define MALI_C55_REG_BYPASS_4_DEMOSAIC_RGB BIT(1) +#define MALI_C55_REG_BYPASS_4_PF_CORRECTION BIT(3) +#define MALI_C55_REG_BYPASS_4_CCM BIT(4) +#define MALI_C55_REG_BYPASS_4_CNR BIT(5) +#define MALI_C55_REG_FR_BYPASS 0x18ec4 +#define MALI_C55_REG_DS_BYPASS 0x18ec8 +#define MALI_C55_BYPASS_CROP BIT(0) +#define MALI_C55_BYPASS_SCALER BIT(1) +#define MALI_C55_BYPASS_GAMMA_RGB BIT(2) +#define MALI_C55_BYPASS_SHARPEN BIT(3) +#define MALI_C55_BYPASS_CS_CONV BIT(4) +#define MALI_C55_REG_ISP_RAW_BYPASS 0x18ecc +#define MALI_C55_ISP_RAW_BYPASS_BYPASS_MASK BIT(0) +#define MALI_C55_ISP_RAW_BYPASS_FR_BYPASS_MASK GENMASK(9, 8) +#define MALI_C55_ISP_RAW_BYPASS_RAW_FR_BYPASS (2 << 8) +#define MALI_C55_ISP_RAW_BYPASS_RGB_FR_BYPASS (1 << 8) +#define MALI_C55_ISP_RAW_BYPASS_DS_PIPE_DISABLE BIT(1) +#define MALI_C55_ISP_RAW_BYPASS_RAW_BYPASS BIT(0) + +#define MALI_C55_REG_ACTIVE_WIDTH_MASK 0xffff +#define MALI_C55_REG_ACTIVE_HEIGHT_MASK 0xffff0000 +#define MALI_C55_REG_BAYER_ORDER 0x18e8c +#define MALI_C55_BAYER_ORDER_MASK GENMASK(1, 0) +#define MALI_C55_BAYER_ORDER_RGGB 0 +#define MALI_C55_BAYER_ORDER_GRBG 1 +#define MALI_C55_BAYER_ORDER_GBRG 2 +#define MALI_C55_BAYER_ORDER_BGGR 3 + +#define MALI_C55_REG_TPG_CH0 0x18ed8 +#define MALI_C55_TEST_PATTERN_ON_OFF BIT(0) +#define MALI_C55_TEST_PATTERN_RGB_MASK BIT(1) +#define MALI_C55_TEST_PATTERN_RGB(x) ((x) << 1) +#define MALI_C55_REG_TPG_R_BACKGROUND 0x18ee0 +#define MALI_C55_REG_TPG_G_BACKGROUND 0x18ee4 +#define MALI_C55_REG_TPG_B_BACKGROUND 0x18ee8 +#define MALI_C55_TPG_BACKGROUND_MAX 0xfffff +#define MALI_C55_REG_INPUT_WIDTH 0x18f98 +#define MALI_C55_INPUT_WIDTH_MASK GENMASK(18, 16) +#define MALI_C55_INPUT_WIDTH_8BIT (0 << 16) +#define MALI_C55_INPUT_WIDTH_10BIT (1 << 16) +#define MALI_C55_INPUT_WIDTH_12BIT (2 << 16) +#define MALI_C55_INPUT_WIDTH_14BIT (3 << 16) +#define MALI_C55_INPUT_WIDTH_16BIT (4 << 16) +#define MALI_C55_INPUT_WIDTH_20BIT (5 << 16) +#define MALI_C55_REG_SPACE_SIZE 0x4000 +#define MALI_C55_REG_CONFIG_SPACES_OFFSET 0x0ab6c +#define MALI_C55_CONFIG_SPACE_SIZE 0x1231c + +#define MALI_C55_REG_SINTER_CONFIG 0x19348 +#define MALI_C55_SINTER_VIEW_FILTER_MASK GENMASK(1, 0) +#define MALI_C55_SINTER_SCALE_MODE_MASK GENMASK(3, 2) +#define MALI_C55_SINTER_ENABLE_MASK BIT(4) +#define MALI_C55_SINTER_FILTER_SELECT_MASK BIT(5) +#define MALI_C55_SINTER_INT_SELECT_MASK BIT(6) +#define MALI_C55_SINTER_RM_ENABLE_MASK BIT(7) + +/* Temper DMA */ +#define MALI_C55_REG_TEMPER_DMA_IO 0x1ab78 +#define MALI_C55_TEMPER_DMA_WRITE_ON BIT(0) +#define MALI_C55_TEMPER_DMA_READ_ON BIT(1) + +/* Colour Correction Matrix Configuration */ +#define MALI_C55_REG_CCM_ENABLE 0x1b07c +#define MALI_C55_CCM_ENABLE_MASK BIT(0) +#define MALI_C55_REG_CCM_COEF_R_R 0x1b080 +#define MALI_C55_REG_CCM_COEF_R_G 0x1b084 +#define MALI_C55_REG_CCM_COEF_R_B 0x1b088 +#define MALI_C55_REG_CCM_COEF_G_R 0x1b090 +#define MALI_C55_REG_CCM_COEF_G_G 0x1b094 +#define MALI_C55_REG_CCM_COEF_G_B 0x1b098 +#define MALI_C55_REG_CCM_COEF_B_R 0x1b0a0 +#define MALI_C55_REG_CCM_COEF_B_G 0x1b0a4 +#define MALI_C55_REG_CCM_COEF_B_B 0x1b0a8 +#define MALI_C55_CCM_COEF_MASK GENMASK(12, 0) +#define MALI_C55_REG_CCM_ANTIFOG_GAIN_R 0x1b0b0 +#define MALI_C55_REG_CCM_ANTIFOG_GAIN_G 0x1b0b4 +#define MALI_C55_REG_CCM_ANTIFOG_GAIN_B 0x1b0b8 +#define MALI_C55_CCM_ANTIFOG_GAIN_MASK GENMASK(11, 0) +#define MALI_C55_REG_CCM_ANTIFOG_OFFSET_R 0x1b0c0 +#define MALI_C55_REG_CCM_ANTIFOG_OFFSET_G 0x1b0c4 +#define MALI_C55_REG_CCM_ANTIFOG_OFFSET_B 0x1b0c8 +#define MALI_C55_CCM_ANTIFOG_OFFSET_MASK GENMASK(11, 0) + +/* + * The Mali-C55 ISP has up to two output pipes; known as full resolution and + * down scaled. The register space for these is laid out identically, but offset + * by 372 bytes. + */ +#define MALI_C55_CAP_DEV_FR_REG_OFFSET 0x0 +#define MALI_C55_CAP_DEV_DS_REG_OFFSET 0x174 + +#define MALI_C55_REG_CS_CONV_CONFIG 0x1c098 +#define MALI_C55_CS_CONV_MATRIX_MASK BIT(0) +#define MALI_C55_CS_CONV_FILTER_MASK BIT(1) +#define MALI_C55_CS_CONV_HORZ_DOWNSAMPLE_MASK BIT(2) +#define MALI_C55_CS_CONV_VERT_DOWNSAMPLE_MASK BIT(3) +#define MALI_C55_CS_CONV_FILTER_ENABLE (0x01 << 1) +#define MALI_C55_CS_CONV_HORZ_DOWNSAMPLE_ENABLE (0x01 << 2) +#define MALI_C55_CS_CONV_VERT_DOWNSAMPLE_ENABLE (0x01 << 3) +#define MALI_C55_REG_Y_WRITER_MODE 0x1c0ec +#define MALI_C55_REG_UV_WRITER_MODE 0x1c144 +#define MALI_C55_WRITER_MODE_MASK GENMASK(4, 0) +#define MALI_C55_OUTPUT_DISABLED 0 +#define MALI_C55_OUTPUT_RGB32 1 +#define MALI_C55_OUTPUT_A2R10G10B10 2 +#define MALI_C55_OUTPUT_RGB565 3 +#define MALI_C55_OUTPUT_RGB24 4 +#define MALI_C55_OUTPUT_GEN32 5 +#define MALI_C55_OUTPUT_RAW16 6 +#define MALI_C55_OUTPUT_AYUV 8 +#define MALI_C55_OUTPUT_Y410 9 +#define MALI_C55_OUTPUT_YUY2 10 +#define MALI_C55_OUTPUT_UYVY 11 +#define MALI_C55_OUTPUT_Y210 12 +#define MALI_C55_OUTPUT_NV12_21 13 +#define MALI_C55_OUTPUT_YUV_420_422 17 +#define MALI_C55_OUTPUT_P210_P010 19 +#define MALI_C55_OUTPUT_YUV422 20 +#define MALI_C55_WRITER_SUBMODE_MASK GENMASK(7, 6) +#define MALI_C55_WRITER_SUBMODE(x) ((x) << 6) +#define MALI_C55_OUTPUT_PLANE_ALT0 0 +#define MALI_C55_OUTPUT_PLANE_ALT1 1 +#define MALI_C55_OUTPUT_PLANE_ALT2 2 +#define MALI_C55_WRITER_FRAME_WRITE_MASK BIT(9) +#define MALI_C55_WRITER_FRAME_WRITE_ENABLE (0x01 << 9) +#define MALI_C55_REG_ACTIVE_OUT_Y_SIZE 0x1c0f0 +#define MALI_C55_REG_ACTIVE_OUT_UV_SIZE 0x1c148 +#define MALI_C55_REG_ACTIVE_OUT_SIZE_W(w) ((w) << 0) +#define MALI_C55_REG_ACTIVE_OUT_SIZE_H(h) ((h) << 16) +#define MALI_C55_REG_Y_WRITER_BANKS_BASE 0x1c0f4 +#define MALI_C55_REG_Y_WRITER_BANKS_CONFIG 0x1c108 +#define MALI_C55_REG_Y_WRITER_MAX_BANKS_MASK GENMASK(2, 0) +#define MALI_C55_REG_Y_WRITER_BANKS_RESTART BIT(3) +#define MALI_C55_REG_Y_WRITER_OFFSET 0x1c10c +#define MALI_C55_REG_UV_WRITER_BANKS_BASE 0x1c14c +#define MALI_C55_REG_UV_WRITER_BANKS_CONFIG 0x1c160 +#define MALI_C55_REG_UV_WRITER_MAX_BANKS_MASK GENMASK(2, 0) +#define MALI_C55_REG_UV_WRITER_BANKS_RESTART BIT(3) +#define MALI_C55_REG_UV_WRITER_OFFSET 0x1c164 + +#define MALI_C55_REG_TEST_GEN_CH0_OFF_ON +#define MALI_C55_REG_TEST_GEN_CH0_PATTERN_TYPE 0x18edc + +#define MALI_C55_REG_CROP_EN 0x1c028 +#define MALI_C55_CROP_ENABLE BIT(0) +#define MALI_C55_REG_CROP_X_START 0x1c02c +#define MALI_C55_REG_CROP_Y_START 0x1c030 +#define MALI_C55_REG_CROP_X_SIZE 0x1c034 +#define MALI_C55_REG_CROP_Y_SIZE 0x1c038 +#define MALI_C55_REG_SCALER_TIMEOUT_EN 0x1c040 +#define MALI_C55_SCALER_TIMEOUT_EN BIT(4) +#define MALI_C55_SCALER_TIMEOUT(t) ((t) << 16) +#define MALI_C55_REG_SCALER_IN_WIDTH 0x1c044 +#define MALI_C55_REG_SCALER_IN_HEIGHT 0x1c048 +#define MALI_C55_REG_SCALER_OUT_WIDTH 0x1c04c +#define MALI_C55_REG_SCALER_OUT_HEIGHT 0x1c050 +#define MALI_C55_REG_SCALER_HFILT_TINC 0x1c054 +#define MALI_C55_REG_SCALER_HFILT_COEF 0x1c058 +#define MALI_C55_REG_SCALER_VFILT_TINC 0x1c05c +#define MALI_C55_REG_SCALER_VFILT_COEF 0x1c060 + +#define MALI_C55_REG_GAMMA_RGB_ENABLE 0x1c064 +#define MALI_C55_GAMMA_ENABLE_MASK BIT(0) +#define MALI_C55_REG_GAMMA_GAINS_1 0x1c068 +#define MALI_C55_GAMMA_GAIN_R_MASK GENMASK(11, 0) +#define MALI_C55_GAMMA_GAIN_G_MASK GENMASK(27, 16) +#define MALI_C55_REG_GAMMA_GAINS_2 0x1c06c +#define MALI_C55_GAMMA_GAIN_B_MASK GENMASK(11, 0) +#define MALI_C55_REG_GAMMA_OFFSETS_1 0x1c070 +#define MALI_C55_GAMMA_OFFSET_R_MASK GENMASK(11, 0) +#define MALI_C55_GAMMA_OFFSET_G_MASK GENMASK(27, 16) +#define MALI_C55_REG_GAMMA_OFFSETS_2 0x1c074 +#define MALI_C55_GAMMA_OFFSET_B_MASK GENMASK(11, 0) + +/* + * A re-definition of an above register. These will usually be written on a per + * capture device basis and handled with mali_c55_cap_dev_write(), but on + * startup is written by core.c + */ +#define MALI_C55_REG_FR_GAMMA_RGB_ENABLE 0x1c064 +#define MALI_C55_REG_DS_GAMMA_RGB_ENABLE 0x1c1d8 + +#define MALI_C55_REG_FR_SCALER_HFILT 0x34a8 +#define MALI_C55_REG_FR_SCALER_VFILT 0x44a8 +#define MALI_C55_REG_DS_SCALER_HFILT 0x14a8 +#define MALI_C55_REG_DS_SCALER_VFILT 0x24a8 + +#endif /* _MALI_C55_REGISTERS_H */ diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-resizer.c b/drivers/media/platform/arm/mali-c55/mali-c55-resizer.c new file mode 100644 index 000000000000..a8d739af74b6 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-resizer.c @@ -0,0 +1,1156 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Image signal processor + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include + +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +/* Scaling factor in Q4.20 format. */ +#define MALI_C55_RSZ_SCALER_FACTOR (1U << 20) + +#define MALI_C55_RSZ_COEFS_BANKS 8 +#define MALI_C55_RSZ_COEFS_ENTRIES 64 + +static inline struct mali_c55_resizer * +sd_to_mali_c55_rsz(struct v4l2_subdev *sd) +{ + return container_of(sd, struct mali_c55_resizer, sd); +} + +static const unsigned int +mali_c55_rsz_filter_coeffs_h[MALI_C55_RSZ_COEFS_BANKS] + [MALI_C55_RSZ_COEFS_ENTRIES] = { + { /* Bank 0 */ + 0x24fc0000, 0x0000fc24, 0x27fc0000, 0x0000fc21, + 0x28fc0000, 0x0000fd1f, 0x2cfb0000, 0x0000fd1c, + 0x2efb0000, 0x0000fd1a, 0x30fb0000, 0x0000fe17, + 0x32fb0000, 0x0000fe15, 0x35fb0000, 0x0000fe12, + 0x35fc0000, 0x0000ff10, 0x37fc0000, 0x0000ff0e, + 0x39fc0000, 0x0000ff0c, 0x3afd0000, 0x0000ff0a, + 0x3afe0000, 0x00000008, 0x3cfe0000, 0x00000006, + 0x3dff0000, 0x00000004, 0x3d000000, 0x00000003, + 0x3c020000, 0x00000002, 0x3d030000, 0x00000000, + 0x3d040000, 0x000000ff, 0x3c060000, 0x000000fe, + 0x3a080000, 0x000000fe, 0x3a0aff00, 0x000000fd, + 0x390cff00, 0x000000fc, 0x370eff00, 0x000000fc, + 0x3510ff00, 0x000000fc, 0x3512fe00, 0x000000fb, + 0x3215fe00, 0x000000fb, 0x3017fe00, 0x000000fb, + 0x2e1afd00, 0x000000fb, 0x2c1cfd00, 0x000000fb, + 0x281ffd00, 0x000000fc, 0x2721fc00, 0x000000fc, + }, + { /* Bank 1 */ + 0x25fb0000, 0x0000fb25, 0x27fb0000, 0x0000fb23, + 0x29fb0000, 0x0000fb21, 0x2afc0000, 0x0000fb1f, + 0x2cfc0000, 0x0000fb1d, 0x2efc0000, 0x0000fb1b, + 0x2ffd0000, 0x0000fb19, 0x2ffe0000, 0x0000fc17, + 0x31fe0000, 0x0000fc15, 0x32ff0000, 0x0000fc13, + 0x3400ff00, 0x0000fc11, 0x3301ff00, 0x0000fd10, + 0x3402ff00, 0x0000fd0e, 0x3503ff00, 0x0000fd0c, + 0x3505ff00, 0x0000fd0a, 0x3506fe00, 0x0000fe09, + 0x3607fe00, 0x0000fe07, 0x3509fe00, 0x0000fe06, + 0x350afd00, 0x0000ff05, 0x350cfd00, 0x0000ff03, + 0x340efd00, 0x0000ff02, 0x3310fd00, 0x0000ff01, + 0x3411fc00, 0x0000ff00, 0x3213fc00, 0x000000ff, + 0x3115fc00, 0x000000fe, 0x2f17fc00, 0x000000fe, + 0x2f19fb00, 0x000000fd, 0x2e1bfb00, 0x000000fc, + 0x2c1dfb00, 0x000000fc, 0x2a1ffb00, 0x000000fc, + 0x2921fb00, 0x000000fb, 0x2723fb00, 0x000000fb, + }, + { /* Bank 2 */ + 0x1f010000, 0x0000011f, 0x21010000, 0x0000001e, + 0x21020000, 0x0000001d, 0x22020000, 0x0000001c, + 0x23030000, 0x0000ff1b, 0x2404ff00, 0x0000ff1a, + 0x2504ff00, 0x0000ff19, 0x2505ff00, 0x0000ff18, + 0x2606ff00, 0x0000fe17, 0x2607ff00, 0x0000fe16, + 0x2708ff00, 0x0000fe14, 0x2709ff00, 0x0000fe13, + 0x270aff00, 0x0000fe12, 0x280bfe00, 0x0000fe11, + 0x280cfe00, 0x0000fe10, 0x280dfe00, 0x0000fe0f, + 0x280efe00, 0x0000fe0e, 0x280ffe00, 0x0000fe0d, + 0x2810fe00, 0x0000fe0c, 0x2811fe00, 0x0000fe0b, + 0x2712fe00, 0x0000ff0a, 0x2713fe00, 0x0000ff09, + 0x2714fe00, 0x0000ff08, 0x2616fe00, 0x0000ff07, + 0x2617fe00, 0x0000ff06, 0x2518ff00, 0x0000ff05, + 0x2519ff00, 0x0000ff04, 0x241aff00, 0x0000ff04, + 0x231bff00, 0x00000003, 0x221c0000, 0x00000002, + 0x211d0000, 0x00000002, 0x211e0000, 0x00000001, + }, + { /* Bank 3 */ + 0x1b06ff00, 0x00ff061b, 0x1b07ff00, 0x00ff061a, + 0x1c07ff00, 0x00ff051a, 0x1c08ff00, 0x00ff0519, + 0x1c09ff00, 0x00ff0419, 0x1d09ff00, 0x00ff0418, + 0x1e0aff00, 0x00ff0317, 0x1e0aff00, 0x00ff0317, + 0x1e0bff00, 0x00ff0316, 0x1f0cff00, 0x00ff0215, + 0x1e0cff00, 0x00000215, 0x1e0dff00, 0x00000214, + 0x1e0e0000, 0x00000113, 0x1e0e0000, 0x00000113, + 0x1e0f0000, 0x00000112, 0x1f100000, 0x00000011, + 0x20100000, 0x00000010, 0x1f110000, 0x00000010, + 0x1e120100, 0x0000000f, 0x1e130100, 0x0000000e, + 0x1e130100, 0x0000000e, 0x1e140200, 0x0000ff0d, + 0x1e150200, 0x0000ff0c, 0x1f1502ff, 0x0000ff0c, + 0x1e1603ff, 0x0000ff0b, 0x1e1703ff, 0x0000ff0a, + 0x1e1703ff, 0x0000ff0a, 0x1d1804ff, 0x0000ff09, + 0x1c1904ff, 0x0000ff09, 0x1c1905ff, 0x0000ff08, + 0x1c1a05ff, 0x0000ff07, 0x1b1a06ff, 0x0000ff07, + }, + { /* Bank 4 */ + 0x17090000, 0x00000917, 0x18090000, 0x00000916, + 0x170a0100, 0x00000816, 0x170a0100, 0x00000816, + 0x180b0100, 0x00000715, 0x180b0100, 0x00000715, + 0x170c0100, 0x00000715, 0x190c0100, 0x00000614, + 0x180d0100, 0x00000614, 0x190d0200, 0x00000513, + 0x180e0200, 0x00000513, 0x180e0200, 0x00000513, + 0x1a0e0200, 0x00000412, 0x190f0200, 0x00000412, + 0x190f0300, 0x00000411, 0x18100300, 0x00000411, + 0x1a100300, 0x00000310, 0x18110400, 0x00000310, + 0x19110400, 0x0000030f, 0x19120400, 0x0000020f, + 0x1a120400, 0x0000020e, 0x18130500, 0x0000020e, + 0x18130500, 0x0000020e, 0x19130500, 0x0000020d, + 0x18140600, 0x0000010d, 0x19140600, 0x0000010c, + 0x17150700, 0x0000010c, 0x18150700, 0x0000010b, + 0x18150700, 0x0000010b, 0x17160800, 0x0000010a, + 0x17160800, 0x0000010a, 0x18160900, 0x00000009, + }, + { /* Bank 5 */ + 0x120b0300, 0x00030b12, 0x120c0300, 0x00030b11, + 0x110c0400, 0x00030b11, 0x110c0400, 0x00030b11, + 0x130c0400, 0x00020a11, 0x120d0400, 0x00020a11, + 0x110d0500, 0x00020a11, 0x110d0500, 0x00020a11, + 0x130d0500, 0x00010911, 0x130e0500, 0x00010910, + 0x120e0600, 0x00010910, 0x120e0600, 0x00010910, + 0x130e0600, 0x00010810, 0x120f0600, 0x00010810, + 0x120f0700, 0x00000810, 0x130f0700, 0x0000080f, + 0x140f0700, 0x0000070f, 0x130f0800, 0x0000070f, + 0x12100800, 0x0000070f, 0x12100801, 0x0000060f, + 0x13100801, 0x0000060e, 0x12100901, 0x0000060e, + 0x12100901, 0x0000060e, 0x13100901, 0x0000050e, + 0x13110901, 0x0000050d, 0x11110a02, 0x0000050d, + 0x11110a02, 0x0000050d, 0x12110a02, 0x0000040d, + 0x13110a02, 0x0000040c, 0x11110b03, 0x0000040c, + 0x11110b03, 0x0000040c, 0x12110b03, 0x0000030c, + }, + { /* Bank 6 */ + 0x0b0a0805, 0x00080a0c, 0x0b0a0805, 0x00080a0c, + 0x0c0a0805, 0x00080a0b, 0x0c0a0805, 0x00080a0b, + 0x0d0a0805, 0x00070a0b, 0x0d0a0805, 0x00070a0b, + 0x0d0a0805, 0x00070a0b, 0x0c0a0806, 0x00070a0b, + 0x0b0b0806, 0x00070a0b, 0x0c0b0806, 0x0007090b, + 0x0b0b0906, 0x0007090b, 0x0b0b0906, 0x0007090b, + 0x0b0b0906, 0x0007090b, 0x0b0b0906, 0x0007090b, + 0x0b0b0906, 0x0007090b, 0x0c0b0906, 0x0006090b, + 0x0c0b0906, 0x0006090b, 0x0c0b0906, 0x0006090b, + 0x0b0b0907, 0x0006090b, 0x0b0b0907, 0x0006090b, + 0x0b0b0907, 0x0006090b, 0x0b0b0907, 0x0006090b, + 0x0b0b0907, 0x0006090b, 0x0c0b0907, 0x0006080b, + 0x0b0b0a07, 0x0006080b, 0x0c0b0a07, 0x0006080a, + 0x0d0b0a07, 0x0005080a, 0x0d0b0a07, 0x0005080a, + 0x0d0b0a07, 0x0005080a, 0x0c0b0a08, 0x0005080a, + 0x0c0b0a08, 0x0005080a, 0x0c0b0a08, 0x0005080a, + }, + { /* Bank 7 */ + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + 0x0909090a, 0x00090909, 0x0909090a, 0x00090909, + } +}; + +static const unsigned int +mali_c55_rsz_filter_coeffs_v[MALI_C55_RSZ_COEFS_BANKS] + [MALI_C55_RSZ_COEFS_ENTRIES] = { + { /* Bank 0 */ + 0x2424fc00, 0x000000fc, 0x2721fc00, 0x000000fc, + 0x281ffd00, 0x000000fc, 0x2c1cfd00, 0x000000fb, + 0x2e1afd00, 0x000000fb, 0x3017fe00, 0x000000fb, + 0x3215fe00, 0x000000fb, 0x3512fe00, 0x000000fb, + 0x3510ff00, 0x000000fc, 0x370eff00, 0x000000fc, + 0x390cff00, 0x000000fc, 0x3a0aff00, 0x000000fd, + 0x3a080000, 0x000000fe, 0x3c060000, 0x000000fe, + 0x3d040000, 0x000000ff, 0x3d030000, 0x00000000, + 0x3c020000, 0x00000002, 0x3d000000, 0x00000003, + 0x3dff0000, 0x00000004, 0x3cfe0000, 0x00000006, + 0x3afe0000, 0x00000008, 0x3afd0000, 0x0000ff0a, + 0x39fc0000, 0x0000ff0c, 0x37fc0000, 0x0000ff0e, + 0x35fc0000, 0x0000ff10, 0x35fb0000, 0x0000fe12, + 0x32fb0000, 0x0000fe15, 0x30fb0000, 0x0000fe17, + 0x2efb0000, 0x0000fd1a, 0x2cfb0000, 0x0000fd1c, + 0x28fc0000, 0x0000fd1f, 0x27fc0000, 0x0000fc21, + }, + { /* Bank 1 */ + 0x2525fb00, 0x000000fb, 0x2723fb00, 0x000000fb, + 0x2921fb00, 0x000000fb, 0x2a1ffb00, 0x000000fc, + 0x2c1dfb00, 0x000000fc, 0x2e1bfb00, 0x000000fc, + 0x2f19fb00, 0x000000fd, 0x2f17fc00, 0x000000fe, + 0x3115fc00, 0x000000fe, 0x3213fc00, 0x000000ff, + 0x3411fc00, 0x0000ff00, 0x3310fd00, 0x0000ff01, + 0x340efd00, 0x0000ff02, 0x350cfd00, 0x0000ff03, + 0x350afd00, 0x0000ff05, 0x3509fe00, 0x0000fe06, + 0x3607fe00, 0x0000fe07, 0x3506fe00, 0x0000fe09, + 0x3505ff00, 0x0000fd0a, 0x3503ff00, 0x0000fd0c, + 0x3402ff00, 0x0000fd0e, 0x3301ff00, 0x0000fd10, + 0x3400ff00, 0x0000fc11, 0x32ff0000, 0x0000fc13, + 0x31fe0000, 0x0000fc15, 0x2ffe0000, 0x0000fc17, + 0x2ffd0000, 0x0000fb19, 0x2efc0000, 0x0000fb1b, + 0x2cfc0000, 0x0000fb1d, 0x2afc0000, 0x0000fb1f, + 0x29fb0000, 0x0000fb21, 0x27fb0000, 0x0000fb23, + }, + { /* Bank 2 */ + 0x1f1f0100, 0x00000001, 0x211e0000, 0x00000001, + 0x211d0000, 0x00000002, 0x221c0000, 0x00000002, + 0x231bff00, 0x00000003, 0x241aff00, 0x0000ff04, + 0x2519ff00, 0x0000ff04, 0x2518ff00, 0x0000ff05, + 0x2617fe00, 0x0000ff06, 0x2616fe00, 0x0000ff07, + 0x2714fe00, 0x0000ff08, 0x2713fe00, 0x0000ff09, + 0x2712fe00, 0x0000ff0a, 0x2811fe00, 0x0000fe0b, + 0x2810fe00, 0x0000fe0c, 0x280ffe00, 0x0000fe0d, + 0x280efe00, 0x0000fe0e, 0x280dfe00, 0x0000fe0f, + 0x280cfe00, 0x0000fe10, 0x280bfe00, 0x0000fe11, + 0x270aff00, 0x0000fe12, 0x2709ff00, 0x0000fe13, + 0x2708ff00, 0x0000fe14, 0x2607ff00, 0x0000fe16, + 0x2606ff00, 0x0000fe17, 0x2505ff00, 0x0000ff18, + 0x2504ff00, 0x0000ff19, 0x2404ff00, 0x0000ff1a, + 0x23030000, 0x0000ff1b, 0x22020000, 0x0000001c, + 0x21020000, 0x0000001d, 0x21010000, 0x0000001e, + }, + { /* Bank 3 */ + 0x1b1b06ff, 0x0000ff06, 0x1b1a06ff, 0x0000ff07, + 0x1c1a05ff, 0x0000ff07, 0x1c1905ff, 0x0000ff08, + 0x1c1904ff, 0x0000ff09, 0x1d1804ff, 0x0000ff09, + 0x1e1703ff, 0x0000ff0a, 0x1e1703ff, 0x0000ff0a, + 0x1e1603ff, 0x0000ff0b, 0x1f1502ff, 0x0000ff0c, + 0x1e150200, 0x0000ff0c, 0x1e140200, 0x0000ff0d, + 0x1e130100, 0x0000000e, 0x1e130100, 0x0000000e, + 0x1e120100, 0x0000000f, 0x1f110000, 0x00000010, + 0x20100000, 0x00000010, 0x1f100000, 0x00000011, + 0x1e0f0000, 0x00000112, 0x1e0e0000, 0x00000113, + 0x1e0e0000, 0x00000113, 0x1e0dff00, 0x00000214, + 0x1e0cff00, 0x00000215, 0x1f0cff00, 0x00ff0215, + 0x1e0bff00, 0x00ff0316, 0x1e0aff00, 0x00ff0317, + 0x1e0aff00, 0x00ff0317, 0x1d09ff00, 0x00ff0418, + 0x1c09ff00, 0x00ff0419, 0x1c08ff00, 0x00ff0519, + 0x1c07ff00, 0x00ff051a, 0x1b07ff00, 0x00ff061a, + }, + { /* Bank 4 */ + 0x17170900, 0x00000009, 0x18160900, 0x00000009, + 0x17160800, 0x0000010a, 0x17160800, 0x0000010a, + 0x18150700, 0x0000010b, 0x18150700, 0x0000010b, + 0x17150700, 0x0000010c, 0x19140600, 0x0000010c, + 0x18140600, 0x0000010d, 0x19130500, 0x0000020d, + 0x18130500, 0x0000020e, 0x18130500, 0x0000020e, + 0x1a120400, 0x0000020e, 0x19120400, 0x0000020f, + 0x19110400, 0x0000030f, 0x18110400, 0x00000310, + 0x1a100300, 0x00000310, 0x18100300, 0x00000411, + 0x190f0300, 0x00000411, 0x190f0200, 0x00000412, + 0x1a0e0200, 0x00000412, 0x180e0200, 0x00000513, + 0x180e0200, 0x00000513, 0x190d0200, 0x00000513, + 0x180d0100, 0x00000614, 0x190c0100, 0x00000614, + 0x170c0100, 0x00000715, 0x180b0100, 0x00000715, + 0x180b0100, 0x00000715, 0x170a0100, 0x00000816, + 0x170a0100, 0x00000816, 0x18090000, 0x00000916, + }, + { /* Bank 5 */ + 0x12120b03, 0x0000030b, 0x12110b03, 0x0000030c, + 0x11110b03, 0x0000040c, 0x11110b03, 0x0000040c, + 0x13110a02, 0x0000040c, 0x12110a02, 0x0000040d, + 0x11110a02, 0x0000050d, 0x11110a02, 0x0000050d, + 0x13110901, 0x0000050d, 0x13100901, 0x0000050e, + 0x12100901, 0x0000060e, 0x12100901, 0x0000060e, + 0x13100801, 0x0000060e, 0x12100801, 0x0000060f, + 0x12100800, 0x0000070f, 0x130f0800, 0x0000070f, + 0x140f0700, 0x0000070f, 0x130f0700, 0x0000080f, + 0x120f0700, 0x00000810, 0x120f0600, 0x00010810, + 0x130e0600, 0x00010810, 0x120e0600, 0x00010910, + 0x120e0600, 0x00010910, 0x130e0500, 0x00010910, + 0x130d0500, 0x00010911, 0x110d0500, 0x00020a11, + 0x110d0500, 0x00020a11, 0x120d0400, 0x00020a11, + 0x130c0400, 0x00020a11, 0x110c0400, 0x00030b11, + 0x110c0400, 0x00030b11, 0x120c0300, 0x00030b11, + }, + { /* Bank 6 */ + 0x0b0c0a08, 0x0005080a, 0x0b0c0a08, 0x0005080a, + 0x0c0b0a08, 0x0005080a, 0x0c0b0a08, 0x0005080a, + 0x0d0b0a07, 0x0005080a, 0x0d0b0a07, 0x0005080a, + 0x0d0b0a07, 0x0005080a, 0x0c0b0a07, 0x0006080a, + 0x0b0b0a07, 0x0006080b, 0x0c0b0907, 0x0006080b, + 0x0b0b0907, 0x0006090b, 0x0b0b0907, 0x0006090b, + 0x0b0b0907, 0x0006090b, 0x0b0b0907, 0x0006090b, + 0x0b0b0907, 0x0006090b, 0x0c0b0906, 0x0006090b, + 0x0c0b0906, 0x0006090b, 0x0c0b0906, 0x0006090b, + 0x0b0b0906, 0x0007090b, 0x0b0b0906, 0x0007090b, + 0x0b0b0906, 0x0007090b, 0x0b0b0906, 0x0007090b, + 0x0b0b0906, 0x0007090b, 0x0c0b0806, 0x0007090b, + 0x0b0b0806, 0x00070a0b, 0x0c0a0806, 0x00070a0b, + 0x0d0a0805, 0x00070a0b, 0x0d0a0805, 0x00070a0b, + 0x0d0a0805, 0x00070a0b, 0x0c0a0805, 0x00080a0b, + 0x0c0a0805, 0x00080a0b, 0x0c0a0805, 0x00080a0b, + }, + { /* Bank 7 */ + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + 0x09090909, 0x000a0909, 0x09090909, 0x000a0909, + } +}; + +static const unsigned int mali_c55_rsz_coef_banks_range_start[] = { + 770, 600, 460, 354, 273, 210, 162, 125 +}; + +/* + * Select the right filter coefficients bank based on the scaler input and the + * scaler output sizes ratio, set by the v4l2 crop and scale selection + * rectangles respectively. + */ +static unsigned int mali_c55_rsz_calculate_bank(struct mali_c55 *mali_c55, + unsigned int rsz_in, + unsigned int rsz_out) +{ + unsigned int rsz_ratio = (rsz_out * 1000U) / rsz_in; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(mali_c55_rsz_coef_banks_range_start); i++) + if (rsz_ratio >= mali_c55_rsz_coef_banks_range_start[i]) + break; + + return i; +} + +static const u32 rsz_non_bypass_src_fmts[] = { + MEDIA_BUS_FMT_RGB121212_1X36, + MEDIA_BUS_FMT_YUV10_1X30 +}; + +static void mali_c55_resizer_program_coefficients(struct mali_c55_resizer *rsz) +{ + struct mali_c55 *mali_c55 = rsz->mali_c55; + unsigned int haddr = rsz->id == MALI_C55_RSZ_FR ? + MALI_C55_REG_FR_SCALER_HFILT : + MALI_C55_REG_DS_SCALER_HFILT; + unsigned int vaddr = rsz->id == MALI_C55_RSZ_FR ? + MALI_C55_REG_FR_SCALER_VFILT : + MALI_C55_REG_DS_SCALER_VFILT; + + for (unsigned int i = 0; i < MALI_C55_RSZ_COEFS_BANKS; i++) { + for (unsigned int j = 0; j < MALI_C55_RSZ_COEFS_ENTRIES; j++) { + mali_c55_write(mali_c55, haddr, + mali_c55_rsz_filter_coeffs_h[i][j]); + mali_c55_write(mali_c55, vaddr, + mali_c55_rsz_filter_coeffs_v[i][j]); + + haddr += sizeof(u32); + vaddr += sizeof(u32); + } + } +} + +static int mali_c55_rsz_program_crop(struct mali_c55_resizer *rsz, + const struct v4l2_subdev_state *state) +{ + const struct v4l2_mbus_framefmt *fmt; + const struct v4l2_rect *crop; + + /* Verify if crop should be enabled. */ + fmt = v4l2_subdev_state_get_format(state, MALI_C55_RSZ_SINK_PAD, 0); + crop = v4l2_subdev_state_get_crop(state, MALI_C55_RSZ_SINK_PAD, 0); + + if (fmt->width == crop->width && fmt->height == crop->height) + return MALI_C55_BYPASS_CROP; + + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_CROP_X_START, + crop->left); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_CROP_Y_START, + crop->top); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_CROP_X_SIZE, + crop->width); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_CROP_Y_SIZE, + crop->height); + + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_CROP_EN, + MALI_C55_CROP_ENABLE); + + return 0; +} + +static int mali_c55_rsz_program_resizer(struct mali_c55_resizer *rsz, + struct v4l2_subdev_state *state) +{ + struct mali_c55 *mali_c55 = rsz->mali_c55; + const struct v4l2_rect *crop, *scale; + unsigned int h_bank, v_bank; + u64 h_scale, v_scale; + + /* Verify if scaling should be enabled. */ + crop = v4l2_subdev_state_get_crop(state, MALI_C55_RSZ_SINK_PAD, 0); + scale = v4l2_subdev_state_get_compose(state, MALI_C55_RSZ_SINK_PAD, 0); + + if (crop->width == scale->width && crop->height == scale->height) + return MALI_C55_BYPASS_SCALER; + + /* Program the scaler coefficients if the scaler is in use. */ + mali_c55_resizer_program_coefficients(rsz); + + /* Program the V/H scaling factor in Q4.20 format. */ + h_scale = crop->width * MALI_C55_RSZ_SCALER_FACTOR; + v_scale = crop->height * MALI_C55_RSZ_SCALER_FACTOR; + + do_div(h_scale, scale->width); + do_div(v_scale, scale->height); + + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_IN_WIDTH, + crop->width); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_IN_HEIGHT, + crop->height); + + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_OUT_WIDTH, + scale->width); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_OUT_HEIGHT, + scale->height); + + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_HFILT_TINC, + h_scale); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_VFILT_TINC, + v_scale); + + /* Select the scaler coefficients bank to use. */ + h_bank = mali_c55_rsz_calculate_bank(mali_c55, crop->width, + scale->width); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_HFILT_COEF, + h_bank); + + v_bank = mali_c55_rsz_calculate_bank(mali_c55, crop->height, + scale->height); + mali_c55_cap_dev_write(rsz->cap_dev, MALI_C55_REG_SCALER_VFILT_COEF, + v_bank); + + return 0; +} + +static void mali_c55_rsz_program(struct mali_c55_resizer *rsz, + struct v4l2_subdev_state *state) +{ + struct mali_c55 *mali_c55 = rsz->mali_c55; + u32 bypass = 0; + + /* Verify if cropping and scaling should be enabled. */ + bypass |= mali_c55_rsz_program_crop(rsz, state); + bypass |= mali_c55_rsz_program_resizer(rsz, state); + + mali_c55_ctx_update_bits(mali_c55, rsz->id == MALI_C55_RSZ_FR ? + MALI_C55_REG_FR_BYPASS : MALI_C55_REG_DS_BYPASS, + MALI_C55_BYPASS_CROP | MALI_C55_BYPASS_SCALER, + bypass); +} + +/* + * Inspect the routing table to know which of the two (mutually exclusive) + * routes is enabled and return the sink pad id of the active route. + */ +static unsigned int mali_c55_rsz_get_active_sink(struct v4l2_subdev_state *state) +{ + struct v4l2_subdev_krouting *routing = &state->routing; + struct v4l2_subdev_route *route; + + /* A single route is enabled at a time. */ + for_each_active_route(routing, route) + return route->sink_pad; + + return MALI_C55_RSZ_SINK_PAD; +} + +/* + * When operating in bypass mode, the ISP takes input in a 20-bit format, but + * can only output 16-bit RAW bayer data (with the 4 least significant bits from + * the input being lost). Return the 16-bit version of the 20-bit input formats. + */ +static u32 mali_c55_rsz_shift_mbus_code(u32 mbus_code) +{ + const struct mali_c55_isp_format_info *fmt = + mali_c55_isp_get_mbus_config_by_code(mbus_code); + + if (!fmt) + return -EINVAL; + + return fmt->shifted_code; +} + +static int __mali_c55_rsz_set_routing(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + const struct v4l2_subdev_krouting *routing) +{ + struct mali_c55_resizer *rsz = sd_to_mali_c55_rsz(sd); + unsigned int active_sink = UINT_MAX; + struct v4l2_mbus_framefmt *src_fmt; + struct v4l2_subdev_route *route; + unsigned int active_routes = 0; + struct v4l2_mbus_framefmt *fmt; + int ret; + + ret = v4l2_subdev_routing_validate(sd, routing, 0); + if (ret) + return ret; + + /* Only a single route can be enabled at a time. */ + for_each_active_route(routing, route) { + if (++active_routes > 1) { + dev_dbg(rsz->mali_c55->dev, + "Only one route can be active"); + return -EINVAL; + } + + active_sink = route->sink_pad; + } + if (active_sink == UINT_MAX) { + dev_dbg(rsz->mali_c55->dev, "One route has to be active"); + return -EINVAL; + } + + ret = v4l2_subdev_set_routing(sd, state, routing); + if (ret) { + dev_dbg(rsz->mali_c55->dev, "Failed to set routing\n"); + return ret; + } + + fmt = v4l2_subdev_state_get_format(state, active_sink, 0); + fmt->width = MALI_C55_DEFAULT_WIDTH; + fmt->height = MALI_C55_DEFAULT_HEIGHT; + fmt->colorspace = V4L2_COLORSPACE_SRGB; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(false, + fmt->colorspace, + fmt->ycbcr_enc); + fmt->field = V4L2_FIELD_NONE; + + if (active_sink == MALI_C55_RSZ_SINK_PAD) { + struct v4l2_rect *crop, *compose; + + fmt->code = MEDIA_BUS_FMT_RGB121212_1X36; + + crop = v4l2_subdev_state_get_crop(state, active_sink, 0); + compose = v4l2_subdev_state_get_compose(state, active_sink, 0); + + crop->left = 0; + crop->top = 0; + crop->width = MALI_C55_DEFAULT_WIDTH; + crop->height = MALI_C55_DEFAULT_HEIGHT; + + *compose = *crop; + } else { + fmt->code = MEDIA_BUS_FMT_SRGGB20_1X20; + } + + /* Propagate the format to the source pad */ + src_fmt = v4l2_subdev_state_get_format(state, MALI_C55_RSZ_SOURCE_PAD, + 0); + *src_fmt = *fmt; + + /* In the event this is the bypass pad the mbus code needs correcting */ + if (active_sink == MALI_C55_RSZ_SINK_BYPASS_PAD) + src_fmt->code = mali_c55_rsz_shift_mbus_code(src_fmt->code); + + return 0; +} + +static int mali_c55_rsz_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + const struct mali_c55_isp_format_info *fmt; + struct v4l2_mbus_framefmt *sink_fmt; + u32 sink_pad; + + switch (code->pad) { + case MALI_C55_RSZ_SINK_PAD: + if (code->index) + return -EINVAL; + + code->code = MEDIA_BUS_FMT_RGB121212_1X36; + + return 0; + case MALI_C55_RSZ_SOURCE_PAD: + sink_pad = mali_c55_rsz_get_active_sink(state); + sink_fmt = v4l2_subdev_state_get_format(state, sink_pad, 0); + + /* + * If the active route is from the Bypass sink pad, then the + * source pad is a simple passthrough of the sink format, + * downshifted to 16-bits. + */ + + if (sink_pad == MALI_C55_RSZ_SINK_BYPASS_PAD) { + if (code->index) + return -EINVAL; + + code->code = mali_c55_rsz_shift_mbus_code(sink_fmt->code); + if (!code->code) + return -EINVAL; + + return 0; + } + + /* + * If the active route is from the non-bypass sink then we can + * select either RGB or conversion to YUV. + */ + + if (code->index >= ARRAY_SIZE(rsz_non_bypass_src_fmts)) + return -EINVAL; + + code->code = rsz_non_bypass_src_fmts[code->index]; + + return 0; + case MALI_C55_RSZ_SINK_BYPASS_PAD: + fmt = mali_c55_isp_get_mbus_config_by_index(code->index); + if (fmt) { + code->code = fmt->code; + return 0; + } + + break; + } + + return -EINVAL; +} + +static int mali_c55_rsz_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + const struct mali_c55_isp_format_info *fmt; + struct v4l2_mbus_framefmt *sink_fmt; + struct v4l2_rect *compose; + u32 sink_pad; + + switch (fse->pad) { + case MALI_C55_RSZ_SINK_PAD: + if (fse->index || fse->code != MEDIA_BUS_FMT_RGB121212_1X36) + return -EINVAL; + + fse->max_width = MALI_C55_MAX_WIDTH; + fse->max_height = MALI_C55_MAX_HEIGHT; + fse->min_width = MALI_C55_MIN_WIDTH; + fse->min_height = MALI_C55_MIN_HEIGHT; + + return 0; + case MALI_C55_RSZ_SOURCE_PAD: + sink_pad = mali_c55_rsz_get_active_sink(state); + sink_fmt = v4l2_subdev_state_get_format(state, sink_pad, 0); + + if (sink_pad == MALI_C55_RSZ_SINK_BYPASS_PAD) { + if (fse->index) + return -EINVAL; + + fmt = mali_c55_isp_get_mbus_config_by_shifted_code(fse->code); + if (!fmt) + return -EINVAL; + + fse->min_width = sink_fmt->width; + fse->max_width = sink_fmt->width; + fse->min_height = sink_fmt->height; + fse->max_height = sink_fmt->height; + + return 0; + } + + if ((fse->code != MEDIA_BUS_FMT_RGB121212_1X36 && + fse->code != MEDIA_BUS_FMT_YUV10_1X30) || fse->index > 1) + return -EINVAL; + + compose = v4l2_subdev_state_get_compose(state, + MALI_C55_RSZ_SINK_PAD, + 0); + + fse->min_width = compose->width; + fse->max_width = compose->width; + fse->min_height = compose->height; + fse->max_height = compose->height; + + return 0; + case MALI_C55_RSZ_SINK_BYPASS_PAD: + fmt = mali_c55_isp_get_mbus_config_by_code(fse->code); + if (fse->index || !fmt) + return -EINVAL; + + fse->max_width = MALI_C55_MAX_WIDTH; + fse->max_height = MALI_C55_MAX_HEIGHT; + fse->min_width = MALI_C55_MIN_WIDTH; + fse->min_height = MALI_C55_MIN_HEIGHT; + + return 0; + } + + return -EINVAL; +} + +static int mali_c55_rsz_set_sink_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct v4l2_mbus_framefmt *sink_fmt; + unsigned int active_sink; + struct v4l2_rect *rect; + + sink_fmt = v4l2_subdev_state_get_format(state, format->pad, 0); + + /* + * Clamp to min/max and then reset crop and compose rectangles to the + * newly applied size. + */ + sink_fmt->width = clamp_t(unsigned int, fmt->width, + MALI_C55_MIN_WIDTH, MALI_C55_MAX_WIDTH); + sink_fmt->height = clamp_t(unsigned int, fmt->height, + MALI_C55_MIN_HEIGHT, MALI_C55_MAX_HEIGHT); + + /* + * Make sure the media bus code for the bypass pad is one of the + * supported ISP input media bus codes. Default it to SRGGB otherwise. + */ + if (format->pad == MALI_C55_RSZ_SINK_BYPASS_PAD) + sink_fmt->code = mali_c55_isp_get_mbus_config_by_code(fmt->code) ? + fmt->code : MEDIA_BUS_FMT_SRGGB20_1X20; + + *fmt = *sink_fmt; + + if (format->pad == MALI_C55_RSZ_SINK_PAD) { + rect = v4l2_subdev_state_get_crop(state, format->pad); + rect->left = 0; + rect->top = 0; + rect->width = fmt->width; + rect->height = fmt->height; + + rect = v4l2_subdev_state_get_compose(state, format->pad); + rect->left = 0; + rect->top = 0; + rect->width = fmt->width; + rect->height = fmt->height; + } + + /* If format->pad is routed to the source pad, propagate the format. */ + active_sink = mali_c55_rsz_get_active_sink(state); + if (active_sink == format->pad) { + /* If the bypass route is used, downshift the code to 16bpp. */ + if (active_sink == MALI_C55_RSZ_SINK_BYPASS_PAD) + fmt->code = mali_c55_rsz_shift_mbus_code(fmt->code); + + *v4l2_subdev_state_get_format(state, + MALI_C55_RSZ_SOURCE_PAD, 0) = *fmt; + } + + return 0; +} + +static int mali_c55_rsz_set_source_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + unsigned int active_sink; + + active_sink = mali_c55_rsz_get_active_sink(state); + sink_fmt = v4l2_subdev_state_get_format(state, active_sink, 0); + src_fmt = v4l2_subdev_state_get_format(state, MALI_C55_RSZ_SOURCE_PAD); + + if (active_sink == MALI_C55_RSZ_SINK_PAD) { + /* + * Regular processing pipe: RGB121212 can be color-space + * converted to YUV101010. + */ + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(rsz_non_bypass_src_fmts); i++) { + if (fmt->code == rsz_non_bypass_src_fmts[i]) + break; + } + + src_fmt->code = i == ARRAY_SIZE(rsz_non_bypass_src_fmts) ? + MEDIA_BUS_FMT_RGB121212_1X36 : fmt->code; + } else { + /* + * Bypass pipe: the source format is the same as the bypass + * sink pad downshifted to 16bpp. + */ + fmt->code = mali_c55_rsz_shift_mbus_code(sink_fmt->code); + } + + *fmt = *src_fmt; + + return 0; +} + +static int mali_c55_rsz_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + /* + * On sink pads fmt is either fixed for the 'regular' processing + * pad or a RAW format or 20-bit wide RGB/YUV format for the FR bypass + * pad. + * + * On source pad sizes are the result of crop+compose on the sink + * pad sizes, while the format depends on the active route. + */ + + if (format->pad == MALI_C55_RSZ_SINK_PAD || + format->pad == MALI_C55_RSZ_SINK_BYPASS_PAD) + return mali_c55_rsz_set_sink_fmt(sd, state, format); + + return mali_c55_rsz_set_source_fmt(sd, state, format); +} + +static int mali_c55_rsz_get_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + if (sel->pad != MALI_C55_RSZ_SINK_PAD) + return -EINVAL; + + if (sel->target != V4L2_SEL_TGT_CROP && + sel->target != V4L2_SEL_TGT_COMPOSE) + return -EINVAL; + + sel->r = sel->target == V4L2_SEL_TGT_CROP + ? *v4l2_subdev_state_get_crop(state, MALI_C55_RSZ_SINK_PAD) + : *v4l2_subdev_state_get_compose(state, MALI_C55_RSZ_SINK_PAD); + + return 0; +} + +static int mali_c55_rsz_set_crop(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + struct mali_c55_resizer *rsz = sd_to_mali_c55_rsz(sd); + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + struct v4l2_rect *crop, *compose; + + sink_fmt = v4l2_subdev_state_get_format(state, MALI_C55_RSZ_SINK_PAD); + crop = v4l2_subdev_state_get_crop(state, MALI_C55_RSZ_SINK_PAD); + compose = v4l2_subdev_state_get_compose(state, MALI_C55_RSZ_SINK_PAD); + + if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE && + v4l2_subdev_is_streaming(sd)) { + /* + * At runtime the compose rectangle and output size cannot be + * changed so we need to clamp the crop rectangle such that the + * compose rectangle can fit within it. + */ + crop->left = clamp_t(unsigned int, sel->r.left, 0, + sink_fmt->width - compose->width); + crop->top = clamp_t(unsigned int, sel->r.top, 0, + sink_fmt->height - compose->height); + crop->width = clamp_t(unsigned int, sel->r.width, compose->width, + sink_fmt->width - crop->left); + crop->height = clamp_t(unsigned int, sel->r.height, compose->height, + sink_fmt->height - crop->top); + + mali_c55_rsz_program(rsz, state); + } else { + /* + * If we're not streaming we can utilise the ISP's full range + * and simply need to propagate the selected rectangle to the + * compose target and source pad format. + */ + crop->left = clamp_t(unsigned int, sel->r.left, 0, + sink_fmt->width); + crop->top = clamp_t(unsigned int, sel->r.top, 0, + sink_fmt->height); + crop->width = clamp_t(unsigned int, sel->r.width, + MALI_C55_MIN_WIDTH, + sink_fmt->width - crop->left); + crop->height = clamp_t(unsigned int, sel->r.height, + MALI_C55_MIN_HEIGHT, + sink_fmt->height - crop->top); + + *compose = *crop; + + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_RSZ_SOURCE_PAD); + src_fmt->width = compose->width; + src_fmt->height = compose->height; + } + + sel->r = *crop; + return 0; +} + +static int mali_c55_rsz_set_compose(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + struct mali_c55_resizer *rsz = sd_to_mali_c55_rsz(sd); + struct mali_c55 *mali_c55 = rsz->mali_c55; + struct v4l2_mbus_framefmt *src_fmt; + struct v4l2_rect *compose, *crop; + + /* + * We cannot change the compose rectangle during streaming, as that + * would require a change in the output buffer size. + */ + if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE && + v4l2_subdev_is_streaming(sd)) + return -EBUSY; + + /* + * In the FR pipe, the scaler is an optional component that may not be + * fitted. + */ + if (rsz->id == MALI_C55_RSZ_FR && + !(mali_c55->capabilities & MALI_C55_GPS_FRSCALER_FITTED)) + return -EINVAL; + + compose = v4l2_subdev_state_get_compose(state, MALI_C55_RSZ_SINK_PAD); + crop = v4l2_subdev_state_get_crop(state, MALI_C55_RSZ_SINK_PAD); + + compose->left = 0; + compose->top = 0; + compose->width = clamp_t(unsigned int, sel->r.width, crop->width / 8, + crop->width); + compose->height = clamp_t(unsigned int, sel->r.height, crop->height / 8, + crop->height); + + sel->r = *compose; + + /* + * We need to be sure to propagate the compose rectangle size to the + * source pad format. + */ + src_fmt = v4l2_subdev_state_get_format(state, MALI_C55_RSZ_SOURCE_PAD); + src_fmt->width = compose->width; + src_fmt->height = compose->height; + + return 0; +} + +static int mali_c55_rsz_set_selection(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + if (sel->pad != MALI_C55_RSZ_SINK_PAD) + return -EINVAL; + + if (sel->target == V4L2_SEL_TGT_CROP) + return mali_c55_rsz_set_crop(sd, state, sel); + + if (sel->target == V4L2_SEL_TGT_COMPOSE) + return mali_c55_rsz_set_compose(sd, state, sel); + + return -EINVAL; +} + +static int mali_c55_rsz_set_routing(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + enum v4l2_subdev_format_whence which, + struct v4l2_subdev_krouting *routing) +{ + if (which == V4L2_SUBDEV_FORMAT_ACTIVE && + media_entity_is_streaming(&sd->entity)) + return -EBUSY; + + return __mali_c55_rsz_set_routing(sd, state, routing); +} + +static int mali_c55_rsz_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct mali_c55_resizer *rsz = sd_to_mali_c55_rsz(sd); + struct mali_c55 *mali_c55 = rsz->mali_c55; + unsigned int sink_pad; + + sink_pad = mali_c55_rsz_get_active_sink(state); + if (sink_pad == MALI_C55_RSZ_SINK_BYPASS_PAD) { + /* Bypass FR pipe processing if the bypass route is active. */ + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_ISP_RAW_BYPASS, + MALI_C55_ISP_RAW_BYPASS_FR_BYPASS_MASK, + MALI_C55_ISP_RAW_BYPASS_RAW_FR_BYPASS); + return 0; + } + + /* Disable bypass and use regular processing. */ + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_ISP_RAW_BYPASS, + MALI_C55_ISP_RAW_BYPASS_FR_BYPASS_MASK, 0); + mali_c55_rsz_program(rsz, state); + + return 0; +} + +static int mali_c55_rsz_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + return 0; +} + +static const struct v4l2_subdev_pad_ops mali_c55_resizer_pad_ops = { + .enum_mbus_code = mali_c55_rsz_enum_mbus_code, + .enum_frame_size = mali_c55_rsz_enum_frame_size, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = mali_c55_rsz_set_fmt, + .get_selection = mali_c55_rsz_get_selection, + .set_selection = mali_c55_rsz_set_selection, + .set_routing = mali_c55_rsz_set_routing, + .enable_streams = mali_c55_rsz_enable_streams, + .disable_streams = mali_c55_rsz_disable_streams, +}; + +static const struct v4l2_subdev_ops mali_c55_resizer_ops = { + .pad = &mali_c55_resizer_pad_ops, +}; + +static int mali_c55_rsz_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct mali_c55_resizer *rsz = sd_to_mali_c55_rsz(sd); + struct v4l2_subdev_route routes[2] = { + { + .sink_pad = MALI_C55_RSZ_SINK_PAD, + .source_pad = MALI_C55_RSZ_SOURCE_PAD, + .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, + }, { + .sink_pad = MALI_C55_RSZ_SINK_BYPASS_PAD, + .source_pad = MALI_C55_RSZ_SOURCE_PAD, + }, + }; + struct v4l2_subdev_krouting routing = { + .num_routes = rsz->num_routes, + .routes = routes, + }; + + return __mali_c55_rsz_set_routing(sd, state, &routing); +} + +static const struct v4l2_subdev_internal_ops mali_c55_resizer_internal_ops = { + .init_state = mali_c55_rsz_init_state, +}; + +static int mali_c55_register_resizer(struct mali_c55 *mali_c55, + unsigned int index) +{ + struct mali_c55_resizer *rsz = &mali_c55->resizers[index]; + struct v4l2_subdev *sd = &rsz->sd; + unsigned int num_pads; + int ret; + + rsz->id = index; + v4l2_subdev_init(sd, &mali_c55_resizer_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; + sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_SCALER; + sd->internal_ops = &mali_c55_resizer_internal_ops; + + rsz->pads[MALI_C55_RSZ_SINK_PAD].flags = MEDIA_PAD_FL_SINK; + rsz->pads[MALI_C55_RSZ_SOURCE_PAD].flags = MEDIA_PAD_FL_SOURCE; + + if (rsz->id == MALI_C55_RSZ_FR) { + num_pads = MALI_C55_RSZ_NUM_PADS; + rsz->num_routes = 2; + + rsz->pads[MALI_C55_RSZ_SINK_BYPASS_PAD].flags = + MEDIA_PAD_FL_SINK; + + snprintf(sd->name, sizeof(sd->name), "%s resizer fr", + MALI_C55_DRIVER_NAME); + + } else { + num_pads = MALI_C55_RSZ_NUM_PADS - 1; + rsz->num_routes = 1; + + snprintf(sd->name, sizeof(sd->name), "%s resizer ds", + MALI_C55_DRIVER_NAME); + } + + ret = media_entity_pads_init(&sd->entity, num_pads, rsz->pads); + if (ret) + return ret; + + ret = v4l2_subdev_init_finalize(sd); + if (ret) + goto err_media_cleanup; + + ret = v4l2_device_register_subdev(&mali_c55->v4l2_dev, sd); + if (ret) + goto err_subdev_cleanup; + + rsz->cap_dev = &mali_c55->cap_devs[index]; + rsz->mali_c55 = mali_c55; + + return 0; + +err_subdev_cleanup: + v4l2_subdev_cleanup(sd); +err_media_cleanup: + media_entity_cleanup(&sd->entity); + + return ret; +} + +static void mali_c55_unregister_resizer(struct mali_c55_resizer *rsz) +{ + if (!rsz->mali_c55) + return; + + v4l2_device_unregister_subdev(&rsz->sd); + v4l2_subdev_cleanup(&rsz->sd); + media_entity_cleanup(&rsz->sd.entity); +} + +int mali_c55_register_resizers(struct mali_c55 *mali_c55) +{ + int ret; + + ret = mali_c55_register_resizer(mali_c55, MALI_C55_RSZ_FR); + if (ret) + return ret; + + if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) { + ret = mali_c55_register_resizer(mali_c55, MALI_C55_RSZ_DS); + if (ret) + goto err_unregister_fr; + } + + return 0; + +err_unregister_fr: + mali_c55_unregister_resizer(&mali_c55->resizers[MALI_C55_RSZ_FR]); + + return ret; +} + +void mali_c55_unregister_resizers(struct mali_c55 *mali_c55) +{ + for (unsigned int i = 0; i < MALI_C55_NUM_RSZS; i++) + mali_c55_unregister_resizer(&mali_c55->resizers[i]); +} diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-tpg.c b/drivers/media/platform/arm/mali-c55/mali-c55-tpg.c new file mode 100644 index 000000000000..1af5d2759a83 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-tpg.c @@ -0,0 +1,437 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Test pattern generator + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +#define MALI_C55_TPG_SRC_PAD 0 +#define MALI_C55_TPG_FIXED_HBLANK 0x20 +#define MALI_C55_TPG_DEFAULT_MIN_VBLANK 66 +#define MALI_C55_TPG_DEFAULT_DEF_VBLANK 626 +#define MALI_C55_TPG_MAX_VBLANK 0xffff +#define MALI_C55_TPG_PIXEL_RATE 100000000 + +static const char * const mali_c55_tpg_test_pattern_menu[] = { + "Flat field", + "Horizontal gradient", + "Vertical gradient", + "Vertical bars", + "Arbitrary rectangle", + "White frame on black field" +}; + +static const u32 mali_c55_tpg_mbus_codes[] = { + MEDIA_BUS_FMT_SRGGB20_1X20, + MEDIA_BUS_FMT_RGB202020_1X60, +}; + +static void mali_c55_tpg_update_vblank(struct mali_c55_tpg *tpg, + struct v4l2_mbus_framefmt *format) +{ + unsigned int def_vblank; + unsigned int min_vblank; + unsigned int hts; + int tgt_fps; + + hts = format->width + MALI_C55_TPG_FIXED_HBLANK; + + /* + * The ISP has minimum vertical blanking requirements that must be + * adhered to by the TPG. The minimum is a function of the Iridix blocks + * clocking requirements and the width of the image and horizontal + * blanking, but if we assume the worst case iVariance and sVariance + * values then it boils down to the below (plus one to the numerator to + * ensure the answer is rounded up). + */ + min_vblank = 15 + (120501 / hts); + + /* + * We need to set a sensible default vblank for whatever format height + * we happen to be given from set_fmt(). This function just targets + * an even multiple of 15fps. If we can't get 15fps, let's target 5fps. + * If we can't get 5fps we'll take whatever the minimum vblank gives us. + */ + tgt_fps = MALI_C55_TPG_PIXEL_RATE / hts / (format->height + min_vblank); + + if (tgt_fps < 5) + def_vblank = min_vblank; + else + def_vblank = (MALI_C55_TPG_PIXEL_RATE / hts + / max(rounddown(tgt_fps, 15), 5)) - format->height; + + def_vblank = ALIGN_DOWN(def_vblank, 2); + + __v4l2_ctrl_modify_range(tpg->ctrls.vblank, min_vblank, + MALI_C55_TPG_MAX_VBLANK, 1, def_vblank); + __v4l2_ctrl_s_ctrl(tpg->ctrls.vblank, def_vblank); +} + +static int mali_c55_tpg_s_ctrl(struct v4l2_ctrl *ctrl) +{ + struct mali_c55_tpg *tpg = container_of(ctrl->handler, + struct mali_c55_tpg, + ctrls.handler); + struct mali_c55 *mali_c55 = container_of(tpg, struct mali_c55, tpg); + int ret = 0; + + if (!pm_runtime_get_if_in_use(mali_c55->dev)) + return 0; + + switch (ctrl->id) { + case V4L2_CID_TEST_PATTERN: + mali_c55_ctx_write(mali_c55, + MALI_C55_REG_TEST_GEN_CH0_PATTERN_TYPE, + ctrl->val); + break; + case V4L2_CID_VBLANK: + mali_c55_update_bits(mali_c55, MALI_C55_REG_BLANKING, + MALI_C55_REG_VBLANK_MASK, + MALI_C55_VBLANK(ctrl->val)); + break; + default: + ret = -EINVAL; + break; + } + + pm_runtime_put_autosuspend(mali_c55->dev); + + return ret; +} + +static const struct v4l2_ctrl_ops mali_c55_tpg_ctrl_ops = { + .s_ctrl = &mali_c55_tpg_s_ctrl, +}; + +static void mali_c55_tpg_configure(struct mali_c55_tpg *tpg, + struct v4l2_subdev_state *state) +{ + struct v4l2_mbus_framefmt *fmt; + u32 test_pattern_format; + + /* + * hblank needs setting, but is a read-only control and thus won't be + * called during __v4l2_ctrl_handler_setup(). Do it here instead. + */ + mali_c55_update_bits(tpg->mali_c55, MALI_C55_REG_BLANKING, + MALI_C55_REG_HBLANK_MASK, + MALI_C55_TPG_FIXED_HBLANK); + mali_c55_update_bits(tpg->mali_c55, MALI_C55_REG_GEN_VIDEO, + MALI_C55_REG_GEN_VIDEO_MULTI_MASK, + MALI_C55_REG_GEN_VIDEO_MULTI_MASK); + + fmt = v4l2_subdev_state_get_format(state, MALI_C55_TPG_SRC_PAD); + + test_pattern_format = fmt->code == MEDIA_BUS_FMT_RGB202020_1X60 ? + 0x01 : 0x0; + + mali_c55_ctx_update_bits(tpg->mali_c55, MALI_C55_REG_TPG_CH0, + MALI_C55_TEST_PATTERN_RGB_MASK, + MALI_C55_TEST_PATTERN_RGB(test_pattern_format)); +} + +static int mali_c55_tpg_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + if (code->index >= ARRAY_SIZE(mali_c55_tpg_mbus_codes)) + return -EINVAL; + + code->code = mali_c55_tpg_mbus_codes[code->index]; + + return 0; +} + +static int mali_c55_tpg_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + unsigned int i; + + if (fse->index > 0) + return -EINVAL; + + for (i = 0; i < ARRAY_SIZE(mali_c55_tpg_mbus_codes); i++) { + if (fse->code == mali_c55_tpg_mbus_codes[i]) + break; + } + + if (i == ARRAY_SIZE(mali_c55_tpg_mbus_codes)) + return -EINVAL; + + fse->min_width = MALI_C55_MIN_WIDTH; + fse->max_width = MALI_C55_MAX_WIDTH; + fse->min_height = MALI_C55_MIN_HEIGHT; + fse->max_height = MALI_C55_MAX_HEIGHT; + + return 0; +} + +static int mali_c55_tpg_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct mali_c55_tpg *tpg = container_of(sd, struct mali_c55_tpg, sd); + struct v4l2_mbus_framefmt *fmt; + unsigned int i; + + fmt = v4l2_subdev_state_get_format(state, MALI_C55_TPG_SRC_PAD); + fmt->code = format->format.code; + + for (i = 0; i < ARRAY_SIZE(mali_c55_tpg_mbus_codes); i++) { + if (fmt->code == mali_c55_tpg_mbus_codes[i]) + break; + } + + if (i == ARRAY_SIZE(mali_c55_tpg_mbus_codes)) + fmt->code = MEDIA_BUS_FMT_SRGGB20_1X20; + + /* + * The TPG says that the test frame timing generation logic expects a + * minimum framesize of 4x4 pixels, but given the rest of the ISP can't + * handle anything smaller than 128x128 it seems pointless to allow a + * smaller frame. + */ + fmt->width = clamp(format->format.width, MALI_C55_MIN_WIDTH, + MALI_C55_MAX_WIDTH); + fmt->height = clamp(format->format.height, MALI_C55_MIN_HEIGHT, + MALI_C55_MAX_HEIGHT); + + format->format = *fmt; + + if (format->which == V4L2_SUBDEV_FORMAT_TRY) + return 0; + + mali_c55_tpg_update_vblank(tpg, fmt); + + return 0; +} + +static int mali_c55_tpg_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct mali_c55_tpg *tpg = container_of(sd, struct mali_c55_tpg, sd); + struct mali_c55 *mali_c55 = container_of(tpg, struct mali_c55, tpg); + + /* + * We only have a source pad and a single stream, and v4l2-core already + * validated both so we don't need to do that. One might reasonably + * expect the framesize to be set here given it's configurable in + * .set_fmt(), but it's done in the ISP subdevice's .enable_streams() + * instead, as the same register is also used to indicate the size of + * the data coming from the sensor. + */ + mali_c55_tpg_configure(tpg, state); + __v4l2_ctrl_handler_setup(sd->ctrl_handler); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_TPG_CH0, + MALI_C55_TEST_PATTERN_ON_OFF, + MALI_C55_TEST_PATTERN_ON_OFF); + mali_c55_update_bits(mali_c55, MALI_C55_REG_GEN_VIDEO, + MALI_C55_REG_GEN_VIDEO_ON_MASK, + MALI_C55_REG_GEN_VIDEO_ON_MASK); + + return 0; +} + +static int mali_c55_tpg_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + struct mali_c55_tpg *tpg = container_of(sd, struct mali_c55_tpg, sd); + struct mali_c55 *mali_c55 = container_of(tpg, struct mali_c55, tpg); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_TPG_CH0, + MALI_C55_TEST_PATTERN_ON_OFF, 0x00); + mali_c55_update_bits(mali_c55, MALI_C55_REG_GEN_VIDEO, + MALI_C55_REG_GEN_VIDEO_ON_MASK, 0x00); + + return 0; +} + +static const struct v4l2_subdev_pad_ops mali_c55_tpg_pad_ops = { + .enum_mbus_code = mali_c55_tpg_enum_mbus_code, + .enum_frame_size = mali_c55_tpg_enum_frame_size, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = mali_c55_tpg_set_fmt, + .enable_streams = mali_c55_tpg_enable_streams, + .disable_streams = mali_c55_tpg_disable_streams, +}; + +static const struct v4l2_subdev_core_ops mali_c55_isp_core_ops = { + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_ops mali_c55_tpg_ops = { + .core = &mali_c55_isp_core_ops, + .pad = &mali_c55_tpg_pad_ops, +}; + +static int mali_c55_tpg_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct v4l2_mbus_framefmt *fmt = + v4l2_subdev_state_get_format(state, MALI_C55_TPG_SRC_PAD); + + fmt->width = MALI_C55_DEFAULT_WIDTH; + fmt->height = MALI_C55_DEFAULT_HEIGHT; + fmt->field = V4L2_FIELD_NONE; + fmt->code = MEDIA_BUS_FMT_SRGGB20_1X20; + fmt->colorspace = V4L2_COLORSPACE_RAW; + fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace); + fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace); + fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(false, + fmt->colorspace, + fmt->ycbcr_enc); + + return 0; +} + +static const struct v4l2_subdev_internal_ops mali_c55_tpg_internal_ops = { + .init_state = mali_c55_tpg_init_state, +}; + +static int mali_c55_tpg_init_controls(struct mali_c55 *mali_c55) +{ + struct mali_c55_tpg_ctrls *ctrls = &mali_c55->tpg.ctrls; + struct v4l2_ctrl *pixel_rate; + struct v4l2_ctrl *hblank; + int ret; + + ret = v4l2_ctrl_handler_init(&ctrls->handler, 4); + if (ret) + return ret; + + v4l2_ctrl_new_std_menu_items(&ctrls->handler, &mali_c55_tpg_ctrl_ops, + V4L2_CID_TEST_PATTERN, + ARRAY_SIZE(mali_c55_tpg_test_pattern_menu) - 1, + 0, 3, mali_c55_tpg_test_pattern_menu); + + /* + * We fix hblank at the minimum allowed value and control framerate + * solely through the vblank control. + */ + hblank = v4l2_ctrl_new_std(&ctrls->handler, &mali_c55_tpg_ctrl_ops, + V4L2_CID_HBLANK, MALI_C55_TPG_FIXED_HBLANK, + MALI_C55_TPG_FIXED_HBLANK, 1, + MALI_C55_TPG_FIXED_HBLANK); + if (hblank) + hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + ctrls->vblank = v4l2_ctrl_new_std(&ctrls->handler, + &mali_c55_tpg_ctrl_ops, + V4L2_CID_VBLANK, + MALI_C55_TPG_DEFAULT_MIN_VBLANK, + MALI_C55_TPG_MAX_VBLANK, 1, + MALI_C55_TPG_DEFAULT_DEF_VBLANK); + + pixel_rate = v4l2_ctrl_new_std(&ctrls->handler, &mali_c55_tpg_ctrl_ops, + V4L2_CID_PIXEL_RATE, + MALI_C55_TPG_PIXEL_RATE, + MALI_C55_TPG_PIXEL_RATE, 1, + MALI_C55_TPG_PIXEL_RATE); + if (pixel_rate) + pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY; + + if (ctrls->handler.error) { + dev_err(mali_c55->dev, "Error during v4l2 controls init\n"); + v4l2_ctrl_handler_free(&ctrls->handler); + return ctrls->handler.error; + } + + mali_c55->tpg.sd.ctrl_handler = &ctrls->handler; + mali_c55->tpg.sd.state_lock = ctrls->handler.lock; + + return 0; +} + +int mali_c55_register_tpg(struct mali_c55 *mali_c55) +{ + struct mali_c55_tpg *tpg = &mali_c55->tpg; + struct v4l2_subdev *sd = &tpg->sd; + struct media_pad *pad = &tpg->pad; + int ret; + + v4l2_subdev_init(sd, &mali_c55_tpg_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; + sd->entity.function = MEDIA_ENT_F_CAM_SENSOR; + sd->internal_ops = &mali_c55_tpg_internal_ops; + strscpy(sd->name, MALI_C55_DRIVER_NAME " tpg", sizeof(sd->name)); + + pad->flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&sd->entity, 1, pad); + if (ret) { + dev_err(mali_c55->dev, + "Failed to initialize media entity pads\n"); + return ret; + } + + ret = mali_c55_tpg_init_controls(mali_c55); + if (ret) { + dev_err(mali_c55->dev, + "Error initialising controls\n"); + goto err_cleanup_media_entity; + } + + ret = v4l2_subdev_init_finalize(sd); + if (ret) + goto err_free_ctrl_handler; + + ret = v4l2_device_register_subdev(&mali_c55->v4l2_dev, sd); + if (ret) { + dev_err(mali_c55->dev, "Failed to register tpg subdev\n"); + goto err_cleanup_subdev; + } + + /* + * By default the colour settings lead to a very dim image that is + * nearly indistinguishable from black on some monitor settings. Ramp + * them up a bit so the image is brighter. + */ + mali_c55_ctx_write(mali_c55, MALI_C55_REG_TPG_R_BACKGROUND, + MALI_C55_TPG_BACKGROUND_MAX); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_TPG_G_BACKGROUND, + MALI_C55_TPG_BACKGROUND_MAX); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_TPG_B_BACKGROUND, + MALI_C55_TPG_BACKGROUND_MAX); + + tpg->mali_c55 = mali_c55; + + return 0; + +err_cleanup_subdev: + v4l2_subdev_cleanup(sd); +err_free_ctrl_handler: + v4l2_ctrl_handler_free(&tpg->ctrls.handler); +err_cleanup_media_entity: + media_entity_cleanup(&sd->entity); + + return ret; +} + +void mali_c55_unregister_tpg(struct mali_c55 *mali_c55) +{ + struct mali_c55_tpg *tpg = &mali_c55->tpg; + + if (!tpg->mali_c55) + return; + + v4l2_device_unregister_subdev(&tpg->sd); + v4l2_ctrl_handler_free(&tpg->ctrls.handler); + v4l2_subdev_cleanup(&tpg->sd); + media_entity_cleanup(&tpg->sd.entity); +} From dfb999e70504847ca6e6c6d48a2e71194f34f791 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:50 +0000 Subject: [PATCH 224/249] media: Documentation: Add Mali-C55 ISP Documentation Add a documentation page for the mali-c55 driver, which gives a brief overview of the hardware and explains how to use the driver's capture devices and the crop/scaler functions. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- .../admin-guide/media/mali-c55-graph.dot | 19 + Documentation/admin-guide/media/mali-c55.rst | 340 ++++++++++++++++++ .../admin-guide/media/v4l-drivers.rst | 1 + 3 files changed, 360 insertions(+) create mode 100644 Documentation/admin-guide/media/mali-c55-graph.dot create mode 100644 Documentation/admin-guide/media/mali-c55.rst diff --git a/Documentation/admin-guide/media/mali-c55-graph.dot b/Documentation/admin-guide/media/mali-c55-graph.dot new file mode 100644 index 000000000000..0775ba42bf4c --- /dev/null +++ b/Documentation/admin-guide/media/mali-c55-graph.dot @@ -0,0 +1,19 @@ +digraph board { + rankdir=TB + n00000001 [label="{{} | mali-c55 tpg\n/dev/v4l-subdev0 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port0 -> n00000003:port0 [style=dashed] + n00000003 [label="{{ 0} | mali-c55 isp\n/dev/v4l-subdev1 | { 1 | 2}}", shape=Mrecord, style=filled, fillcolor=green] + n00000003:port1 -> n00000007:port0 [style=bold] + n00000003:port2 -> n00000007:port2 [style=bold] + n00000003:port1 -> n0000000b:port0 [style=bold] + n00000007 [label="{{ 0 | 2} | mali-c55 resizer fr\n/dev/v4l-subdev2 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000007:port1 -> n0000000e [style=bold] + n0000000b [label="{{ 0} | mali-c55 resizer ds\n/dev/v4l-subdev3 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n0000000b:port1 -> n00000012 [style=bold] + n0000000e [label="mali-c55 fr\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n00000012 [label="mali-c55 ds\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n00000022 [label="{{ 0} | csi2-rx\n/dev/v4l-subdev4 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000022:port1 -> n00000003:port0 + n00000027 [label="{{} | imx415 1-001a\n/dev/v4l-subdev5 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000027:port0 -> n00000022:port0 [style=bold] +} \ No newline at end of file diff --git a/Documentation/admin-guide/media/mali-c55.rst b/Documentation/admin-guide/media/mali-c55.rst new file mode 100644 index 000000000000..72cdded507b3 --- /dev/null +++ b/Documentation/admin-guide/media/mali-c55.rst @@ -0,0 +1,340 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================== +ARM Mali-C55 Image Signal Processor driver +========================================== + +Introduction +============ + +This file documents the driver for ARM's Mali-C55 Image Signal Processor. The +driver is located under drivers/media/platform/arm/mali-c55. + +The Mali-C55 ISP receives data in either raw Bayer format or RGB/YUV format from +sensors through either a parallel interface or a memory bus before processing it +and outputting it through an internal DMA engine. Two output pipelines are +possible (though one may not be fitted, depending on the implementation). These +are referred to as "Full resolution" and "Downscale", but the naming is historic +and both pipes are capable of cropping/scaling operations. The full resolution +pipe is also capable of outputting RAW data, bypassing much of the ISP's +processing. The downscale pipe cannot output RAW data. An integrated test +pattern generator can be used to drive the ISP and produce image data in the +absence of a connected camera sensor. The driver module is named mali_c55, and +is enabled through the CONFIG_VIDEO_MALI_C55 config option. + +The driver implements V4L2, Media Controller and V4L2 Subdevice interfaces and +expects camera sensors connected to the ISP to have V4L2 subdevice interfaces. + +Mali-C55 ISP hardware +===================== + +A high level functional view of the Mali-C55 ISP is presented below. The ISP +takes input from either a live source or through a DMA engine for memory input, +depending on the SoC integration.:: + + +---------+ +----------+ +--------+ + | Sensor |--->| CSI-2 Rx | "Full Resolution" | DMA | + +---------+ +----------+ |\ Output +--->| Writer | + | | \ | +--------+ + | | \ +----------+ +------+---> Streaming I/O + +------------+ +------->| | | | | + | | | |-->| Mali-C55 |--+ + | DMA Reader |--------------->| | | ISP | | + | | | / | | | +---> Streaming I/O + +------------+ | / +----------+ | | + |/ +------+ + | +--------+ + +--->| DMA | + "Downscaled" | Writer | + Output +--------+ + +Media Controller Topology +========================= + +An example of the ISP's topology (as implemented in a system with an IMX415 +camera sensor and generic CSI-2 receiver) is below: + + +.. kernel-figure:: mali-c55-graph.dot + :alt: mali-c55-graph.dot + :align: center + +The driver has 4 V4L2 subdevices: + +- `mali_c55 isp`: Responsible for configuring input crop and color space + conversion +- `mali_c55 tpg`: The test pattern generator, emulating a camera sensor. +- `mali_c55 resizer fr`: The Full-Resolution pipe resizer +- `mali_c55 resizer ds`: The Downscale pipe resizer + +The driver has 2 V4L2 video devices: + +- `mali-c55 fr`: The full-resolution pipe's capture device +- `mali-c55 ds`: The downscale pipe's capture device + +Frame sequences are synchronised across to two capture devices, meaning if one +pipe is started later than the other the sequence numbers returned in its +buffers will match those of the other pipe rather than starting from zero. + +Idiosyncrasies +-------------- + +**mali-c55 isp** +The `mali-c55 isp` subdevice has a single sink pad to which all sources of data +should be connected. The active source is selected by enabling the appropriate +media link and disabling all others. The ISP has two source pads, reflecting the +different paths through which it can internally route data. Tap points within +the ISP allow users to divert data to avoid processing by some or all of the +hardware's processing steps. The diagram below is intended only to highlight how +the bypassing works and is not a true reflection of those processing steps; for +a high-level functional block diagram see ARM's developer page for the +ISP [3]_:: + + +--------------------------------------------------------------+ + | Possible Internal ISP Data Routes | + | +------------+ +----------+ +------------+ | + +---+ | | | | | Colour | +---+ + | 0 |--+-->| Processing |->| Demosaic |->| Space |--->| 1 | + +---+ | | | | | | Conversion | +---+ + | | +------------+ +----------+ +------------+ | + | | +---+ + | +---------------------------------------------------| 2 | + | +---+ + | | + +--------------------------------------------------------------+ + + +.. flat-table:: + :header-rows: 1 + + * - Pad + - Direction + - Purpose + + * - 0 + - sink + - Data input, connected to the TPG and camera sensors + + * - 1 + - source + - RGB/YUV data, connected to the FR and DS V4L2 subdevices + + * - 2 + - source + - RAW bayer data, connected to the FR V4L2 subdevices + +The ISP is limited to both input and output resolutions between 640x480 and +8192x8192, and this is reflected in the ISP and resizer subdevice's .set_fmt() +operations. + +**mali-c55 resizer fr** +The `mali-c55 resizer fr` subdevice has two _sink_ pads to reflect the different +insertion points in the hardware (either RAW or demosaiced data): + +.. flat-table:: + :header-rows: 1 + + * - Pad + - Direction + - Purpose + + * - 0 + - sink + - Data input connected to the ISP's demosaiced stream. + + * - 1 + - source + - Data output connected to the capture video device + + * - 2 + - sink + - Data input connected to the ISP's raw data stream + +The data source in use is selected through the routing API; two routes each of a +single stream are available: + +.. flat-table:: + :header-rows: 1 + + * - Sink Pad + - Source Pad + - Purpose + + * - 0 + - 1 + - Demosaiced data route + + * - 2 + - 1 + - Raw data route + + +If the demosaiced route is active then the FR pipe is only capable of output +in RGB/YUV formats. If the raw route is active then the output reflects the +input (which may be either Bayer or RGB/YUV data). + +Using the driver to capture video +================================= + +Using the media controller APIs we can configure the input source and ISP to +capture images in a variety of formats. In the examples below, configuring the +media graph is done with the v4l-utils [1]_ package's media-ctl utility. +Capturing the images is done with yavta [2]_. + +Configuring the input source +---------------------------- + +The first step is to set the input source that we wish by enabling the correct +media link. Using the example topology above, we can select the TPG as follows: + +.. code-block:: none + + media-ctl -l "'lte-csi2-rx':1->'mali-c55 isp':0[0]" + media-ctl -l "'mali-c55 tpg':0->'mali-c55 isp':0[1]" + +Configuring which video devices will stream data +------------------------------------------------ + +The driver will wait for all video devices to have their VIDIOC_STREAMON ioctl +called before it tells the sensor to start streaming. To facilitate this we need +to enable links to the video devices that we want to use. In the example below +we enable the links to both of the image capture video devices + +.. code-block:: none + + media-ctl -l "'mali-c55 resizer fr':1->'mali-c55 fr':0[1]" + media-ctl -l "'mali-c55 resizer ds':1->'mali-c55 ds':0[1]" + +Capturing bayer data from the source and processing to RGB/YUV +-------------------------------------------------------------- + +To capture 1920x1080 bayer data from the source and push it through the ISP's +full processing pipeline, we configure the data formats appropriately on the +source, ISP and resizer subdevices and set the FR resizer's routing to select +processed data. The media bus format on the resizer's source pad will be either +RGB121212_1X36 or YUV10_1X30, depending on whether you want to capture RGB or +YUV. The ISP's debayering block outputs RGB data natively, setting the source +pad format to YUV10_1X30 enables the colour space conversion block. + +In this example we target RGB565 output, so select RGB121212_1X36 as the resizer +source pad's format: + +.. code-block:: none + + # Set formats on the TPG and ISP + media-ctl -V "'mali-c55 tpg':0[fmt:SRGGB20_1X20/1920x1080]" + media-ctl -V "'mali-c55 isp':0[fmt:SRGGB20_1X20/1920x1080]" + media-ctl -V "'mali-c55 isp':1[fmt:SRGGB20_1X20/1920x1080]" + + # Set routing on the FR resizer + media-ctl -R "'mali-c55 resizer fr'[0/0->1/0[1],2/0->1/0[0]]" + + # Set format on the resizer, must be done AFTER the routing. + media-ctl -V "'mali-c55 resizer fr':1[fmt:RGB121212_1X36/1920x1080]" + +The downscale output can also be used to stream data at the same time. In this +case since only processed data can be captured through the downscale output no +routing need be set: + +.. code-block:: none + + # Set format on the resizer + media-ctl -V "'mali-c55 resizer ds':1[fmt:RGB121212_1X36/1920x1080]" + +Following which images can be captured from both the FR and DS output's video +devices (simultaneously, if desired): + +.. code-block:: none + + yavta -f RGB565 -s 1920x1080 -c10 /dev/video0 + yavta -f RGB565 -s 1920x1080 -c10 /dev/video1 + +Cropping the image +~~~~~~~~~~~~~~~~~~ + +Both the full resolution and downscale pipes can crop to a minimum resolution of +640x480. To crop the image simply configure the resizer's sink pad's crop and +compose rectangles and set the format on the video device: + +.. code-block:: none + + media-ctl -V "'mali-c55 resizer fr':0[fmt:RGB121212_1X36/1920x1080 crop:(480,270)/640x480 compose:(0,0)/640x480]" + media-ctl -V "'mali-c55 resizer fr':1[fmt:RGB121212_1X36/640x480]" + yavta -f RGB565 -s 640x480 -c10 /dev/video0 + +Downscaling the image +~~~~~~~~~~~~~~~~~~~~~ + +Both the full resolution and downscale pipes can downscale the image by up to 8x +provided the minimum 640x480 output resolution is adhered to. For the best image +result the scaling ratio for each direction should be the same. To configure +scaling we use the compose rectangle on the resizer's sink pad: + +.. code-block:: none + + media-ctl -V "'mali-c55 resizer fr':0[fmt:RGB121212_1X36/1920x1080 crop:(0,0)/1920x1080 compose:(0,0)/640x480]" + media-ctl -V "'mali-c55 resizer fr':1[fmt:RGB121212_1X36/640x480]" + yavta -f RGB565 -s 640x480 -c10 /dev/video0 + +Capturing images in YUV formats +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +If we need to output YUV data rather than RGB the color space conversion block +needs to be active, which is achieved by setting MEDIA_BUS_FMT_YUV10_1X30 on the +resizer's source pad. We can then configure a capture format like NV12 (here in +its multi-planar variant) + +.. code-block:: none + + media-ctl -V "'mali-c55 resizer fr':1[fmt:YUV10_1X30/1920x1080]" + yavta -f NV12M -s 1920x1080 -c10 /dev/video0 + +Capturing RGB data from the source and processing it with the resizers +---------------------------------------------------------------------- + +The Mali-C55 ISP can work with sensors capable of outputting RGB data. In this +case although none of the image quality blocks would be used it can still +crop/scale the data in the usual way. For this reason RGB data input to the ISP +still goes through the ISP subdevice's pad 1 to the resizer. + +To achieve this, the ISP's sink pad's format is set to +MEDIA_BUS_FMT_RGB202020_1X60 - this reflects the format that data must be in to +work with the ISP. Converting the camera sensor's output to that format is the +responsibility of external hardware. + +In this example we ask the test pattern generator to give us RGB data instead of +bayer. + +.. code-block:: none + + media-ctl -V "'mali-c55 tpg':0[fmt:RGB202020_1X60/1920x1080]" + media-ctl -V "'mali-c55 isp':0[fmt:RGB202020_1X60/1920x1080]" + +Cropping or scaling the data can be done in exactly the same way as outlined +earlier. + +Capturing raw data from the source and outputting it unmodified +----------------------------------------------------------------- + +The ISP can additionally capture raw data from the source and output it on the +full resolution pipe only, completely unmodified. In this case the downscale +pipe can still process the data normally and be used at the same time. + +To configure raw bypass the FR resizer's subdevice's routing table needs to be +configured, followed by formats in the appropriate places: + +.. code-block:: none + + media-ctl -R "'mali-c55 resizer fr'[0/0->1/0[0],2/0->1/0[1]]" + media-ctl -V "'mali-c55 isp':0[fmt:RGB202020_1X60/1920x1080]" + media-ctl -V "'mali-c55 resizer fr':2[fmt:RGB202020_1X60/1920x1080]" + media-ctl -V "'mali-c55 resizer fr':1[fmt:RGB202020_1X60/1920x1080]" + + # Set format on the video device and stream + yavta -f RGB565 -s 1920x1080 -c10 /dev/video0 + +References +========== +.. [1] https://git.linuxtv.org/v4l-utils.git/ +.. [2] https://git.ideasonboard.org/yavta.git +.. [3] https://developer.arm.com/Processors/Mali-C55 diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst index 3bac5165b134..ebd9b15efa90 100644 --- a/Documentation/admin-guide/media/v4l-drivers.rst +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -19,6 +19,7 @@ Video4Linux (V4L) driver-specific documentation ipu3 ipu6-isys ivtv + mali-c55 mgb4 omap3isp philips From 5a99e8675e53daf3912bdbd4ca9c2baab8f61f21 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:51 +0000 Subject: [PATCH 225/249] MAINTAINERS: Add entry for mali-c55 driver Add a MAINTAINERS entry for the mali-c55 driver and its associated documentation. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ebe6e75b1a2f..dc3719cb6120 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2105,6 +2105,18 @@ F: drivers/gpu/drm/ci/xfails/panfrost* F: drivers/gpu/drm/panfrost/ F: include/uapi/drm/panfrost_drm.h +ARM MALI-C55 ISP DRIVER +M: Daniel Scally +M: Jacopo Mondi +L: linux-media@vger.kernel.org +S: Maintained +T: git git://linuxtv.org/media_tree.git +F: Documentation/admin-guide/media/mali-c55-graph.dot +F: Documentation/admin-guide/media/mali-c55.rst +F: Documentation/devicetree/bindings/media/arm,mali-c55.yaml +F: Documentation/userspace-api/media/drivers/mali-c55.rst +F: drivers/media/platform/arm/mali-c55/ + ARM MALI PANTHOR DRM DRIVER M: Boris Brezillon M: Steven Price From 4d36f732366aeb32bf3486545e597500a3bf0994 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:52 +0000 Subject: [PATCH 226/249] media: Add MALI_C55_3A_STATS meta format Add a new meta format for the Mali-C55 ISP's 3A Statistics along with a new descriptor entry. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index 01cf52c3ea33..bfab29938b8f 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1469,6 +1469,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_META_FMT_RK_ISP1_EXT_PARAMS: descr = "Rockchip ISP1 Ext 3A Params"; break; case V4L2_META_FMT_C3ISP_PARAMS: descr = "Amlogic C3 ISP Parameters"; break; case V4L2_META_FMT_C3ISP_STATS: descr = "Amlogic C3 ISP Statistics"; break; + case V4L2_META_FMT_MALI_C55_STATS: descr = "ARM Mali-C55 ISP 3A Statistics"; break; case V4L2_PIX_FMT_NV12_8L128: descr = "NV12 (8x128 Linear)"; break; case V4L2_PIX_FMT_NV12M_8L128: descr = "NV12M (8x128 Linear)"; break; case V4L2_PIX_FMT_NV12_10BE_8L128: descr = "10-bit NV12 (8x128 Linear, BE)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index becd08fdbddb..cba4b1311667 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -884,6 +884,9 @@ struct v4l2_pix_format { #define V4L2_META_FMT_RPI_FE_CFG v4l2_fourcc('R', 'P', 'F', 'C') /* PiSP FE configuration */ #define V4L2_META_FMT_RPI_FE_STATS v4l2_fourcc('R', 'P', 'F', 'S') /* PiSP FE stats */ +/* Vendor specific - used for Arm Mali-C55 ISP */ +#define V4L2_META_FMT_MALI_C55_STATS v4l2_fourcc('C', '5', '5', 'S') /* ARM Mali-C55 3A Statistics */ + #ifdef __KERNEL__ /* * Line-based metadata formats. Remember to update v4l_fill_fmtdesc() when From c7f832f6f8129bb666346cb4805805ad056059b7 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:53 +0000 Subject: [PATCH 227/249] media: uapi: Add 3a stats buffer for mali-c55 Describe the format of the 3A statistics buffers in the userspace API header for the mali-c55 ISP. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- MAINTAINERS | 1 + .../uapi/linux/media/arm/mali-c55-config.h | 170 ++++++++++++++++++ 2 files changed, 171 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index dc3719cb6120..193580ceb9f4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2116,6 +2116,7 @@ F: Documentation/admin-guide/media/mali-c55.rst F: Documentation/devicetree/bindings/media/arm,mali-c55.yaml F: Documentation/userspace-api/media/drivers/mali-c55.rst F: drivers/media/platform/arm/mali-c55/ +F: include/uapi/linux/media/arm/mali-c55-config.h ARM MALI PANTHOR DRM DRIVER M: Boris Brezillon diff --git a/include/uapi/linux/media/arm/mali-c55-config.h b/include/uapi/linux/media/arm/mali-c55-config.h index 7fddece54ada..e31fb8ffa10a 100644 --- a/include/uapi/linux/media/arm/mali-c55-config.h +++ b/include/uapi/linux/media/arm/mali-c55-config.h @@ -8,6 +8,7 @@ #ifndef __UAPI_MALI_C55_CONFIG_H #define __UAPI_MALI_C55_CONFIG_H +#include #include #define V4L2_CID_MALI_C55_CAPABILITIES (V4L2_CID_USER_MALI_C55_BASE + 0x0) @@ -23,4 +24,173 @@ #define MALI_C55_GPS_FRSCALER (1U << 9) #define MALI_C55_GPS_DS_PIPE (1U << 10) +/* + * Frames are split into zones of almost equal width and height - a zone is a + * rectangular tile of a frame. The metering blocks within the ISP collect + * aggregated statistics per zone. A maximum of 15x15 zones can be configured, + * and so the statistics buffer within the hardware is sized to accommodate + * that. + * + * The utilised number of zones is runtime configurable. + */ +#define MALI_C55_MAX_ZONES (15 * 15) + +/** + * struct mali_c55_ae_1024bin_hist - Auto Exposure 1024-bin histogram statistics + * + * @bins: 1024 element array of 16-bit pixel counts. + * + * The 1024-bin histogram module collects image-global but zone-weighted + * intensity distributions of pixels in fixed-width bins. The modules can be + * configured into different "plane modes" which affect the contents of the + * collected statistics. In plane mode 0, pixel intensities are taken regardless + * of colour plane into a single 1024-bin histogram with a bin width of 4. In + * plane mode 1, four 256-bin histograms with a bin width of 16 are collected - + * one for each CFA colour plane. In plane modes 4, 5, 6 and 7 two 512-bin + * histograms with a bin width of 8 are collected - in each mode one of the + * colour planes is collected into the first histogram and all the others are + * combined into the second. The histograms are stored consecutively in the bins + * array. + * + * The 16-bit pixel counts are stored as a 4-bit exponent in the most + * significant bits followed by a 12-bit mantissa. Conversion to a usable + * format can be done according to the following pseudo-code:: + * + * if (e == 0) { + * bin = m * 2; + * } else { + * bin = (m + 4096) * 2^e + * } + * + * where + * e is the exponent value in range 0..15 + * m is the mantissa value in range 0..4095 + * + * The pixels used in calculating the statistics can be masked using three + * methods: + * + * 1. Pixels can be skipped in X and Y directions independently. + * 2. Minimum/Maximum intensities can be configured + * 3. Zones can be differentially weighted, including 0 weighted to mask them + * + * The data for this histogram can be collected from different tap points in the + * ISP depending on configuration - after the white balance or digital gain + * blocks, or immediately after the input crossbar. + */ +struct mali_c55_ae_1024bin_hist { + __u16 bins[1024]; +} __attribute__((packed)); + +/** + * struct mali_c55_ae_5bin_hist - Auto Exposure 5-bin histogram statistics + * + * @hist0: 16-bit normalised pixel count for the 0th intensity bin + * @hist1: 16-bit normalised pixel count for the 1st intensity bin + * @hist3: 16-bit normalised pixel count for the 3rd intensity bin + * @hist4: 16-bit normalised pixel count for the 4th intensity bin + * + * The ISP generates a 5-bin histogram of normalised pixel counts within bins of + * pixel intensity for each of 225 possible zones within a frame. The centre bin + * of the histogram for each zone is not available from the hardware and must be + * calculated by subtracting the values of hist0, hist1, hist3 and hist4 from + * 0xffff as in the following equation: + * + * hist2 = 0xffff - (hist0 + hist1 + hist3 + hist4) + */ +struct mali_c55_ae_5bin_hist { + __u16 hist0; + __u16 hist1; + __u16 hist3; + __u16 hist4; +} __attribute__((packed)); + +/** + * struct mali_c55_awb_average_ratios - Auto White Balance colour ratios + * + * @avg_rg_gr: Average R/G or G/R ratio in Q4.8 format. + * @avg_bg_br: Average B/G or B/R ratio in Q4.8 format. + * @num_pixels: The number of pixels used in the AWB calculation + * + * The ISP calculates and collects average colour ratios for each zone in an + * image and stores them in Q4.8 format (the lowest 8 bits are fractional, with + * bits [11:8] representing the integer). The exact ratios collected (either + * R/G, B/G or G/R, B/R) are configurable through the parameters buffer. The + * value of the 4 high bits is undefined. + */ +struct mali_c55_awb_average_ratios { + __u16 avg_rg_gr; + __u16 avg_bg_br; + __u32 num_pixels; +} __attribute__((packed)); + +/** + * struct mali_c55_af_statistics - Auto Focus edge and intensity statistics + * + * @intensity_stats: Packed mantissa and exponent value for pixel intensity + * @edge_stats: Packed mantissa and exponent values for edge intensity + * + * The ISP collects the squared sum of pixel intensities for each zone within a + * configurable Region of Interest on the frame. Additionally, the same data are + * collected after being passed through a bandpass filter which removes high and + * low frequency components - these are referred to as the edge statistics. + * + * The intensity and edge statistics for a zone can be used to calculate the + * contrast information for a zone + * + * C = E2 / I2 + * + * Where I2 is the intensity statistic for a zone and E2 is the edge statistic + * for that zone. Optimum focus is reached when C is at its maximum. + * + * The intensity and edge statistics are stored packed into a non-standard 16 + * bit floating point format, where the 7 most significant bits represent the + * exponent and the 9 least significant bits the mantissa. This format can be + * unpacked with the following pseudocode:: + * + * if (e == 0) { + * x = m; + * } else { + * x = 2^e-1 * (m + 2^9) + * } + * + * where + * e is the exponent value in range 0..127 + * m is the mantissa value in range 0..511 + */ +struct mali_c55_af_statistics { + __u16 intensity_stats; + __u16 edge_stats; +} __attribute__((packed)); + +/** + * struct mali_c55_stats_buffer - 3A statistics for the mali-c55 ISP + * + * @ae_1024bin_hist: 1024-bin frame-global pixel intensity histogram + * @iridix_1024bin_hist: Post-Iridix block 1024-bin histogram + * @ae_5bin_hists: 5-bin pixel intensity histograms for AEC + * @reserved1: Undefined buffer space + * @awb_ratios: Color balance ratios for Auto White Balance + * @reserved2: Undefined buffer space + * @af_statistics: Pixel intensity statistics for Auto Focus + * @reserved3: Undefined buffer space + * + * This struct describes the metering statistics space in the Mali-C55 ISP's + * hardware in its entirety. The space between each defined area is marked as + * "unknown" and may not be 0, but should not be used. The @ae_5bin_hists, + * @awb_ratios and @af_statistics members are arrays of statistics per-zone. + * The zones are arranged in the array in raster order starting from the top + * left corner of the image. + */ + +struct mali_c55_stats_buffer { + struct mali_c55_ae_1024bin_hist ae_1024bin_hist; + struct mali_c55_ae_1024bin_hist iridix_1024bin_hist; + struct mali_c55_ae_5bin_hist ae_5bin_hists[MALI_C55_MAX_ZONES]; + __u32 reserved1[14]; + struct mali_c55_awb_average_ratios awb_ratios[MALI_C55_MAX_ZONES]; + __u32 reserved2[14]; + struct mali_c55_af_statistics af_statistics[MALI_C55_MAX_ZONES]; + __u32 reserved3[15]; +} __attribute__((packed)); + #endif /* __UAPI_MALI_C55_CONFIG_H */ From 5d1f7403d681f8a4664c1b4072798eb236ae82be Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:54 +0000 Subject: [PATCH 228/249] media: platform: Add mali-c55 3a stats devnode Add a new code file to govern the 3a statistics capture node. On ISP_START, fill the stats buffer by reading out the metering space in the ISP's memory. This is done for the non-active config just as the dma transfer of the registers is. To acheive that, move the checking of the current config outside of mali_c55_swap_next_config() so we can use it for both functions. Tested-by: Lad Prabhakar Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil [hverkuil: remove deprecated vb2_ops_wait_prepare/finish callbacks] --- drivers/media/platform/arm/mali-c55/Makefile | 1 + .../platform/arm/mali-c55/mali-c55-common.h | 28 ++ .../platform/arm/mali-c55/mali-c55-core.c | 43 ++- .../platform/arm/mali-c55/mali-c55-isp.c | 11 + .../arm/mali-c55/mali-c55-registers.h | 3 + .../platform/arm/mali-c55/mali-c55-stats.c | 323 ++++++++++++++++++ 6 files changed, 401 insertions(+), 8 deletions(-) create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-stats.c diff --git a/drivers/media/platform/arm/mali-c55/Makefile b/drivers/media/platform/arm/mali-c55/Makefile index 9178ac35e50e..b5a22d414479 100644 --- a/drivers/media/platform/arm/mali-c55/Makefile +++ b/drivers/media/platform/arm/mali-c55/Makefile @@ -4,6 +4,7 @@ mali-c55-y := mali-c55-capture.o \ mali-c55-core.o \ mali-c55-isp.o \ mali-c55-resizer.o \ + mali-c55-stats.o \ mali-c55-tpg.o obj-$(CONFIG_VIDEO_MALI_C55) += mali-c55.o diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-common.h b/drivers/media/platform/arm/mali-c55/mali-c55-common.h index 0c713c7d2f7e..262fb33bc5ff 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-common.h +++ b/drivers/media/platform/arm/mali-c55/mali-c55-common.h @@ -51,6 +51,7 @@ enum mali_c55_isp_pads { MALI_C55_ISP_PAD_SINK_VIDEO, MALI_C55_ISP_PAD_SOURCE_VIDEO, MALI_C55_ISP_PAD_SOURCE_BYPASS, + MALI_C55_ISP_PAD_SOURCE_STATS, MALI_C55_ISP_NUM_PADS, }; @@ -162,6 +163,28 @@ struct mali_c55_cap_dev { } buffers; }; +struct mali_c55_stats_buf { + struct vb2_v4l2_buffer vb; + unsigned int segments_remaining; + struct list_head queue; + bool failed; +}; + +struct mali_c55_stats { + struct mali_c55 *mali_c55; + struct video_device vdev; + struct vb2_queue queue; + struct media_pad pad; + /* Mutex to provide to vb2 */ + struct mutex lock; + + struct { + /* Spinlock to guard buffer queue */ + spinlock_t lock; + struct list_head queue; + } buffers; +}; + enum mali_c55_config_spaces { MALI_C55_CONFIG_PONG, MALI_C55_CONFIG_PING, @@ -205,6 +228,7 @@ struct mali_c55 { struct mali_c55_isp isp; struct mali_c55_resizer resizers[MALI_C55_NUM_RSZS]; struct mali_c55_cap_dev cap_devs[MALI_C55_NUM_CAP_DEVS]; + struct mali_c55_stats stats; struct mali_c55_context context; u32 next_config; @@ -233,6 +257,8 @@ int mali_c55_register_resizers(struct mali_c55 *mali_c55); void mali_c55_unregister_resizers(struct mali_c55 *mali_c55); int mali_c55_register_capture_devs(struct mali_c55 *mali_c55); void mali_c55_unregister_capture_devs(struct mali_c55 *mali_c55); +int mali_c55_register_stats(struct mali_c55 *mali_c55); +void mali_c55_unregister_stats(struct mali_c55 *mali_c55); struct mali_c55_context *mali_c55_get_active_context(struct mali_c55 *mali_c55); void mali_c55_set_plane_done(struct mali_c55_cap_dev *cap_dev, enum mali_c55_planes plane); @@ -250,5 +276,7 @@ mali_c55_isp_get_mbus_config_by_shifted_code(u32 code); const struct mali_c55_isp_format_info * mali_c55_isp_get_mbus_config_by_index(u32 index); bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55); +void mali_c55_stats_fill_buffer(struct mali_c55 *mali_c55, + enum mali_c55_config_spaces cfg_space); #endif /* _MALI_C55_COMMON_H */ diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-core.c b/drivers/media/platform/arm/mali-c55/mali-c55-core.c index abeaf2ba8a65..0d4ca7fe8d82 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-core.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-core.c @@ -284,6 +284,16 @@ static int mali_c55_create_links(struct mali_c55 *mali_c55) } } + ret = media_create_pad_link(&mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SOURCE_STATS, + &mali_c55->stats.vdev.entity, 0, + MEDIA_LNK_FL_ENABLED); + if (ret) { + dev_err(mali_c55->dev, + "failed to link ISP and 3a stats node\n"); + goto err_remove_links; + } + return 0; err_remove_links: @@ -298,19 +308,13 @@ static void mali_c55_unregister_entities(struct mali_c55 *mali_c55) mali_c55_unregister_isp(mali_c55); mali_c55_unregister_resizers(mali_c55); mali_c55_unregister_capture_devs(mali_c55); + mali_c55_unregister_stats(mali_c55); } static void mali_c55_swap_next_config(struct mali_c55 *mali_c55) { struct mali_c55_context *ctx = mali_c55_get_active_context(mali_c55); - u32 curr_config; - - curr_config = mali_c55_read(mali_c55, MALI_C55_REG_PING_PONG_READ); - curr_config = (curr_config & MALI_C55_REG_PING_PONG_READ_MASK) - >> (ffs(MALI_C55_REG_PING_PONG_READ_MASK) - 1); - mali_c55->next_config = curr_config ^ 1; - mali_c55_config_write(ctx, mali_c55->next_config ? MALI_C55_CONFIG_PING : MALI_C55_CONFIG_PONG, false); @@ -340,6 +344,10 @@ static int mali_c55_register_entities(struct mali_c55 *mali_c55) if (ret) goto err_unregister_entities; + ret = mali_c55_register_stats(mali_c55); + if (ret) + goto err_unregister_entities; + ret = mali_c55_create_links(mali_c55); if (ret) goto err_unregister_entities; @@ -484,10 +492,12 @@ bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55) { struct mali_c55_cap_dev *fr = &mali_c55->cap_devs[MALI_C55_CAP_DEV_FR]; struct mali_c55_cap_dev *ds = &mali_c55->cap_devs[MALI_C55_CAP_DEV_DS]; + struct mali_c55_stats *stats = &mali_c55->stats; return vb2_start_streaming_called(&fr->queue) && (!(mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) || - vb2_start_streaming_called(&ds->queue)); + vb2_start_streaming_called(&ds->queue)) && + vb2_start_streaming_called(&stats->queue); } static int mali_c55_check_hwcfg(struct mali_c55 *mali_c55) @@ -529,6 +539,7 @@ static irqreturn_t mali_c55_isr(int irq, void *context) struct device *dev = context; struct mali_c55 *mali_c55 = dev_get_drvdata(dev); unsigned long interrupt_status; + u32 curr_config; unsigned int i; interrupt_status = mali_c55_read(mali_c55, @@ -550,6 +561,22 @@ static irqreturn_t mali_c55_isr(int irq, void *context) if (mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) mali_c55_set_next_buffer(&mali_c55->cap_devs[MALI_C55_CAP_DEV_DS]); + /* + * When the ISP starts a frame we have some work to do: + * + * 1. Copy over the config for the **next** frame + * 2. Read out the metering stats for the **last** frame + */ + + curr_config = mali_c55_read(mali_c55, + MALI_C55_REG_PING_PONG_READ); + curr_config &= MALI_C55_REG_PING_PONG_READ_MASK; + curr_config >>= ffs(MALI_C55_REG_PING_PONG_READ_MASK) - 1; + mali_c55->next_config = curr_config ^ 1; + + mali_c55_stats_fill_buffer(mali_c55, + mali_c55->next_config ^ 1); + mali_c55_swap_next_config(mali_c55); break; diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c index 7a80be328c5d..c5183d7092a9 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c @@ -5,6 +5,8 @@ * Copyright (C) 2025 Ideas on Board Oy */ +#include + #include #include #include @@ -490,6 +492,14 @@ static int mali_c55_isp_init_state(struct v4l2_subdev *sd, in_crop->width = MALI_C55_DEFAULT_WIDTH; in_crop->height = MALI_C55_DEFAULT_HEIGHT; + src_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SOURCE_STATS); + + src_fmt->width = 0; + src_fmt->height = 0; + src_fmt->field = V4L2_FIELD_NONE; + src_fmt->code = MEDIA_BUS_FMT_METADATA_FIXED; + return 0; } @@ -586,6 +596,7 @@ int mali_c55_register_isp(struct mali_c55 *mali_c55) MEDIA_PAD_FL_MUST_CONNECT; isp->pads[MALI_C55_ISP_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; isp->pads[MALI_C55_ISP_PAD_SOURCE_BYPASS].flags = MEDIA_PAD_FL_SOURCE; + isp->pads[MALI_C55_ISP_PAD_SOURCE_STATS].flags = MEDIA_PAD_FL_SOURCE; ret = media_entity_pads_init(&sd->entity, MALI_C55_ISP_NUM_PADS, isp->pads); diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h index 66b144c6fe90..8b04aff1990a 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h +++ b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h @@ -103,6 +103,9 @@ enum mali_c55_interrupts { #define MALI_C55_VC_START(v) ((v) & 0xffff) #define MALI_C55_VC_SIZE(v) (((v) & 0xffff) << 16) +#define MALI_C55_REG_1024BIN_HIST 0x054a8 +#define MALI_C55_1024BIN_HIST_SIZE 4096 + /* Ping/Pong Configuration Space */ #define MALI_C55_REG_BASE_ADDR 0x18e88 #define MALI_C55_REG_BYPASS_0 0x18eac diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-stats.c b/drivers/media/platform/arm/mali-c55/mali-c55-stats.c new file mode 100644 index 000000000000..655e52a5f288 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-stats.c @@ -0,0 +1,323 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - 3A Statistics capture device + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +static const unsigned int metering_space_addrs[] = { + [MALI_C55_CONFIG_PING] = 0x095ac, + [MALI_C55_CONFIG_PONG] = 0x2156c, +}; + +static int mali_c55_stats_enum_fmt_meta_cap(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + if (f->index) + return -EINVAL; + + f->pixelformat = V4L2_META_FMT_MALI_C55_STATS; + + return 0; +} + +static int mali_c55_stats_g_fmt_meta_cap(struct file *file, void *fh, + struct v4l2_format *f) +{ + static const struct v4l2_meta_format mfmt = { + .dataformat = V4L2_META_FMT_MALI_C55_STATS, + .buffersize = sizeof(struct mali_c55_stats_buffer) + }; + + f->fmt.meta = mfmt; + + return 0; +} + +static int mali_c55_stats_querycap(struct file *file, + void *priv, struct v4l2_capability *cap) +{ + strscpy(cap->driver, MALI_C55_DRIVER_NAME, sizeof(cap->driver)); + strscpy(cap->card, "ARM Mali-C55 ISP", sizeof(cap->card)); + + return 0; +} + +static const struct v4l2_ioctl_ops mali_c55_stats_v4l2_ioctl_ops = { + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_enum_fmt_meta_cap = mali_c55_stats_enum_fmt_meta_cap, + .vidioc_g_fmt_meta_cap = mali_c55_stats_g_fmt_meta_cap, + .vidioc_s_fmt_meta_cap = mali_c55_stats_g_fmt_meta_cap, + .vidioc_try_fmt_meta_cap = mali_c55_stats_g_fmt_meta_cap, + .vidioc_querycap = mali_c55_stats_querycap, + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static const struct v4l2_file_operations mali_c55_stats_v4l2_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +static int +mali_c55_stats_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, + unsigned int *num_planes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + if (*num_planes && *num_planes > 1) + return -EINVAL; + + if (sizes[0] && sizes[0] < sizeof(struct mali_c55_stats_buffer)) + return -EINVAL; + + *num_planes = 1; + + if (!sizes[0]) + sizes[0] = sizeof(struct mali_c55_stats_buffer); + + return 0; +} + +static void mali_c55_stats_buf_queue(struct vb2_buffer *vb) +{ + struct mali_c55_stats *stats = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_stats_buf *buf = container_of(vbuf, + struct mali_c55_stats_buf, vb); + + vb2_set_plane_payload(vb, 0, sizeof(struct mali_c55_stats_buffer)); + buf->segments_remaining = 2; + buf->failed = false; + + spin_lock(&stats->buffers.lock); + list_add_tail(&buf->queue, &stats->buffers.queue); + spin_unlock(&stats->buffers.lock); +} + +static void mali_c55_stats_return_buffers(struct mali_c55_stats *stats, + enum vb2_buffer_state state) +{ + struct mali_c55_stats_buf *buf, *tmp; + + guard(spinlock)(&stats->buffers.lock); + + list_for_each_entry_safe(buf, tmp, &stats->buffers.queue, queue) { + list_del(&buf->queue); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } +} + +static int mali_c55_stats_start_streaming(struct vb2_queue *q, + unsigned int count) +{ + struct mali_c55_stats *stats = vb2_get_drv_priv(q); + struct mali_c55 *mali_c55 = stats->mali_c55; + int ret; + + ret = pm_runtime_resume_and_get(mali_c55->dev); + if (ret) + goto err_return_buffers; + + ret = video_device_pipeline_alloc_start(&stats->vdev); + if (ret) + goto err_pm_put; + + if (mali_c55_pipeline_ready(mali_c55)) { + ret = v4l2_subdev_enable_streams(&mali_c55->isp.sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + if (ret < 0) + goto err_stop_pipeline; + } + + return 0; + +err_stop_pipeline: + video_device_pipeline_stop(&stats->vdev); +err_pm_put: + pm_runtime_put_autosuspend(mali_c55->dev); +err_return_buffers: + mali_c55_stats_return_buffers(stats, VB2_BUF_STATE_QUEUED); + + return ret; +} + +static void mali_c55_stats_stop_streaming(struct vb2_queue *q) +{ + struct mali_c55_stats *stats = vb2_get_drv_priv(q); + struct mali_c55 *mali_c55 = stats->mali_c55; + struct mali_c55_isp *isp = &mali_c55->isp; + + if (mali_c55_pipeline_ready(mali_c55)) { + if (v4l2_subdev_is_streaming(&isp->sd)) + v4l2_subdev_disable_streams(&isp->sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + } + + video_device_pipeline_stop(&stats->vdev); + mali_c55_stats_return_buffers(stats, VB2_BUF_STATE_ERROR); + + pm_runtime_put_autosuspend(stats->mali_c55->dev); +} + +static const struct vb2_ops mali_c55_stats_vb2_ops = { + .queue_setup = mali_c55_stats_queue_setup, + .buf_queue = mali_c55_stats_buf_queue, + .start_streaming = mali_c55_stats_start_streaming, + .stop_streaming = mali_c55_stats_stop_streaming, +}; + +static void mali_c55_stats_cpu_read(struct mali_c55_stats *stats, + struct mali_c55_stats_buf *buf, + enum mali_c55_config_spaces cfg_space) +{ + struct mali_c55 *mali_c55 = stats->mali_c55; + const void __iomem *src; + size_t length; + void *dst; + + src = mali_c55->base + MALI_C55_REG_1024BIN_HIST; + dst = vb2_plane_vaddr(&buf->vb.vb2_buf, 0); + memcpy_fromio(dst, src, MALI_C55_1024BIN_HIST_SIZE); + + src = mali_c55->base + metering_space_addrs[cfg_space]; + dst += MALI_C55_1024BIN_HIST_SIZE; + length = sizeof(struct mali_c55_stats_buffer) - MALI_C55_1024BIN_HIST_SIZE; + memcpy_fromio(dst, src, length); +} + +void mali_c55_stats_fill_buffer(struct mali_c55 *mali_c55, + enum mali_c55_config_spaces cfg_space) +{ + struct mali_c55_stats *stats = &mali_c55->stats; + struct mali_c55_stats_buf *buf = NULL; + + spin_lock(&stats->buffers.lock); + if (!list_empty(&stats->buffers.queue)) { + buf = list_first_entry(&stats->buffers.queue, + struct mali_c55_stats_buf, queue); + list_del(&buf->queue); + } + spin_unlock(&stats->buffers.lock); + + if (!buf) + return; + + buf->vb.sequence = mali_c55->isp.frame_sequence; + buf->vb.vb2_buf.timestamp = ktime_get_boottime_ns(); + + mali_c55_stats_cpu_read(stats, buf, cfg_space); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); +} + +void mali_c55_unregister_stats(struct mali_c55 *mali_c55) +{ + struct mali_c55_stats *stats = &mali_c55->stats; + + if (!video_is_registered(&stats->vdev)) + return; + + vb2_video_unregister_device(&stats->vdev); + media_entity_cleanup(&stats->vdev.entity); + + mutex_destroy(&stats->lock); +} + +int mali_c55_register_stats(struct mali_c55 *mali_c55) +{ + struct mali_c55_stats *stats = &mali_c55->stats; + struct video_device *vdev = &stats->vdev; + struct vb2_queue *vb2q = &stats->queue; + int ret; + + mutex_init(&stats->lock); + INIT_LIST_HEAD(&stats->buffers.queue); + spin_lock_init(&stats->buffers.lock); + + stats->pad.flags = MEDIA_PAD_FL_SINK; + ret = media_entity_pads_init(&stats->vdev.entity, 1, &stats->pad); + if (ret) + goto err_destroy_mutex; + + vb2q->type = V4L2_BUF_TYPE_META_CAPTURE; + vb2q->io_modes = VB2_MMAP | VB2_DMABUF; + vb2q->drv_priv = stats; + vb2q->mem_ops = &vb2_dma_contig_memops; + vb2q->ops = &mali_c55_stats_vb2_ops; + vb2q->buf_struct_size = sizeof(struct mali_c55_stats_buf); + vb2q->min_queued_buffers = 1; + vb2q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + vb2q->lock = &stats->lock; + vb2q->dev = mali_c55->dev; + + ret = vb2_queue_init(vb2q); + if (ret) { + dev_err(mali_c55->dev, "stats vb2 queue init failed\n"); + goto err_cleanup_entity; + } + + strscpy(stats->vdev.name, "mali-c55 3a stats", sizeof(stats->vdev.name)); + vdev->release = video_device_release_empty; + vdev->fops = &mali_c55_stats_v4l2_fops; + vdev->ioctl_ops = &mali_c55_stats_v4l2_ioctl_ops; + vdev->lock = &stats->lock; + vdev->v4l2_dev = &mali_c55->v4l2_dev; + vdev->queue = &stats->queue; + vdev->device_caps = V4L2_CAP_META_CAPTURE | V4L2_CAP_STREAMING; + vdev->vfl_dir = VFL_DIR_RX; + video_set_drvdata(vdev, stats); + + ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); + if (ret) { + dev_err(mali_c55->dev, + "failed to register stats video device\n"); + goto err_release_vb2q; + } + + stats->mali_c55 = mali_c55; + + return 0; + +err_release_vb2q: + vb2_queue_release(vb2q); +err_cleanup_entity: + media_entity_cleanup(&stats->vdev.entity); +err_destroy_mutex: + + mutex_destroy(&stats->lock); + + return ret; +} From b35d9f3e301dce2c822704ee4d95c0337ed9fb14 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:55 +0000 Subject: [PATCH 229/249] Documentation: media: mali-c55: Add Statistics documentation Add documentation explaining the ability to capture statistics from the mali-c55 driver's new V4L2 device, as well as the various tap points from which those statistics can be drawn in the ISP's processing flow. Additionally add a page detailing the new V4L2 meta format for the mali-c55 statistics. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/mali-c55.rst | 60 ++++++++++++++++++- .../userspace-api/media/v4l/meta-formats.rst | 1 + .../media/v4l/metafmt-arm-mali-c55.rst | 29 +++++++++ MAINTAINERS | 1 + 4 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst diff --git a/Documentation/admin-guide/media/mali-c55.rst b/Documentation/admin-guide/media/mali-c55.rst index 72cdded507b3..03723e0e8e43 100644 --- a/Documentation/admin-guide/media/mali-c55.rst +++ b/Documentation/admin-guide/media/mali-c55.rst @@ -67,10 +67,11 @@ The driver has 4 V4L2 subdevices: - `mali_c55 resizer fr`: The Full-Resolution pipe resizer - `mali_c55 resizer ds`: The Downscale pipe resizer -The driver has 2 V4L2 video devices: +The driver has 3 V4L2 video devices: - `mali-c55 fr`: The full-resolution pipe's capture device - `mali-c55 ds`: The downscale pipe's capture device +- `mali-c55 3a stats`: The 3A statistics capture device Frame sequences are synchronised across to two capture devices, meaning if one pipe is started later than the other the sequence numbers returned in its @@ -333,6 +334,63 @@ configured, followed by formats in the appropriate places: # Set format on the video device and stream yavta -f RGB565 -s 1920x1080 -c10 /dev/video0 +.. _mali-c55-3a-stats: + +Capturing ISP Statistics +======================== + +The ISP is capable of producing statistics for consumption by image processing +algorithms running in userspace. These statistics can be captured by queueing +buffers to the `mali-c55 3a stats` V4L2 Device whilst the ISP is streaming. Only +the :ref:`V4L2_META_FMT_MALI_C55_STATS ` +format is supported, so no format-setting need be done: + +.. code-block:: none + + # We assume the media graph has been configured to support RGB565 capture + # from the mali-c55 fr V4L2 Device, which is at /dev/video0. The statistics + # V4L2 device is at /dev/video3 + + yavta -f RGB565 -s 1920x1080 -c32 /dev/video0 && \ + yavta -c10 -F /dev/video3 + +The layout of the buffer is described by :c:type:`mali_c55_stats_buffer`, +but broadly statistics are generated to support three image processing +algorithms; AEXP (Auto-Exposure), AWB (Auto-White Balance) and AF (Auto-Focus). +These stats can be drawn from various places in the Mali C55 ISP pipeline, known +as "tap points". This high-level block diagram is intended to explain where in +the processing flow the statistics can be drawn from:: + + +--> AEXP-2 +----> AEXP-1 +--> AF-0 + | +----> AF-1 | + | | | + +---------+ | +--------------+ | +--------------+ | + | Input +-+-->+ Digital Gain +---+-->+ Black Level +---+---+ + +---------+ +--------------+ +--------------+ | + +-----------------------------------------------------------------+ + | + | +--------------+ +---------+ +----------------+ + +-->| Sinter Noise +-+ White +--+--->| Lens Shading +--+---------------+ + | Reduction | | Balance | | | | | | + +--------------+ +---------+ | +----------------+ | | + +---> AEXP-0 (A) +--> AEXP-0 (B) | + +--------------------------------------------------------------------------+ + | + | +----------------+ +--------------+ +----------------+ + +-->| Tone mapping +-+--->| Demosaicing +->+ Purple Fringe +-+-----------+ + | | | +--------------+ | Correction | | | + +----------------+ +-> AEXP-IRIDIX +----------------+ +---> AWB-0 | + +----------------------------------------------------------------------------+ + | +-------------+ +-------------+ + +------------------->| Colour +---+--->| Output | + | Correction | | | Pipelines | + +-------------+ | +-------------+ + +--> AWB-1 + +At present all statistics are drawn from the 0th tap point for each algorithm; +I.E. AEXP statistics from AEXP-0 (A), AWB statistics from AWB-0 and AF +statistics from AF-0. In the future this will be configurable. + References ========== .. [1] https://git.linuxtv.org/v4l-utils.git/ diff --git a/Documentation/userspace-api/media/v4l/meta-formats.rst b/Documentation/userspace-api/media/v4l/meta-formats.rst index 7b758ea9eb4a..3e0cab153f0a 100644 --- a/Documentation/userspace-api/media/v4l/meta-formats.rst +++ b/Documentation/userspace-api/media/v4l/meta-formats.rst @@ -13,6 +13,7 @@ These formats are used for the :ref:`metadata` interface only. .. toctree:: :maxdepth: 1 + metafmt-arm-mali-c55 metafmt-c3-isp metafmt-d4xx metafmt-generic diff --git a/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst new file mode 100644 index 000000000000..0bda9740a6be --- /dev/null +++ b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst @@ -0,0 +1,29 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. _v4l2-meta-fmt-mali-c55-stats: + +************************************* +V4L2_META_FMT_MALI_C55_STATS ('C55S') +************************************* + +3A Statistics +============= + +The ISP device collects different statistics over an input bayer frame. Those +statistics can be obtained by userspace from the +:ref:`mali-c55 3a stats ` metadata capture video node, using +the :c:type:`v4l2_meta_format` interface. The buffer contains a single instance +of the C structure :c:type:`mali_c55_stats_buffer` defined in +``mali-c55-config.h``, so the structure can be obtained from the buffer by: + +.. code-block:: C + + struct mali_c55_stats_buffer *stats = + (struct mali_c55_stats_buffer *)buf; + +For details of the statistics see :c:type:`mali_c55_stats_buffer`. + +Arm Mali-C55 uAPI data types +============================ + +.. kernel-doc:: include/uapi/linux/media/arm/mali-c55-config.h diff --git a/MAINTAINERS b/MAINTAINERS index 193580ceb9f4..99b8c9eb73d4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2115,6 +2115,7 @@ F: Documentation/admin-guide/media/mali-c55-graph.dot F: Documentation/admin-guide/media/mali-c55.rst F: Documentation/devicetree/bindings/media/arm,mali-c55.yaml F: Documentation/userspace-api/media/drivers/mali-c55.rst +F: Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst F: drivers/media/platform/arm/mali-c55/ F: include/uapi/linux/media/arm/mali-c55-config.h From 1ab3cb233d61131b2d02650f8ed9e4e077fd4508 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Tue, 11 Nov 2025 16:15:56 +0000 Subject: [PATCH 230/249] media: mali-c55: Add image formats for Mali-C55 parameters buffer Add a new V4L2 meta format code for the Mali-C55 parameters. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- drivers/media/v4l2-core/v4l2-ioctl.c | 1 + include/uapi/linux/videodev2.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c b/drivers/media/v4l2-core/v4l2-ioctl.c index bfab29938b8f..98512ea4cc5b 100644 --- a/drivers/media/v4l2-core/v4l2-ioctl.c +++ b/drivers/media/v4l2-core/v4l2-ioctl.c @@ -1469,6 +1469,7 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt) case V4L2_META_FMT_RK_ISP1_EXT_PARAMS: descr = "Rockchip ISP1 Ext 3A Params"; break; case V4L2_META_FMT_C3ISP_PARAMS: descr = "Amlogic C3 ISP Parameters"; break; case V4L2_META_FMT_C3ISP_STATS: descr = "Amlogic C3 ISP Statistics"; break; + case V4L2_META_FMT_MALI_C55_PARAMS: descr = "ARM Mali-C55 ISP Parameters"; break; case V4L2_META_FMT_MALI_C55_STATS: descr = "ARM Mali-C55 ISP 3A Statistics"; break; case V4L2_PIX_FMT_NV12_8L128: descr = "NV12 (8x128 Linear)"; break; case V4L2_PIX_FMT_NV12M_8L128: descr = "NV12M (8x128 Linear)"; break; diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h index cba4b1311667..add08188f068 100644 --- a/include/uapi/linux/videodev2.h +++ b/include/uapi/linux/videodev2.h @@ -885,6 +885,7 @@ struct v4l2_pix_format { #define V4L2_META_FMT_RPI_FE_STATS v4l2_fourcc('R', 'P', 'F', 'S') /* PiSP FE stats */ /* Vendor specific - used for Arm Mali-C55 ISP */ +#define V4L2_META_FMT_MALI_C55_PARAMS v4l2_fourcc('C', '5', '5', 'P') /* ARM Mali-C55 Parameters */ #define V4L2_META_FMT_MALI_C55_STATS v4l2_fourcc('C', '5', '5', 'S') /* ARM Mali-C55 3A Statistics */ #ifdef __KERNEL__ From 08a99369f44eeb63eacc56fe42f4c67a6c7dbc37 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:57 +0000 Subject: [PATCH 231/249] media: uapi: Add parameters structs to mali-c55-config.h Add structures describing the ISP parameters to mali-c55-config.h Tested-by: Lad Prabhakar Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- .../uapi/linux/media/arm/mali-c55-config.h | 598 ++++++++++++++++++ 1 file changed, 598 insertions(+) diff --git a/include/uapi/linux/media/arm/mali-c55-config.h b/include/uapi/linux/media/arm/mali-c55-config.h index e31fb8ffa10a..109082c5694f 100644 --- a/include/uapi/linux/media/arm/mali-c55-config.h +++ b/include/uapi/linux/media/arm/mali-c55-config.h @@ -10,6 +10,7 @@ #include #include +#include #define V4L2_CID_MALI_C55_CAPABILITIES (V4L2_CID_USER_MALI_C55_BASE + 0x0) #define MALI_C55_GPS_PONG (1U << 0) @@ -193,4 +194,601 @@ struct mali_c55_stats_buffer { __u32 reserved3[15]; } __attribute__((packed)); +/** + * enum mali_c55_param_buffer_version - Mali-C55 parameters block versioning + * + * @MALI_C55_PARAM_BUFFER_V1: First version of Mali-C55 parameters block + */ +enum mali_c55_param_buffer_version { + MALI_C55_PARAM_BUFFER_V1, +}; + +/** + * enum mali_c55_param_block_type - Enumeration of Mali-C55 parameter blocks + * + * This enumeration defines the types of Mali-C55 parameters block. Each block + * configures a specific processing block of the Mali-C55 ISP. The block + * type allows the driver to correctly interpret the parameters block data. + * + * It is the responsibility of userspace to correctly set the type of each + * parameters block. + * + * @MALI_C55_PARAM_BLOCK_SENSOR_OFFS: Sensor pre-shading black level offset + * @MALI_C55_PARAM_BLOCK_AEXP_HIST: Auto-exposure 1024-bin histogram + * configuration + * @MALI_C55_PARAM_BLOCK_AEXP_IHIST: Post-Iridix auto-exposure 1024-bin + * histogram configuration + * @MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS: Auto-exposure 1024-bin histogram + * weighting + * @MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS: Post-Iridix auto-exposure 1024-bin + * histogram weighting + * @MALI_C55_PARAM_BLOCK_DIGITAL_GAIN: Digital gain + * @MALI_C55_PARAM_BLOCK_AWB_GAINS: Auto-white balance gains + * @MALI_C55_PARAM_BLOCK_AWB_CONFIG: Auto-white balance statistics config + * @MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP: Auto-white balance gains for AEXP-0 tap + * @MALI_C55_PARAM_MESH_SHADING_CONFIG : Mesh shading tables configuration + * @MALI_C55_PARAM_MESH_SHADING_SELECTION: Mesh shading table selection + */ +enum mali_c55_param_block_type { + MALI_C55_PARAM_BLOCK_SENSOR_OFFS, + MALI_C55_PARAM_BLOCK_AEXP_HIST, + MALI_C55_PARAM_BLOCK_AEXP_IHIST, + MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS, + MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS, + MALI_C55_PARAM_BLOCK_DIGITAL_GAIN, + MALI_C55_PARAM_BLOCK_AWB_GAINS, + MALI_C55_PARAM_BLOCK_AWB_CONFIG, + MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP, + MALI_C55_PARAM_MESH_SHADING_CONFIG, + MALI_C55_PARAM_MESH_SHADING_SELECTION, +}; + +/** + * struct mali_c55_params_sensor_off_preshading - offset subtraction for each + * color channel + * + * Provides removal of the sensor black level from the sensor data. Separate + * offsets are provided for each of the four Bayer component color channels + * which are defaulted to R, Gr, Gb, B. + * + * header.type should be set to MALI_C55_PARAM_BLOCK_SENSOR_OFFS from + * :c:type:`mali_c55_param_block_type` for this block. + * + * @header: The Mali-C55 parameters block header + * @chan00: Offset for color channel 00 (default: R) + * @chan01: Offset for color channel 01 (default: Gr) + * @chan10: Offset for color channel 10 (default: Gb) + * @chan11: Offset for color channel 11 (default: B) + */ +struct mali_c55_params_sensor_off_preshading { + struct v4l2_isp_params_block_header header; + __u32 chan00; + __u32 chan01; + __u32 chan10; + __u32 chan11; +}; + +/** + * enum mali_c55_aexp_hist_tap_points - Tap points for the AEXP histogram + * @MALI_C55_AEXP_HIST_TAP_WB: After static white balance + * @MALI_C55_AEXP_HIST_TAP_FS: After WDR Frame Stitch + * @MALI_C55_AEXP_HIST_TAP_TPG: After the test pattern generator + */ +enum mali_c55_aexp_hist_tap_points { + MALI_C55_AEXP_HIST_TAP_WB = 0, + MALI_C55_AEXP_HIST_TAP_FS, + MALI_C55_AEXP_HIST_TAP_TPG, +}; + +/** + * enum mali_c55_aexp_skip_x - Horizontal pixel skipping + * @MALI_C55_AEXP_SKIP_X_EVERY_2ND: Collect every 2nd pixel horizontally + * @MALI_C55_AEXP_SKIP_X_EVERY_3RD: Collect every 3rd pixel horizontally + * @MALI_C55_AEXP_SKIP_X_EVERY_4TH: Collect every 4th pixel horizontally + * @MALI_C55_AEXP_SKIP_X_EVERY_5TH: Collect every 5th pixel horizontally + * @MALI_C55_AEXP_SKIP_X_EVERY_8TH: Collect every 8th pixel horizontally + * @MALI_C55_AEXP_SKIP_X_EVERY_9TH: Collect every 9th pixel horizontally + */ +enum mali_c55_aexp_skip_x { + MALI_C55_AEXP_SKIP_X_EVERY_2ND, + MALI_C55_AEXP_SKIP_X_EVERY_3RD, + MALI_C55_AEXP_SKIP_X_EVERY_4TH, + MALI_C55_AEXP_SKIP_X_EVERY_5TH, + MALI_C55_AEXP_SKIP_X_EVERY_8TH, + MALI_C55_AEXP_SKIP_X_EVERY_9TH +}; + +/** + * enum mali_c55_aexp_skip_y - Vertical pixel skipping + * @MALI_C55_AEXP_SKIP_Y_ALL: Collect every single pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_2ND: Collect every 2nd pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_3RD: Collect every 3rd pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_4TH: Collect every 4th pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_5TH: Collect every 5th pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_8TH: Collect every 8th pixel vertically + * @MALI_C55_AEXP_SKIP_Y_EVERY_9TH: Collect every 9th pixel vertically + */ +enum mali_c55_aexp_skip_y { + MALI_C55_AEXP_SKIP_Y_ALL, + MALI_C55_AEXP_SKIP_Y_EVERY_2ND, + MALI_C55_AEXP_SKIP_Y_EVERY_3RD, + MALI_C55_AEXP_SKIP_Y_EVERY_4TH, + MALI_C55_AEXP_SKIP_Y_EVERY_5TH, + MALI_C55_AEXP_SKIP_Y_EVERY_8TH, + MALI_C55_AEXP_SKIP_Y_EVERY_9TH +}; + +/** + * enum mali_c55_aexp_row_column_offset - Start from the first or second row or + * column + * @MALI_C55_AEXP_FIRST_ROW_OR_COL: Start from the first row / column + * @MALI_C55_AEXP_SECOND_ROW_OR_COL: Start from the second row / column + */ +enum mali_c55_aexp_row_column_offset { + MALI_C55_AEXP_FIRST_ROW_OR_COL = 1, + MALI_C55_AEXP_SECOND_ROW_OR_COL = 2, +}; + +/** + * enum mali_c55_aexp_hist_plane_mode - Mode for the AEXP Histograms + * @MALI_C55_AEXP_HIST_COMBINED: All color planes in one 1024-bin histogram + * @MALI_C55_AEXP_HIST_SEPARATE: Each color plane in one 256-bin histogram with a bin width of 16 + * @MALI_C55_AEXP_HIST_FOCUS_00: Top left plane in the first bank, rest in second bank + * @MALI_C55_AEXP_HIST_FOCUS_01: Top right plane in the first bank, rest in second bank + * @MALI_C55_AEXP_HIST_FOCUS_10: Bottom left plane in the first bank, rest in second bank + * @MALI_C55_AEXP_HIST_FOCUS_11: Bottom right plane in the first bank, rest in second bank + * + * In the "focus" modes statistics are collected into two 512-bin histograms + * with a bin width of 8. One colour plane is in the first histogram with the + * remainder combined into the second. The four options represent which of the + * four positions in a bayer pattern are the focused plane. + */ +enum mali_c55_aexp_hist_plane_mode { + MALI_C55_AEXP_HIST_COMBINED = 0, + MALI_C55_AEXP_HIST_SEPARATE = 1, + MALI_C55_AEXP_HIST_FOCUS_00 = 4, + MALI_C55_AEXP_HIST_FOCUS_01 = 5, + MALI_C55_AEXP_HIST_FOCUS_10 = 6, + MALI_C55_AEXP_HIST_FOCUS_11 = 7, +}; + +/** + * struct mali_c55_params_aexp_hist - configuration for AEXP metering hists + * + * This struct allows users to configure the 1024-bin AEXP histograms. Broadly + * speaking the parameters allow you to mask particular regions of the image and + * to select different kinds of histogram. + * + * The skip_x, offset_x, skip_y and offset_y fields allow users to ignore or + * mask pixels in the frame by their position relative to the top left pixel. + * First, the skip_y, offset_x and offset_y fields define which of the pixels + * within each 2x2 region will be counted in the statistics. + * + * If skip_y == 0 then two pixels from each covered region will be counted. If + * both offset_x and offset_y are zero, then the two left-most pixels in each + * 2x2 pixel region will be counted. Setting offset_x = 1 will discount the top + * left pixel and count the top right pixel. Setting offset_y = 1 will discount + * the bottom left pixel and count the bottom right pixel. + * + * If skip_y != 0 then only a single pixel from each region covered by the + * pattern will be counted. In this case offset_x controls whether the pixel + * that's counted is in the left (if offset_x == 0) or right (if offset_x == 1) + * column and offset_y controls whether the pixel that's counted is in the top + * (if offset_y == 0) or bottom (if offset_y == 1) row. + * + * The skip_x and skip_y fields control how the 2x2 pixel region is repeated + * across the image data. The first instance of the region is always in the top + * left of the image data. The skip_x field controls how many pixels are ignored + * in the x direction before the pixel masking region is repeated. The skip_y + * field controls how many pixels are ignored in the y direction before the + * pixel masking region is repeated. + * + * These fields can be used to reduce the number of pixels counted for the + * statistics, but it's important to be careful to configure them correctly. + * Some combinations of values will result in colour components from the input + * data being ignored entirely, for example in the following configuration: + * + * skip_x = 0 + * offset_x = 0 + * skip_y = 0 + * offset_y = 0 + * + * Only the R and Gb components of RGGB data that was input would be collected. + * Similarly in the following configuration: + * + * skip_x = 0 + * offset_x = 0 + * skip_y = 1 + * offset_y = 1 + * + * Only the Gb component of RGGB data that was input would be collected. To + * correct things such that all 4 colour components were included it would be + * necessary to set the skip_x and skip_y fields in a way that resulted in all + * four colour components being collected: + * + * skip_x = 1 + * offset_x = 0 + * skip_y = 1 + * offset_y = 1 + * + * header.type should be set to one of either MALI_C55_PARAM_BLOCK_AEXP_HIST or + * MALI_C55_PARAM_BLOCK_AEXP_IHIST from :c:type:`mali_c55_param_block_type`. + * + * @header: The Mali-C55 parameters block header + * @skip_x: Horizontal decimation. See enum mali_c55_aexp_skip_x + * @offset_x: Skip the first column, or not. See enum mali_c55_aexp_row_column_offset + * @skip_y: Vertical decimation. See enum mali_c55_aexp_skip_y + * @offset_y: Skip the first row, or not. See enum mali_c55_aexp_row_column_offset + * @scale_bottom: Scale pixels in bottom half of intensity range: 0=1x ,1=2x, 2=4x, 4=8x, 4=16x + * @scale_top: scale pixels in top half of intensity range: 0=1x ,1=2x, 2=4x, 4=8x, 4=16x + * @plane_mode: Plane separation mode. See enum mali_c55_aexp_hist_plane_mode + * @tap_point: Tap point for histogram from enum mali_c55_aexp_hist_tap_points. + * This parameter is unused for the post-Iridix Histogram + */ +struct mali_c55_params_aexp_hist { + struct v4l2_isp_params_block_header header; + __u8 skip_x; + __u8 offset_x; + __u8 skip_y; + __u8 offset_y; + __u8 scale_bottom; + __u8 scale_top; + __u8 plane_mode; + __u8 tap_point; +}; + +/** + * struct mali_c55_params_aexp_weights - Array of weights for AEXP metering + * + * This struct allows users to configure the weighting for both of the 1024-bin + * AEXP histograms. The pixel data collected for each zone is multiplied by the + * corresponding weight from this array, which may be zero if the intention is + * to mask off the zone entirely. + * + * header.type should be set to one of either MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS + * or MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS from :c:type:`mali_c55_param_block_type`. + * + * @header: The Mali-C55 parameters block header + * @nodes_used_horiz: Number of active zones horizontally [0..15] + * @nodes_used_vert: Number of active zones vertically [0..15] + * @zone_weights: Zone weighting. Index is row*col where 0,0 is the top + * left zone continuing in raster order. Each zone can be + * weighted in the range [0..15]. The number of rows and + * columns is defined by @nodes_used_vert and + * @nodes_used_horiz + */ +struct mali_c55_params_aexp_weights { + struct v4l2_isp_params_block_header header; + __u8 nodes_used_horiz; + __u8 nodes_used_vert; + __u8 zone_weights[MALI_C55_MAX_ZONES]; +}; + +/** + * struct mali_c55_params_digital_gain - Digital gain value + * + * This struct carries a digital gain value to set in the ISP. + * + * header.type should be set to MALI_C55_PARAM_BLOCK_DIGITAL_GAIN from + * :c:type:`mali_c55_param_block_type` for this block. + * + * @header: The Mali-C55 parameters block header + * @gain: The digital gain value to apply, in Q5.8 format. + */ +struct mali_c55_params_digital_gain { + struct v4l2_isp_params_block_header header; + __u16 gain; +}; + +/** + * enum mali_c55_awb_stats_mode - Statistics mode for AWB + * @MALI_C55_AWB_MODE_GRBR: Statistics collected as Green/Red and Blue/Red ratios + * @MALI_C55_AWB_MODE_RGBG: Statistics collected as Red/Green and Blue/Green ratios + */ +enum mali_c55_awb_stats_mode { + MALI_C55_AWB_MODE_GRBR = 0, + MALI_C55_AWB_MODE_RGBG, +}; + +/** + * struct mali_c55_params_awb_gains - Gain settings for auto white balance + * + * This struct allows users to configure the gains for auto-white balance. There + * are four gain settings corresponding to each colour channel in the bayer + * domain. Although named generically, the association between the gain applied + * and the colour channel is done automatically within the ISP depending on the + * input format, and so the following mapping always holds true:: + * + * gain00 = R + * gain01 = Gr + * gain10 = Gb + * gain11 = B + * + * All of the gains are stored in Q4.8 format. + * + * header.type should be set to one of either MALI_C55_PARAM_BLOCK_AWB_GAINS or + * MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP from :c:type:`mali_c55_param_block_type`. + * + * @header: The Mali-C55 parameters block header + * @gain00: Multiplier for colour channel 00 + * @gain01: Multiplier for colour channel 01 + * @gain10: Multiplier for colour channel 10 + * @gain11: Multiplier for colour channel 11 + */ +struct mali_c55_params_awb_gains { + struct v4l2_isp_params_block_header header; + __u16 gain00; + __u16 gain01; + __u16 gain10; + __u16 gain11; +}; + +/** + * enum mali_c55_params_awb_tap_points - Tap points for the AWB statistics + * @MALI_C55_AWB_STATS_TAP_PF: Immediately after the Purple Fringe block + * @MALI_C55_AWB_STATS_TAP_CNR: Immediately after the CNR block + */ +enum mali_c55_params_awb_tap_points { + MALI_C55_AWB_STATS_TAP_PF = 0, + MALI_C55_AWB_STATS_TAP_CNR, +}; + +/** + * struct mali_c55_params_awb_config - Stats settings for auto-white balance + * + * This struct allows the configuration of the statistics generated for auto + * white balance. Pixel intensity limits can be set to exclude overly bright or + * dark regions of an image from the statistics entirely. Colour ratio minima + * and maxima can be set to discount pixels who's ratios fall outside the + * defined boundaries; there are two sets of registers to do this - the + * "min/max" ratios which bound a region and the "high/low" ratios which further + * trim the upper and lower ratios. For example with the boundaries configured + * as follows, only pixels whos colour ratios falls into the region marked "A" + * would be counted:: + * + * cr_high + * 2.0 | | + * | cb_max --> _________________________v_____ + * 1.8 | | \ | + * | | \ | + * 1.6 | | \ | + * | | \ | + * c 1.4 | cb_low -->|\ A \|<-- cb_high + * b | | \ | + * 1.2 | | \ | + * r | | \ | + * a 1.0 | cb_min --> |____\_________________________| + * t | ^ ^ ^ + * i 0.8 | | | | + * o | cr_min | cr_max + * s 0.6 | | + * | cr_low + * 0.4 | + * | + * 0.2 | + * | + * 0.0 |_______________________________________________________________ + * 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 + * cr ratios + * + * header.type should be set to MALI_C55_PARAM_BLOCK_AWB_CONFIG from + * :c:type:`mali_c55_param_block_type` for this block. + * + * @header: The Mali-C55 parameters block header + * @tap_point: The tap point from enum mali_c55_params_awb_tap_points + * @stats_mode: AWB statistics collection mode, see :c:type:`mali_c55_awb_stats_mode` + * @white_level: Upper pixel intensity (I.E. raw pixel values) limit + * @black_level: Lower pixel intensity (I.E. raw pixel values) limit + * @cr_max: Maximum R/G ratio (Q4.8 format) + * @cr_min: Minimum R/G ratio (Q4.8 format) + * @cb_max: Maximum B/G ratio (Q4.8 format) + * @cb_min: Minimum B/G ratio (Q4.8 format) + * @nodes_used_horiz: Number of active zones horizontally [0..15] + * @nodes_used_vert: Number of active zones vertically [0..15] + * @cr_high: R/G ratio trim high (Q4.8 format) + * @cr_low: R/G ratio trim low (Q4.8 format) + * @cb_high: B/G ratio trim high (Q4.8 format) + * @cb_low: B/G ratio trim low (Q4.8 format) + */ +struct mali_c55_params_awb_config { + struct v4l2_isp_params_block_header header; + __u8 tap_point; + __u8 stats_mode; + __u16 white_level; + __u16 black_level; + __u16 cr_max; + __u16 cr_min; + __u16 cb_max; + __u16 cb_min; + __u8 nodes_used_horiz; + __u8 nodes_used_vert; + __u16 cr_high; + __u16 cr_low; + __u16 cb_high; + __u16 cb_low; +}; + +#define MALI_C55_NUM_MESH_SHADING_ELEMENTS 3072 + +/** + * struct mali_c55_params_mesh_shading_config - Mesh shading configuration + * + * The mesh shading correction module allows programming a separate table of + * either 16x16 or 32x32 node coefficients for 3 different light sources. The + * final correction coefficients applied are computed by blending the + * coefficients from two tables together. + * + * A page of 1024 32-bit integers is associated to each colour channel, with + * pages stored consecutively in memory. Each 32-bit integer packs 3 8-bit + * correction coefficients for a single node, one for each of the three light + * sources. The 8 most significant bits are unused. The following table + * describes the layout:: + * + * +----------- Page (Colour Plane) 0 -------------+ + * | @mesh[i] | Mesh Point | Bits | Light Source | + * +-----------+------------+-------+--------------+ + * | 0 | 0,0 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | 1 | 0,1 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | ... | ... | ... | ... | + * +-----------+------------+-------+--------------+ + * | 1023 | 31,31 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +----------- Page (Colour Plane) 1 -------------+ + * | @mesh[i] | Mesh Point | Bits | Light Source | + * +-----------+------------+-------+--------------+ + * | 1024 | 0,0 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | 1025 | 0,1 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | ... | ... | ... | ... | + * +-----------+------------+-------+--------------+ + * | 2047 | 31,31 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +----------- Page (Colour Plane) 2 -------------+ + * | @mesh[i] | Mesh Point | Bits | Light Source | + * +-----------+------------+-------+--------------+ + * | 2048 | 0,0 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | 2049 | 0,1 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * | ... | ... | ... | ... | + * +-----------+------------+-------+--------------+ + * | 3071 | 31,31 | 16,23 | LS2 | + * | | | 08-15 | LS1 | + * | | | 00-07 | LS0 | + * +-----------+------------+-------+--------------+ + * + * The @mesh_scale member determines the precision and minimum and maximum gain. + * For example if @mesh_scale is 0 and therefore selects 0 - 2x gain, a value of + * 0 in a coefficient means 0.0 gain, a value of 128 means 1.0 gain and 255 + * means 2.0 gain. + * + * header.type should be set to MALI_C55_PARAM_MESH_SHADING_CONFIG from + * :c:type:`mali_c55_param_block_type` for this block. + * + * @header: The Mali-C55 parameters block header + * @mesh_show: Output the mesh data rather than image data + * @mesh_scale: Set the precision and maximum gain range of mesh shading + * - 0 = 0-2x gain + * - 1 = 0-4x gain + * - 2 = 0-8x gain + * - 3 = 0-16x gain + * - 4 = 1-2x gain + * - 5 = 1-3x gain + * - 6 = 1-5x gain + * - 7 = 1-9x gain + * @mesh_page_r: Mesh page select for red colour plane [0..2] + * @mesh_page_g: Mesh page select for green colour plane [0..2] + * @mesh_page_b: Mesh page select for blue colour plane [0..2] + * @mesh_width: Number of horizontal nodes minus 1 [15,31] + * @mesh_height: Number of vertical nodes minus 1 [15,31] + * @mesh: Mesh shading correction tables + */ +struct mali_c55_params_mesh_shading_config { + struct v4l2_isp_params_block_header header; + __u8 mesh_show; + __u8 mesh_scale; + __u8 mesh_page_r; + __u8 mesh_page_g; + __u8 mesh_page_b; + __u8 mesh_width; + __u8 mesh_height; + __u32 mesh[MALI_C55_NUM_MESH_SHADING_ELEMENTS]; +}; + +/** enum mali_c55_params_mesh_alpha_bank - Mesh shading table bank selection + * @MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS1 - Select Light Sources 0 and 1 + * @MALI_C55_MESH_ALPHA_BANK_LS1_AND_LS2 - Select Light Sources 1 and 2 + * @MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS2 - Select Light Sources 0 and 2 + */ +enum mali_c55_params_mesh_alpha_bank { + MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS1 = 0, + MALI_C55_MESH_ALPHA_BANK_LS1_AND_LS2 = 1, + MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS2 = 4 +}; + +/** + * struct mali_c55_params_mesh_shading_selection - Mesh table selection + * + * The module computes the final correction coefficients by blending the ones + * from two light source tables, which are selected (independently for each + * colour channel) by the @mesh_alpha_bank_r/g/b fields. + * + * The final blended coefficients for each node are calculated using the + * following equation: + * + * Final coefficient = (a * LS\ :sub:`b`\ + (256 - a) * LS\ :sub:`a`\) / 256 + * + * Where a is the @mesh_alpha_r/g/b value, and LS\ :sub:`a`\ and LS\ :sub:`b`\ + * are the node cofficients for the two tables selected by the + * @mesh_alpha_bank_r/g/b value. + * + * The scale of the applied correction may also be controlled by tuning the + * @mesh_strength member. This is a modifier to the final coefficients which can + * be used to globally reduce the gains applied. + * + * header.type should be set to MALI_C55_PARAM_MESH_SHADING_SELECTION from + * :c:type:`mali_c55_param_block_type` for this block. + * + * @header: The Mali-C55 parameters block header + * @mesh_alpha_bank_r: Red mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`) + * @mesh_alpha_bank_g: Green mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`) + * @mesh_alpha_bank_b: Blue mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`) + * @mesh_alpha_r: Blend coefficient for R [0..255] + * @mesh_alpha_g: Blend coefficient for G [0..255] + * @mesh_alpha_b: Blend coefficient for B [0..255] + * @mesh_strength: Mesh strength in Q4.12 format [0..4096] + */ +struct mali_c55_params_mesh_shading_selection { + struct v4l2_isp_params_block_header header; + __u8 mesh_alpha_bank_r; + __u8 mesh_alpha_bank_g; + __u8 mesh_alpha_bank_b; + __u8 mesh_alpha_r; + __u8 mesh_alpha_g; + __u8 mesh_alpha_b; + __u16 mesh_strength; +}; + +/** + * define MALI_C55_PARAMS_MAX_SIZE - Maximum size of all Mali C55 Parameters + * + * Though the parameters for the Mali-C55 are passed as optional blocks, the + * driver still needs to know the absolute maximum size so that it can allocate + * a buffer sized appropriately to accommodate userspace attempting to set all + * possible parameters in a single frame. + * + * Some structs are in this list multiple times. Where that's the case, it just + * reflects the fact that the same struct can be used with multiple different + * header types from :c:type:`mali_c55_param_block_type`. + */ +#define MALI_C55_PARAMS_MAX_SIZE \ + (sizeof(struct mali_c55_params_sensor_off_preshading) + \ + sizeof(struct mali_c55_params_aexp_hist) + \ + sizeof(struct mali_c55_params_aexp_weights) + \ + sizeof(struct mali_c55_params_aexp_hist) + \ + sizeof(struct mali_c55_params_aexp_weights) + \ + sizeof(struct mali_c55_params_digital_gain) + \ + sizeof(struct mali_c55_params_awb_gains) + \ + sizeof(struct mali_c55_params_awb_config) + \ + sizeof(struct mali_c55_params_awb_gains) + \ + sizeof(struct mali_c55_params_mesh_shading_config) + \ + sizeof(struct mali_c55_params_mesh_shading_selection)) + #endif /* __UAPI_MALI_C55_CONFIG_H */ From 01535ea086746ebc9ba3b0d817285ae89ec5ae0d Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:58 +0000 Subject: [PATCH 232/249] media: platform: Add mali-c55 parameters video node Add a new code file to the mali-c55 driver that registers an output video node for userspace to queue buffers of parameters to. Handlers are included to program the statistics generation plus the white balance, black level correction and mesh shading correction blocks. Update the rest of the driver to register and link the new video node Tested-by: Lad Prabhakar Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil [hverkuil: remove deprecated vb2_ops_wait_prepare/finish callbacks] --- drivers/media/platform/arm/mali-c55/Kconfig | 1 + drivers/media/platform/arm/mali-c55/Makefile | 1 + .../platform/arm/mali-c55/mali-c55-common.h | 28 + .../platform/arm/mali-c55/mali-c55-core.c | 26 + .../platform/arm/mali-c55/mali-c55-isp.c | 23 +- .../platform/arm/mali-c55/mali-c55-params.c | 815 ++++++++++++++++++ .../arm/mali-c55/mali-c55-registers.h | 128 +++ 7 files changed, 1021 insertions(+), 1 deletion(-) create mode 100644 drivers/media/platform/arm/mali-c55/mali-c55-params.c diff --git a/drivers/media/platform/arm/mali-c55/Kconfig b/drivers/media/platform/arm/mali-c55/Kconfig index 9928039fa522..5b084b3c3340 100644 --- a/drivers/media/platform/arm/mali-c55/Kconfig +++ b/drivers/media/platform/arm/mali-c55/Kconfig @@ -7,6 +7,7 @@ config VIDEO_MALI_C55 select GENERIC_PHY_MIPI_DPHY select MEDIA_CONTROLLER select V4L2_FWNODE + select V4L2_ISP select VIDEO_V4L2_SUBDEV_API select VIDEOBUF2_DMA_CONTIG select VIDEOBUF2_VMALLOC diff --git a/drivers/media/platform/arm/mali-c55/Makefile b/drivers/media/platform/arm/mali-c55/Makefile index b5a22d414479..d5718b0b23e0 100644 --- a/drivers/media/platform/arm/mali-c55/Makefile +++ b/drivers/media/platform/arm/mali-c55/Makefile @@ -3,6 +3,7 @@ mali-c55-y := mali-c55-capture.o \ mali-c55-core.o \ mali-c55-isp.o \ + mali-c55-params.o \ mali-c55-resizer.o \ mali-c55-stats.o \ mali-c55-tpg.o diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-common.h b/drivers/media/platform/arm/mali-c55/mali-c55-common.h index 262fb33bc5ff..31c1deaca146 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-common.h +++ b/drivers/media/platform/arm/mali-c55/mali-c55-common.h @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -44,6 +45,7 @@ struct device; struct mali_c55; struct mali_c55_cap_dev; struct media_pipeline; +struct mali_c55_params_buffer; struct platform_device; struct resource; @@ -52,6 +54,7 @@ enum mali_c55_isp_pads { MALI_C55_ISP_PAD_SOURCE_VIDEO, MALI_C55_ISP_PAD_SOURCE_BYPASS, MALI_C55_ISP_PAD_SOURCE_STATS, + MALI_C55_ISP_PAD_SINK_PARAMS, MALI_C55_ISP_NUM_PADS, }; @@ -170,6 +173,12 @@ struct mali_c55_stats_buf { bool failed; }; +struct mali_c55_params_buf { + struct vb2_v4l2_buffer vb; + struct list_head queue; + struct v4l2_isp_params_buffer *config; +}; + struct mali_c55_stats { struct mali_c55 *mali_c55; struct video_device vdev; @@ -185,6 +194,21 @@ struct mali_c55_stats { } buffers; }; +struct mali_c55_params { + struct mali_c55 *mali_c55; + struct video_device vdev; + struct vb2_queue queue; + struct media_pad pad; + /* Mutex to provide to vb2 */ + struct mutex lock; + + struct { + /* Spinlock to guard buffer queue */ + spinlock_t lock; + struct list_head queue; + } buffers; +}; + enum mali_c55_config_spaces { MALI_C55_CONFIG_PONG, MALI_C55_CONFIG_PING, @@ -228,6 +252,7 @@ struct mali_c55 { struct mali_c55_isp isp; struct mali_c55_resizer resizers[MALI_C55_NUM_RSZS]; struct mali_c55_cap_dev cap_devs[MALI_C55_NUM_CAP_DEVS]; + struct mali_c55_params params; struct mali_c55_stats stats; struct mali_c55_context context; @@ -259,6 +284,8 @@ int mali_c55_register_capture_devs(struct mali_c55 *mali_c55); void mali_c55_unregister_capture_devs(struct mali_c55 *mali_c55); int mali_c55_register_stats(struct mali_c55 *mali_c55); void mali_c55_unregister_stats(struct mali_c55 *mali_c55); +int mali_c55_register_params(struct mali_c55 *mali_c55); +void mali_c55_unregister_params(struct mali_c55 *mali_c55); struct mali_c55_context *mali_c55_get_active_context(struct mali_c55 *mali_c55); void mali_c55_set_plane_done(struct mali_c55_cap_dev *cap_dev, enum mali_c55_planes plane); @@ -278,5 +305,6 @@ mali_c55_isp_get_mbus_config_by_index(u32 index); bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55); void mali_c55_stats_fill_buffer(struct mali_c55 *mali_c55, enum mali_c55_config_spaces cfg_space); +void mali_c55_params_write_config(struct mali_c55 *mali_c55); #endif /* _MALI_C55_COMMON_H */ diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-core.c b/drivers/media/platform/arm/mali-c55/mali-c55-core.c index 0d4ca7fe8d82..b23d543cf496 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-core.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-core.c @@ -294,6 +294,16 @@ static int mali_c55_create_links(struct mali_c55 *mali_c55) goto err_remove_links; } + ret = media_create_pad_link(&mali_c55->params.vdev.entity, 0, + &mali_c55->isp.sd.entity, + MALI_C55_ISP_PAD_SINK_PARAMS, + MEDIA_LNK_FL_ENABLED); + if (ret) { + dev_err(mali_c55->dev, + "failed to link ISP and parameters video node\n"); + goto err_remove_links; + } + return 0; err_remove_links: @@ -308,6 +318,7 @@ static void mali_c55_unregister_entities(struct mali_c55 *mali_c55) mali_c55_unregister_isp(mali_c55); mali_c55_unregister_resizers(mali_c55); mali_c55_unregister_capture_devs(mali_c55); + mali_c55_unregister_params(mali_c55); mali_c55_unregister_stats(mali_c55); } @@ -344,6 +355,10 @@ static int mali_c55_register_entities(struct mali_c55 *mali_c55) if (ret) goto err_unregister_entities; + ret = mali_c55_register_params(mali_c55); + if (ret) + goto err_unregister_entities; + ret = mali_c55_register_stats(mali_c55); if (ret) goto err_unregister_entities; @@ -433,6 +448,7 @@ static int mali_c55_media_frameworks_init(struct mali_c55 *mali_c55) sizeof(mali_c55->media_dev.model)); media_device_init(&mali_c55->media_dev); + ret = media_device_register(&mali_c55->media_dev); if (ret) goto err_cleanup_media_device; @@ -492,11 +508,13 @@ bool mali_c55_pipeline_ready(struct mali_c55 *mali_c55) { struct mali_c55_cap_dev *fr = &mali_c55->cap_devs[MALI_C55_CAP_DEV_FR]; struct mali_c55_cap_dev *ds = &mali_c55->cap_devs[MALI_C55_CAP_DEV_DS]; + struct mali_c55_params *params = &mali_c55->params; struct mali_c55_stats *stats = &mali_c55->stats; return vb2_start_streaming_called(&fr->queue) && (!(mali_c55->capabilities & MALI_C55_GPS_DS_PIPE_FITTED) || vb2_start_streaming_called(&ds->queue)) && + vb2_start_streaming_called(¶ms->queue) && vb2_start_streaming_called(&stats->queue); } @@ -574,6 +592,14 @@ static irqreturn_t mali_c55_isr(int irq, void *context) curr_config >>= ffs(MALI_C55_REG_PING_PONG_READ_MASK) - 1; mali_c55->next_config = curr_config ^ 1; + /* + * Write the configuration parameters received from + * userspace into the configuration buffer, which will + * be transferred to the 'next' active config space at + * by mali_c55_swap_next_config(). + */ + mali_c55_params_write_config(mali_c55); + mali_c55_stats_fill_buffer(mali_c55, mali_c55->next_config ^ 1); diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c index c5183d7092a9..497f25fbdd13 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-isp.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-isp.c @@ -151,6 +151,7 @@ static int mali_c55_isp_start(struct mali_c55 *mali_c55, cfg->bypass ? MALI_C55_ISP_RAW_BYPASS_BYPASS_MASK : 0x00); + mali_c55_params_write_config(mali_c55); ret = mali_c55_config_write(ctx, MALI_C55_CONFIG_PING, true); if (ret) { dev_err(mali_c55->dev, "failed to write ISP config\n"); @@ -494,12 +495,19 @@ static int mali_c55_isp_init_state(struct v4l2_subdev *sd, src_fmt = v4l2_subdev_state_get_format(state, MALI_C55_ISP_PAD_SOURCE_STATS); + sink_fmt = v4l2_subdev_state_get_format(state, + MALI_C55_ISP_PAD_SINK_PARAMS); src_fmt->width = 0; src_fmt->height = 0; src_fmt->field = V4L2_FIELD_NONE; src_fmt->code = MEDIA_BUS_FMT_METADATA_FIXED; + sink_fmt->width = 0; + sink_fmt->height = 0; + sink_fmt->field = V4L2_FIELD_NONE; + sink_fmt->code = MEDIA_BUS_FMT_METADATA_FIXED; + return 0; } @@ -507,8 +515,20 @@ static const struct v4l2_subdev_internal_ops mali_c55_isp_internal_ops = { .init_state = mali_c55_isp_init_state, }; +static int mali_c55_subdev_link_validate(struct media_link *link) +{ + /* + * Skip validation for the parameters sink pad, as the source is not + * a subdevice. + */ + if (link->sink->index == MALI_C55_ISP_PAD_SINK_PARAMS) + return 0; + + return v4l2_subdev_link_validate(link); +} + static const struct media_entity_operations mali_c55_isp_media_ops = { - .link_validate = v4l2_subdev_link_validate, + .link_validate = mali_c55_subdev_link_validate, }; static int mali_c55_isp_s_ctrl(struct v4l2_ctrl *ctrl) @@ -597,6 +617,7 @@ int mali_c55_register_isp(struct mali_c55 *mali_c55) isp->pads[MALI_C55_ISP_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE; isp->pads[MALI_C55_ISP_PAD_SOURCE_BYPASS].flags = MEDIA_PAD_FL_SOURCE; isp->pads[MALI_C55_ISP_PAD_SOURCE_STATS].flags = MEDIA_PAD_FL_SOURCE; + isp->pads[MALI_C55_ISP_PAD_SINK_PARAMS].flags = MEDIA_PAD_FL_SINK; ret = media_entity_pads_init(&sd->entity, MALI_C55_ISP_NUM_PADS, isp->pads); diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-params.c b/drivers/media/platform/arm/mali-c55/mali-c55-params.c new file mode 100644 index 000000000000..ce220a50d253 --- /dev/null +++ b/drivers/media/platform/arm/mali-c55/mali-c55-params.c @@ -0,0 +1,815 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Mali-C55 ISP Driver - Configuration parameters output device + * + * Copyright (C) 2025 Ideas on Board Oy + */ +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mali-c55-common.h" +#include "mali-c55-registers.h" + +/** + * union mali_c55_params_block - Generalisation of a parameter block + * + * This union allows the driver to treat a block as a generic pointer to this + * union and safely access the header and block-specific struct without having + * to resort to casting. The header member is accessed first, and the type field + * checked which allows the driver to determine which of the other members + * should be used. The data member at the end allows a pointer to an address + * within the data member of :c:type:`mali_c55_params_buffer` to initialise a + * union variable. + * + * @header: Pointer to the shared header struct embedded as the + * first member of all the possible other members (except + * @data). This member would be accessed first and the type + * field checked to determine which of the other members + * should be accessed. + * @sensor_offs: For header->type == MALI_C55_PARAM_BLOCK_SENSOR_OFFS + * @aexp_hist: For header->type == MALI_C55_PARAM_BLOCK_AEXP_HIST and + * header->type == MALI_C55_PARAM_BLOCK_AEXP_IHIST + * @aexp_weights: For header->type == MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS + * and header->type = MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS + * @digital_gain: For header->type == MALI_C55_PARAM_BLOCK_DIGITAL_GAIN + * @awb_gains: For header->type == MALI_C55_PARAM_BLOCK_AWB_GAINS and + * header->type = MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP + * @awb_config: For header->type == MALI_C55_PARAM_MESH_SHADING_CONFIG + * @shading_config: For header->type == MALI_C55_PARAM_MESH_SHADING_SELECTION + * @shading_selection: For header->type == MALI_C55_PARAM_BLOCK_SENSOR_OFFS + * @data: Allows easy initialisation of a union variable with a + * pointer into a __u8 array. + */ +union mali_c55_params_block { + const struct v4l2_isp_params_block_header *header; + const struct mali_c55_params_sensor_off_preshading *sensor_offs; + const struct mali_c55_params_aexp_hist *aexp_hist; + const struct mali_c55_params_aexp_weights *aexp_weights; + const struct mali_c55_params_digital_gain *digital_gain; + const struct mali_c55_params_awb_gains *awb_gains; + const struct mali_c55_params_awb_config *awb_config; + const struct mali_c55_params_mesh_shading_config *shading_config; + const struct mali_c55_params_mesh_shading_selection *shading_selection; + const __u8 *data; +}; + +typedef void (*mali_c55_params_handler)(struct mali_c55 *mali_c55, + union mali_c55_params_block block); + +#define to_mali_c55_params_buf(vbuf) \ + container_of(vbuf, struct mali_c55_params_buf, vb) + +static void mali_c55_params_sensor_offs(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_sensor_off_preshading *p; + __u32 global_offset; + + p = block.sensor_offs; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) { + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BYPASS_3, + MALI_C55_REG_BYPASS_3_SENSOR_OFFSET_PRE_SH, + MALI_C55_REG_BYPASS_3_SENSOR_OFFSET_PRE_SH); + return; + } + + if (!(p->chan00 || p->chan01 || p->chan10 || p->chan11)) + return; + + mali_c55_ctx_write(mali_c55, MALI_C55_REG_SENSOR_OFF_PRE_SHA_00, + p->chan00 & MALI_C55_SENSOR_OFF_PRE_SHA_MASK); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_SENSOR_OFF_PRE_SHA_01, + p->chan01 & MALI_C55_SENSOR_OFF_PRE_SHA_MASK); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_SENSOR_OFF_PRE_SHA_10, + p->chan10 & MALI_C55_SENSOR_OFF_PRE_SHA_MASK); + mali_c55_ctx_write(mali_c55, MALI_C55_REG_SENSOR_OFF_PRE_SHA_11, + p->chan11 & MALI_C55_SENSOR_OFF_PRE_SHA_MASK); + + /* + * The average offset is applied as a global offset for the digital + * gain block + */ + global_offset = (p->chan00 + p->chan01 + p->chan10 + p->chan11) >> 2; + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_DIGITAL_GAIN_OFFSET, + MALI_C55_DIGITAL_GAIN_OFFSET_MASK, + global_offset); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_BYPASS_3, + MALI_C55_REG_BYPASS_3_SENSOR_OFFSET_PRE_SH, + 0x00); +} + +static void mali_c55_params_aexp_hist(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_aexp_hist *params; + u32 disable_mask; + u32 disable_val; + u32 base; + + if (block.header->type == MALI_C55_PARAM_BLOCK_AEXP_HIST) { + disable_mask = MALI_C55_AEXP_HIST_DISABLE_MASK; + disable_val = MALI_C55_AEXP_HIST_DISABLE; + base = MALI_C55_REG_AEXP_HIST_BASE; + } else { + disable_mask = MALI_C55_AEXP_IHIST_DISABLE_MASK; + disable_val = MALI_C55_AEXP_IHIST_DISABLE; + base = MALI_C55_REG_AEXP_IHIST_BASE; + } + + params = block.aexp_hist; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) { + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + disable_mask, disable_val); + return; + } + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + disable_mask, false); + + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SKIP_OFFSET, + MALI_C55_AEXP_HIST_SKIP_X_MASK, params->skip_x); + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SKIP_OFFSET, + MALI_C55_AEXP_HIST_OFFSET_X_MASK, + MALI_C55_AEXP_HIST_OFFSET_X(params->offset_x)); + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SKIP_OFFSET, + MALI_C55_AEXP_HIST_SKIP_Y_MASK, + MALI_C55_AEXP_HIST_SKIP_Y(params->skip_y)); + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SKIP_OFFSET, + MALI_C55_AEXP_HIST_OFFSET_Y_MASK, + MALI_C55_AEXP_HIST_OFFSET_Y(params->offset_y)); + + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SCALE_OFFSET, + MALI_C55_AEXP_HIST_SCALE_BOTTOM_MASK, + params->scale_bottom); + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_SCALE_OFFSET, + MALI_C55_AEXP_HIST_SCALE_TOP_MASK, + MALI_C55_AEXP_HIST_SCALE_TOP(params->scale_top)); + + mali_c55_ctx_update_bits(mali_c55, base + MALI_C55_AEXP_HIST_PLANE_MODE_OFFSET, + MALI_C55_AEXP_HIST_PLANE_MODE_MASK, + params->plane_mode); + + if (block.header->type == MALI_C55_PARAM_BLOCK_AEXP_HIST) + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + MALI_C55_AEXP_HIST_SWITCH_MASK, + MALI_C55_AEXP_HIST_SWITCH(params->tap_point)); +} + +static void +mali_c55_params_aexp_hist_weights(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_aexp_weights *params; + u32 base, val, addr; + + params = block.aexp_weights; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) + return; + + base = block.header->type == MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS ? + MALI_C55_REG_AEXP_HIST_BASE : + MALI_C55_REG_AEXP_IHIST_BASE; + + mali_c55_ctx_update_bits(mali_c55, + base + MALI_C55_AEXP_HIST_NODES_USED_OFFSET, + MALI_C55_AEXP_HIST_NODES_USED_HORIZ_MASK, + params->nodes_used_horiz); + mali_c55_ctx_update_bits(mali_c55, + base + MALI_C55_AEXP_HIST_NODES_USED_OFFSET, + MALI_C55_AEXP_HIST_NODES_USED_VERT_MASK, + MALI_C55_AEXP_HIST_NODES_USED_VERT(params->nodes_used_vert)); + + /* + * The zone weights array is a 225-element array of u8 values, but that + * is a bit annoying to handle given the ISP expects 32-bit writes. We + * just reinterpret it as 56-element array of 32-bit values for the + * purposes of this transaction. The last register is handled separately + * to stop static analysers worrying about buffer overflow. The 3 bytes + * of additional space at the end of the write is just padding for the + * array of weights in the ISP memory space anyway, so there's no risk + * of overwriting other registers. + */ + for (unsigned int i = 0; i < 56; i++) { + val = ((u32 *)params->zone_weights)[i] + & MALI_C55_AEXP_HIST_ZONE_WEIGHT_MASK; + addr = base + MALI_C55_AEXP_HIST_ZONE_WEIGHTS_OFFSET + (4 * i); + + mali_c55_ctx_write(mali_c55, addr, val); + } + + val = params->zone_weights[MALI_C55_MAX_ZONES - 1]; + addr = base + MALI_C55_AEXP_HIST_ZONE_WEIGHTS_OFFSET + (4 * 56); +} + +static void mali_c55_params_digital_gain(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_digital_gain *dgain; + u32 gain; + + dgain = block.digital_gain; + + /* + * If the block is flagged as disabled we write a gain of 1.0, which in + * Q5.8 format is 256. + */ + gain = block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE ? + 256 : dgain->gain; + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_DIGITAL_GAIN, + MALI_C55_DIGITAL_GAIN_MASK, + gain); +} + +static void mali_c55_params_awb_gains(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_awb_gains *gains; + u32 gain00, gain01, gain10, gain11; + + gains = block.awb_gains; + + /* + * There are two places AWB gains can be set in the ISP; one affects the + * image output data and the other affects the statistics for the + * AEXP-0 tap point. + */ + u32 addr1 = block.header->type == MALI_C55_PARAM_BLOCK_AWB_GAINS ? + MALI_C55_REG_AWB_GAINS1 : + MALI_C55_REG_AWB_GAINS1_AEXP; + u32 addr2 = block.header->type == MALI_C55_PARAM_BLOCK_AWB_GAINS ? + MALI_C55_REG_AWB_GAINS2 : + MALI_C55_REG_AWB_GAINS2_AEXP; + + /* If the block is flagged disabled, set all of the gains to 1.0 */ + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) { + gain00 = 256; + gain01 = 256; + gain10 = 256; + gain11 = 256; + } else { + gain00 = gains->gain00; + gain01 = gains->gain01; + gain10 = gains->gain10; + gain11 = gains->gain11; + } + + mali_c55_ctx_update_bits(mali_c55, addr1, MALI_C55_AWB_GAIN00_MASK, + gain00); + mali_c55_ctx_update_bits(mali_c55, addr1, MALI_C55_AWB_GAIN01_MASK, + MALI_C55_AWB_GAIN01(gain01)); + mali_c55_ctx_update_bits(mali_c55, addr2, MALI_C55_AWB_GAIN10_MASK, + gain10); + mali_c55_ctx_update_bits(mali_c55, addr2, MALI_C55_AWB_GAIN11_MASK, + MALI_C55_AWB_GAIN11(gain11)); +} + +static void mali_c55_params_awb_config(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_awb_config *params; + + params = block.awb_config; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) { + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + MALI_C55_AWB_DISABLE_MASK, + MALI_C55_AWB_DISABLE_MASK); + return; + } + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + MALI_C55_AWB_DISABLE_MASK, false); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_STATS_MODE, + MALI_C55_AWB_STATS_MODE_MASK, params->stats_mode); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_WHITE_LEVEL, + MALI_C55_AWB_WHITE_LEVEL_MASK, params->white_level); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_BLACK_LEVEL, + MALI_C55_AWB_BLACK_LEVEL_MASK, params->black_level); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CR_MAX, + MALI_C55_AWB_CR_MAX_MASK, params->cr_max); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CR_MIN, + MALI_C55_AWB_CR_MIN_MASK, params->cr_min); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CB_MAX, + MALI_C55_AWB_CB_MAX_MASK, params->cb_max); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CB_MIN, + MALI_C55_AWB_CB_MIN_MASK, params->cb_min); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_NODES_USED, + MALI_C55_AWB_NODES_USED_HORIZ_MASK, + params->nodes_used_horiz); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_NODES_USED, + MALI_C55_AWB_NODES_USED_VERT_MASK, + MALI_C55_AWB_NODES_USED_VERT(params->nodes_used_vert)); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CR_HIGH, + MALI_C55_AWB_CR_HIGH_MASK, params->cr_high); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CR_LOW, + MALI_C55_AWB_CR_LOW_MASK, params->cr_low); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CB_HIGH, + MALI_C55_AWB_CB_HIGH_MASK, params->cb_high); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_AWB_CB_LOW, + MALI_C55_AWB_CB_LOW_MASK, params->cb_low); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_METERING_CONFIG, + MALI_C55_AWB_SWITCH_MASK, + MALI_C55_AWB_SWITCH(params->tap_point)); +} + +static void mali_c55_params_lsc_config(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_mesh_shading_config *params; + unsigned int i; + u32 addr; + + params = block.shading_config; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) { + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_ENABLE_MASK, + false); + return; + } + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_ENABLE_MASK, true); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_MESH_SHOW_MASK, + MALI_C55_MESH_SHADING_MESH_SHOW(params->mesh_show)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_SCALE_MASK, + MALI_C55_MESH_SHADING_SCALE(params->mesh_scale)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_PAGE_R_MASK, + MALI_C55_MESH_SHADING_PAGE_R(params->mesh_page_r)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_PAGE_G_MASK, + MALI_C55_MESH_SHADING_PAGE_G(params->mesh_page_g)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_PAGE_B_MASK, + MALI_C55_MESH_SHADING_PAGE_B(params->mesh_page_b)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_MESH_WIDTH_MASK, + MALI_C55_MESH_SHADING_MESH_WIDTH(params->mesh_width)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_CONFIG, + MALI_C55_MESH_SHADING_MESH_HEIGHT_MASK, + MALI_C55_MESH_SHADING_MESH_HEIGHT(params->mesh_height)); + + for (i = 0; i < MALI_C55_NUM_MESH_SHADING_ELEMENTS; i++) { + addr = MALI_C55_REG_MESH_SHADING_TABLES + (i * 4); + mali_c55_ctx_write(mali_c55, addr, params->mesh[i]); + } +} + +static void mali_c55_params_lsc_selection(struct mali_c55 *mali_c55, + union mali_c55_params_block block) +{ + const struct mali_c55_params_mesh_shading_selection *params; + + params = block.shading_selection; + + if (block.header->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) + return; + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA_BANK, + MALI_C55_MESH_SHADING_ALPHA_BANK_R_MASK, + params->mesh_alpha_bank_r); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA_BANK, + MALI_C55_MESH_SHADING_ALPHA_BANK_G_MASK, + MALI_C55_MESH_SHADING_ALPHA_BANK_G(params->mesh_alpha_bank_g)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA_BANK, + MALI_C55_MESH_SHADING_ALPHA_BANK_B_MASK, + MALI_C55_MESH_SHADING_ALPHA_BANK_B(params->mesh_alpha_bank_b)); + + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA, + MALI_C55_MESH_SHADING_ALPHA_R_MASK, + params->mesh_alpha_r); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA, + MALI_C55_MESH_SHADING_ALPHA_G_MASK, + MALI_C55_MESH_SHADING_ALPHA_G(params->mesh_alpha_g)); + mali_c55_ctx_update_bits(mali_c55, MALI_C55_REG_MESH_SHADING_ALPHA, + MALI_C55_MESH_SHADING_ALPHA_B_MASK, + MALI_C55_MESH_SHADING_ALPHA_B(params->mesh_alpha_b)); + + mali_c55_ctx_update_bits(mali_c55, + MALI_C55_REG_MESH_SHADING_MESH_STRENGTH, + MALI_c55_MESH_STRENGTH_MASK, + params->mesh_strength); +} + +static const mali_c55_params_handler mali_c55_params_handlers[] = { + [MALI_C55_PARAM_BLOCK_SENSOR_OFFS] = &mali_c55_params_sensor_offs, + [MALI_C55_PARAM_BLOCK_AEXP_HIST] = &mali_c55_params_aexp_hist, + [MALI_C55_PARAM_BLOCK_AEXP_IHIST] = &mali_c55_params_aexp_hist, + [MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS] = &mali_c55_params_aexp_hist_weights, + [MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS] = &mali_c55_params_aexp_hist_weights, + [MALI_C55_PARAM_BLOCK_DIGITAL_GAIN] = &mali_c55_params_digital_gain, + [MALI_C55_PARAM_BLOCK_AWB_GAINS] = &mali_c55_params_awb_gains, + [MALI_C55_PARAM_BLOCK_AWB_CONFIG] = &mali_c55_params_awb_config, + [MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP] = &mali_c55_params_awb_gains, + [MALI_C55_PARAM_MESH_SHADING_CONFIG] = &mali_c55_params_lsc_config, + [MALI_C55_PARAM_MESH_SHADING_SELECTION] = &mali_c55_params_lsc_selection, +}; + +static const struct v4l2_isp_params_block_info mali_c55_params_blocks_info[] = { + [MALI_C55_PARAM_BLOCK_SENSOR_OFFS] = { + .size = sizeof(struct mali_c55_params_sensor_off_preshading), + }, + [MALI_C55_PARAM_BLOCK_AEXP_HIST] = { + .size = sizeof(struct mali_c55_params_aexp_hist), + }, + [MALI_C55_PARAM_BLOCK_AEXP_IHIST] = { + .size = sizeof(struct mali_c55_params_aexp_hist), + }, + [MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS] = { + .size = sizeof(struct mali_c55_params_aexp_weights), + }, + [MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS] = { + .size = sizeof(struct mali_c55_params_aexp_weights), + }, + [MALI_C55_PARAM_BLOCK_DIGITAL_GAIN] = { + .size = sizeof(struct mali_c55_params_digital_gain), + }, + [MALI_C55_PARAM_BLOCK_AWB_GAINS] = { + .size = sizeof(struct mali_c55_params_awb_gains), + }, + [MALI_C55_PARAM_BLOCK_AWB_CONFIG] = { + .size = sizeof(struct mali_c55_params_awb_config), + }, + [MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP] = { + .size = sizeof(struct mali_c55_params_awb_gains), + }, + [MALI_C55_PARAM_MESH_SHADING_CONFIG] = { + .size = sizeof(struct mali_c55_params_mesh_shading_config), + }, + [MALI_C55_PARAM_MESH_SHADING_SELECTION] = { + .size = sizeof(struct mali_c55_params_mesh_shading_selection), + }, +}; + +static int mali_c55_params_enum_fmt_meta_out(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + if (f->index) + return -EINVAL; + + if (f->mbus_code && f->mbus_code != MEDIA_BUS_FMT_METADATA_FIXED) + return -EINVAL; + + f->pixelformat = V4L2_META_FMT_MALI_C55_PARAMS; + + return 0; +} + +static int mali_c55_params_g_fmt_meta_out(struct file *file, void *fh, + struct v4l2_format *f) +{ + static const struct v4l2_meta_format mfmt = { + .dataformat = V4L2_META_FMT_MALI_C55_PARAMS, + .buffersize = v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE), + }; + + f->fmt.meta = mfmt; + + return 0; +} + +static int mali_c55_params_querycap(struct file *file, + void *priv, struct v4l2_capability *cap) +{ + strscpy(cap->driver, MALI_C55_DRIVER_NAME, sizeof(cap->driver)); + strscpy(cap->card, "ARM Mali-C55 ISP", sizeof(cap->card)); + + return 0; +} + +static const struct v4l2_ioctl_ops mali_c55_params_v4l2_ioctl_ops = { + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_enum_fmt_meta_out = mali_c55_params_enum_fmt_meta_out, + .vidioc_g_fmt_meta_out = mali_c55_params_g_fmt_meta_out, + .vidioc_s_fmt_meta_out = mali_c55_params_g_fmt_meta_out, + .vidioc_try_fmt_meta_out = mali_c55_params_g_fmt_meta_out, + .vidioc_querycap = mali_c55_params_querycap, + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static const struct v4l2_file_operations mali_c55_params_v4l2_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +static int +mali_c55_params_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, + unsigned int *num_planes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + if (*num_planes && *num_planes > 1) + return -EINVAL; + + if (sizes[0] && sizes[0] < v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE)) + return -EINVAL; + + *num_planes = 1; + + if (!sizes[0]) + sizes[0] = v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE); + + return 0; +} + +static int mali_c55_params_buf_init(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_params_buf *buf = to_mali_c55_params_buf(vbuf); + + buf->config = kvmalloc(v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE), + GFP_KERNEL); + if (!buf->config) + return -ENOMEM; + + return 0; +} + +static void mali_c55_params_buf_cleanup(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_params_buf *buf = to_mali_c55_params_buf(vbuf); + + kvfree(buf->config); + buf->config = NULL; +} + +static int mali_c55_params_buf_prepare(struct vb2_buffer *vb) +{ + struct mali_c55_params *params = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_params_buf *buf = to_mali_c55_params_buf(vbuf); + struct v4l2_isp_params_buffer *config = vb2_plane_vaddr(vb, 0); + struct mali_c55 *mali_c55 = params->mali_c55; + int ret; + + if (config->version != MALI_C55_PARAM_BUFFER_V1) { + dev_dbg(mali_c55->dev, + "Unsupported extensible format version: %u\n", + config->version); + return -EINVAL; + } + + ret = v4l2_isp_params_validate_buffer_size(mali_c55->dev, vb, + v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE)); + if (ret) + return ret; + + /* + * Copy the parameters buffer provided by userspace to the internal + * scratch buffer. This protects against the chance of userspace making + * changed to the buffer content whilst the driver processes it. + */ + + memcpy(buf->config, config, v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE)); + + return v4l2_isp_params_validate_buffer(mali_c55->dev, vb, buf->config, + mali_c55_params_blocks_info, + ARRAY_SIZE(mali_c55_params_blocks_info)); +} + +static void mali_c55_params_buf_queue(struct vb2_buffer *vb) +{ + struct mali_c55_params *params = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct mali_c55_params_buf *buf = to_mali_c55_params_buf(vbuf); + + spin_lock(¶ms->buffers.lock); + list_add_tail(&buf->queue, ¶ms->buffers.queue); + spin_unlock(¶ms->buffers.lock); +} + +static void mali_c55_params_return_buffers(struct mali_c55_params *params, + enum vb2_buffer_state state) +{ + struct mali_c55_params_buf *buf, *tmp; + + guard(spinlock)(¶ms->buffers.lock); + + list_for_each_entry_safe(buf, tmp, ¶ms->buffers.queue, queue) { + list_del(&buf->queue); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } +} + +static int mali_c55_params_start_streaming(struct vb2_queue *q, + unsigned int count) +{ + struct mali_c55_params *params = vb2_get_drv_priv(q); + struct mali_c55 *mali_c55 = params->mali_c55; + int ret; + + ret = pm_runtime_resume_and_get(mali_c55->dev); + if (ret) + goto err_return_buffers; + + ret = video_device_pipeline_alloc_start(¶ms->vdev); + if (ret) + goto err_pm_put; + + if (mali_c55_pipeline_ready(mali_c55)) { + ret = v4l2_subdev_enable_streams(&mali_c55->isp.sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + if (ret < 0) + goto err_stop_pipeline; + } + + return 0; + +err_stop_pipeline: + video_device_pipeline_stop(¶ms->vdev); +err_pm_put: + pm_runtime_put_autosuspend(mali_c55->dev); +err_return_buffers: + mali_c55_params_return_buffers(params, VB2_BUF_STATE_QUEUED); + + return ret; +} + +static void mali_c55_params_stop_streaming(struct vb2_queue *q) +{ + struct mali_c55_params *params = vb2_get_drv_priv(q); + struct mali_c55 *mali_c55 = params->mali_c55; + struct mali_c55_isp *isp = &mali_c55->isp; + + if (mali_c55_pipeline_ready(mali_c55)) { + if (v4l2_subdev_is_streaming(&isp->sd)) + v4l2_subdev_disable_streams(&isp->sd, + MALI_C55_ISP_PAD_SOURCE_VIDEO, + BIT(0)); + } + + video_device_pipeline_stop(¶ms->vdev); + mali_c55_params_return_buffers(params, VB2_BUF_STATE_ERROR); + pm_runtime_put_autosuspend(params->mali_c55->dev); +} + +static const struct vb2_ops mali_c55_params_vb2_ops = { + .queue_setup = mali_c55_params_queue_setup, + .buf_init = mali_c55_params_buf_init, + .buf_cleanup = mali_c55_params_buf_cleanup, + .buf_queue = mali_c55_params_buf_queue, + .buf_prepare = mali_c55_params_buf_prepare, + .start_streaming = mali_c55_params_start_streaming, + .stop_streaming = mali_c55_params_stop_streaming, +}; + +void mali_c55_params_write_config(struct mali_c55 *mali_c55) +{ + struct mali_c55_params *params = &mali_c55->params; + struct v4l2_isp_params_buffer *config; + struct mali_c55_params_buf *buf; + size_t block_offset = 0; + size_t max_offset; + + spin_lock(¶ms->buffers.lock); + + buf = list_first_entry_or_null(¶ms->buffers.queue, + struct mali_c55_params_buf, queue); + if (buf) + list_del(&buf->queue); + spin_unlock(¶ms->buffers.lock); + + if (!buf) + return; + + buf->vb.sequence = mali_c55->isp.frame_sequence; + config = buf->config; + + max_offset = config->data_size; + + /* + * Walk the list of parameter blocks and process them. No validation is + * done here, as the contents of the config buffer are already checked + * when the buffer is queued. + */ + while (max_offset && block_offset < max_offset) { + union mali_c55_params_block block; + mali_c55_params_handler handler; + + block.data = &config->data[block_offset]; + + /* We checked the array index already in .buf_queue() */ + handler = mali_c55_params_handlers[block.header->type]; + handler(mali_c55, block); + + block_offset += block.header->size; + } + + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); +} + +void mali_c55_unregister_params(struct mali_c55 *mali_c55) +{ + struct mali_c55_params *params = &mali_c55->params; + + if (!video_is_registered(¶ms->vdev)) + return; + + vb2_video_unregister_device(¶ms->vdev); + media_entity_cleanup(¶ms->vdev.entity); + mutex_destroy(¶ms->lock); +} + +int mali_c55_register_params(struct mali_c55 *mali_c55) +{ + struct mali_c55_params *params = &mali_c55->params; + struct video_device *vdev = ¶ms->vdev; + struct vb2_queue *vb2q = ¶ms->queue; + int ret; + + mutex_init(¶ms->lock); + INIT_LIST_HEAD(¶ms->buffers.queue); + spin_lock_init(¶ms->buffers.lock); + + params->pad.flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(¶ms->vdev.entity, 1, ¶ms->pad); + if (ret) + goto err_destroy_mutex; + + vb2q->type = V4L2_BUF_TYPE_META_OUTPUT; + vb2q->io_modes = VB2_MMAP | VB2_DMABUF; + vb2q->drv_priv = params; + vb2q->mem_ops = &vb2_dma_contig_memops; + vb2q->ops = &mali_c55_params_vb2_ops; + vb2q->buf_struct_size = sizeof(struct mali_c55_params_buf); + vb2q->min_queued_buffers = 1; + vb2q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + vb2q->lock = ¶ms->lock; + vb2q->dev = mali_c55->dev; + + ret = vb2_queue_init(vb2q); + if (ret) { + dev_err(mali_c55->dev, "params vb2 queue init failed\n"); + goto err_cleanup_entity; + } + + strscpy(params->vdev.name, "mali-c55 3a params", + sizeof(params->vdev.name)); + vdev->release = video_device_release_empty; + vdev->fops = &mali_c55_params_v4l2_fops; + vdev->ioctl_ops = &mali_c55_params_v4l2_ioctl_ops; + vdev->lock = ¶ms->lock; + vdev->v4l2_dev = &mali_c55->v4l2_dev; + vdev->queue = ¶ms->queue; + vdev->device_caps = V4L2_CAP_META_OUTPUT | V4L2_CAP_STREAMING | + V4L2_CAP_IO_MC; + vdev->vfl_dir = VFL_DIR_TX; + video_set_drvdata(vdev, params); + + ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); + if (ret) { + dev_err(mali_c55->dev, + "failed to register params video device\n"); + goto err_release_vb2q; + } + + params->mali_c55 = mali_c55; + + return 0; + +err_release_vb2q: + vb2_queue_release(vb2q); +err_cleanup_entity: + media_entity_cleanup(¶ms->vdev.entity); +err_destroy_mutex: + mutex_destroy(¶ms->lock); + + return ret; +} diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h index 8b04aff1990a..f5a148add1c8 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-registers.h +++ b/drivers/media/platform/arm/mali-c55/mali-c55-registers.h @@ -159,6 +159,23 @@ enum mali_c55_interrupts { #define MALI_C55_BAYER_ORDER_GBRG 2 #define MALI_C55_BAYER_ORDER_BGGR 3 +#define MALI_C55_REG_METERING_CONFIG 0x18ed0 +#define MALI_C55_5BIN_HIST_DISABLE_MASK BIT(0) +#define MALI_C55_5BIN_HIST_SWITCH_MASK GENMASK(2, 1) +#define MALI_C55_5BIN_HIST_SWITCH(x) ((x) << 1) +#define MALI_C55_AF_DISABLE_MASK BIT(4) +#define MALI_C55_AF_SWITCH_MASK BIT(5) +#define MALI_C55_AWB_DISABLE_MASK BIT(8) +#define MALI_C55_AWB_SWITCH_MASK BIT(9) +#define MALI_C55_AWB_SWITCH(x) ((x) << 9) +#define MALI_C55_AEXP_HIST_DISABLE_MASK BIT(12) +#define MALI_C55_AEXP_HIST_DISABLE (0x01 << 12) +#define MALI_C55_AEXP_HIST_SWITCH_MASK GENMASK(14, 13) +#define MALI_C55_AEXP_HIST_SWITCH(x) ((x) << 13) +#define MALI_C55_AEXP_IHIST_DISABLE_MASK BIT(16) +#define MALI_C55_AEXP_IHIST_DISABLE (0x01 << 12) +#define MALI_C55_AEXP_SRC_MASK BIT(24) + #define MALI_C55_REG_TPG_CH0 0x18ed8 #define MALI_C55_TEST_PATTERN_ON_OFF BIT(0) #define MALI_C55_TEST_PATTERN_RGB_MASK BIT(1) @@ -179,6 +196,11 @@ enum mali_c55_interrupts { #define MALI_C55_REG_CONFIG_SPACES_OFFSET 0x0ab6c #define MALI_C55_CONFIG_SPACE_SIZE 0x1231c +#define MALI_C55_REG_DIGITAL_GAIN 0x1926c +#define MALI_C55_DIGITAL_GAIN_MASK GENMASK(12, 0) +#define MALI_C55_REG_DIGITAL_GAIN_OFFSET 0x19270 +#define MALI_C55_DIGITAL_GAIN_OFFSET_MASK GENMASK(19, 0) + #define MALI_C55_REG_SINTER_CONFIG 0x19348 #define MALI_C55_SINTER_VIEW_FILTER_MASK GENMASK(1, 0) #define MALI_C55_SINTER_SCALE_MODE_MASK GENMASK(3, 2) @@ -192,6 +214,59 @@ enum mali_c55_interrupts { #define MALI_C55_TEMPER_DMA_WRITE_ON BIT(0) #define MALI_C55_TEMPER_DMA_READ_ON BIT(1) +/* Black Level Correction Configuration */ +#define MALI_C55_REG_SENSOR_OFF_PRE_SHA_00 0x1abcc +#define MALI_C55_REG_SENSOR_OFF_PRE_SHA_01 0x1abd0 +#define MALI_C55_REG_SENSOR_OFF_PRE_SHA_10 0x1abd4 +#define MALI_C55_REG_SENSOR_OFF_PRE_SHA_11 0x1abd8 +#define MALI_C55_SENSOR_OFF_PRE_SHA_MASK 0xfffff + +/* Lens Mesh Shading Configuration */ +#define MALI_C55_REG_MESH_SHADING_TABLES 0x13074 +#define MALI_C55_REG_MESH_SHADING_CONFIG 0x1abfc +#define MALI_C55_MESH_SHADING_ENABLE_MASK BIT(0) +#define MALI_C55_MESH_SHADING_MESH_SHOW_MASK BIT(1) +#define MALI_C55_MESH_SHADING_MESH_SHOW(x) ((x) << 1) +#define MALI_C55_MESH_SHADING_SCALE_MASK GENMASK(4, 2) +#define MALI_C55_MESH_SHADING_SCALE(x) ((x) << 2) +#define MALI_C55_MESH_SHADING_PAGE_R_MASK GENMASK(9, 8) +#define MALI_C55_MESH_SHADING_PAGE_R(x) ((x) << 8) +#define MALI_C55_MESH_SHADING_PAGE_G_MASK GENMASK(11, 10) +#define MALI_C55_MESH_SHADING_PAGE_G(x) ((x) << 10) +#define MALI_C55_MESH_SHADING_PAGE_B_MASK GENMASK(13, 12) +#define MALI_C55_MESH_SHADING_PAGE_B(x) ((x) << 12) +#define MALI_C55_MESH_SHADING_MESH_WIDTH_MASK GENMASK(21, 16) +#define MALI_C55_MESH_SHADING_MESH_WIDTH(x) ((x) << 16) +#define MALI_C55_MESH_SHADING_MESH_HEIGHT_MASK GENMASK(29, 24) +#define MALI_C55_MESH_SHADING_MESH_HEIGHT(x) ((x) << 24) + +#define MALI_C55_REG_MESH_SHADING_ALPHA_BANK 0x1ac04 +#define MALI_C55_MESH_SHADING_ALPHA_BANK_R_MASK GENMASK(2, 0) +#define MALI_C55_MESH_SHADING_ALPHA_BANK_G_MASK GENMASK(5, 3) +#define MALI_C55_MESH_SHADING_ALPHA_BANK_G(x) ((x) << 3) +#define MALI_C55_MESH_SHADING_ALPHA_BANK_B_MASK GENMASK(8, 6) +#define MALI_C55_MESH_SHADING_ALPHA_BANK_B(x) ((x) << 6) +#define MALI_C55_REG_MESH_SHADING_ALPHA 0x1ac08 +#define MALI_C55_MESH_SHADING_ALPHA_R_MASK GENMASK(7, 0) +#define MALI_C55_MESH_SHADING_ALPHA_G_MASK GENMASK(15, 8) +#define MALI_C55_MESH_SHADING_ALPHA_G(x) ((x) << 8) +#define MALI_C55_MESH_SHADING_ALPHA_B_MASK GENMASK(23, 16) +#define MALI_C55_MESH_SHADING_ALPHA_B(x) ((x) << 16) +#define MALI_C55_REG_MESH_SHADING_MESH_STRENGTH 0x1ac0c +#define MALI_c55_MESH_STRENGTH_MASK GENMASK(15, 0) + +/* AWB Gains Configuration */ +#define MALI_C55_REG_AWB_GAINS1 0x1ac10 +#define MALI_C55_AWB_GAIN00_MASK GENMASK(11, 0) +#define MALI_C55_AWB_GAIN01_MASK GENMASK(27, 16) +#define MALI_C55_AWB_GAIN01(x) ((x) << 16) +#define MALI_C55_REG_AWB_GAINS2 0x1ac14 +#define MALI_C55_AWB_GAIN10_MASK GENMASK(11, 0) +#define MALI_C55_AWB_GAIN11_MASK GENMASK(27, 16) +#define MALI_C55_AWB_GAIN11(x) ((x) << 16) +#define MALI_C55_REG_AWB_GAINS1_AEXP 0x1ac18 +#define MALI_C55_REG_AWB_GAINS2_AEXP 0x1ac1c + /* Colour Correction Matrix Configuration */ #define MALI_C55_REG_CCM_ENABLE 0x1b07c #define MALI_C55_CCM_ENABLE_MASK BIT(0) @@ -214,6 +289,59 @@ enum mali_c55_interrupts { #define MALI_C55_REG_CCM_ANTIFOG_OFFSET_B 0x1b0c8 #define MALI_C55_CCM_ANTIFOG_OFFSET_MASK GENMASK(11, 0) +/* AWB Statistics Configuration */ +#define MALI_C55_REG_AWB_STATS_MODE 0x1b29c +#define MALI_C55_AWB_STATS_MODE_MASK BIT(0) +#define MALI_C55_REG_AWB_WHITE_LEVEL 0x1b2a0 +#define MALI_C55_AWB_WHITE_LEVEL_MASK GENMASK(9, 0) +#define MALI_C55_REG_AWB_BLACK_LEVEL 0x1b2a4 +#define MALI_C55_AWB_BLACK_LEVEL_MASK GENMASK(9, 0) +#define MALI_C55_REG_AWB_CR_MAX 0x1b2a8 +#define MALI_C55_AWB_CR_MAX_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CR_MIN 0x1b2ac +#define MALI_C55_AWB_CR_MIN_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CB_MAX 0x1b2b0 +#define MALI_C55_AWB_CB_MAX_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CB_MIN 0x1b2b4 +#define MALI_C55_AWB_CB_MIN_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_NODES_USED 0x1b2c4 +#define MALI_C55_AWB_NODES_USED_HORIZ_MASK GENMASK(7, 0) +#define MALI_C55_AWB_NODES_USED_VERT_MASK GENMASK(15, 8) +#define MALI_C55_AWB_NODES_USED_VERT(x) ((x) << 8) +#define MALI_C55_REG_AWB_CR_HIGH 0x1b2c8 +#define MALI_C55_AWB_CR_HIGH_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CR_LOW 0x1b2cc +#define MALI_C55_AWB_CR_LOW_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CB_HIGH 0x1b2d0 +#define MALI_C55_AWB_CB_HIGH_MASK GENMASK(11, 0) +#define MALI_C55_REG_AWB_CB_LOW 0x1b2d4 +#define MALI_C55_AWB_CB_LOW_MASK GENMASK(11, 0) + +/* AEXP Metering Histogram Configuration */ +#define MALI_C55_REG_AEXP_HIST_BASE 0x1b730 +#define MALI_C55_REG_AEXP_IHIST_BASE 0x1bbac +#define MALI_C55_AEXP_HIST_SKIP_OFFSET 0 +#define MALI_C55_AEXP_HIST_SKIP_X_MASK GENMASK(2, 0) +#define MALI_C55_AEXP_HIST_SKIP_X(x) ((x) << 0) +#define MALI_C55_AEXP_HIST_OFFSET_X_MASK BIT(3) +#define MALI_C55_AEXP_HIST_OFFSET_X(x) ((x) << 3) +#define MALI_C55_AEXP_HIST_SKIP_Y_MASK GENMASK(6, 4) +#define MALI_C55_AEXP_HIST_SKIP_Y(x) ((x) << 4) +#define MALI_C55_AEXP_HIST_OFFSET_Y_MASK BIT(7) +#define MALI_C55_AEXP_HIST_OFFSET_Y(x) ((x) << 7) +#define MALI_C55_AEXP_HIST_SCALE_OFFSET 4 +#define MALI_C55_AEXP_HIST_SCALE_BOTTOM_MASK GENMASK(3, 0) +#define MALI_C55_AEXP_HIST_SCALE_TOP_MASK GENMASK(7, 4) +#define MALI_C55_AEXP_HIST_SCALE_TOP(x) ((x) << 4) +#define MALI_C55_AEXP_HIST_PLANE_MODE_OFFSET 16 +#define MALI_C55_AEXP_HIST_PLANE_MODE_MASK GENMASK(2, 0) +#define MALI_C55_AEXP_HIST_NODES_USED_OFFSET 52 +#define MALI_C55_AEXP_HIST_NODES_USED_HORIZ_MASK GENMASK(7, 0) +#define MALI_C55_AEXP_HIST_NODES_USED_VERT_MASK GENMASK(15, 8) +#define MALI_C55_AEXP_HIST_NODES_USED_VERT(x) ((x) << 8) +#define MALI_C55_AEXP_HIST_ZONE_WEIGHTS_OFFSET 56 +#define MALI_C55_AEXP_HIST_ZONE_WEIGHT_MASK 0x0f0f0f0f + /* * The Mali-C55 ISP has up to two output pipes; known as full resolution and * down scaled. The register space for these is laid out identically, but offset From 87b214ddfed2350d57633066fd60f3c71c57c185 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:15:59 +0000 Subject: [PATCH 233/249] Documentation: media: mali-c55: Document the mali-c55 parameter setting Document the mali-c55 parameter setting by expanding the relevant pages in both admin-guide/ and userspace-api/. Tested-by: Lad Prabhakar Reviewed-by: Laurent Pinchart Acked-by: Nayden Kanchev Co-developed-by: Jacopo Mondi Signed-off-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil --- Documentation/admin-guide/media/mali-c55.rst | 19 +++++- .../media/v4l/metafmt-arm-mali-c55.rst | 61 ++++++++++++++++++- 2 files changed, 75 insertions(+), 5 deletions(-) diff --git a/Documentation/admin-guide/media/mali-c55.rst b/Documentation/admin-guide/media/mali-c55.rst index 03723e0e8e43..315f982000c4 100644 --- a/Documentation/admin-guide/media/mali-c55.rst +++ b/Documentation/admin-guide/media/mali-c55.rst @@ -387,9 +387,24 @@ the processing flow the statistics can be drawn from:: +-------------+ | +-------------+ +--> AWB-1 -At present all statistics are drawn from the 0th tap point for each algorithm; +By default all statistics are drawn from the 0th tap point for each algorithm; I.E. AEXP statistics from AEXP-0 (A), AWB statistics from AWB-0 and AF -statistics from AF-0. In the future this will be configurable. +statistics from AF-0. This is configurable for AEXP and AWB statsistics through +programming the ISP's parameters. + +.. _mali-c55-3a-params: + +Programming ISP Parameters +========================== + +The ISP can be programmed with various parameters from userspace to apply to the +hardware before and during video stream. This allows userspace to dynamically +change values such as black level, white balance and lens shading gains and so +on. + +The buffer format and how to populate it are described by the +:ref:`V4L2_META_FMT_MALI_C55_PARAMS ` format, +which should be set as the data format for the `mali-c55 3a params` video node. References ========== diff --git a/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst index 0bda9740a6be..696e0a645a7e 100644 --- a/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst +++ b/Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst @@ -1,10 +1,11 @@ .. SPDX-License-Identifier: GPL-2.0 +.. _v4l2-meta-fmt-mali-c55-params: .. _v4l2-meta-fmt-mali-c55-stats: -************************************* -V4L2_META_FMT_MALI_C55_STATS ('C55S') -************************************* +***************************************************************************** +V4L2_META_FMT_MALI_C55_STATS ('C55S'), V4L2_META_FMT_MALI_C55_PARAMS ('C55P') +***************************************************************************** 3A Statistics ============= @@ -23,6 +24,60 @@ of the C structure :c:type:`mali_c55_stats_buffer` defined in For details of the statistics see :c:type:`mali_c55_stats_buffer`. +Configuration Parameters +======================== + +The configuration parameters are passed to the :ref:`mali-c55 3a params +` metadata output video node, using the +:c:type:`v4l2_meta_format` interface. Rather than a single struct containing +sub-structs for each configurable area of the ISP, parameters for the Mali-C55 +use the v4l2-isp parameters system, through which groups of parameters are +defined as distinct structs or "blocks" which may be added to the data member of +:c:type:`v4l2_isp_params_buffer`. Userspace is responsible for populating the +data member with the blocks that need to be configured by the driver. Each +block-specific struct embeds :c:type:`v4l2_isp_params_block_header` as its first +member and userspace must populate the type member with a value from +:c:type:`mali_c55_param_block_type`. + +.. code-block:: c + + struct v4l2_isp_params_buffer *params = + (struct v4l2_isp_params_buffer *)buffer; + + params->version = MALI_C55_PARAM_BUFFER_V1; + params->data_size = 0; + + void *data = (void *)params->data; + + struct mali_c55_params_awb_gains *gains = + (struct mali_c55_params_awb_gains *)data; + + gains->header.type = MALI_C55_PARAM_BLOCK_AWB_GAINS; + gains->header.flags |= V4L2_ISP_PARAMS_FL_BLOCK_ENABLE; + gains->header.size = sizeof(struct mali_c55_params_awb_gains); + + gains->gain00 = 256; + gains->gain00 = 256; + gains->gain00 = 256; + gains->gain00 = 256; + + data += sizeof(struct mali_c55_params_awb_gains); + params->data_size += sizeof(struct mali_c55_params_awb_gains); + + struct mali_c55_params_sensor_off_preshading *blc = + (struct mali_c55_params_sensor_off_preshading *)data; + + blc->header.type = MALI_C55_PARAM_BLOCK_SENSOR_OFFS; + blc->header.flags |= V4L2_ISP_PARAMS_FL_BLOCK_ENABLE; + blc->header.size = sizeof(struct mali_c55_params_sensor_off_preshading); + + blc->chan00 = 51200; + blc->chan01 = 51200; + blc->chan10 = 51200; + blc->chan11 = 51200; + + params->data_size += sizeof(struct mali_c55_params_sensor_off_preshading); + Arm Mali-C55 uAPI data types ============================ From ef5a75b44403f53af920e6731e04c9033330fbb6 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:34:24 +0000 Subject: [PATCH 234/249] dt-bindings: media: Add bindings for the RZ/V2H(P) IVC block The RZ/V2H(P) SoC has a block called the Input Video Control block which feeds image data into the Image Signal Processor. Add dt bindings to describe the IVC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Daniel Scally Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- .../bindings/media/renesas,r9a09g057-ivc.yaml | 103 ++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml diff --git a/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml b/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml new file mode 100644 index 000000000000..c09cbd8c9e35 --- /dev/null +++ b/Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/renesas,r9a09g057-ivc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2H(P) Input Video Control Block + +maintainers: + - Daniel Scally + +description: + The IVC block is a module that takes video frames from memory and feeds them + to the Image Signal Processor for processing. + +properties: + compatible: + const: renesas,r9a09g057-ivc # RZ/V2H(P) + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Input Video Control block register access clock + - description: Video input data AXI bus clock + - description: ISP system clock + + clock-names: + items: + - const: reg + - const: axi + - const: isp + + power-domains: + maxItems: 1 + + resets: + items: + - description: Input Video Control block register access reset + - description: Video input data AXI bus reset + - description: ISP core reset + + reset-names: + items: + - const: reg + - const: axi + - const: isp + + port: + $ref: /schemas/graph.yaml#/properties/port + description: Output parallel video bus + + properties: + endpoint: + $ref: /schemas/graph.yaml#/properties/endpoint + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - power-domains + - resets + - reset-names + - port + +additionalProperties: false + +examples: + - | + #include + #include + + isp-input@16040000 { + compatible = "renesas,r9a09g057-ivc"; + reg = <0x16040000 0x230>; + + clocks = <&cpg CPG_MOD 0xe3>, + <&cpg CPG_MOD 0xe4>, + <&cpg CPG_MOD 0xe5>; + clock-names = "reg", "axi", "isp"; + + power-domains = <&cpg>; + + resets = <&cpg 0xd4>, + <&cpg 0xd1>, + <&cpg 0xd3>; + reset-names = "reg", "axi", "isp"; + + interrupts = ; + + port { + ivc_out: endpoint { + remote-endpoint = <&isp_in>; + }; + }; + }; +... From f0b3984d821b3a603cd8786dca6cc73d47c4521a Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:34:25 +0000 Subject: [PATCH 235/249] media: platform: Add Renesas Input Video Control block driver Add a driver for the Input Video Control block in an RZ/V2H(P) SoC which feeds data into the Arm Mali-C55 ISP. [ivc: Remove check on buffers list in start_streaming] [ivc: put_autosuspend() implies mark_last_busy()] [media: rzv2h-ivc: Do not delay frame completion] Signed-off-by: Jacopo Mondi Reviewed-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Hans Verkuil [hverkuil: remove deprecated vb2_ops_wait_prepare/finish callbacks] [hverkuil: replace "select PM" by "depends on PM"] --- drivers/media/platform/renesas/Kconfig | 1 + drivers/media/platform/renesas/Makefile | 1 + .../media/platform/renesas/rzv2h-ivc/Kconfig | 18 + .../media/platform/renesas/rzv2h-ivc/Makefile | 5 + .../renesas/rzv2h-ivc/rzv2h-ivc-dev.c | 251 +++++++++ .../renesas/rzv2h-ivc/rzv2h-ivc-subdev.c | 376 +++++++++++++ .../renesas/rzv2h-ivc/rzv2h-ivc-video.c | 531 ++++++++++++++++++ .../platform/renesas/rzv2h-ivc/rzv2h-ivc.h | 130 +++++ 8 files changed, 1313 insertions(+) create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/Kconfig create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/Makefile create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-dev.c create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-subdev.c create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c create mode 100644 drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h diff --git a/drivers/media/platform/renesas/Kconfig b/drivers/media/platform/renesas/Kconfig index 27a54fa79083..bd8247c0b8aa 100644 --- a/drivers/media/platform/renesas/Kconfig +++ b/drivers/media/platform/renesas/Kconfig @@ -42,6 +42,7 @@ config VIDEO_SH_VOU source "drivers/media/platform/renesas/rcar-isp/Kconfig" source "drivers/media/platform/renesas/rcar-vin/Kconfig" source "drivers/media/platform/renesas/rzg2l-cru/Kconfig" +source "drivers/media/platform/renesas/rzv2h-ivc/Kconfig" # Mem2mem drivers diff --git a/drivers/media/platform/renesas/Makefile b/drivers/media/platform/renesas/Makefile index 1127259c09d6..b6b4abf01db2 100644 --- a/drivers/media/platform/renesas/Makefile +++ b/drivers/media/platform/renesas/Makefile @@ -6,6 +6,7 @@ obj-y += rcar-isp/ obj-y += rcar-vin/ obj-y += rzg2l-cru/ +obj-y += rzv2h-ivc/ obj-y += vsp1/ obj-$(CONFIG_VIDEO_RCAR_CSI2) += rcar-csi2.o diff --git a/drivers/media/platform/renesas/rzv2h-ivc/Kconfig b/drivers/media/platform/renesas/rzv2h-ivc/Kconfig new file mode 100644 index 000000000000..eb6c6ce1caba --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/Kconfig @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config VIDEO_RZV2H_IVC + tristate "Renesas RZ/V2H(P) Input Video Control block driver" + depends on V4L_PLATFORM_DRIVERS + depends on VIDEO_DEV + depends on ARCH_RENESAS || COMPILE_TEST + depends on OF + depends on PM + select VIDEOBUF2_DMA_CONTIG + select MEDIA_CONTROLLER + select VIDEO_V4L2_SUBDEV_API + help + Support for the Renesas RZ/V2H(P) Input Video Control Block + (IVC). + + To compile this driver as a module, choose M here: the + module will be called rzv2h-ivc. diff --git a/drivers/media/platform/renesas/rzv2h-ivc/Makefile b/drivers/media/platform/renesas/rzv2h-ivc/Makefile new file mode 100644 index 000000000000..080ee3570f09 --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + +rzv2h-ivc-y := rzv2h-ivc-dev.o rzv2h-ivc-subdev.o rzv2h-ivc-video.o + +obj-$(CONFIG_VIDEO_RZV2H_IVC) += rzv2h-ivc.o diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-dev.c b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-dev.c new file mode 100644 index 000000000000..e9857eb5b51a --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-dev.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RZ/V2H(P) Input Video Control Block driver + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include "rzv2h-ivc.h" + +#include +#include +#include +#include +#include +#include + +void rzv2h_ivc_write(struct rzv2h_ivc *ivc, u32 addr, u32 val) +{ + writel(val, ivc->base + addr); +} + +void rzv2h_ivc_update_bits(struct rzv2h_ivc *ivc, unsigned int addr, + u32 mask, u32 val) +{ + u32 orig, new; + + orig = readl(ivc->base + addr); + + new = orig & ~mask; + new |= val & mask; + + if (new != orig) + writel(new, ivc->base + addr); +} + +static int rzv2h_ivc_get_hardware_resources(struct rzv2h_ivc *ivc, + struct platform_device *pdev) +{ + static const char * const resource_names[RZV2H_IVC_NUM_HW_RESOURCES] = { + "reg", + "axi", + "isp", + }; + struct resource *res; + int ret; + + ivc->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); + if (IS_ERR(ivc->base)) + return dev_err_probe(ivc->dev, PTR_ERR(ivc->base), + "failed to map IO memory\n"); + + for (unsigned int i = 0; i < ARRAY_SIZE(resource_names); i++) + ivc->clks[i].id = resource_names[i]; + + ret = devm_clk_bulk_get(ivc->dev, ARRAY_SIZE(resource_names), ivc->clks); + if (ret) + return dev_err_probe(ivc->dev, ret, "failed to acquire clks\n"); + + for (unsigned int i = 0; i < ARRAY_SIZE(resource_names); i++) + ivc->resets[i].id = resource_names[i]; + + ret = devm_reset_control_bulk_get_optional_shared(ivc->dev, + ARRAY_SIZE(resource_names), + ivc->resets); + if (ret) + return dev_err_probe(ivc->dev, ret, "failed to acquire resets\n"); + + return 0; +} + +static void rzv2h_ivc_global_config(struct rzv2h_ivc *ivc) +{ + /* Currently we only support single-exposure input */ + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_PLNUM, RZV2H_IVC_ONE_EXPOSURE); + + /* + * Datasheet says we should disable the interrupts before changing mode + * to avoid spurious IFP interrupt. + */ + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_FM_INT_EN, 0x0); + + /* + * RZ/V2H(P) documentation says software controlled single context mode + * is not supported, and currently the driver does not support the + * multi-context mode. That being so we just set single context sw-hw + * mode. + */ + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_FM_CONTEXT, + RZV2H_IVC_SINGLE_CONTEXT_SW_HW_CFG); + + /* + * We enable the frame end interrupt so that we know when we should send + * follow-up frames. + */ + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_FM_INT_EN, RZV2H_IVC_VVAL_IFPE); +} + +static irqreturn_t rzv2h_ivc_isr(int irq, void *context) +{ + struct device *dev = context; + struct rzv2h_ivc *ivc = dev_get_drvdata(dev); + + guard(spinlock)(&ivc->spinlock); + + /* IRQ should never be triggered before vvalid_ifp has been reset to 2 */ + if (WARN_ON(!ivc->vvalid_ifp)) + return IRQ_HANDLED; + + /* + * The first interrupt indicates that the buffer transfer has been + * completed. + */ + if (--ivc->vvalid_ifp) { + rzv2h_ivc_buffer_done(ivc); + return IRQ_HANDLED; + } + + /* + * The second interrupt indicates that the post-frame transfer VBLANK + * has completed, we can now schedule a new frame transfer, if any. + */ + queue_work(ivc->buffers.async_wq, &ivc->buffers.work); + + return IRQ_HANDLED; +} + +static int rzv2h_ivc_runtime_resume(struct device *dev) +{ + struct rzv2h_ivc *ivc = dev_get_drvdata(dev); + int ret; + + ret = clk_bulk_prepare_enable(ARRAY_SIZE(ivc->clks), ivc->clks); + if (ret) { + dev_err(ivc->dev, "failed to enable clocks\n"); + return ret; + } + + ret = reset_control_bulk_deassert(ARRAY_SIZE(ivc->resets), ivc->resets); + if (ret) { + dev_err(ivc->dev, "failed to deassert resets\n"); + goto err_disable_clks; + } + + rzv2h_ivc_global_config(ivc); + + ret = request_irq(ivc->irqnum, rzv2h_ivc_isr, 0, dev_driver_string(dev), + dev); + if (ret) { + dev_err(dev, "failed to request irq\n"); + goto err_assert_resets; + } + + return 0; + +err_assert_resets: + reset_control_bulk_assert(ARRAY_SIZE(ivc->resets), ivc->resets); +err_disable_clks: + clk_bulk_disable_unprepare(ARRAY_SIZE(ivc->clks), ivc->clks); + + return ret; +} + +static int rzv2h_ivc_runtime_suspend(struct device *dev) +{ + struct rzv2h_ivc *ivc = dev_get_drvdata(dev); + + reset_control_bulk_assert(ARRAY_SIZE(ivc->resets), ivc->resets); + clk_bulk_disable_unprepare(ARRAY_SIZE(ivc->clks), ivc->clks); + free_irq(ivc->irqnum, dev); + + return 0; +} + +static const struct dev_pm_ops rzv2h_ivc_pm_ops = { + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) + RUNTIME_PM_OPS(rzv2h_ivc_runtime_suspend, rzv2h_ivc_runtime_resume, + NULL) +}; + +static int rzv2h_ivc_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct rzv2h_ivc *ivc; + int ret; + + ivc = devm_kzalloc(dev, sizeof(*ivc), GFP_KERNEL); + if (!ivc) + return -ENOMEM; + + ivc->dev = dev; + platform_set_drvdata(pdev, ivc); + + ret = devm_mutex_init(dev, &ivc->lock); + if (ret) + return ret; + + spin_lock_init(&ivc->spinlock); + + ret = rzv2h_ivc_get_hardware_resources(ivc, pdev); + if (ret) + return ret; + + pm_runtime_set_autosuspend_delay(dev, 2000); + pm_runtime_use_autosuspend(dev); + pm_runtime_enable(dev); + + ivc->irqnum = platform_get_irq(pdev, 0); + if (ivc->irqnum < 0) + return ivc->irqnum; + + ret = rzv2h_ivc_initialise_subdevice(ivc); + if (ret) + goto err_disable_pm_runtime; + + return 0; + +err_disable_pm_runtime: + pm_runtime_disable(dev); + + return ret; +} + +static void rzv2h_ivc_remove(struct platform_device *pdev) +{ + struct rzv2h_ivc *ivc = platform_get_drvdata(pdev); + + rzv2h_deinit_video_dev_and_queue(ivc); + rzv2h_ivc_deinit_subdevice(ivc); +} + +static const struct of_device_id rzv2h_ivc_of_match[] = { + { .compatible = "renesas,r9a09g057-ivc", }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, rzv2h_ivc_of_match); + +static struct platform_driver rzv2h_ivc_driver = { + .driver = { + .name = "rzv2h-ivc", + .of_match_table = rzv2h_ivc_of_match, + .pm = &rzv2h_ivc_pm_ops, + }, + .probe = rzv2h_ivc_probe, + .remove = rzv2h_ivc_remove, +}; + +module_platform_driver(rzv2h_ivc_driver); + +MODULE_AUTHOR("Daniel Scally "); +MODULE_DESCRIPTION("Renesas RZ/V2H(P) Input Video Control Block driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-subdev.c b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-subdev.c new file mode 100644 index 000000000000..b1659544eaa0 --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-subdev.c @@ -0,0 +1,376 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RZ/V2H(P) Input Video Control Block driver + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include "rzv2h-ivc.h" + +#include +#include +#include + +#include +#include +#include +#include + +#define RZV2H_IVC_N_INPUTS_PER_OUTPUT 6 + +/* + * We support 8/10/12/14/16/20 bit input in any bayer order, but the output + * format is fixed at 20-bits with the same order as the input. + */ +static const struct { + u32 inputs[RZV2H_IVC_N_INPUTS_PER_OUTPUT]; + u32 output; +} rzv2h_ivc_formats[] = { + { + .inputs = { + MEDIA_BUS_FMT_SBGGR8_1X8, + MEDIA_BUS_FMT_SBGGR10_1X10, + MEDIA_BUS_FMT_SBGGR12_1X12, + MEDIA_BUS_FMT_SBGGR14_1X14, + MEDIA_BUS_FMT_SBGGR16_1X16, + MEDIA_BUS_FMT_SBGGR20_1X20, + }, + .output = MEDIA_BUS_FMT_SBGGR20_1X20 + }, + { + .inputs = { + MEDIA_BUS_FMT_SGBRG8_1X8, + MEDIA_BUS_FMT_SGBRG10_1X10, + MEDIA_BUS_FMT_SGBRG12_1X12, + MEDIA_BUS_FMT_SGBRG14_1X14, + MEDIA_BUS_FMT_SGBRG16_1X16, + MEDIA_BUS_FMT_SGBRG20_1X20, + }, + .output = MEDIA_BUS_FMT_SGBRG20_1X20 + }, + { + .inputs = { + MEDIA_BUS_FMT_SGRBG8_1X8, + MEDIA_BUS_FMT_SGRBG10_1X10, + MEDIA_BUS_FMT_SGRBG12_1X12, + MEDIA_BUS_FMT_SGRBG14_1X14, + MEDIA_BUS_FMT_SGRBG16_1X16, + MEDIA_BUS_FMT_SGRBG20_1X20, + }, + .output = MEDIA_BUS_FMT_SGRBG20_1X20 + }, + { + .inputs = { + MEDIA_BUS_FMT_SRGGB8_1X8, + MEDIA_BUS_FMT_SRGGB10_1X10, + MEDIA_BUS_FMT_SRGGB12_1X12, + MEDIA_BUS_FMT_SRGGB14_1X14, + MEDIA_BUS_FMT_SRGGB16_1X16, + MEDIA_BUS_FMT_SRGGB20_1X20, + }, + .output = MEDIA_BUS_FMT_SRGGB20_1X20 + }, +}; + +static u32 rzv2h_ivc_get_mbus_output_from_input(u32 mbus_code) +{ + unsigned int i, j; + + for (i = 0; i < ARRAY_SIZE(rzv2h_ivc_formats); i++) { + for (j = 0; j < RZV2H_IVC_N_INPUTS_PER_OUTPUT; j++) { + if (rzv2h_ivc_formats[i].inputs[j] == mbus_code) + return rzv2h_ivc_formats[i].output; + } + } + + return 0; +} + +static int rzv2h_ivc_enum_mbus_code(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_mbus_code_enum *code) +{ + const struct v4l2_mbus_framefmt *fmt; + unsigned int order_index; + unsigned int index; + + /* + * On the source pad, only the 20-bit format corresponding to the sink + * pad format's bayer order is supported. + */ + if (code->pad == RZV2H_IVC_SUBDEV_SOURCE_PAD) { + if (code->index) + return -EINVAL; + + fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SINK_PAD); + code->code = rzv2h_ivc_get_mbus_output_from_input(fmt->code); + + return 0; + } + + if (code->index >= ARRAY_SIZE(rzv2h_ivc_formats) * + RZV2H_IVC_N_INPUTS_PER_OUTPUT) + return -EINVAL; + + order_index = code->index / RZV2H_IVC_N_INPUTS_PER_OUTPUT; + index = code->index % RZV2H_IVC_N_INPUTS_PER_OUTPUT; + + code->code = rzv2h_ivc_formats[order_index].inputs[index]; + + return 0; +} + +static int rzv2h_ivc_enum_frame_size(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_frame_size_enum *fse) +{ + const struct v4l2_mbus_framefmt *fmt; + + if (fse->index > 0) + return -EINVAL; + + if (fse->pad == RZV2H_IVC_SUBDEV_SOURCE_PAD) { + fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SINK_PAD); + + if (fse->code != rzv2h_ivc_get_mbus_output_from_input(fmt->code)) + return -EINVAL; + + fse->min_width = fmt->width; + fse->max_width = fmt->width; + fse->min_height = fmt->height; + fse->max_height = fmt->height; + + return 0; + } + + if (!rzv2h_ivc_get_mbus_output_from_input(fse->code)) + return -EINVAL; + + fse->min_width = RZV2H_IVC_MIN_WIDTH; + fse->max_width = RZV2H_IVC_MAX_WIDTH; + fse->min_height = RZV2H_IVC_MIN_HEIGHT; + fse->max_height = RZV2H_IVC_MAX_HEIGHT; + + return 0; +} + +static int rzv2h_ivc_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct v4l2_mbus_framefmt *fmt = &format->format; + struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; + + if (format->pad == RZV2H_IVC_SUBDEV_SOURCE_PAD) + return v4l2_subdev_get_fmt(sd, state, format); + + sink_fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SINK_PAD); + + sink_fmt->code = rzv2h_ivc_get_mbus_output_from_input(fmt->code) ? + fmt->code : rzv2h_ivc_formats[0].inputs[0]; + + sink_fmt->width = clamp(fmt->width, RZV2H_IVC_MIN_WIDTH, + RZV2H_IVC_MAX_WIDTH); + sink_fmt->height = clamp(fmt->height, RZV2H_IVC_MIN_HEIGHT, + RZV2H_IVC_MAX_HEIGHT); + + *fmt = *sink_fmt; + + src_fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SOURCE_PAD); + *src_fmt = *sink_fmt; + src_fmt->code = rzv2h_ivc_get_mbus_output_from_input(sink_fmt->code); + + return 0; +} + +static int rzv2h_ivc_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + /* + * We have a single source pad, which has a single stream. V4L2 core has + * already validated those things. The actual power-on and programming + * of registers will be done through the video device's .vidioc_streamon + * so there's nothing to actually do here... + */ + + return 0; +} + +static int rzv2h_ivc_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, u32 pad, + u64 streams_mask) +{ + return 0; +} + +static const struct v4l2_subdev_pad_ops rzv2h_ivc_pad_ops = { + .enum_mbus_code = rzv2h_ivc_enum_mbus_code, + .enum_frame_size = rzv2h_ivc_enum_frame_size, + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = rzv2h_ivc_set_fmt, + .enable_streams = rzv2h_ivc_enable_streams, + .disable_streams = rzv2h_ivc_disable_streams, +}; + +static const struct v4l2_subdev_core_ops rzv2h_ivc_core_ops = { + .subscribe_event = v4l2_ctrl_subdev_subscribe_event, + .unsubscribe_event = v4l2_event_subdev_unsubscribe, +}; + +static const struct v4l2_subdev_ops rzv2h_ivc_subdev_ops = { + .core = &rzv2h_ivc_core_ops, + .pad = &rzv2h_ivc_pad_ops, +}; + +static int rzv2h_ivc_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; + + sink_fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SINK_PAD); + sink_fmt->width = RZV2H_IVC_DEFAULT_WIDTH; + sink_fmt->height = RZV2H_IVC_DEFAULT_HEIGHT; + sink_fmt->field = V4L2_FIELD_NONE; + sink_fmt->code = MEDIA_BUS_FMT_SRGGB16_1X16; + sink_fmt->colorspace = V4L2_COLORSPACE_RAW; + sink_fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace); + sink_fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace); + sink_fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true, + sink_fmt->colorspace, + sink_fmt->ycbcr_enc); + + src_fmt = v4l2_subdev_state_get_format(state, + RZV2H_IVC_SUBDEV_SOURCE_PAD); + + *src_fmt = *sink_fmt; + src_fmt->code = MEDIA_BUS_FMT_SRGGB20_1X20; + + return 0; +} + +static int rzv2h_ivc_registered(struct v4l2_subdev *sd) +{ + struct rzv2h_ivc *ivc = container_of(sd, struct rzv2h_ivc, subdev.sd); + + return rzv2h_ivc_init_vdev(ivc, sd->v4l2_dev); +} + +static const struct v4l2_subdev_internal_ops rzv2h_ivc_subdev_internal_ops = { + .init_state = rzv2h_ivc_init_state, + .registered = rzv2h_ivc_registered, +}; + +static int rzv2h_ivc_link_validate(struct media_link *link) +{ + struct video_device *vdev = + media_entity_to_video_device(link->source->entity); + struct rzv2h_ivc *ivc = video_get_drvdata(vdev); + struct v4l2_subdev *sd = + media_entity_to_v4l2_subdev(link->sink->entity); + const struct rzv2h_ivc_format *fmt; + const struct v4l2_pix_format_mplane *pix; + struct v4l2_subdev_state *state; + struct v4l2_mbus_framefmt *mf; + unsigned int i; + int ret = 0; + + state = v4l2_subdev_lock_and_get_active_state(sd); + mf = v4l2_subdev_state_get_format(state, link->sink->index); + + pix = &ivc->format.pix; + fmt = ivc->format.fmt; + + if (mf->width != pix->width || mf->height != pix->height) { + dev_dbg(ivc->dev, + "link '%s':%u -> '%s':%u not valid: %ux%u != %ux%u\n", + link->source->entity->name, link->source->index, + link->sink->entity->name, link->sink->index, + mf->width, mf->height, pix->width, pix->height); + ret = -EPIPE; + } + + for (i = 0; i < ARRAY_SIZE(fmt->mbus_codes); i++) + if (mf->code == fmt->mbus_codes[i]) + break; + + if (i == ARRAY_SIZE(fmt->mbus_codes)) { + dev_dbg(ivc->dev, + "link '%s':%u -> '%s':%u not valid: pixel format %p4cc cannot produce mbus_code 0x%04x\n", + link->source->entity->name, link->source->index, + link->sink->entity->name, link->sink->index, + &pix->pixelformat, mf->code); + ret = -EPIPE; + } + + v4l2_subdev_unlock_state(state); + + return ret; +} + +static const struct media_entity_operations rzv2h_ivc_media_ops = { + .link_validate = rzv2h_ivc_link_validate, +}; + +int rzv2h_ivc_initialise_subdevice(struct rzv2h_ivc *ivc) +{ + struct v4l2_subdev *sd; + int ret; + + /* Initialise subdevice */ + sd = &ivc->subdev.sd; + sd->dev = ivc->dev; + v4l2_subdev_init(sd, &rzv2h_ivc_subdev_ops); + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS; + sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER; + sd->internal_ops = &rzv2h_ivc_subdev_internal_ops; + sd->entity.ops = &rzv2h_ivc_media_ops; + + ivc->subdev.pads[RZV2H_IVC_SUBDEV_SINK_PAD].flags = MEDIA_PAD_FL_SINK; + ivc->subdev.pads[RZV2H_IVC_SUBDEV_SOURCE_PAD].flags = MEDIA_PAD_FL_SOURCE; + + snprintf(sd->name, sizeof(sd->name), "rzv2h ivc block"); + + ret = media_entity_pads_init(&sd->entity, RZV2H_IVC_NUM_SUBDEV_PADS, + ivc->subdev.pads); + if (ret) { + dev_err(ivc->dev, "failed to initialise media entity\n"); + return ret; + } + + ret = v4l2_subdev_init_finalize(sd); + if (ret) { + dev_err(ivc->dev, "failed to finalize subdev init\n"); + goto err_cleanup_subdev_entity; + } + + ret = v4l2_async_register_subdev(sd); + if (ret) { + dev_err(ivc->dev, "failed to register subdevice\n"); + goto err_cleanup_subdev; + } + + return 0; + +err_cleanup_subdev: + v4l2_subdev_cleanup(sd); +err_cleanup_subdev_entity: + media_entity_cleanup(&sd->entity); + + return ret; +} + +void rzv2h_ivc_deinit_subdevice(struct rzv2h_ivc *ivc) +{ + struct v4l2_subdev *sd = &ivc->subdev.sd; + + v4l2_subdev_cleanup(sd); + media_entity_remove_links(&sd->entity); + v4l2_async_unregister_subdev(sd); + media_entity_cleanup(&sd->entity); +} diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c new file mode 100644 index 000000000000..799453250b85 --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc-video.c @@ -0,0 +1,531 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas RZ/V2H(P) Input Video Control Block driver + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include "rzv2h-ivc.h" + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define RZV2H_IVC_FIXED_HBLANK 0x20 +#define RZV2H_IVC_MIN_VBLANK(hts) max(0x1b, 15 + (120501 / (hts))) + +struct rzv2h_ivc_buf { + struct vb2_v4l2_buffer vb; + struct list_head queue; + dma_addr_t addr; +}; + +#define to_rzv2h_ivc_buf(vbuf) \ + container_of(vbuf, struct rzv2h_ivc_buf, vb) + +static const struct rzv2h_ivc_format rzv2h_ivc_formats[] = { + { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR8_1X8, + }, + .dtype = MIPI_CSI2_DT_RAW8, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .mbus_codes = { + MEDIA_BUS_FMT_SGBRG8_1X8, + }, + .dtype = MIPI_CSI2_DT_RAW8, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .mbus_codes = { + MEDIA_BUS_FMT_SGRBG8_1X8, + }, + .dtype = MIPI_CSI2_DT_RAW8, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB8, + .mbus_codes = { + MEDIA_BUS_FMT_SRGGB8_1X8, + }, + .dtype = MIPI_CSI2_DT_RAW8, + }, + { + .fourcc = V4L2_PIX_FMT_RAW_CRU10, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR10_1X10, + MEDIA_BUS_FMT_SGBRG10_1X10, + MEDIA_BUS_FMT_SGRBG10_1X10, + MEDIA_BUS_FMT_SRGGB10_1X10 + }, + .dtype = MIPI_CSI2_DT_RAW10, + }, + { + .fourcc = V4L2_PIX_FMT_RAW_CRU12, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR12_1X12, + MEDIA_BUS_FMT_SGBRG12_1X12, + MEDIA_BUS_FMT_SGRBG12_1X12, + MEDIA_BUS_FMT_SRGGB12_1X12 + }, + .dtype = MIPI_CSI2_DT_RAW12, + }, + { + .fourcc = V4L2_PIX_FMT_RAW_CRU14, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR14_1X14, + MEDIA_BUS_FMT_SGBRG14_1X14, + MEDIA_BUS_FMT_SGRBG14_1X14, + MEDIA_BUS_FMT_SRGGB14_1X14 + }, + .dtype = MIPI_CSI2_DT_RAW14, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR16, + .mbus_codes = { + MEDIA_BUS_FMT_SBGGR16_1X16, + }, + .dtype = MIPI_CSI2_DT_RAW16, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG16, + .mbus_codes = { + MEDIA_BUS_FMT_SGBRG16_1X16, + }, + .dtype = MIPI_CSI2_DT_RAW16, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG16, + .mbus_codes = { + MEDIA_BUS_FMT_SGRBG16_1X16, + }, + .dtype = MIPI_CSI2_DT_RAW16, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB16, + .mbus_codes = { + MEDIA_BUS_FMT_SRGGB16_1X16, + }, + .dtype = MIPI_CSI2_DT_RAW16, + }, +}; + +void rzv2h_ivc_buffer_done(struct rzv2h_ivc *ivc) +{ + struct rzv2h_ivc_buf *buf; + + lockdep_assert_in_irq(); + + scoped_guard(spinlock, &ivc->buffers.lock) { + if (!ivc->buffers.curr) + return; + + buf = ivc->buffers.curr; + ivc->buffers.curr = NULL; + } + + buf->vb.sequence = ivc->buffers.sequence++; + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); +} + +static void rzv2h_ivc_transfer_buffer(struct work_struct *work) +{ + struct rzv2h_ivc *ivc = container_of(work, struct rzv2h_ivc, + buffers.work); + struct rzv2h_ivc_buf *buf; + + /* Setup buffers */ + scoped_guard(spinlock_irqsave, &ivc->buffers.lock) { + buf = list_first_entry_or_null(&ivc->buffers.queue, + struct rzv2h_ivc_buf, queue); + } + + if (!buf) + return; + + list_del(&buf->queue); + + ivc->buffers.curr = buf; + buf->addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0); + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_SADDL_P0, buf->addr); + + scoped_guard(spinlock_irqsave, &ivc->spinlock) { + ivc->vvalid_ifp = 2; + } + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_FM_FRCON, 0x1); +} + +static int rzv2h_ivc_queue_setup(struct vb2_queue *q, unsigned int *num_buffers, + unsigned int *num_planes, unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct rzv2h_ivc *ivc = vb2_get_drv_priv(q); + + if (*num_planes && *num_planes > 1) + return -EINVAL; + + if (sizes[0] && sizes[0] < ivc->format.pix.plane_fmt[0].sizeimage) + return -EINVAL; + + *num_planes = 1; + + if (!sizes[0]) + sizes[0] = ivc->format.pix.plane_fmt[0].sizeimage; + + return 0; +} + +static void rzv2h_ivc_buf_queue(struct vb2_buffer *vb) +{ + struct rzv2h_ivc *ivc = vb2_get_drv_priv(vb->vb2_queue); + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct rzv2h_ivc_buf *buf = to_rzv2h_ivc_buf(vbuf); + + scoped_guard(spinlock_irq, &ivc->buffers.lock) { + list_add_tail(&buf->queue, &ivc->buffers.queue); + } + + scoped_guard(spinlock_irq, &ivc->spinlock) { + if (vb2_is_streaming(vb->vb2_queue) && !ivc->vvalid_ifp) + queue_work(ivc->buffers.async_wq, &ivc->buffers.work); + } +} + +static void rzv2h_ivc_format_configure(struct rzv2h_ivc *ivc) +{ + const struct rzv2h_ivc_format *fmt = ivc->format.fmt; + struct v4l2_pix_format_mplane *pix = &ivc->format.pix; + unsigned int vblank; + unsigned int hts; + + /* Currently only CRU packed pixel formats are supported */ + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_PXFMT, + RZV2H_IVC_INPUT_FMT_CRU_PACKED); + + rzv2h_ivc_update_bits(ivc, RZV2H_IVC_REG_AXIRX_PXFMT, + RZV2H_IVC_PXFMT_DTYPE, fmt->dtype); + + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_HSIZE, pix->width); + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_VSIZE, pix->height); + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_STRD, + pix->plane_fmt[0].bytesperline); + + /* + * The ISP has minimum vertical blanking requirements that must be + * adhered to by the IVC. The minimum is a function of the Iridix blocks + * clocking requirements and the width of the image and horizontal + * blanking, but if we assume the worst case then it boils down to the + * below (plus one to the numerator to ensure the answer is rounded up) + */ + + hts = pix->width + RZV2H_IVC_FIXED_HBLANK; + vblank = RZV2H_IVC_MIN_VBLANK(hts); + + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_AXIRX_BLANK, + RZV2H_IVC_VBLANK(vblank)); +} + +static void rzv2h_ivc_return_buffers(struct rzv2h_ivc *ivc, + enum vb2_buffer_state state) +{ + struct rzv2h_ivc_buf *buf, *tmp; + + guard(spinlock_irqsave)(&ivc->buffers.lock); + + if (ivc->buffers.curr) { + vb2_buffer_done(&ivc->buffers.curr->vb.vb2_buf, state); + ivc->buffers.curr = NULL; + } + + list_for_each_entry_safe(buf, tmp, &ivc->buffers.queue, queue) { + list_del(&buf->queue); + vb2_buffer_done(&buf->vb.vb2_buf, state); + } +} + +static int rzv2h_ivc_start_streaming(struct vb2_queue *q, unsigned int count) +{ + struct rzv2h_ivc *ivc = vb2_get_drv_priv(q); + int ret; + + ivc->buffers.sequence = 0; + ivc->vvalid_ifp = 0; + + ret = pm_runtime_resume_and_get(ivc->dev); + if (ret) + goto err_return_buffers; + + ret = video_device_pipeline_alloc_start(&ivc->vdev.dev); + if (ret) { + dev_err(ivc->dev, "failed to start media pipeline\n"); + goto err_pm_runtime_put; + } + + rzv2h_ivc_format_configure(ivc); + + queue_work(ivc->buffers.async_wq, &ivc->buffers.work); + + return 0; + +err_pm_runtime_put: + pm_runtime_put(ivc->dev); +err_return_buffers: + rzv2h_ivc_return_buffers(ivc, VB2_BUF_STATE_QUEUED); + + return ret; +} + +static void rzv2h_ivc_stop_streaming(struct vb2_queue *q) +{ + struct rzv2h_ivc *ivc = vb2_get_drv_priv(q); + u32 val = 0; + + rzv2h_ivc_write(ivc, RZV2H_IVC_REG_FM_STOP, 0x1); + readl_poll_timeout(ivc->base + RZV2H_IVC_REG_FM_STOP, + val, !val, 10 * USEC_PER_MSEC, 250 * USEC_PER_MSEC); + + rzv2h_ivc_return_buffers(ivc, VB2_BUF_STATE_ERROR); + video_device_pipeline_stop(&ivc->vdev.dev); + pm_runtime_put_autosuspend(ivc->dev); +} + +static const struct vb2_ops rzv2h_ivc_vb2_ops = { + .queue_setup = &rzv2h_ivc_queue_setup, + .buf_queue = &rzv2h_ivc_buf_queue, + .start_streaming = &rzv2h_ivc_start_streaming, + .stop_streaming = &rzv2h_ivc_stop_streaming, +}; + +static const struct rzv2h_ivc_format * +rzv2h_ivc_format_from_pixelformat(u32 fourcc) +{ + for (unsigned int i = 0; i < ARRAY_SIZE(rzv2h_ivc_formats); i++) + if (fourcc == rzv2h_ivc_formats[i].fourcc) + return &rzv2h_ivc_formats[i]; + + return &rzv2h_ivc_formats[0]; +} + +static int rzv2h_ivc_enum_fmt_vid_out(struct file *file, void *fh, + struct v4l2_fmtdesc *f) +{ + if (f->index >= ARRAY_SIZE(rzv2h_ivc_formats)) + return -EINVAL; + + f->pixelformat = rzv2h_ivc_formats[f->index].fourcc; + return 0; +} + +static int rzv2h_ivc_g_fmt_vid_out(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct rzv2h_ivc *ivc = video_drvdata(file); + + f->fmt.pix_mp = ivc->format.pix; + + return 0; +} + +static void rzv2h_ivc_try_fmt(struct v4l2_pix_format_mplane *pix, + const struct rzv2h_ivc_format *fmt) +{ + pix->pixelformat = fmt->fourcc; + + pix->width = clamp(pix->width, RZV2H_IVC_MIN_WIDTH, + RZV2H_IVC_MAX_WIDTH); + pix->height = clamp(pix->height, RZV2H_IVC_MIN_HEIGHT, + RZV2H_IVC_MAX_HEIGHT); + + pix->field = V4L2_FIELD_NONE; + pix->colorspace = V4L2_COLORSPACE_RAW; + pix->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(pix->colorspace); + pix->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true, + pix->colorspace, + pix->ycbcr_enc); + + v4l2_fill_pixfmt_mp(pix, pix->pixelformat, pix->width, pix->height); +} + +static void rzv2h_ivc_set_format(struct rzv2h_ivc *ivc, + struct v4l2_pix_format_mplane *pix) +{ + const struct rzv2h_ivc_format *fmt; + + fmt = rzv2h_ivc_format_from_pixelformat(pix->pixelformat); + + rzv2h_ivc_try_fmt(pix, fmt); + ivc->format.pix = *pix; + ivc->format.fmt = fmt; +} + +static int rzv2h_ivc_s_fmt_vid_out(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct rzv2h_ivc *ivc = video_drvdata(file); + struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; + + if (vb2_is_busy(&ivc->vdev.vb2q)) + return -EBUSY; + + rzv2h_ivc_set_format(ivc, pix); + + return 0; +} + +static int rzv2h_ivc_try_fmt_vid_out(struct file *file, void *fh, + struct v4l2_format *f) +{ + const struct rzv2h_ivc_format *fmt; + + fmt = rzv2h_ivc_format_from_pixelformat(f->fmt.pix.pixelformat); + rzv2h_ivc_try_fmt(&f->fmt.pix_mp, fmt); + + return 0; +} + +static int rzv2h_ivc_querycap(struct file *file, void *fh, + struct v4l2_capability *cap) +{ + strscpy(cap->driver, "rzv2h-ivc", sizeof(cap->driver)); + strscpy(cap->card, "Renesas Input Video Control", sizeof(cap->card)); + + return 0; +} + +static const struct v4l2_ioctl_ops rzv2h_ivc_v4l2_ioctl_ops = { + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_enum_fmt_vid_out = rzv2h_ivc_enum_fmt_vid_out, + .vidioc_g_fmt_vid_out_mplane = rzv2h_ivc_g_fmt_vid_out, + .vidioc_s_fmt_vid_out_mplane = rzv2h_ivc_s_fmt_vid_out, + .vidioc_try_fmt_vid_out_mplane = rzv2h_ivc_try_fmt_vid_out, + .vidioc_querycap = rzv2h_ivc_querycap, + .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, + .vidioc_unsubscribe_event = v4l2_event_unsubscribe, +}; + +static const struct v4l2_file_operations rzv2h_ivc_v4l2_fops = { + .owner = THIS_MODULE, + .unlocked_ioctl = video_ioctl2, + .open = v4l2_fh_open, + .release = vb2_fop_release, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +int rzv2h_ivc_init_vdev(struct rzv2h_ivc *ivc, struct v4l2_device *v4l2_dev) +{ + struct v4l2_pix_format_mplane pix = { }; + struct video_device *vdev; + struct vb2_queue *vb2q; + int ret; + + spin_lock_init(&ivc->buffers.lock); + INIT_LIST_HEAD(&ivc->buffers.queue); + INIT_WORK(&ivc->buffers.work, rzv2h_ivc_transfer_buffer); + + ivc->buffers.async_wq = alloc_workqueue("rzv2h-ivc", 0, 0); + if (!ivc->buffers.async_wq) + return -EINVAL; + + /* Initialise vb2 queue */ + vb2q = &ivc->vdev.vb2q; + vb2q->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; + vb2q->io_modes = VB2_MMAP | VB2_DMABUF; + vb2q->drv_priv = ivc; + vb2q->mem_ops = &vb2_dma_contig_memops; + vb2q->ops = &rzv2h_ivc_vb2_ops; + vb2q->buf_struct_size = sizeof(struct rzv2h_ivc_buf); + vb2q->min_queued_buffers = 0; + vb2q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + vb2q->lock = &ivc->lock; + vb2q->dev = ivc->dev; + + ret = vb2_queue_init(vb2q); + if (ret) { + dev_err(ivc->dev, "vb2 queue init failed\n"); + goto err_destroy_workqueue; + } + + /* Initialise Video Device */ + vdev = &ivc->vdev.dev; + strscpy(vdev->name, "rzv2h-ivc", sizeof(vdev->name)); + vdev->release = video_device_release_empty; + vdev->fops = &rzv2h_ivc_v4l2_fops; + vdev->ioctl_ops = &rzv2h_ivc_v4l2_ioctl_ops; + vdev->lock = &ivc->lock; + vdev->v4l2_dev = v4l2_dev; + vdev->queue = vb2q; + vdev->device_caps = V4L2_CAP_VIDEO_OUTPUT_MPLANE | V4L2_CAP_STREAMING; + vdev->vfl_dir = VFL_DIR_TX; + video_set_drvdata(vdev, ivc); + + pix.pixelformat = V4L2_PIX_FMT_SRGGB16; + pix.width = RZV2H_IVC_DEFAULT_WIDTH; + pix.height = RZV2H_IVC_DEFAULT_HEIGHT; + rzv2h_ivc_set_format(ivc, &pix); + + ivc->vdev.pad.flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&ivc->vdev.dev.entity, 1, &ivc->vdev.pad); + if (ret) + goto err_release_vb2q; + + ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); + if (ret) { + dev_err(ivc->dev, "failed to register IVC video device\n"); + goto err_cleanup_vdev_entity; + } + + ret = media_create_pad_link(&vdev->entity, 0, &ivc->subdev.sd.entity, + RZV2H_IVC_SUBDEV_SINK_PAD, + MEDIA_LNK_FL_ENABLED | + MEDIA_LNK_FL_IMMUTABLE); + if (ret) { + dev_err(ivc->dev, "failed to create media link\n"); + goto err_unregister_vdev; + } + + return 0; + +err_unregister_vdev: + video_unregister_device(vdev); +err_cleanup_vdev_entity: + media_entity_cleanup(&vdev->entity); +err_release_vb2q: + vb2_queue_release(vb2q); +err_destroy_workqueue: + destroy_workqueue(ivc->buffers.async_wq); + + return ret; +} + +void rzv2h_deinit_video_dev_and_queue(struct rzv2h_ivc *ivc) +{ + struct video_device *vdev = &ivc->vdev.dev; + struct vb2_queue *vb2q = &ivc->vdev.vb2q; + + vb2_video_unregister_device(vdev); + media_entity_cleanup(&vdev->entity); + vb2_queue_release(vb2q); +} diff --git a/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h new file mode 100644 index 000000000000..3bcaab990b0f --- /dev/null +++ b/drivers/media/platform/renesas/rzv2h-ivc/rzv2h-ivc.h @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Renesas RZ/V2H(P) Input Video Control Block driver + * + * Copyright (C) 2025 Ideas on Board Oy + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define RZV2H_IVC_REG_AXIRX_PLNUM 0x0000 +#define RZV2H_IVC_ONE_EXPOSURE 0x00 +#define RZV2H_IVC_TWO_EXPOSURE 0x01 +#define RZV2H_IVC_REG_AXIRX_PXFMT 0x0004 +#define RZV2H_IVC_INPUT_FMT_MIPI (0 << 16) +#define RZV2H_IVC_INPUT_FMT_CRU_PACKED BIT(16) +#define RZV2H_IVC_PXFMT_DTYPE GENMASK(7, 0) +#define RZV2H_IVC_REG_AXIRX_SADDL_P0 0x0010 +#define RZV2H_IVC_REG_AXIRX_SADDH_P0 0x0014 +#define RZV2H_IVC_REG_AXIRX_SADDL_P1 0x0018 +#define RZV2H_IVC_REG_AXIRX_SADDH_P1 0x001c +#define RZV2H_IVC_REG_AXIRX_HSIZE 0x0020 +#define RZV2H_IVC_REG_AXIRX_VSIZE 0x0024 +#define RZV2H_IVC_REG_AXIRX_BLANK 0x0028 +#define RZV2H_IVC_VBLANK(x) ((x) << 16) +#define RZV2H_IVC_REG_AXIRX_STRD 0x0030 +#define RZV2H_IVC_REG_AXIRX_ISSU 0x0040 +#define RZV2H_IVC_REG_AXIRX_ERACT 0x0048 +#define RZV2H_IVC_REG_FM_CONTEXT 0x0100 +#define RZV2H_IVC_SOFTWARE_CFG 0x00 +#define RZV2H_IVC_SINGLE_CONTEXT_SW_HW_CFG BIT(0) +#define RZV2H_IVC_MULTI_CONTEXT_SW_HW_CFG BIT(1) +#define RZV2H_IVC_REG_FM_MCON 0x0104 +#define RZV2H_IVC_REG_FM_FRCON 0x0108 +#define RZV2H_IVC_REG_FM_STOP 0x010c +#define RZV2H_IVC_REG_FM_INT_EN 0x0120 +#define RZV2H_IVC_VVAL_IFPE BIT(0) +#define RZV2H_IVC_REG_FM_INT_STA 0x0124 +#define RZV2H_IVC_REG_AXIRX_FIFOCAP0 0x0208 +#define RZV2H_IVC_REG_CORE_CAPCON 0x020c +#define RZV2H_IVC_REG_CORE_FIFOCAP0 0x0228 +#define RZV2H_IVC_REG_CORE_FIFOCAP1 0x022c + +#define RZV2H_IVC_MIN_WIDTH 640 +#define RZV2H_IVC_MAX_WIDTH 4096 +#define RZV2H_IVC_MIN_HEIGHT 480 +#define RZV2H_IVC_MAX_HEIGHT 4096 +#define RZV2H_IVC_DEFAULT_WIDTH 1920 +#define RZV2H_IVC_DEFAULT_HEIGHT 1080 + +#define RZV2H_IVC_NUM_HW_RESOURCES 3 + +struct device; + +enum rzv2h_ivc_subdev_pads { + RZV2H_IVC_SUBDEV_SINK_PAD, + RZV2H_IVC_SUBDEV_SOURCE_PAD, + RZV2H_IVC_NUM_SUBDEV_PADS +}; + +struct rzv2h_ivc_format { + u32 fourcc; + /* + * The CRU packed pixel formats are bayer-order agnostic, so each could + * support any one of the 4 possible media bus formats. + */ + u32 mbus_codes[4]; + u8 dtype; +}; + +struct rzv2h_ivc { + struct device *dev; + void __iomem *base; + struct clk_bulk_data clks[RZV2H_IVC_NUM_HW_RESOURCES]; + struct reset_control_bulk_data resets[RZV2H_IVC_NUM_HW_RESOURCES]; + int irqnum; + u8 vvalid_ifp; + + struct { + struct video_device dev; + struct vb2_queue vb2q; + struct media_pad pad; + } vdev; + + struct { + struct v4l2_subdev sd; + struct media_pad pads[RZV2H_IVC_NUM_SUBDEV_PADS]; + } subdev; + + struct { + /* Spinlock to guard buffer queue */ + spinlock_t lock; + struct workqueue_struct *async_wq; + struct work_struct work; + struct list_head queue; + struct rzv2h_ivc_buf *curr; + unsigned int sequence; + } buffers; + + struct { + struct v4l2_pix_format_mplane pix; + const struct rzv2h_ivc_format *fmt; + } format; + + /* Mutex to provide to vb2 */ + struct mutex lock; + /* Lock to protect the interrupt counter */ + spinlock_t spinlock; +}; + +int rzv2h_ivc_init_vdev(struct rzv2h_ivc *ivc, struct v4l2_device *v4l2_dev); +void rzv2h_deinit_video_dev_and_queue(struct rzv2h_ivc *ivc); +void rzv2h_ivc_buffer_done(struct rzv2h_ivc *ivc); +int rzv2h_ivc_initialise_subdevice(struct rzv2h_ivc *ivc); +void rzv2h_ivc_deinit_subdevice(struct rzv2h_ivc *ivc); +void rzv2h_ivc_write(struct rzv2h_ivc *ivc, u32 addr, u32 val); +void rzv2h_ivc_update_bits(struct rzv2h_ivc *ivc, unsigned int addr, + u32 mask, u32 val); From 48ecdf254df0de34473b031c9c5de7a57c76c379 Mon Sep 17 00:00:00 2001 From: Daniel Scally Date: Tue, 11 Nov 2025 16:34:26 +0000 Subject: [PATCH 236/249] MAINTAINERS: Add entry for rzv2h-ivc driver Add an entry to the MAINTAINERS file for the rzv2h-ivc driver Reviewed-by: Jacopo Mondi Signed-off-by: Daniel Scally Signed-off-by: Jacopo Mondi Signed-off-by: Hans Verkuil --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 99b8c9eb73d4..e284b697cad5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21950,6 +21950,13 @@ S: Maintained F: Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml F: drivers/net/ethernet/stmicro/stmmac/dwmac-renesas-gbeth.c +RENESAS RZ/V2H(P) INPUT VIDEO CONTROL BLOCK DRIVER +M: Daniel Scally +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/media/renesas,r9a09g057-ivc.yaml +F: drivers/media/platform/renesas/rzv2h-ivc/ + RENESAS RZ/V2H(P) RSPI DRIVER M: Fabrizio Castro L: linux-spi@vger.kernel.org From d619dd9a3d401063cc6d31cada98c99db449d381 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Fri, 14 Nov 2025 12:02:11 +0100 Subject: [PATCH 237/249] media: v4l2-isp: Rename block_info to block_type_info The v4l2_isp_params_block_info structure contains validation information that apply to a block -type- and not only to a specific ISP block implementation. Clarify this by renaming v4l2_isp_params_block_info in v4l2_isp_params_block_type_info and update the documentation and the users of v4l2-isp accordingly. Signed-off-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../platform/amlogic/c3/isp/c3-isp-params.c | 9 ++++--- .../platform/arm/mali-c55/mali-c55-params.c | 7 ++--- .../platform/rockchip/rkisp1/rkisp1-params.c | 9 ++++--- drivers/media/v4l2-core/v4l2-isp.c | 16 ++++++------ include/media/v4l2-isp.h | 26 +++++++++---------- 5 files changed, 35 insertions(+), 32 deletions(-) diff --git a/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c b/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c index c2339d6dc107..6f9ca7a7dd88 100644 --- a/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c +++ b/drivers/media/platform/amlogic/c3/isp/c3-isp-params.c @@ -536,7 +536,8 @@ static const c3_isp_block_handler c3_isp_params_handlers[] = { .size = sizeof(struct c3_isp_params_ ## data), \ } -static const struct v4l2_isp_params_block_info c3_isp_params_blocks_info[] = { +static const struct v4l2_isp_params_block_type_info +c3_isp_params_block_types_info[] = { C3_ISP_PARAMS_BLOCK_INFO(AWB_GAINS, awb_gains), C3_ISP_PARAMS_BLOCK_INFO(AWB_CONFIG, awb_config), C3_ISP_PARAMS_BLOCK_INFO(AE_CONFIG, ae_config), @@ -548,7 +549,7 @@ static const struct v4l2_isp_params_block_info c3_isp_params_blocks_info[] = { }; static_assert(ARRAY_SIZE(c3_isp_params_handlers) == - ARRAY_SIZE(c3_isp_params_blocks_info)); + ARRAY_SIZE(c3_isp_params_block_types_info)); static void c3_isp_params_cfg_blocks(struct c3_isp_params *params) { @@ -781,8 +782,8 @@ static int c3_isp_params_vb2_buf_prepare(struct vb2_buffer *vb) return v4l2_isp_params_validate_buffer(params->isp->dev, vb, (struct v4l2_isp_params_buffer *)cfg, - c3_isp_params_blocks_info, - ARRAY_SIZE(c3_isp_params_blocks_info)); + c3_isp_params_block_types_info, + ARRAY_SIZE(c3_isp_params_block_types_info)); } static int c3_isp_params_vb2_buf_init(struct vb2_buffer *vb) diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-params.c b/drivers/media/platform/arm/mali-c55/mali-c55-params.c index ce220a50d253..c643cd013e46 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-params.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-params.c @@ -428,7 +428,8 @@ static const mali_c55_params_handler mali_c55_params_handlers[] = { [MALI_C55_PARAM_MESH_SHADING_SELECTION] = &mali_c55_params_lsc_selection, }; -static const struct v4l2_isp_params_block_info mali_c55_params_blocks_info[] = { +static const struct v4l2_isp_params_block_type_info +mali_c55_params_block_types_info[] = { [MALI_C55_PARAM_BLOCK_SENSOR_OFFS] = { .size = sizeof(struct mali_c55_params_sensor_off_preshading), }, @@ -599,8 +600,8 @@ static int mali_c55_params_buf_prepare(struct vb2_buffer *vb) memcpy(buf->config, config, v4l2_isp_params_buffer_size(MALI_C55_PARAMS_MAX_SIZE)); return v4l2_isp_params_validate_buffer(mali_c55->dev, vb, buf->config, - mali_c55_params_blocks_info, - ARRAY_SIZE(mali_c55_params_blocks_info)); + mali_c55_params_block_types_info, + ARRAY_SIZE(mali_c55_params_block_types_info)); } static void mali_c55_params_buf_queue(struct vb2_buffer *vb) diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c index 2dde0c62c8e6..c9f88635224c 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-params.c @@ -2198,7 +2198,8 @@ static const struct rkisp1_ext_params_handler { .size = sizeof(struct rkisp1_ext_params_ ## data ## _config), \ } -static const struct v4l2_isp_params_block_info rkisp1_ext_params_blocks_info[] = { +static const struct v4l2_isp_params_block_type_info +rkisp1_ext_params_block_types_info[] = { RKISP1_PARAMS_BLOCK_INFO(BLS, bls), RKISP1_PARAMS_BLOCK_INFO(DPCC, dpcc), RKISP1_PARAMS_BLOCK_INFO(SDG, sdg), @@ -2223,7 +2224,7 @@ static const struct v4l2_isp_params_block_info rkisp1_ext_params_blocks_info[] = }; static_assert(ARRAY_SIZE(rkisp1_ext_params_handlers) == - ARRAY_SIZE(rkisp1_ext_params_blocks_info)); + ARRAY_SIZE(rkisp1_ext_params_block_types_info)); static void rkisp1_ext_params_config(struct rkisp1_params *params, struct rkisp1_ext_params_cfg *cfg, @@ -2677,8 +2678,8 @@ static int rkisp1_params_prepare_ext_params(struct rkisp1_params *params, return v4l2_isp_params_validate_buffer(params->rkisp1->dev, vb, (struct v4l2_isp_params_buffer *)cfg, - rkisp1_ext_params_blocks_info, - ARRAY_SIZE(rkisp1_ext_params_blocks_info)); + rkisp1_ext_params_block_types_info, + ARRAY_SIZE(rkisp1_ext_params_block_types_info)); } static int rkisp1_params_vb2_buf_prepare(struct vb2_buffer *vb) diff --git a/drivers/media/v4l2-core/v4l2-isp.c b/drivers/media/v4l2-core/v4l2-isp.c index 756d2b4996cc..29831f7032e9 100644 --- a/drivers/media/v4l2-core/v4l2-isp.c +++ b/drivers/media/v4l2-core/v4l2-isp.c @@ -38,8 +38,8 @@ EXPORT_SYMBOL_GPL(v4l2_isp_params_validate_buffer_size); int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, const struct v4l2_isp_params_buffer *buffer, - const struct v4l2_isp_params_block_info *info, - size_t num_blocks) + const struct v4l2_isp_params_block_type_info *type_info, + size_t num_block_types) { size_t header_size = offsetof(struct v4l2_isp_params_buffer, data); size_t payload_size = vb2_get_plane_payload(vb, 0); @@ -71,13 +71,13 @@ int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, /* Walk the list of ISP configuration blocks and validate them. */ buffer_size = buffer->data_size; while (buffer_size >= sizeof(struct v4l2_isp_params_block_header)) { - const struct v4l2_isp_params_block_info *block_info; + const struct v4l2_isp_params_block_type_info *info; const struct v4l2_isp_params_block_header *block; block = (const struct v4l2_isp_params_block_header *) (buffer->data + block_offset); - if (block->type >= num_blocks) { + if (block->type >= num_block_types) { dev_dbg(dev, "Invalid block type %u at offset %zu\n", block->type, block_offset); @@ -100,17 +100,17 @@ int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, } /* - * Match the block reported size against the info provided + * Match the block reported size against the type info provided * one, but allow the block to only contain the header in * case it is going to be disabled. */ - block_info = &info[block->type]; - if (block->size != block_info->size && + info = &type_info[block->type]; + if (block->size != info->size && (!(block->flags & V4L2_ISP_PARAMS_FL_BLOCK_DISABLE) || block->size != sizeof(*block))) { dev_dbg(dev, "Invalid block size %u (expected %zu) at offset %zu\n", - block->size, block_info->size, block_offset); + block->size, info->size, block_offset); return -EINVAL; } diff --git a/include/media/v4l2-isp.h b/include/media/v4l2-isp.h index 8b4695663699..f3a6d0edcb24 100644 --- a/include/media/v4l2-isp.h +++ b/include/media/v4l2-isp.h @@ -49,18 +49,18 @@ int v4l2_isp_params_validate_buffer_size(struct device *dev, size_t max_size); /** - * struct v4l2_isp_params_block_info - V4L2 ISP per-block info - * @size: the block expected size + * struct v4l2_isp_params_block_type_info - V4L2 ISP per-block-type info + * @size: the block type expected size * - * The v4l2_isp_params_block_info collects information of the ISP configuration - * blocks for validation purposes. It currently only contains the expected - * block size. + * The v4l2_isp_params_block_type_info collects information of the ISP + * configuration block types for validation purposes. It currently only contains + * the expected block type size. * - * Drivers shall prepare a list of block info, indexed by block type, one for - * each supported ISP block and correctly populate them with the expected block - * size. + * Drivers shall prepare a list of block type info, indexed by block type, one + * for each supported ISP block type and correctly populate them with the + * expected block type size. */ -struct v4l2_isp_params_block_info { +struct v4l2_isp_params_block_type_info { size_t size; }; @@ -69,8 +69,8 @@ struct v4l2_isp_params_block_info { * @dev: the driver's device pointer * @vb: the videobuf2 buffer * @buffer: the V4L2 ISP parameters buffer - * @info: the list of per-block validation info - * @num_blocks: the number of blocks + * @type_info: the array of per-block-type validation info + * @num_block_types: the number of block types in the type_info array * * This function completes the validation of a V4L2 ISP parameters buffer, * verifying each configuration block correctness before the driver can use @@ -85,7 +85,7 @@ struct v4l2_isp_params_block_info { */ int v4l2_isp_params_validate_buffer(struct device *dev, struct vb2_buffer *vb, const struct v4l2_isp_params_buffer *buffer, - const struct v4l2_isp_params_block_info *info, - size_t num_blocks); + const struct v4l2_isp_params_block_type_info *type_info, + size_t num_block_types); #endif /* _V4L2_ISP_H_ */ From 1435db44ec1c81ede88470ed3486a2f5a8765704 Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Fri, 14 Nov 2025 12:02:12 +0100 Subject: [PATCH 238/249] media: mali-c55: Assert ISP blocks size correctness For each supported ISP block type the v4l2-isp framework expects one handler and one block type info. Static assert that the array of handlers is of the same size of the array of block types info. Signed-off-by: Jacopo Mondi Reviewed-by: Laurent Pinchart Reviewed-by: Sakari Ailus Signed-off-by: Hans Verkuil --- drivers/media/platform/arm/mali-c55/mali-c55-params.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-params.c b/drivers/media/platform/arm/mali-c55/mali-c55-params.c index c643cd013e46..082cda4f4f63 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-params.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-params.c @@ -465,6 +465,9 @@ mali_c55_params_block_types_info[] = { }, }; +static_assert(ARRAY_SIZE(mali_c55_params_handlers) == + ARRAY_SIZE(mali_c55_params_block_types_info)); + static int mali_c55_params_enum_fmt_meta_out(struct file *file, void *fh, struct v4l2_fmtdesc *f) { From 2f1e88814ce1388c932e2c1c91e1e176c740154f Mon Sep 17 00:00:00 2001 From: Jacopo Mondi Date: Fri, 14 Nov 2025 21:19:20 +0100 Subject: [PATCH 239/249] media: mali-c55: Mark pm handlers as __maybe_unused As the Mali-C55 driver is instrumented to work without depending on CONFIG_PM, mark the two pm_runtime handlers as __maybe_unused to suppress the compiler warning when compiling without CONFIG_PM. Signed-off-by: Jacopo Mondi Reviewed-by: Daniel Scally Signed-off-by: Hans Verkuil --- drivers/media/platform/arm/mali-c55/mali-c55-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/arm/mali-c55/mali-c55-core.c b/drivers/media/platform/arm/mali-c55/mali-c55-core.c index b23d543cf496..43b834459ccf 100644 --- a/drivers/media/platform/arm/mali-c55/mali-c55-core.c +++ b/drivers/media/platform/arm/mali-c55/mali-c55-core.c @@ -707,7 +707,7 @@ static void __mali_c55_power_off(struct mali_c55 *mali_c55) clk_bulk_disable_unprepare(ARRAY_SIZE(mali_c55->clks), mali_c55->clks); } -static int mali_c55_runtime_suspend(struct device *dev) +static int __maybe_unused mali_c55_runtime_suspend(struct device *dev) { struct mali_c55 *mali_c55 = dev_get_drvdata(dev); @@ -770,7 +770,7 @@ static int __mali_c55_power_on(struct mali_c55 *mali_c55) return 0; } -static int mali_c55_runtime_resume(struct device *dev) +static int __maybe_unused mali_c55_runtime_resume(struct device *dev) { struct mali_c55 *mali_c55 = dev_get_drvdata(dev); int ret; From 1c5e4cf1d5d2e1089d8a26aded36e749b97527f0 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:12 +0100 Subject: [PATCH 240/249] Documentation: admin-guide: media: add rockchip camera interface Add a document that describes the different variants of the Rockchip Camera Interface (CIF), their hardware layout, as well as their representation in the media controller centric rkcif device driver, which is located under drivers/media/platform/rockchip/rkcif. Reviewed-by: Heiko Stuebner Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../admin-guide/media/rkcif-rk3568-vicap.dot | 8 ++ Documentation/admin-guide/media/rkcif.rst | 79 +++++++++++++++++++ .../admin-guide/media/v4l-drivers.rst | 1 + MAINTAINERS | 7 ++ 4 files changed, 95 insertions(+) create mode 100644 Documentation/admin-guide/media/rkcif-rk3568-vicap.dot create mode 100644 Documentation/admin-guide/media/rkcif.rst diff --git a/Documentation/admin-guide/media/rkcif-rk3568-vicap.dot b/Documentation/admin-guide/media/rkcif-rk3568-vicap.dot new file mode 100644 index 000000000000..3fac59335459 --- /dev/null +++ b/Documentation/admin-guide/media/rkcif-rk3568-vicap.dot @@ -0,0 +1,8 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0} | rkcif-dvp0\n/dev/v4l-subdev0 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port1 -> n00000004 + n00000004 [label="rkcif-dvp0-id0\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n00000025 [label="{{} | it6801 2-0048\n/dev/v4l-subdev1 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n00000025:port0 -> n00000001:port0 +} diff --git a/Documentation/admin-guide/media/rkcif.rst b/Documentation/admin-guide/media/rkcif.rst new file mode 100644 index 000000000000..2558c121abc4 --- /dev/null +++ b/Documentation/admin-guide/media/rkcif.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0 + +========================================= +Rockchip Camera Interface (CIF) +========================================= + +Introduction +============ + +The Rockchip Camera Interface (CIF) is featured in many Rockchip SoCs in +different variants. +The different variants are combinations of common building blocks, such as + +* INTERFACE blocks of different types, namely + + * the Digital Video Port (DVP, a parallel data interface) + * the interface block for the MIPI CSI-2 receiver + +* CROP units + +* MIPI CSI-2 receiver (not available on all variants): This unit is referred + to as MIPI CSI HOST in the Rockchip documentation. + Technically, it is a separate hardware block, but it is strongly coupled to + the CIF and therefore included here. + +* MUX units (not available on all variants) that pass the video data to an + image signal processor (ISP) + +* SCALE units (not available on all variants) + +* DMA engines that transfer video data into system memory using a + double-buffering mechanism called ping-pong mode + +* Support for four streams per INTERFACE block (not available on all + variants), e.g., for MIPI CSI-2 Virtual Channels (VCs) + +This document describes the different variants of the CIF, their hardware +layout, as well as their representation in the media controller centric rkcif +device driver, which is located under drivers/media/platform/rockchip/rkcif. + +Variants +======== + +Rockchip PX30 Video Input Processor (VIP) +----------------------------------------- + +The PX30 Video Input Processor (VIP) features a digital video port that accepts +parallel video data or BT.656. +Since these protocols do not feature multiple streams, the VIP has one DMA +engine that transfers the input video data into system memory. + +The rkcif driver represents this hardware variant by exposing one V4L2 subdevice +(the DVP INTERFACE/CROP block) and one V4L2 device (the DVP DMA engine). + +Rockchip RK3568 Video Capture (VICAP) +------------------------------------- + +The RK3568 Video Capture (VICAP) unit features a digital video port and a MIPI +CSI-2 receiver that can receive video data independently. +The DVP accepts parallel video data, BT.656 and BT.1120. +Since the BT.1120 protocol may feature more than one stream, the RK3568 VICAP +DVP features four DMA engines that can capture different streams. +Similarly, the RK3568 VICAP MIPI CSI-2 receiver features four DMA engines to +handle different Virtual Channels (VCs). + +The rkcif driver represents this hardware variant by exposing up the following +V4L2 subdevices: + +* rkcif-dvp0: INTERFACE/CROP block for the DVP + +and the following video devices: + +* rkcif-dvp0-id0: The support for multiple streams on the DVP is not yet + implemented, as it is hard to find test hardware. Thus, this video device + represents the first DMA engine of the RK3568 DVP. + +.. kernel-figure:: rkcif-rk3568-vicap.dot + :alt: Topology of the RK3568 Video Capture (VICAP) unit + :align: center diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst index ebd9b15efa90..393f83e8dc4d 100644 --- a/Documentation/admin-guide/media/v4l-drivers.rst +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -26,6 +26,7 @@ Video4Linux (V4L) driver-specific documentation qcom_camss raspberrypi-pisp-be rcar-fdp1 + rkcif rkisp1 raspberrypi-rp1-cfe saa7134 diff --git a/MAINTAINERS b/MAINTAINERS index e284b697cad5..bc56b85584ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22263,6 +22263,13 @@ S: Maintained F: Documentation/devicetree/bindings/net/can/rockchip,rk3568v2-canfd.yaml F: drivers/net/can/rockchip/ +ROCKCHIP CAMERA INTERFACE (RKCIF) DRIVER +M: Mehdi Djait +M: Michael Riesch +L: linux-media@vger.kernel.org +S: Maintained +F: Documentation/admin-guide/media/rkcif* + ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe L: linux-crypto@vger.kernel.org From 4a09126a33638945a1640e064ed73e983b51ae07 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:13 +0100 Subject: [PATCH 241/249] media: dt-bindings: video-interfaces: add defines for sampling modes Add defines for the pixel clock sampling modes (rising edge, falling edge, dual edge) for parallel video interfaces. This avoids hardcoded constants in device tree sources. Acked-by: Rob Herring Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- include/dt-bindings/media/video-interfaces.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/media/video-interfaces.h b/include/dt-bindings/media/video-interfaces.h index 88b9d05d8075..0b19c9b2e627 100644 --- a/include/dt-bindings/media/video-interfaces.h +++ b/include/dt-bindings/media/video-interfaces.h @@ -20,4 +20,8 @@ #define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_CAB 4 #define MEDIA_BUS_CSI2_CPHY_LINE_ORDER_CBA 5 +#define MEDIA_PCLK_SAMPLE_FALLING_EDGE 0 +#define MEDIA_PCLK_SAMPLE_RISING_EDGE 1 +#define MEDIA_PCLK_SAMPLE_DUAL_EDGE 2 + #endif /* __DT_BINDINGS_MEDIA_VIDEO_INTERFACES_H__ */ From a36a0b28b94e86432239c4893e6fc2c39ce31a53 Mon Sep 17 00:00:00 2001 From: Mehdi Djait Date: Fri, 14 Nov 2025 16:20:14 +0100 Subject: [PATCH 242/249] media: dt-bindings: add rockchip px30 vip Add documentation for the Rockchip PX30 Video Input Processor (VIP). Signed-off-by: Mehdi Djait [revised description] Reviewed-by: Rob Herring (Arm) Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/rockchip,px30-vip.yaml | 124 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 125 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml new file mode 100644 index 000000000000..cc08ce94bef7 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,px30-vip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip PX30 Video Input Processor (VIP) + +maintainers: + - Mehdi Djait + - Michael Riesch + +description: + The Rockchip PX30 Video Input Processor (VIP) receives the data from a camera + sensor or CCIR656 encoder and transfers it into system main memory by AXI bus. + +properties: + compatible: + const: rockchip,px30-vip + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ACLK + - description: HCLK + - description: PCLK + + clock-names: + items: + - const: aclk + - const: hclk + - const: pclk + + resets: + items: + - description: AXI + - description: AHB + - description: PCLK IN + + reset-names: + items: + - const: axi + - const: ahb + - const: pclkin + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: input port on the parallel interface + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: + - 5 # MEDIA_BUS_TYPE_PARALLEL + - 6 # MEDIA_BUS_TYPE_BT656 + + required: + - bus-type + + required: + - port@0 + +required: + - compatible + - reg + - interrupts + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + video-capture@ff490000 { + compatible = "rockchip,px30-vip"; + reg = <0x0 0xff490000 0x0 0x200>; + interrupts = ; + clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>, <&cru PCLK_CIF>; + clock-names = "aclk", "hclk", "pclk"; + power-domains = <&power PX30_PD_VI>; + resets = <&cru SRST_CIF_A>, <&cru SRST_CIF_H>, <&cru SRST_CIF_PCLKIN>; + reset-names = "axi", "ahb", "pclkin"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + cif_in: endpoint { + remote-endpoint = <&tw9900_out>; + bus-type = ; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index bc56b85584ad..9ca72126a3c4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22269,6 +22269,7 @@ M: Michael Riesch L: linux-media@vger.kernel.org S: Maintained F: Documentation/admin-guide/media/rkcif* +F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe From 60836eeca0fb27ad6a41bc2c303be80a0371447f Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:15 +0100 Subject: [PATCH 243/249] media: dt-bindings: add rockchip rk3568 vicap Add documentation for the Rockchip RK3568 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch Reviewed-by: Krzysztof Kozlowski Reviewed-by: Bryan O'Donoghue Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../bindings/media/rockchip,rk3568-vicap.yaml | 172 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 173 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml new file mode 100644 index 000000000000..18cd0a5a5318 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml @@ -0,0 +1,172 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,rk3568-vicap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3568 Video Capture (VICAP) + +maintainers: + - Michael Riesch + +description: + The Rockchip RK3568 Video Capture (VICAP) block features a digital video + port (DVP, a parallel video interface) and a MIPI CSI-2 port. It receives + the data from camera sensors, video decoders, or other companion ICs and + transfers it into system main memory by AXI bus. + +properties: + compatible: + const: rockchip,rk3568-vicap + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: ACLK + - description: HCLK + - description: DCLK + - description: ICLK + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk + + iommus: + maxItems: 1 + + resets: + items: + - description: ARST + - description: HRST + - description: DRST + - description: PRST + - description: IRST + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: prst + - const: irst + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: Phandle to general register file used for video input block control. + + power-domains: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: The digital video port (DVP, a parallel video interface). + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: + - 5 # MEDIA_BUS_TYPE_PARALLEL + - 6 # MEDIA_BUS_TYPE_BT656 + + rockchip,dvp-clk-delay: + $ref: /schemas/types.yaml#/definitions/uint32 + default: 0 + minimum: 0 + maximum: 127 + description: + Delay the DVP path clock input to align the sampling phase, + only valid in dual edge sampling mode. Delay is zero by + default and can be adjusted optionally. + + required: + - bus-type + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + vicap: video-capture@fdfe0000 { + compatible = "rockchip,rk3568-vicap"; + reg = <0x0 0xfdfe0000 0x0 0x200>; + interrupts = ; + assigned-clocks = <&cru DCLK_VICAP>; + assigned-clock-rates = <300000000>; + clocks = <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_VICAP_G>; + clock-names = "aclk", "hclk", "dclk", "iclk"; + iommus = <&vicap_mmu>; + power-domains = <&power RK3568_PD_VI>; + resets = <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_P_VICAP>, + <&cru SRST_I_VICAP>; + reset-names = "arst", "hrst", "drst", "prst", "irst"; + rockchip,grf = <&grf>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + vicap_dvp: port@0 { + reg = <0>; + + vicap_dvp_input: endpoint { + bus-type = ; + bus-width = <16>; + pclk-sample = ; + remote-endpoint = <&it6801_output>; + }; + }; + + vicap_mipi: port@1 { + reg = <1>; + + vicap_mipi_input: endpoint { + remote-endpoint = <&csi_output>; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9ca72126a3c4..caf182a5d5f5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22270,6 +22270,7 @@ L: linux-media@vger.kernel.org S: Maintained F: Documentation/admin-guide/media/rkcif* F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml +F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe From f53fb31a388901cfe11b95a3a2cf1594355321e4 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:16 +0100 Subject: [PATCH 244/249] media: rockchip: add driver for the rockchip camera interface Add the skeleton for a media controller centric V4L2 driver for the Rockchip Camera Interface (CIF). The skeleton features support for the PX30 Video Input Processor (VIP) and the RK3568 Video Capture (VICAP) unit. Tested-by: Gerald Loacker Reviewed-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- MAINTAINERS | 1 + drivers/media/platform/rockchip/Kconfig | 1 + drivers/media/platform/rockchip/Makefile | 1 + drivers/media/platform/rockchip/rkcif/Kconfig | 18 ++ .../media/platform/rockchip/rkcif/Makefile | 4 + .../platform/rockchip/rkcif/rkcif-common.h | 55 ++++ .../media/platform/rockchip/rkcif/rkcif-dev.c | 262 ++++++++++++++++++ 7 files changed, 342 insertions(+) create mode 100644 drivers/media/platform/rockchip/rkcif/Kconfig create mode 100644 drivers/media/platform/rockchip/rkcif/Makefile create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-common.h create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-dev.c diff --git a/MAINTAINERS b/MAINTAINERS index caf182a5d5f5..4205ca007e07 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22271,6 +22271,7 @@ S: Maintained F: Documentation/admin-guide/media/rkcif* F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +F: drivers/media/platform/rockchip/rkcif/ ROCKCHIP CRYPTO DRIVERS M: Corentin Labbe diff --git a/drivers/media/platform/rockchip/Kconfig b/drivers/media/platform/rockchip/Kconfig index 9bbeec4996aa..ba401d32f01b 100644 --- a/drivers/media/platform/rockchip/Kconfig +++ b/drivers/media/platform/rockchip/Kconfig @@ -3,5 +3,6 @@ comment "Rockchip media platform drivers" source "drivers/media/platform/rockchip/rga/Kconfig" +source "drivers/media/platform/rockchip/rkcif/Kconfig" source "drivers/media/platform/rockchip/rkisp1/Kconfig" source "drivers/media/platform/rockchip/rkvdec/Kconfig" diff --git a/drivers/media/platform/rockchip/Makefile b/drivers/media/platform/rockchip/Makefile index 286dc5c53f7e..0e0b2cbbd4bd 100644 --- a/drivers/media/platform/rockchip/Makefile +++ b/drivers/media/platform/rockchip/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += rga/ +obj-y += rkcif/ obj-y += rkisp1/ obj-y += rkvdec/ diff --git a/drivers/media/platform/rockchip/rkcif/Kconfig b/drivers/media/platform/rockchip/rkcif/Kconfig new file mode 100644 index 000000000000..efd82ac35bd8 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/Kconfig @@ -0,0 +1,18 @@ +config VIDEO_ROCKCHIP_CIF + tristate "Rockchip Camera Interface (CIF)" + depends on VIDEO_DEV + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on V4L_PLATFORM_DRIVERS + depends on PM && COMMON_CLK + select MEDIA_CONTROLLER + select VIDEOBUF2_DMA_CONTIG + select V4L2_FWNODE + select VIDEO_V4L2_SUBDEV_API + help + This is a driver for Rockchip Camera Interface (CIF). It is featured + in many Rockchips SoCs in different variations, such as the PX30 + Video Input Processor (VIP, one Digital Video Port (DVP)) or the + RK3568 Video Capture (VICAP, one DVP, one MIPI CSI-2 receiver) unit. + + To compile this driver as a module, choose M here: the module + will be called rockchip-cif. diff --git a/drivers/media/platform/rockchip/rkcif/Makefile b/drivers/media/platform/rockchip/rkcif/Makefile new file mode 100644 index 000000000000..c6837ed2f65c --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += rockchip-cif.o + +rockchip-cif-objs += rkcif-dev.o diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h new file mode 100644 index 000000000000..b456a56b5ac4 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2023 Mehdi Djait + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#ifndef _RKCIF_COMMON_H +#define _RKCIF_COMMON_H + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#define RKCIF_DRIVER_NAME "rockchip-cif" +#define RKCIF_CLK_MAX 4 + +struct rkcif_remote { + struct v4l2_async_connection async_conn; + struct v4l2_subdev *sd; +}; + +struct rkcif_match_data { + const char *const *clks; + unsigned int clks_num; +}; + +struct rkcif_device { + struct device *dev; + + const struct rkcif_match_data *match_data; + struct clk_bulk_data clks[RKCIF_CLK_MAX]; + unsigned int clks_num; + struct regmap *grf; + struct reset_control *reset; + void __iomem *base_addr; + + struct media_device media_dev; + struct v4l2_device v4l2_dev; + struct v4l2_async_notifier notifier; +}; + +#endif diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c new file mode 100644 index 000000000000..9215dbe90353 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2020 Maxime Chevallier + * Copyright (C) 2023 Mehdi Djait + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "rkcif-common.h" + +static const char *const px30_vip_clks[] = { + "aclk", + "hclk", + "pclk", +}; + +static const struct rkcif_match_data px30_vip_match_data = { + .clks = px30_vip_clks, + .clks_num = ARRAY_SIZE(px30_vip_clks), +}; + +static const char *const rk3568_vicap_clks[] = { + "aclk", + "hclk", + "dclk", + "iclk", +}; + +static const struct rkcif_match_data rk3568_vicap_match_data = { + .clks = rk3568_vicap_clks, + .clks_num = ARRAY_SIZE(rk3568_vicap_clks), +}; + +static const struct of_device_id rkcif_plat_of_match[] = { + { + .compatible = "rockchip,px30-vip", + .data = &px30_vip_match_data, + }, + { + .compatible = "rockchip,rk3568-vicap", + .data = &rk3568_vicap_match_data, + }, + {} +}; +MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); + +static int rkcif_register(struct rkcif_device *rkcif) +{ + return 0; +} + +static void rkcif_unregister(struct rkcif_device *rkcif) +{ +} + +static int rkcif_notifier_bound(struct v4l2_async_notifier *notifier, + struct v4l2_subdev *sd, + struct v4l2_async_connection *asd) +{ + struct rkcif_remote *remote = + container_of(asd, struct rkcif_remote, async_conn); + + remote->sd = sd; + + return 0; +} + +static int rkcif_notifier_complete(struct v4l2_async_notifier *notifier) +{ + struct rkcif_device *rkcif = + container_of(notifier, struct rkcif_device, notifier); + + return v4l2_device_register_subdev_nodes(&rkcif->v4l2_dev); +} + +static const struct v4l2_async_notifier_operations rkcif_notifier_ops = { + .bound = rkcif_notifier_bound, + .complete = rkcif_notifier_complete, +}; + +static irqreturn_t rkcif_isr(int irq, void *ctx) +{ + irqreturn_t ret = IRQ_NONE; + + return ret; +} + +static int rkcif_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct rkcif_device *rkcif; + int ret, irq; + + rkcif = devm_kzalloc(dev, sizeof(*rkcif), GFP_KERNEL); + if (!rkcif) + return -ENOMEM; + + rkcif->match_data = of_device_get_match_data(dev); + if (!rkcif->match_data) + return -ENODEV; + + dev_set_drvdata(dev, rkcif); + rkcif->dev = dev; + + rkcif->base_addr = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(rkcif->base_addr)) + return PTR_ERR(rkcif->base_addr); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + ret = devm_request_irq(dev, irq, rkcif_isr, IRQF_SHARED, + dev_driver_string(dev), dev); + if (ret) + return dev_err_probe(dev, ret, "failed to request irq\n"); + + if (rkcif->match_data->clks_num > RKCIF_CLK_MAX) + return dev_err_probe(dev, -EINVAL, "invalid number of clocks\n"); + + rkcif->clks_num = rkcif->match_data->clks_num; + for (unsigned int i = 0; i < rkcif->clks_num; i++) + rkcif->clks[i].id = rkcif->match_data->clks[i]; + ret = devm_clk_bulk_get(dev, rkcif->clks_num, rkcif->clks); + if (ret) + return dev_err_probe(dev, ret, "failed to get clocks\n"); + + rkcif->reset = devm_reset_control_array_get_exclusive(dev); + if (IS_ERR(rkcif->reset)) + return PTR_ERR(rkcif->reset); + + rkcif->grf = syscon_regmap_lookup_by_phandle(dev->of_node, + "rockchip,grf"); + if (IS_ERR(rkcif->grf)) + rkcif->grf = NULL; + + pm_runtime_enable(&pdev->dev); + + rkcif->media_dev.dev = dev; + strscpy(rkcif->media_dev.model, RKCIF_DRIVER_NAME, + sizeof(rkcif->media_dev.model)); + media_device_init(&rkcif->media_dev); + + rkcif->v4l2_dev.mdev = &rkcif->media_dev; + ret = v4l2_device_register(dev, &rkcif->v4l2_dev); + if (ret) + goto err_media_dev_cleanup; + + ret = media_device_register(&rkcif->media_dev); + if (ret < 0) { + dev_err(dev, "failed to register media device: %d\n", ret); + goto err_v4l2_dev_unregister; + } + + v4l2_async_nf_init(&rkcif->notifier, &rkcif->v4l2_dev); + rkcif->notifier.ops = &rkcif_notifier_ops; + + ret = rkcif_register(rkcif); + if (ret) { + dev_err(dev, "failed to register media entities: %d\n", ret); + goto err_notifier_cleanup; + } + + ret = v4l2_async_nf_register(&rkcif->notifier); + if (ret) + goto err_rkcif_unregister; + + return 0; + +err_rkcif_unregister: + rkcif_unregister(rkcif); +err_notifier_cleanup: + v4l2_async_nf_cleanup(&rkcif->notifier); + media_device_unregister(&rkcif->media_dev); +err_v4l2_dev_unregister: + v4l2_device_unregister(&rkcif->v4l2_dev); +err_media_dev_cleanup: + media_device_cleanup(&rkcif->media_dev); + pm_runtime_disable(&pdev->dev); + return ret; +} + +static void rkcif_remove(struct platform_device *pdev) +{ + struct rkcif_device *rkcif = platform_get_drvdata(pdev); + + v4l2_async_nf_unregister(&rkcif->notifier); + rkcif_unregister(rkcif); + v4l2_async_nf_cleanup(&rkcif->notifier); + media_device_unregister(&rkcif->media_dev); + v4l2_device_unregister(&rkcif->v4l2_dev); + media_device_cleanup(&rkcif->media_dev); + pm_runtime_disable(&pdev->dev); +} + +static int rkcif_runtime_suspend(struct device *dev) +{ + struct rkcif_device *rkcif = dev_get_drvdata(dev); + + /* + * Reset CIF (CRU, DMA, FIFOs) to allow a clean resume. + * Since this resets the IOMMU too, we cannot issue this reset when + * resuming. + */ + reset_control_assert(rkcif->reset); + udelay(5); + reset_control_deassert(rkcif->reset); + + clk_bulk_disable_unprepare(rkcif->clks_num, rkcif->clks); + + return 0; +} + +static int rkcif_runtime_resume(struct device *dev) +{ + struct rkcif_device *rkcif = dev_get_drvdata(dev); + int ret; + + ret = clk_bulk_prepare_enable(rkcif->clks_num, rkcif->clks); + if (ret) { + dev_err(dev, "failed to enable clocks\n"); + return ret; + } + + return 0; +} + +static const struct dev_pm_ops rkcif_plat_pm_ops = { + .runtime_suspend = rkcif_runtime_suspend, + .runtime_resume = rkcif_runtime_resume, +}; + +static struct platform_driver rkcif_plat_drv = { + .driver = { + .name = RKCIF_DRIVER_NAME, + .of_match_table = rkcif_plat_of_match, + .pm = &rkcif_plat_pm_ops, + }, + .probe = rkcif_probe, + .remove = rkcif_remove, +}; +module_platform_driver(rkcif_plat_drv); + +MODULE_DESCRIPTION("Rockchip Camera Interface (CIF) platform driver"); +MODULE_LICENSE("GPL"); From 85411d17bee99b0a99e983f37188f9cdacfded54 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:17 +0100 Subject: [PATCH 245/249] media: rockchip: rkcif: add abstraction for interface and crop blocks Add an abstraction for the INTERFACE and CROP parts of the different Rockchip Camera Interface (CIF) variants. These parts are represented as V4L2 subdevice with one sink pad and one source pad. The sink pad is connected to a subdevice: either the subdevice provided by the driver of the companion chip connected to the DVP, or the subdevice provided by the MIPI CSI-2 receiver. The source pad is connected to V4l2 device(s) provided by one or many instance(s) of the DMA abstraction. Tested-by: Gerald Loacker Reviewed-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkcif/Makefile | 1 + .../platform/rockchip/rkcif/rkcif-common.h | 71 +++ .../media/platform/rockchip/rkcif/rkcif-dev.c | 13 + .../platform/rockchip/rkcif/rkcif-interface.c | 405 ++++++++++++++++++ .../platform/rockchip/rkcif/rkcif-interface.h | 31 ++ 5 files changed, 521 insertions(+) create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-interface.c create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-interface.h diff --git a/drivers/media/platform/rockchip/rkcif/Makefile b/drivers/media/platform/rockchip/rkcif/Makefile index c6837ed2f65c..9d535fc27e51 100644 --- a/drivers/media/platform/rockchip/rkcif/Makefile +++ b/drivers/media/platform/rockchip/rkcif/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += rockchip-cif.o rockchip-cif-objs += rkcif-dev.o +rockchip-cif-objs += rkcif-interface.o diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h index b456a56b5ac4..f01536727a5d 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -27,9 +27,78 @@ #define RKCIF_DRIVER_NAME "rockchip-cif" #define RKCIF_CLK_MAX 4 +enum rkcif_format_type { + RKCIF_FMT_TYPE_INVALID, + RKCIF_FMT_TYPE_YUV, + RKCIF_FMT_TYPE_RAW, +}; + +enum rkcif_interface_index { + RKCIF_DVP, + RKCIF_MIPI_BASE, + RKCIF_MIPI1 = RKCIF_MIPI_BASE, + RKCIF_MIPI2, + RKCIF_MIPI3, + RKCIF_MIPI4, + RKCIF_MIPI5, + RKCIF_MIPI6, + RKCIF_MIPI_MAX, + RKCIF_IF_MAX = RKCIF_MIPI_MAX +}; + +enum rkcif_interface_pad_index { + RKCIF_IF_PAD_SINK, + RKCIF_IF_PAD_SRC, + RKCIF_IF_PAD_MAX +}; + +enum rkcif_interface_status { + RKCIF_IF_INACTIVE, + RKCIF_IF_ACTIVE, +}; + +enum rkcif_interface_type { + RKCIF_IF_INVALID, + RKCIF_IF_DVP, + RKCIF_IF_MIPI, +}; + +struct rkcif_input_fmt { + u32 mbus_code; + + enum rkcif_format_type fmt_type; + enum v4l2_field field; +}; + +struct rkcif_interface; + struct rkcif_remote { struct v4l2_async_connection async_conn; struct v4l2_subdev *sd; + + struct rkcif_interface *interface; +}; + +struct rkcif_dvp { + u32 dvp_clk_delay; +}; + +struct rkcif_interface { + enum rkcif_interface_type type; + enum rkcif_interface_status status; + enum rkcif_interface_index index; + struct rkcif_device *rkcif; + struct rkcif_remote *remote; + const struct rkcif_input_fmt *in_fmts; + unsigned int in_fmts_num; + + struct media_pad pads[RKCIF_IF_PAD_MAX]; + struct v4l2_fwnode_endpoint vep; + struct v4l2_subdev sd; + + union { + struct rkcif_dvp dvp; + }; }; struct rkcif_match_data { @@ -47,6 +116,8 @@ struct rkcif_device { struct reset_control *reset; void __iomem *base_addr; + struct rkcif_interface interfaces[RKCIF_IF_MAX]; + struct media_device media_dev; struct v4l2_device v4l2_dev; struct v4l2_async_notifier notifier; diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c index 9215dbe90353..49e53f70715c 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -74,8 +74,21 @@ static int rkcif_notifier_bound(struct v4l2_async_notifier *notifier, struct v4l2_subdev *sd, struct v4l2_async_connection *asd) { + struct rkcif_device *rkcif = + container_of(notifier, struct rkcif_device, notifier); struct rkcif_remote *remote = container_of(asd, struct rkcif_remote, async_conn); + struct media_pad *sink_pad = + &remote->interface->pads[RKCIF_IF_PAD_SINK]; + int ret; + + ret = v4l2_create_fwnode_links_to_pad(sd, sink_pad, + MEDIA_LNK_FL_ENABLED); + if (ret) { + dev_err(rkcif->dev, "failed to link source pad of %s\n", + sd->name); + return ret; + } remote->sd = sd; diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-interface.c b/drivers/media/platform/rockchip/rkcif/rkcif-interface.c new file mode 100644 index 000000000000..0fe9410e23ed --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-interface.c @@ -0,0 +1,405 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#include +#include +#include +#include + +#include "rkcif-common.h" +#include "rkcif-interface.h" + +static inline struct rkcif_interface *to_rkcif_interface(struct v4l2_subdev *sd) +{ + return container_of(sd, struct rkcif_interface, sd); +} + +static const struct media_entity_operations rkcif_interface_media_ops = { + .link_validate = v4l2_subdev_link_validate, + .has_pad_interdep = v4l2_subdev_has_pad_interdep, +}; + +static int rkcif_interface_set_fmt(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_format *format) +{ + struct rkcif_interface *interface = to_rkcif_interface(sd); + const struct rkcif_input_fmt *input; + struct v4l2_mbus_framefmt *sink, *src; + struct v4l2_rect *crop; + u32 other_pad, other_stream; + int ret; + + /* the format on the source pad always matches the sink pad */ + if (format->pad == RKCIF_IF_PAD_SRC) + return v4l2_subdev_get_fmt(sd, state, format); + + input = rkcif_interface_find_input_fmt(interface, true, + format->format.code); + format->format.code = input->mbus_code; + + sink = v4l2_subdev_state_get_format(state, format->pad, format->stream); + if (!sink) + return -EINVAL; + + *sink = format->format; + + /* propagate the format to the source pad */ + src = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, + format->stream); + if (!src) + return -EINVAL; + + *src = *sink; + + ret = v4l2_subdev_routing_find_opposite_end(&state->routing, + format->pad, format->stream, + &other_pad, &other_stream); + if (ret) + return -EINVAL; + + crop = v4l2_subdev_state_get_crop(state, other_pad, other_stream); + if (!crop) + return -EINVAL; + + /* reset crop */ + crop->left = 0; + crop->top = 0; + crop->width = sink->width; + crop->height = sink->height; + + return 0; +} + +static int rkcif_interface_get_sel(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + struct v4l2_mbus_framefmt *sink; + struct v4l2_rect *crop; + int ret = 0; + + if (sel->pad != RKCIF_IF_PAD_SRC) + return -EINVAL; + + sink = v4l2_subdev_state_get_opposite_stream_format(state, sel->pad, + sel->stream); + if (!sink) + return -EINVAL; + + crop = v4l2_subdev_state_get_crop(state, sel->pad, sel->stream); + if (!crop) + return -EINVAL; + + switch (sel->target) { + case V4L2_SEL_TGT_CROP_DEFAULT: + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.left = 0; + sel->r.top = 0; + sel->r.width = sink->width; + sel->r.height = sink->height; + break; + case V4L2_SEL_TGT_CROP: + sel->r = *crop; + break; + default: + ret = -EINVAL; + } + + return ret; +} + +static int rkcif_interface_set_sel(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + struct v4l2_subdev_selection *sel) +{ + struct v4l2_mbus_framefmt *sink, *src; + struct v4l2_rect *crop; + + if (sel->pad != RKCIF_IF_PAD_SRC || sel->target != V4L2_SEL_TGT_CROP) + return -EINVAL; + + sink = v4l2_subdev_state_get_opposite_stream_format(state, sel->pad, + sel->stream); + if (!sink) + return -EINVAL; + + src = v4l2_subdev_state_get_format(state, sel->pad, sel->stream); + if (!src) + return -EINVAL; + + crop = v4l2_subdev_state_get_crop(state, sel->pad, sel->stream); + if (!crop) + return -EINVAL; + + *crop = sel->r; + + src->height = sel->r.height; + src->width = sel->r.width; + + return 0; +} + +static int rkcif_interface_set_routing(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + enum v4l2_subdev_format_whence which, + struct v4l2_subdev_krouting *routing) +{ + int ret; + + ret = v4l2_subdev_routing_validate(sd, routing, + V4L2_SUBDEV_ROUTING_ONLY_1_TO_1); + if (ret) + return ret; + + ret = v4l2_subdev_set_routing(sd, state, routing); + + return ret; +} + +static int rkcif_interface_enable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct v4l2_subdev *remote_sd; + struct media_pad *remote_pad; + u64 mask; + + remote_pad = + media_pad_remote_pad_first(&sd->entity.pads[RKCIF_IF_PAD_SINK]); + remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + + mask = v4l2_subdev_state_xlate_streams(state, RKCIF_IF_PAD_SINK, + RKCIF_IF_PAD_SRC, &streams_mask); + + return v4l2_subdev_enable_streams(remote_sd, remote_pad->index, mask); +} + +static int rkcif_interface_disable_streams(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state, + u32 pad, u64 streams_mask) +{ + struct v4l2_subdev *remote_sd; + struct media_pad *remote_pad; + u64 mask; + + remote_pad = + media_pad_remote_pad_first(&sd->entity.pads[RKCIF_IF_PAD_SINK]); + remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + + mask = v4l2_subdev_state_xlate_streams(state, RKCIF_IF_PAD_SINK, + RKCIF_IF_PAD_SRC, &streams_mask); + + return v4l2_subdev_disable_streams(remote_sd, remote_pad->index, mask); +} + +static const struct v4l2_subdev_pad_ops rkcif_interface_pad_ops = { + .get_fmt = v4l2_subdev_get_fmt, + .set_fmt = rkcif_interface_set_fmt, + .get_selection = rkcif_interface_get_sel, + .set_selection = rkcif_interface_set_sel, + .set_routing = rkcif_interface_set_routing, + .enable_streams = rkcif_interface_enable_streams, + .disable_streams = rkcif_interface_disable_streams, +}; + +static const struct v4l2_subdev_ops rkcif_interface_ops = { + .pad = &rkcif_interface_pad_ops, +}; + +static int rkcif_interface_init_state(struct v4l2_subdev *sd, + struct v4l2_subdev_state *state) +{ + struct rkcif_interface *interface = to_rkcif_interface(sd); + struct v4l2_subdev_route routes[] = { + { + .sink_pad = RKCIF_IF_PAD_SINK, + .sink_stream = 0, + .source_pad = RKCIF_IF_PAD_SRC, + .source_stream = 0, + .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, + }, + }; + struct v4l2_subdev_krouting routing = { + .len_routes = ARRAY_SIZE(routes), + .num_routes = ARRAY_SIZE(routes), + .routes = routes, + }; + const struct v4l2_mbus_framefmt dvp_default_format = { + .width = 3840, + .height = 2160, + .code = MEDIA_BUS_FMT_YUYV8_1X16, + .field = V4L2_FIELD_NONE, + .colorspace = V4L2_COLORSPACE_REC709, + .ycbcr_enc = V4L2_YCBCR_ENC_709, + .quantization = V4L2_QUANTIZATION_LIM_RANGE, + .xfer_func = V4L2_XFER_FUNC_NONE, + }; + const struct v4l2_mbus_framefmt mipi_default_format = { + .width = 3840, + .height = 2160, + .code = MEDIA_BUS_FMT_SRGGB10_1X10, + .field = V4L2_FIELD_NONE, + .colorspace = V4L2_COLORSPACE_RAW, + .ycbcr_enc = V4L2_YCBCR_ENC_601, + .quantization = V4L2_QUANTIZATION_FULL_RANGE, + .xfer_func = V4L2_XFER_FUNC_NONE, + }; + const struct v4l2_mbus_framefmt *default_format; + int ret; + + default_format = (interface->type == RKCIF_IF_DVP) ? + &dvp_default_format : + &mipi_default_format; + + ret = v4l2_subdev_set_routing_with_fmt(sd, state, &routing, + default_format); + + return ret; +} + +static const struct v4l2_subdev_internal_ops rkcif_interface_internal_ops = { + .init_state = rkcif_interface_init_state, +}; + +static int rkcif_interface_add(struct rkcif_interface *interface) +{ + struct rkcif_device *rkcif = interface->rkcif; + struct rkcif_remote *remote; + struct v4l2_async_notifier *ntf = &rkcif->notifier; + struct v4l2_fwnode_endpoint *vep = &interface->vep; + struct device *dev = rkcif->dev; + struct fwnode_handle *ep; + u32 dvp_clk_delay = 0; + int ret; + + ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), interface->index, + 0, 0); + if (!ep) + return -ENODEV; + + vep->bus_type = V4L2_MBUS_UNKNOWN; + ret = v4l2_fwnode_endpoint_parse(ep, vep); + if (ret) + goto complete; + + if (interface->type == RKCIF_IF_DVP) { + if (vep->bus_type != V4L2_MBUS_BT656 && + vep->bus_type != V4L2_MBUS_PARALLEL) { + ret = dev_err_probe(dev, -EINVAL, + "unsupported bus type\n"); + goto complete; + } + + fwnode_property_read_u32(ep, "rockchip,dvp-clk-delay", + &dvp_clk_delay); + interface->dvp.dvp_clk_delay = dvp_clk_delay; + } + + remote = v4l2_async_nf_add_fwnode_remote(ntf, ep, struct rkcif_remote); + if (IS_ERR(remote)) { + ret = PTR_ERR(remote); + goto complete; + } + + remote->interface = interface; + interface->remote = remote; + interface->status = RKCIF_IF_ACTIVE; + ret = 0; + +complete: + fwnode_handle_put(ep); + + return ret; +} + +int rkcif_interface_register(struct rkcif_device *rkcif, + struct rkcif_interface *interface) +{ + struct media_pad *pads = interface->pads; + struct v4l2_subdev *sd = &interface->sd; + int ret; + + interface->rkcif = rkcif; + + v4l2_subdev_init(sd, &rkcif_interface_ops); + sd->dev = rkcif->dev; + sd->entity.ops = &rkcif_interface_media_ops; + sd->entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; + sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; + sd->internal_ops = &rkcif_interface_internal_ops; + sd->owner = THIS_MODULE; + + if (interface->type == RKCIF_IF_DVP) + snprintf(sd->name, sizeof(sd->name), "rkcif-dvp0"); + else if (interface->type == RKCIF_IF_MIPI) + snprintf(sd->name, sizeof(sd->name), "rkcif-mipi%d", + interface->index - RKCIF_MIPI_BASE); + + pads[RKCIF_IF_PAD_SINK].flags = MEDIA_PAD_FL_SINK; + pads[RKCIF_IF_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE; + ret = media_entity_pads_init(&sd->entity, RKCIF_IF_PAD_MAX, pads); + if (ret) + goto err; + + ret = v4l2_subdev_init_finalize(sd); + if (ret) + goto err_entity_cleanup; + + ret = v4l2_device_register_subdev(&rkcif->v4l2_dev, sd); + if (ret) { + dev_err(sd->dev, "failed to register subdev\n"); + goto err_subdev_cleanup; + } + + ret = rkcif_interface_add(interface); + if (ret) + goto err_subdev_unregister; + + return 0; + +err_subdev_unregister: + v4l2_device_unregister_subdev(sd); +err_subdev_cleanup: + v4l2_subdev_cleanup(sd); +err_entity_cleanup: + media_entity_cleanup(&sd->entity); +err: + return ret; +} + +void rkcif_interface_unregister(struct rkcif_interface *interface) +{ + struct v4l2_subdev *sd = &interface->sd; + + if (interface->status != RKCIF_IF_ACTIVE) + return; + + v4l2_device_unregister_subdev(sd); + v4l2_subdev_cleanup(sd); + media_entity_cleanup(&sd->entity); +} + +const struct rkcif_input_fmt * +rkcif_interface_find_input_fmt(struct rkcif_interface *interface, bool ret_def, + u32 mbus_code) +{ + const struct rkcif_input_fmt *fmt; + + WARN_ON(interface->in_fmts_num == 0); + + for (unsigned int i = 0; i < interface->in_fmts_num; i++) { + fmt = &interface->in_fmts[i]; + if (fmt->mbus_code == mbus_code) + return fmt; + } + if (ret_def) + return &interface->in_fmts[0]; + else + return NULL; +} diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-interface.h b/drivers/media/platform/rockchip/rkcif/rkcif-interface.h new file mode 100644 index 000000000000..f13aa28b6fa7 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-interface.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Abstraction for the INTERFACE and CROP parts of the different CIF variants. + * They shall be represented as V4L2 subdevice with one sink pad and one + * source pad. The sink pad is connected to a subdevice: either the subdevice + * provided by the driver of the companion chip connected to the DVP, or the + * subdevice provided by the MIPI CSI-2 receiver driver. The source pad is + * to V4l2 device(s) provided by one or many instance(s) of the DMA + * abstraction. + * + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#ifndef _RKCIF_INTERFACE_H +#define _RKCIF_INTERFACE_H + +#include "rkcif-common.h" + +int rkcif_interface_register(struct rkcif_device *rkcif, + struct rkcif_interface *interface); + +void rkcif_interface_unregister(struct rkcif_interface *interface); + +const struct rkcif_input_fmt * +rkcif_interface_find_input_fmt(struct rkcif_interface *interface, bool ret_def, + u32 mbus_code); + +#endif From 501802e2ad517a1e2b9766e1b4e396b10f13f140 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:18 +0100 Subject: [PATCH 246/249] media: rockchip: rkcif: add abstraction for dma blocks Add an abstraction for the DMA parts and the ping-pong scheme (a double-buffering mechanism) of the different CIF variants. Each stream is represented as V4L2 device whose corresponding media entity has one sink pad. This sink pad is connected to an instance of the INTERFACE/CROP abstraction. Tested-by: Gerald Loacker Reviewed-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil [hverkuil: dropped deprecated vb2_ops_wait_prepare/finish callbacks] --- .../media/platform/rockchip/rkcif/Makefile | 1 + .../platform/rockchip/rkcif/rkcif-common.h | 67 ++ .../platform/rockchip/rkcif/rkcif-interface.c | 37 + .../platform/rockchip/rkcif/rkcif-stream.c | 636 ++++++++++++++++++ .../platform/rockchip/rkcif/rkcif-stream.h | 32 + 5 files changed, 773 insertions(+) create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-stream.c create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-stream.h diff --git a/drivers/media/platform/rockchip/rkcif/Makefile b/drivers/media/platform/rockchip/rkcif/Makefile index 9d535fc27e51..256335d95050 100644 --- a/drivers/media/platform/rockchip/rkcif/Makefile +++ b/drivers/media/platform/rockchip/rkcif/Makefile @@ -3,3 +3,4 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += rockchip-cif.o rockchip-cif-objs += rkcif-dev.o rockchip-cif-objs += rkcif-interface.o +rockchip-cif-objs += rkcif-stream.o diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h index f01536727a5d..63d5b45c7afe 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -33,6 +33,14 @@ enum rkcif_format_type { RKCIF_FMT_TYPE_RAW, }; +enum rkcif_id_index { + RKCIF_ID0, + RKCIF_ID1, + RKCIF_ID2, + RKCIF_ID3, + RKCIF_ID_MAX +}; + enum rkcif_interface_index { RKCIF_DVP, RKCIF_MIPI_BASE, @@ -63,6 +71,19 @@ enum rkcif_interface_type { RKCIF_IF_MIPI, }; +struct rkcif_buffer { + struct vb2_v4l2_buffer vb; + struct list_head queue; + dma_addr_t buff_addr[VIDEO_MAX_PLANES]; + bool is_dummy; +}; + +struct rkcif_dummy_buffer { + struct rkcif_buffer buffer; + void *vaddr; + u32 size; +}; + struct rkcif_input_fmt { u32 mbus_code; @@ -70,6 +91,12 @@ struct rkcif_input_fmt { enum v4l2_field field; }; +struct rkcif_output_fmt { + u32 fourcc; + u32 mbus_code; + u8 cplanes; +}; + struct rkcif_interface; struct rkcif_remote { @@ -79,6 +106,42 @@ struct rkcif_remote { struct rkcif_interface *interface; }; +struct rkcif_stream { + enum rkcif_id_index id; + struct rkcif_device *rkcif; + struct rkcif_interface *interface; + const struct rkcif_output_fmt *out_fmts; + unsigned int out_fmts_num; + + /* in ping-pong mode, two buffers can be provided to the HW */ + struct rkcif_buffer *buffers[2]; + int frame_idx; + int frame_phase; + + /* in case of no available buffer, HW can write to the dummy buffer */ + struct rkcif_dummy_buffer dummy; + + bool stopping; + wait_queue_head_t wq_stopped; + + /* queue of available buffers plus spinlock that protects it */ + spinlock_t driver_queue_lock; + struct list_head driver_queue; + + /* lock used by the V4L2 core */ + struct mutex vlock; + + struct media_pad pad; + struct media_pipeline pipeline; + struct v4l2_pix_format_mplane pix; + struct vb2_queue buf_queue; + struct video_device vdev; + + void (*queue_buffer)(struct rkcif_stream *stream, unsigned int index); + int (*start_streaming)(struct rkcif_stream *stream); + void (*stop_streaming)(struct rkcif_stream *stream); +}; + struct rkcif_dvp { u32 dvp_clk_delay; }; @@ -89,6 +152,8 @@ struct rkcif_interface { enum rkcif_interface_index index; struct rkcif_device *rkcif; struct rkcif_remote *remote; + struct rkcif_stream streams[RKCIF_ID_MAX]; + unsigned int streams_num; const struct rkcif_input_fmt *in_fmts; unsigned int in_fmts_num; @@ -99,6 +164,8 @@ struct rkcif_interface { union { struct rkcif_dvp dvp; }; + + void (*set_crop)(struct rkcif_stream *stream, u16 left, u16 top); }; struct rkcif_match_data { diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-interface.c b/drivers/media/platform/rockchip/rkcif/rkcif-interface.c index 0fe9410e23ed..523103872b7a 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-interface.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-interface.c @@ -157,15 +157,41 @@ static int rkcif_interface_set_routing(struct v4l2_subdev *sd, if (ret) return ret; + for (unsigned int i = 0; i < routing->num_routes; i++) { + const struct v4l2_subdev_route *route = &routing->routes[i]; + + if (route->source_stream >= RKCIF_ID_MAX) + return -EINVAL; + } + ret = v4l2_subdev_set_routing(sd, state, routing); return ret; } +static int rkcif_interface_apply_crop(struct rkcif_stream *stream, + struct v4l2_subdev_state *state) +{ + struct rkcif_interface *interface = stream->interface; + struct v4l2_rect *crop; + + crop = v4l2_subdev_state_get_crop(state, RKCIF_IF_PAD_SRC, stream->id); + if (!crop) + return -EINVAL; + + if (interface->set_crop) + interface->set_crop(stream, crop->left, crop->top); + + return 0; +} + static int rkcif_interface_enable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, u32 pad, u64 streams_mask) { + struct rkcif_interface *interface = to_rkcif_interface(sd); + struct rkcif_stream *stream; + struct v4l2_subdev_route *route; struct v4l2_subdev *remote_sd; struct media_pad *remote_pad; u64 mask; @@ -174,6 +200,17 @@ static int rkcif_interface_enable_streams(struct v4l2_subdev *sd, media_pad_remote_pad_first(&sd->entity.pads[RKCIF_IF_PAD_SINK]); remote_sd = media_entity_to_v4l2_subdev(remote_pad->entity); + /* DVP has one crop setting for all IDs */ + if (interface->type == RKCIF_IF_DVP) { + stream = &interface->streams[RKCIF_ID0]; + rkcif_interface_apply_crop(stream, state); + } else { + for_each_active_route(&state->routing, route) { + stream = &interface->streams[route->sink_stream]; + rkcif_interface_apply_crop(stream, state); + } + } + mask = v4l2_subdev_state_xlate_streams(state, RKCIF_IF_PAD_SINK, RKCIF_IF_PAD_SRC, &streams_mask); diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-stream.c b/drivers/media/platform/rockchip/rkcif/rkcif-stream.c new file mode 100644 index 000000000000..e00010a91e8b --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-stream.c @@ -0,0 +1,636 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include "rkcif-common.h" +#include "rkcif-stream.h" + +#define CIF_REQ_BUFS_MIN 1 +#define CIF_MIN_WIDTH 64 +#define CIF_MIN_HEIGHT 64 +#define CIF_MAX_WIDTH 8192 +#define CIF_MAX_HEIGHT 8192 + +static inline struct rkcif_buffer *to_rkcif_buffer(struct vb2_v4l2_buffer *vb) +{ + return container_of(vb, struct rkcif_buffer, vb); +} + +static inline struct rkcif_stream *to_rkcif_stream(struct video_device *vdev) +{ + return container_of(vdev, struct rkcif_stream, vdev); +} + +static struct rkcif_buffer *rkcif_stream_pop_buffer(struct rkcif_stream *stream) +{ + struct rkcif_buffer *buffer; + + guard(spinlock_irqsave)(&stream->driver_queue_lock); + + if (list_empty(&stream->driver_queue)) + return NULL; + + buffer = list_first_entry(&stream->driver_queue, struct rkcif_buffer, + queue); + list_del(&buffer->queue); + + return buffer; +} + +static void rkcif_stream_push_buffer(struct rkcif_stream *stream, + struct rkcif_buffer *buffer) +{ + guard(spinlock_irqsave)(&stream->driver_queue_lock); + + list_add_tail(&buffer->queue, &stream->driver_queue); +} + +static inline void rkcif_stream_return_buffer(struct rkcif_buffer *buffer, + enum vb2_buffer_state state) +{ + struct vb2_v4l2_buffer *vb = &buffer->vb; + + vb2_buffer_done(&vb->vb2_buf, state); +} + +static void rkcif_stream_complete_buffer(struct rkcif_stream *stream, + struct rkcif_buffer *buffer) +{ + struct vb2_v4l2_buffer *vb = &buffer->vb; + + vb->vb2_buf.timestamp = ktime_get_ns(); + vb->sequence = stream->frame_idx; + vb2_buffer_done(&vb->vb2_buf, VB2_BUF_STATE_DONE); + stream->frame_idx++; +} + +void rkcif_stream_pingpong(struct rkcif_stream *stream) +{ + struct rkcif_buffer *buffer; + + buffer = stream->buffers[stream->frame_phase]; + if (!buffer->is_dummy) + rkcif_stream_complete_buffer(stream, buffer); + + buffer = rkcif_stream_pop_buffer(stream); + if (buffer) { + stream->buffers[stream->frame_phase] = buffer; + stream->buffers[stream->frame_phase]->is_dummy = false; + } else { + stream->buffers[stream->frame_phase] = &stream->dummy.buffer; + stream->buffers[stream->frame_phase]->is_dummy = true; + dev_dbg(stream->rkcif->dev, + "no buffer available, frame will be dropped\n"); + } + + if (stream->queue_buffer) + stream->queue_buffer(stream, stream->frame_phase); + + stream->frame_phase = 1 - stream->frame_phase; +} + +static int rkcif_stream_init_buffers(struct rkcif_stream *stream) +{ + struct v4l2_pix_format_mplane *pix = &stream->pix; + + stream->buffers[0] = rkcif_stream_pop_buffer(stream); + if (!stream->buffers[0]) + goto err_buff_0; + + stream->buffers[1] = rkcif_stream_pop_buffer(stream); + if (!stream->buffers[1]) + goto err_buff_1; + + if (stream->queue_buffer) { + stream->queue_buffer(stream, 0); + stream->queue_buffer(stream, 1); + } + + stream->dummy.size = pix->num_planes * pix->plane_fmt[0].sizeimage; + stream->dummy.vaddr = + dma_alloc_attrs(stream->rkcif->dev, stream->dummy.size, + &stream->dummy.buffer.buff_addr[0], GFP_KERNEL, + DMA_ATTR_NO_KERNEL_MAPPING); + if (!stream->dummy.vaddr) + goto err_dummy; + + for (unsigned int i = 1; i < pix->num_planes; i++) + stream->dummy.buffer.buff_addr[i] = + stream->dummy.buffer.buff_addr[i - 1] + + pix->plane_fmt[i - 1].bytesperline * pix->height; + + return 0; + +err_dummy: + rkcif_stream_return_buffer(stream->buffers[1], VB2_BUF_STATE_QUEUED); + stream->buffers[1] = NULL; + +err_buff_1: + rkcif_stream_return_buffer(stream->buffers[0], VB2_BUF_STATE_QUEUED); + stream->buffers[0] = NULL; +err_buff_0: + return -EINVAL; +} + +static void rkcif_stream_return_all_buffers(struct rkcif_stream *stream, + enum vb2_buffer_state state) +{ + struct rkcif_buffer *buffer; + + if (stream->buffers[0] && !stream->buffers[0]->is_dummy) { + rkcif_stream_return_buffer(stream->buffers[0], state); + stream->buffers[0] = NULL; + } + + if (stream->buffers[1] && !stream->buffers[1]->is_dummy) { + rkcif_stream_return_buffer(stream->buffers[1], state); + stream->buffers[1] = NULL; + } + + while ((buffer = rkcif_stream_pop_buffer(stream))) + rkcif_stream_return_buffer(buffer, state); + + if (stream->dummy.vaddr) { + dma_free_attrs(stream->rkcif->dev, stream->dummy.size, + stream->dummy.vaddr, + stream->dummy.buffer.buff_addr[0], + DMA_ATTR_NO_KERNEL_MAPPING); + stream->dummy.vaddr = NULL; + } +} + +static int rkcif_stream_setup_queue(struct vb2_queue *queue, + unsigned int *num_buffers, + unsigned int *num_planes, + unsigned int sizes[], + struct device *alloc_devs[]) +{ + struct rkcif_stream *stream = queue->drv_priv; + struct v4l2_pix_format_mplane *pix = &stream->pix; + + if (*num_planes) { + if (*num_planes != pix->num_planes) + return -EINVAL; + + for (unsigned int i = 0; i < pix->num_planes; i++) + if (sizes[i] < pix->plane_fmt[i].sizeimage) + return -EINVAL; + } else { + *num_planes = pix->num_planes; + for (unsigned int i = 0; i < pix->num_planes; i++) + sizes[i] = pix->plane_fmt[i].sizeimage; + } + + return 0; +} + +static int rkcif_stream_prepare_buffer(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct rkcif_buffer *buffer = to_rkcif_buffer(vbuf); + struct rkcif_stream *stream = vb->vb2_queue->drv_priv; + const struct rkcif_output_fmt *fmt; + struct v4l2_pix_format_mplane *pix = &stream->pix; + unsigned int i; + + memset(buffer->buff_addr, 0, sizeof(buffer->buff_addr)); + for (i = 0; i < pix->num_planes; i++) + buffer->buff_addr[i] = vb2_dma_contig_plane_dma_addr(vb, i); + + /* apply fallback for non-mplane formats, if required */ + if (pix->num_planes == 1) { + fmt = rkcif_stream_find_output_fmt(stream, true, + pix->pixelformat); + for (i = 1; i < fmt->cplanes; i++) + buffer->buff_addr[i] = + buffer->buff_addr[i - 1] + + pix->plane_fmt[i - 1].bytesperline * + pix->height; + } + + for (i = 0; i < pix->num_planes; i++) { + unsigned long size = pix->plane_fmt[i].sizeimage; + + if (vb2_plane_size(vb, i) < size) { + dev_err(stream->rkcif->dev, + "user buffer too small (%ld < %ld)\n", + vb2_plane_size(vb, i), size); + return -EINVAL; + } + + vb2_set_plane_payload(vb, i, size); + } + + vbuf->field = V4L2_FIELD_NONE; + + return 0; +} + +static void rkcif_stream_queue_buffer(struct vb2_buffer *vb) +{ + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct rkcif_buffer *buffer = to_rkcif_buffer(vbuf); + struct rkcif_stream *stream = vb->vb2_queue->drv_priv; + + rkcif_stream_push_buffer(stream, buffer); +} + +static int rkcif_stream_start_streaming(struct vb2_queue *queue, + unsigned int count) +{ + struct rkcif_stream *stream = queue->drv_priv; + struct rkcif_device *rkcif = stream->rkcif; + u64 mask; + int ret; + + stream->frame_idx = 0; + stream->frame_phase = 0; + + ret = video_device_pipeline_start(&stream->vdev, &stream->pipeline); + if (ret) { + dev_err(rkcif->dev, "failed to start pipeline %d\n", ret); + goto err_out; + } + + ret = pm_runtime_resume_and_get(rkcif->dev); + if (ret < 0) { + dev_err(rkcif->dev, "failed to get runtime pm, %d\n", ret); + goto err_pipeline_stop; + } + + ret = rkcif_stream_init_buffers(stream); + if (ret) + goto err_runtime_put; + + if (stream->start_streaming) { + ret = stream->start_streaming(stream); + if (ret < 0) + goto err_runtime_put; + } + + mask = BIT_ULL(stream->id); + ret = v4l2_subdev_enable_streams(&stream->interface->sd, + RKCIF_IF_PAD_SRC, mask); + if (ret < 0) + goto err_stop_stream; + + return 0; + +err_stop_stream: + if (stream->stop_streaming) + stream->stop_streaming(stream); +err_runtime_put: + pm_runtime_put(rkcif->dev); +err_pipeline_stop: + video_device_pipeline_stop(&stream->vdev); +err_out: + rkcif_stream_return_all_buffers(stream, VB2_BUF_STATE_QUEUED); + return ret; +} + +static void rkcif_stream_stop_streaming(struct vb2_queue *queue) +{ + struct rkcif_stream *stream = queue->drv_priv; + struct rkcif_device *rkcif = stream->rkcif; + u64 mask; + int ret; + + mask = BIT_ULL(stream->id); + v4l2_subdev_disable_streams(&stream->interface->sd, RKCIF_IF_PAD_SRC, + mask); + + stream->stopping = true; + ret = wait_event_timeout(stream->wq_stopped, !stream->stopping, + msecs_to_jiffies(1000)); + + if (!ret && stream->stop_streaming) + stream->stop_streaming(stream); + + pm_runtime_put(rkcif->dev); + + rkcif_stream_return_all_buffers(stream, VB2_BUF_STATE_ERROR); + + video_device_pipeline_stop(&stream->vdev); +} + +static const struct vb2_ops rkcif_stream_vb2_ops = { + .queue_setup = rkcif_stream_setup_queue, + .buf_prepare = rkcif_stream_prepare_buffer, + .buf_queue = rkcif_stream_queue_buffer, + .start_streaming = rkcif_stream_start_streaming, + .stop_streaming = rkcif_stream_stop_streaming, +}; + +static int rkcif_stream_fill_format(struct rkcif_stream *stream, + struct v4l2_pix_format_mplane *pix) +{ + const struct rkcif_output_fmt *fmt; + u32 height, width; + int ret; + + fmt = rkcif_stream_find_output_fmt(stream, true, pix->pixelformat); + height = clamp_t(u32, pix->height, CIF_MIN_HEIGHT, CIF_MAX_HEIGHT); + width = clamp_t(u32, pix->width, CIF_MIN_WIDTH, CIF_MAX_WIDTH); + ret = v4l2_fill_pixfmt_mp(pix, fmt->fourcc, width, height); + if (ret) + return ret; + + pix->field = V4L2_FIELD_NONE; + + return 0; +} + +static int rkcif_stream_try_format(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct rkcif_stream *stream = video_drvdata(file); + struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; + + return rkcif_stream_fill_format(stream, pix); +} + +static int rkcif_stream_set_format(struct file *file, void *priv, + struct v4l2_format *f) +{ + struct rkcif_stream *stream = video_drvdata(file); + struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp; + int ret; + + if (vb2_is_busy(&stream->buf_queue)) + return -EBUSY; + + ret = rkcif_stream_try_format(file, priv, f); + if (ret) + return ret; + + stream->pix = *pix; + + return 0; +} + +static int rkcif_stream_get_format(struct file *file, void *fh, + struct v4l2_format *f) +{ + struct rkcif_stream *stream = video_drvdata(file); + + f->fmt.pix_mp = stream->pix; + + return 0; +} + +static int rkcif_stream_enum_formats(struct file *file, void *priv, + struct v4l2_fmtdesc *f) +{ + struct rkcif_stream *stream = video_drvdata(file); + + if (f->index >= stream->out_fmts_num) + return -EINVAL; + + f->pixelformat = stream->out_fmts[f->index].fourcc; + + return 0; +} + +static int rkcif_stream_enum_framesizes(struct file *file, void *fh, + struct v4l2_frmsizeenum *fsize) +{ + struct rkcif_stream *stream = video_drvdata(file); + + if (fsize->index > 0) + return -EINVAL; + + if (!rkcif_stream_find_output_fmt(stream, false, fsize->pixel_format)) + return -EINVAL; + + fsize->type = V4L2_FRMSIZE_TYPE_STEPWISE; + fsize->stepwise.min_width = CIF_MIN_WIDTH; + fsize->stepwise.max_width = CIF_MAX_WIDTH; + fsize->stepwise.step_width = 8; + fsize->stepwise.min_height = CIF_MIN_HEIGHT; + fsize->stepwise.max_height = CIF_MAX_HEIGHT; + fsize->stepwise.step_height = 8; + + return 0; +} + +static int rkcif_stream_querycap(struct file *file, void *priv, + struct v4l2_capability *cap) +{ + struct rkcif_stream *stream = video_drvdata(file); + struct device *dev = stream->rkcif->dev; + + strscpy(cap->driver, dev->driver->name, sizeof(cap->driver)); + strscpy(cap->card, dev->driver->name, sizeof(cap->card)); + + return 0; +} + +static const struct v4l2_ioctl_ops rkcif_stream_ioctl_ops = { + .vidioc_reqbufs = vb2_ioctl_reqbufs, + .vidioc_querybuf = vb2_ioctl_querybuf, + .vidioc_create_bufs = vb2_ioctl_create_bufs, + .vidioc_qbuf = vb2_ioctl_qbuf, + .vidioc_expbuf = vb2_ioctl_expbuf, + .vidioc_dqbuf = vb2_ioctl_dqbuf, + .vidioc_prepare_buf = vb2_ioctl_prepare_buf, + .vidioc_streamon = vb2_ioctl_streamon, + .vidioc_streamoff = vb2_ioctl_streamoff, + .vidioc_try_fmt_vid_cap_mplane = rkcif_stream_try_format, + .vidioc_s_fmt_vid_cap_mplane = rkcif_stream_set_format, + .vidioc_g_fmt_vid_cap_mplane = rkcif_stream_get_format, + .vidioc_enum_fmt_vid_cap = rkcif_stream_enum_formats, + .vidioc_enum_framesizes = rkcif_stream_enum_framesizes, + .vidioc_querycap = rkcif_stream_querycap, +}; + +static int rkcif_stream_link_validate(struct media_link *link) +{ + struct video_device *vdev = + media_entity_to_video_device(link->sink->entity); + struct v4l2_mbus_framefmt *source_fmt; + struct v4l2_subdev *sd; + struct v4l2_subdev_state *state; + struct rkcif_stream *stream = to_rkcif_stream(vdev); + int ret = -EINVAL; + + if (!media_entity_remote_source_pad_unique(link->sink->entity)) + return -ENOTCONN; + + sd = media_entity_to_v4l2_subdev(link->source->entity); + + state = v4l2_subdev_lock_and_get_active_state(sd); + + source_fmt = v4l2_subdev_state_get_format(state, link->source->index, + stream->id); + if (!source_fmt) + goto out; + + if (source_fmt->height != stream->pix.height || + source_fmt->width != stream->pix.width) { + dev_dbg(stream->rkcif->dev, + "link '%s':%u -> '%s':%u not valid: %ux%u != %ux%u\n", + link->source->entity->name, link->source->index, + link->sink->entity->name, link->sink->index, + source_fmt->width, source_fmt->height, + stream->pix.width, stream->pix.height); + goto out; + } + + ret = 0; + +out: + v4l2_subdev_unlock_state(state); + return ret; +} + +static const struct media_entity_operations rkcif_stream_media_ops = { + .link_validate = rkcif_stream_link_validate, +}; + +static const struct v4l2_file_operations rkcif_stream_file_ops = { + .open = v4l2_fh_open, + .release = vb2_fop_release, + .unlocked_ioctl = video_ioctl2, + .poll = vb2_fop_poll, + .mmap = vb2_fop_mmap, +}; + +static int rkcif_stream_init_vb2_queue(struct vb2_queue *q, + struct rkcif_stream *stream) +{ + q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; + q->io_modes = VB2_MMAP | VB2_DMABUF; + q->drv_priv = stream; + q->ops = &rkcif_stream_vb2_ops; + q->mem_ops = &vb2_dma_contig_memops; + q->buf_struct_size = sizeof(struct rkcif_buffer); + q->min_queued_buffers = CIF_REQ_BUFS_MIN; + q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; + q->lock = &stream->vlock; + q->dev = stream->rkcif->dev; + + return vb2_queue_init(q); +} + +int rkcif_stream_register(struct rkcif_device *rkcif, + struct rkcif_stream *stream) +{ + struct rkcif_interface *interface = stream->interface; + struct v4l2_device *v4l2_dev = &rkcif->v4l2_dev; + struct video_device *vdev = &stream->vdev; + u32 link_flags = 0; + int ret; + + stream->rkcif = rkcif; + + INIT_LIST_HEAD(&stream->driver_queue); + spin_lock_init(&stream->driver_queue_lock); + + init_waitqueue_head(&stream->wq_stopped); + + mutex_init(&stream->vlock); + + vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE_MPLANE | V4L2_CAP_STREAMING | + V4L2_CAP_IO_MC; + vdev->entity.ops = &rkcif_stream_media_ops; + vdev->fops = &rkcif_stream_file_ops; + vdev->ioctl_ops = &rkcif_stream_ioctl_ops; + vdev->lock = &stream->vlock; + vdev->minor = -1; + vdev->release = video_device_release_empty; + vdev->v4l2_dev = v4l2_dev; + vdev->vfl_dir = VFL_DIR_RX; + video_set_drvdata(vdev, stream); + + stream->pad.flags = MEDIA_PAD_FL_SINK; + + stream->pix.height = CIF_MIN_HEIGHT; + stream->pix.width = CIF_MIN_WIDTH; + rkcif_stream_fill_format(stream, &stream->pix); + + rkcif_stream_init_vb2_queue(&stream->buf_queue, stream); + + vdev->queue = &stream->buf_queue; + if (interface->type == RKCIF_IF_DVP) + snprintf(vdev->name, sizeof(vdev->name), "rkcif-dvp0-id%d", + stream->id); + else if (interface->type == RKCIF_IF_MIPI) + snprintf(vdev->name, sizeof(vdev->name), "rkcif-mipi%d-id%d", + interface->index - RKCIF_MIPI_BASE, stream->id); + + ret = media_entity_pads_init(&vdev->entity, 1, &stream->pad); + if (ret < 0) { + dev_err(rkcif->dev, + "failed to initialize stream media pad: %d\n", ret); + return ret; + } + + ret = video_register_device(vdev, VFL_TYPE_VIDEO, -1); + if (ret < 0) { + dev_err(rkcif->dev, "failed to register video device: %d\n", + ret); + goto err_media_entity_cleanup; + } + + /* enable only stream ID0 by default */ + if (stream->id == RKCIF_ID0) + link_flags |= MEDIA_LNK_FL_ENABLED; + + ret = media_create_pad_link(&interface->sd.entity, RKCIF_IF_PAD_SRC, + &stream->vdev.entity, 0, link_flags); + if (ret) { + dev_err(rkcif->dev, "failed to link stream media pad: %d\n", + ret); + goto err_video_unregister; + } + + v4l2_info(v4l2_dev, "registered %s as /dev/video%d\n", vdev->name, + vdev->num); + + return 0; + +err_video_unregister: + video_unregister_device(&stream->vdev); +err_media_entity_cleanup: + media_entity_cleanup(&stream->vdev.entity); + return ret; +} + +void rkcif_stream_unregister(struct rkcif_stream *stream) +{ + video_unregister_device(&stream->vdev); + media_entity_cleanup(&stream->vdev.entity); +} + +const struct rkcif_output_fmt * +rkcif_stream_find_output_fmt(struct rkcif_stream *stream, bool ret_def, + u32 pixelfmt) +{ + const struct rkcif_output_fmt *fmt; + + WARN_ON(stream->out_fmts_num == 0); + + for (unsigned int i = 0; i < stream->out_fmts_num; i++) { + fmt = &stream->out_fmts[i]; + if (fmt->fourcc == pixelfmt) + return fmt; + } + + if (ret_def) + return &stream->out_fmts[0]; + else + return NULL; +} diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-stream.h b/drivers/media/platform/rockchip/rkcif/rkcif-stream.h new file mode 100644 index 000000000000..590faf5d1a87 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-stream.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Abstraction for the DMA part and the ping-pong scheme (a double-buffering + * mechanism) of the different CIF variants. + * Each stream is represented as V4L2 device whose corresponding media entity + * has one sink pad. + * The sink pad is connected to an instance of the INTERFACE/CROP abstraction + * in rkcif-interface.c. + * + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#ifndef _RKCIF_STREAM_H +#define _RKCIF_STREAM_H + +#include "rkcif-common.h" + +void rkcif_stream_pingpong(struct rkcif_stream *stream); + +int rkcif_stream_register(struct rkcif_device *rkcif, + struct rkcif_stream *stream); + +void rkcif_stream_unregister(struct rkcif_stream *stream); + +const struct rkcif_output_fmt * +rkcif_stream_find_output_fmt(struct rkcif_stream *stream, bool ret_def, + u32 pixelfmt); + +#endif From 75e28594624f68322c6eb052e5f4e8c0589d89a6 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:19 +0100 Subject: [PATCH 247/249] media: rockchip: rkcif: add support for px30 vip dvp capture The PX30 Video Input Processor (VIP) unit features a Digital Video Port (DVP). Add support for the DVP in general and for the PX30 VIP DVP in particular. Tested-by: Gerald Loacker Reviewed-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkcif/Makefile | 1 + .../rockchip/rkcif/rkcif-capture-dvp.c | 589 ++++++++++++++++++ .../rockchip/rkcif/rkcif-capture-dvp.h | 24 + .../platform/rockchip/rkcif/rkcif-common.h | 28 + .../media/platform/rockchip/rkcif/rkcif-dev.c | 15 + .../platform/rockchip/rkcif/rkcif-regs.h | 131 ++++ 6 files changed, 788 insertions(+) create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-regs.h diff --git a/drivers/media/platform/rockchip/rkcif/Makefile b/drivers/media/platform/rockchip/rkcif/Makefile index 256335d95050..a36e294d569d 100644 --- a/drivers/media/platform/rockchip/rkcif/Makefile +++ b/drivers/media/platform/rockchip/rkcif/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += rockchip-cif.o +rockchip-cif-objs += rkcif-capture-dvp.o rockchip-cif-objs += rkcif-dev.o rockchip-cif-objs += rkcif-interface.o rockchip-cif-objs += rkcif-stream.o diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c new file mode 100644 index 000000000000..b40135035ab8 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c @@ -0,0 +1,589 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2020 Maxime Chevallier + * Copyright (C) 2023 Mehdi Djait + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#include +#include +#include +#include + +#include "rkcif-capture-dvp.h" +#include "rkcif-common.h" +#include "rkcif-interface.h" +#include "rkcif-regs.h" +#include "rkcif-stream.h" + +static const struct rkcif_output_fmt dvp_out_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_422 | + RKCIF_FORMAT_UV_STORAGE_ORDER_UVUV, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV16M, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_422 | + RKCIF_FORMAT_UV_STORAGE_ORDER_UVUV, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV61, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_422 | + RKCIF_FORMAT_UV_STORAGE_ORDER_VUVU, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV61M, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_422 | + RKCIF_FORMAT_UV_STORAGE_ORDER_VUVU, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV12, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_420 | + RKCIF_FORMAT_UV_STORAGE_ORDER_UVUV, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV12M, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_420 | + RKCIF_FORMAT_UV_STORAGE_ORDER_UVUV, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV21, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_420 | + RKCIF_FORMAT_UV_STORAGE_ORDER_VUVU, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_NV21M, + .dvp_fmt_val = RKCIF_FORMAT_YUV_OUTPUT_420 | + RKCIF_FORMAT_UV_STORAGE_ORDER_VUVU, + .cplanes = 2, + }, + { + .fourcc = V4L2_PIX_FMT_RGB24, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_RGB565, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_BGR666, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB8, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB10, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG10, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG10, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB12, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG12, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG12, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR12, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR16, + .cplanes = 1, + }, + { + .fourcc = V4L2_PIX_FMT_Y16, + .cplanes = 1, + }, +}; + +static const struct rkcif_input_fmt px30_dvp_in_fmts[] = { + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_RGB888_1X24, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + } +}; + +const struct rkcif_dvp_match_data rkcif_px30_vip_dvp_match_data = { + .in_fmts = px30_dvp_in_fmts, + .in_fmts_num = ARRAY_SIZE(px30_dvp_in_fmts), + .out_fmts = dvp_out_fmts, + .out_fmts_num = ARRAY_SIZE(dvp_out_fmts), + .has_scaler = true, + .regs = { + [RKCIF_DVP_CTRL] = 0x00, + [RKCIF_DVP_INTEN] = 0x04, + [RKCIF_DVP_INTSTAT] = 0x08, + [RKCIF_DVP_FOR] = 0x0c, + [RKCIF_DVP_LINE_NUM_ADDR] = 0x10, + [RKCIF_DVP_FRM0_ADDR_Y] = 0x14, + [RKCIF_DVP_FRM0_ADDR_UV] = 0x18, + [RKCIF_DVP_FRM1_ADDR_Y] = 0x1c, + [RKCIF_DVP_FRM1_ADDR_UV] = 0x20, + [RKCIF_DVP_VIR_LINE_WIDTH] = 0x24, + [RKCIF_DVP_SET_SIZE] = 0x28, + [RKCIF_DVP_SCL_CTRL] = 0x48, + [RKCIF_DVP_FRAME_STATUS] = 0x60, + [RKCIF_DVP_LAST_LINE] = 0x68, + [RKCIF_DVP_LAST_PIX] = 0x6c, + }, +}; + +static inline unsigned int rkcif_dvp_get_addr(struct rkcif_device *rkcif, + unsigned int index) +{ + if (WARN_ON_ONCE(index >= RKCIF_DVP_REGISTER_MAX)) + return RKCIF_REGISTER_NOTSUPPORTED; + + return rkcif->match_data->dvp->regs[index]; +} + +static inline __maybe_unused void rkcif_dvp_write(struct rkcif_device *rkcif, + unsigned int index, u32 val) +{ + unsigned int addr = rkcif_dvp_get_addr(rkcif, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return; + + writel(val, rkcif->base_addr + addr); +} + +static inline __maybe_unused u32 rkcif_dvp_read(struct rkcif_device *rkcif, + unsigned int index) +{ + unsigned int addr = rkcif_dvp_get_addr(rkcif, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return 0; + + return readl(rkcif->base_addr + addr); +} + +static void rkcif_dvp_queue_buffer(struct rkcif_stream *stream, + unsigned int index) +{ + struct rkcif_device *rkcif = stream->rkcif; + struct rkcif_buffer *buffer = stream->buffers[index]; + u32 frm_addr_y, frm_addr_uv; + + frm_addr_y = index ? RKCIF_DVP_FRM1_ADDR_Y : RKCIF_DVP_FRM0_ADDR_Y; + frm_addr_uv = index ? RKCIF_DVP_FRM1_ADDR_UV : RKCIF_DVP_FRM0_ADDR_UV; + + rkcif_dvp_write(rkcif, frm_addr_y, buffer->buff_addr[RKCIF_PLANE_Y]); + rkcif_dvp_write(rkcif, frm_addr_uv, buffer->buff_addr[RKCIF_PLANE_UV]); +} + +static int rkcif_dvp_start_streaming(struct rkcif_stream *stream) +{ + struct rkcif_device *rkcif = stream->rkcif; + struct rkcif_interface *interface = stream->interface; + struct v4l2_mbus_config_parallel *parallel; + struct v4l2_mbus_framefmt *source_fmt; + struct v4l2_subdev_state *state; + const struct rkcif_input_fmt *active_in_fmt; + const struct rkcif_output_fmt *active_out_fmt; + u32 val = 0; + int ret = -EINVAL; + + state = v4l2_subdev_lock_and_get_active_state(&interface->sd); + source_fmt = v4l2_subdev_state_get_format(state, RKCIF_IF_PAD_SRC, + stream->id); + if (!source_fmt) + goto out; + + active_in_fmt = rkcif_interface_find_input_fmt(interface, false, + source_fmt->code); + active_out_fmt = rkcif_stream_find_output_fmt(stream, false, + stream->pix.pixelformat); + if (!active_in_fmt || !active_out_fmt) + goto out; + + parallel = &interface->vep.bus.parallel; + if (parallel->bus_width == 16 && + (parallel->flags & V4L2_MBUS_PCLK_SAMPLE_DUALEDGE)) + val |= RKCIF_FORMAT_BT1120_CLOCK_DOUBLE_EDGES; + val |= active_in_fmt->dvp_fmt_val; + val |= active_out_fmt->dvp_fmt_val; + rkcif_dvp_write(rkcif, RKCIF_DVP_FOR, val); + + val = stream->pix.width; + if (active_in_fmt->fmt_type == RKCIF_FMT_TYPE_RAW) + val = stream->pix.width * 2; + rkcif_dvp_write(rkcif, RKCIF_DVP_VIR_LINE_WIDTH, val); + + val = RKCIF_XY_COORD(stream->pix.width, stream->pix.height); + rkcif_dvp_write(rkcif, RKCIF_DVP_SET_SIZE, val); + + rkcif_dvp_write(rkcif, RKCIF_DVP_FRAME_STATUS, RKCIF_FRAME_STAT_CLS); + rkcif_dvp_write(rkcif, RKCIF_DVP_INTSTAT, RKCIF_INTSTAT_CLS); + if (rkcif->match_data->dvp->has_scaler) { + val = active_in_fmt->fmt_type == RKCIF_FMT_TYPE_YUV ? + RKCIF_SCL_CTRL_ENABLE_YUV_16BIT_BYPASS : + RKCIF_SCL_CTRL_ENABLE_RAW_16BIT_BYPASS; + rkcif_dvp_write(rkcif, RKCIF_DVP_SCL_CTRL, val); + } + + rkcif_dvp_write(rkcif, RKCIF_DVP_INTEN, + RKCIF_INTEN_FRAME_END_EN | + RKCIF_INTEN_PST_INF_FRAME_END_EN); + + rkcif_dvp_write(rkcif, RKCIF_DVP_CTRL, + RKCIF_CTRL_AXI_BURST_16 | RKCIF_CTRL_MODE_PINGPONG | + RKCIF_CTRL_ENABLE_CAPTURE); + + ret = 0; + +out: + v4l2_subdev_unlock_state(state); + return ret; +} + +static void rkcif_dvp_stop_streaming(struct rkcif_stream *stream) +{ + struct rkcif_device *rkcif = stream->rkcif; + u32 val; + + val = rkcif_dvp_read(rkcif, RKCIF_DVP_CTRL); + rkcif_dvp_write(rkcif, RKCIF_DVP_CTRL, + val & (~RKCIF_CTRL_ENABLE_CAPTURE)); + rkcif_dvp_write(rkcif, RKCIF_DVP_INTEN, 0x0); + rkcif_dvp_write(rkcif, RKCIF_DVP_INTSTAT, 0x3ff); + rkcif_dvp_write(rkcif, RKCIF_DVP_FRAME_STATUS, 0x0); + + stream->stopping = false; +} + +static void rkcif_dvp_reset_stream(struct rkcif_device *rkcif) +{ + u32 ctl = rkcif_dvp_read(rkcif, RKCIF_DVP_CTRL); + + rkcif_dvp_write(rkcif, RKCIF_DVP_CTRL, + ctl & (~RKCIF_CTRL_ENABLE_CAPTURE)); + rkcif_dvp_write(rkcif, RKCIF_DVP_CTRL, ctl | RKCIF_CTRL_ENABLE_CAPTURE); +} + +static void rkcif_dvp_set_crop(struct rkcif_stream *stream, u16 left, u16 top) +{ + struct rkcif_device *rkcif = stream->rkcif; + u32 val; + + val = RKCIF_XY_COORD(left, top); + rkcif_dvp_write(rkcif, RKCIF_DVP_CROP, val); +} + +irqreturn_t rkcif_dvp_isr(int irq, void *ctx) +{ + struct device *dev = ctx; + struct rkcif_device *rkcif = dev_get_drvdata(dev); + struct rkcif_stream *stream; + u32 intstat, lastline, lastpix, cif_frmst; + irqreturn_t ret = IRQ_NONE; + + if (!rkcif->match_data->dvp) + return ret; + + intstat = rkcif_dvp_read(rkcif, RKCIF_DVP_INTSTAT); + cif_frmst = rkcif_dvp_read(rkcif, RKCIF_DVP_FRAME_STATUS); + lastline = RKCIF_FETCH_Y(rkcif_dvp_read(rkcif, RKCIF_DVP_LAST_LINE)); + lastpix = RKCIF_FETCH_Y(rkcif_dvp_read(rkcif, RKCIF_DVP_LAST_PIX)); + + if (intstat & RKCIF_INTSTAT_FRAME_END) { + rkcif_dvp_write(rkcif, RKCIF_DVP_INTSTAT, + RKCIF_INTSTAT_FRAME_END_CLR | + RKCIF_INTSTAT_LINE_END_CLR); + + stream = &rkcif->interfaces[RKCIF_DVP].streams[RKCIF_ID0]; + + if (stream->stopping) { + rkcif_dvp_stop_streaming(stream); + wake_up(&stream->wq_stopped); + ret = IRQ_HANDLED; + goto out; + } + + if (lastline != stream->pix.height) { + v4l2_err(&rkcif->v4l2_dev, + "bad frame, irq:%#x frmst:%#x size:%dx%d\n", + intstat, cif_frmst, lastpix, lastline); + + rkcif_dvp_reset_stream(rkcif); + } + + rkcif_stream_pingpong(stream); + + ret = IRQ_HANDLED; + } +out: + return ret; +} + +int rkcif_dvp_register(struct rkcif_device *rkcif) +{ + struct rkcif_interface *interface; + unsigned int streams_num; + int ret; + + if (!rkcif->match_data->dvp) + return 0; + + interface = &rkcif->interfaces[RKCIF_DVP]; + interface->index = RKCIF_DVP; + interface->type = RKCIF_IF_DVP; + interface->in_fmts = rkcif->match_data->dvp->in_fmts; + interface->in_fmts_num = rkcif->match_data->dvp->in_fmts_num; + interface->set_crop = rkcif_dvp_set_crop; + ret = rkcif_interface_register(rkcif, interface); + if (ret) + return ret; + + if (rkcif->match_data->dvp->setup) + rkcif->match_data->dvp->setup(rkcif); + + streams_num = rkcif->match_data->dvp->has_ids ? 4 : 1; + for (unsigned int i = 0; i < streams_num; i++) { + struct rkcif_stream *stream = &interface->streams[i]; + + stream->id = i; + stream->interface = interface; + stream->out_fmts = rkcif->match_data->dvp->out_fmts; + stream->out_fmts_num = rkcif->match_data->dvp->out_fmts_num; + stream->queue_buffer = rkcif_dvp_queue_buffer; + stream->start_streaming = rkcif_dvp_start_streaming; + stream->stop_streaming = rkcif_dvp_stop_streaming; + + ret = rkcif_stream_register(rkcif, stream); + if (ret) + goto err_streams_unregister; + + interface->streams_num++; + } + + return 0; + +err_streams_unregister: + for (unsigned int i = 0; i < interface->streams_num; i++) + rkcif_stream_unregister(&interface->streams[i]); + + rkcif_interface_unregister(interface); + + return ret; +} + +void rkcif_dvp_unregister(struct rkcif_device *rkcif) +{ + struct rkcif_interface *interface; + + if (!rkcif->match_data->dvp) + return; + + interface = &rkcif->interfaces[RKCIF_DVP]; + + for (unsigned int i = 0; i < interface->streams_num; i++) + rkcif_stream_unregister(&interface->streams[i]); + + rkcif_interface_unregister(interface); +} diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h new file mode 100644 index 000000000000..7b2da11497c3 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2023 Mehdi Djait + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#ifndef _RKCIF_CAPTURE_DVP_H +#define _RKCIF_CAPTURE_DVP_H + +#include "rkcif-common.h" + +extern const struct rkcif_dvp_match_data rkcif_px30_vip_dvp_match_data; + +int rkcif_dvp_register(struct rkcif_device *rkcif); + +void rkcif_dvp_unregister(struct rkcif_device *rkcif); + +irqreturn_t rkcif_dvp_isr(int irq, void *ctx); + +#endif diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h index 63d5b45c7afe..c6ec578e1049 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -24,6 +24,8 @@ #include #include +#include "rkcif-regs.h" + #define RKCIF_DRIVER_NAME "rockchip-cif" #define RKCIF_CLK_MAX 4 @@ -84,17 +86,31 @@ struct rkcif_dummy_buffer { u32 size; }; +enum rkcif_plane_index { + RKCIF_PLANE_Y, + RKCIF_PLANE_UV, + RKCIF_PLANE_MAX +}; + struct rkcif_input_fmt { u32 mbus_code; enum rkcif_format_type fmt_type; enum v4l2_field field; + + union { + u32 dvp_fmt_val; + }; }; struct rkcif_output_fmt { u32 fourcc; u32 mbus_code; u8 cplanes; + + union { + u32 dvp_fmt_val; + }; }; struct rkcif_interface; @@ -168,9 +184,21 @@ struct rkcif_interface { void (*set_crop)(struct rkcif_stream *stream, u16 left, u16 top); }; +struct rkcif_dvp_match_data { + const struct rkcif_input_fmt *in_fmts; + unsigned int in_fmts_num; + const struct rkcif_output_fmt *out_fmts; + unsigned int out_fmts_num; + void (*setup)(struct rkcif_device *rkcif); + bool has_scaler; + bool has_ids; + unsigned int regs[RKCIF_DVP_REGISTER_MAX]; +}; + struct rkcif_match_data { const char *const *clks; unsigned int clks_num; + const struct rkcif_dvp_match_data *dvp; }; struct rkcif_device { diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c index 49e53f70715c..207802073fd3 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -23,6 +23,7 @@ #include #include +#include "rkcif-capture-dvp.h" #include "rkcif-common.h" static const char *const px30_vip_clks[] = { @@ -34,6 +35,7 @@ static const char *const px30_vip_clks[] = { static const struct rkcif_match_data px30_vip_match_data = { .clks = px30_vip_clks, .clks_num = ARRAY_SIZE(px30_vip_clks), + .dvp = &rkcif_px30_vip_dvp_match_data, }; static const char *const rk3568_vicap_clks[] = { @@ -63,11 +65,21 @@ MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); static int rkcif_register(struct rkcif_device *rkcif) { + int ret; + + ret = rkcif_dvp_register(rkcif); + if (ret && ret != -ENODEV) + goto err; + return 0; + +err: + return ret; } static void rkcif_unregister(struct rkcif_device *rkcif) { + rkcif_dvp_unregister(rkcif); } static int rkcif_notifier_bound(struct v4l2_async_notifier *notifier, @@ -112,6 +124,9 @@ static irqreturn_t rkcif_isr(int irq, void *ctx) { irqreturn_t ret = IRQ_NONE; + if (rkcif_dvp_isr(irq, ctx) == IRQ_HANDLED) + ret = IRQ_HANDLED; + return ret; } diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-regs.h b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h new file mode 100644 index 000000000000..91d42d31fd10 --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2023 Mehdi Djait + * Copyright (C) 2025 Michael Riesch + */ + +#ifndef _RKCIF_REGS_H +#define _RKCIF_REGS_H + +#define RKCIF_REGISTER_NOTSUPPORTED 0x420000 +#define RKCIF_FETCH_Y(VAL) ((VAL) & 0x1fff) +#define RKCIF_XY_COORD(x, y) (((y) << 16) | (x)) + +/* DVP register contents */ +#define RKCIF_CTRL_ENABLE_CAPTURE BIT(0) +#define RKCIF_CTRL_MODE_PINGPONG BIT(1) +#define RKCIF_CTRL_MODE_LINELOOP BIT(2) +#define RKCIF_CTRL_AXI_BURST_16 (0xf << 12) + +#define RKCIF_INTEN_FRAME_END_EN BIT(0) +#define RKCIF_INTEN_LINE_ERR_EN BIT(2) +#define RKCIF_INTEN_BUS_ERR_EN BIT(6) +#define RKCIF_INTEN_SCL_ERR_EN BIT(7) +#define RKCIF_INTEN_PST_INF_FRAME_END_EN BIT(9) + +#define RKCIF_INTSTAT_CLS 0x3ff +#define RKCIF_INTSTAT_FRAME_END BIT(0) +#define RKCIF_INTSTAT_LINE_END BIT(1) +#define RKCIF_INTSTAT_LINE_ERR BIT(2) +#define RKCIF_INTSTAT_PIX_ERR BIT(3) +#define RKCIF_INTSTAT_DFIFO_OF BIT(5) +#define RKCIF_INTSTAT_BUS_ERR BIT(6) +#define RKCIF_INTSTAT_PRE_INF_FRAME_END BIT(8) +#define RKCIF_INTSTAT_PST_INF_FRAME_END BIT(9) +#define RKCIF_INTSTAT_FRAME_END_CLR BIT(0) +#define RKCIF_INTSTAT_LINE_END_CLR BIT(1) +#define RKCIF_INTSTAT_LINE_ERR_CLR BIT(2) +#define RKCIF_INTSTAT_PST_INF_FRAME_END_CLR BIT(9) +#define RKCIF_INTSTAT_ERR 0xfc + +#define RKCIF_FRAME_STAT_CLS 0x00 +#define RKCIF_FRAME_FRM0_STAT_CLS 0x20 + +#define RKCIF_FORMAT_VSY_HIGH_ACTIVE BIT(0) +#define RKCIF_FORMAT_HSY_LOW_ACTIVE BIT(1) + +#define RKCIF_FORMAT_INPUT_MODE_YUV (0x00 << 2) +#define RKCIF_FORMAT_INPUT_MODE_PAL (0x02 << 2) +#define RKCIF_FORMAT_INPUT_MODE_NTSC (0x03 << 2) +#define RKCIF_FORMAT_INPUT_MODE_BT1120 (0x07 << 2) +#define RKCIF_FORMAT_INPUT_MODE_RAW (0x04 << 2) +#define RKCIF_FORMAT_INPUT_MODE_JPEG (0x05 << 2) +#define RKCIF_FORMAT_INPUT_MODE_MIPI (0x06 << 2) + +#define RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY (0x00 << 5) +#define RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU (0x01 << 5) +#define RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY (0x02 << 5) +#define RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV (0x03 << 5) +#define RKCIF_FORMAT_YUV_INPUT_422 (0x00 << 7) +#define RKCIF_FORMAT_YUV_INPUT_420 BIT(7) + +#define RKCIF_FORMAT_INPUT_420_ORDER_ODD BIT(8) + +#define RKCIF_FORMAT_CCIR_INPUT_ORDER_EVEN BIT(9) + +#define RKCIF_FORMAT_RAW_DATA_WIDTH_8 (0x00 << 11) +#define RKCIF_FORMAT_RAW_DATA_WIDTH_10 (0x01 << 11) +#define RKCIF_FORMAT_RAW_DATA_WIDTH_12 (0x02 << 11) + +#define RKCIF_FORMAT_YUV_OUTPUT_422 (0x00 << 16) +#define RKCIF_FORMAT_YUV_OUTPUT_420 BIT(16) + +#define RKCIF_FORMAT_OUTPUT_420_ORDER_EVEN (0x00 << 17) +#define RKCIF_FORMAT_OUTPUT_420_ORDER_ODD BIT(17) + +#define RKCIF_FORMAT_RAWD_DATA_LITTLE_ENDIAN (0x00 << 18) +#define RKCIF_FORMAT_RAWD_DATA_BIG_ENDIAN BIT(18) + +#define RKCIF_FORMAT_UV_STORAGE_ORDER_UVUV (0x00 << 19) +#define RKCIF_FORMAT_UV_STORAGE_ORDER_VUVU BIT(19) + +#define RKCIF_FORMAT_BT1120_CLOCK_SINGLE_EDGES (0x00 << 24) +#define RKCIF_FORMAT_BT1120_CLOCK_DOUBLE_EDGES BIT(24) +#define RKCIF_FORMAT_BT1120_TRANSMIT_INTERFACE (0x00 << 25) +#define RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS BIT(25) +#define RKCIF_FORMAT_BT1120_YC_SWAP BIT(26) + +#define RKCIF_SCL_CTRL_ENABLE_SCL_DOWN BIT(0) +#define RKCIF_SCL_CTRL_ENABLE_SCL_UP BIT(1) +#define RKCIF_SCL_CTRL_ENABLE_YUV_16BIT_BYPASS BIT(4) +#define RKCIF_SCL_CTRL_ENABLE_RAW_16BIT_BYPASS BIT(5) +#define RKCIF_SCL_CTRL_ENABLE_32BIT_BYPASS BIT(6) +#define RKCIF_SCL_CTRL_DISABLE_32BIT_BYPASS (0x00 << 6) + +#define RKCIF_INTSTAT_F0_READY BIT(0) +#define RKCIF_INTSTAT_F1_READY BIT(1) + +/* GRF register offsets and contents */ +#define RK3568_GRF_VI_CON0 0x340 +#define RK3568_GRF_VI_CON1 0x344 +#define RK3568_GRF_VI_STATUS0 0x348 + +#define RK3568_GRF_VI_CON1_CIF_DATAPATH BIT(9) +#define RK3568_GRF_VI_CON1_CIF_CLK_DELAYNUM GENMASK(6, 0) + +#define RK3568_GRF_WRITE_ENABLE(x) ((x) << 16) + +enum rkcif_dvp_register_index { + RKCIF_DVP_CTRL, + RKCIF_DVP_INTEN, + RKCIF_DVP_INTSTAT, + RKCIF_DVP_FOR, + RKCIF_DVP_LINE_NUM_ADDR, + RKCIF_DVP_FRM0_ADDR_Y, + RKCIF_DVP_FRM0_ADDR_UV, + RKCIF_DVP_FRM1_ADDR_Y, + RKCIF_DVP_FRM1_ADDR_UV, + RKCIF_DVP_VIR_LINE_WIDTH, + RKCIF_DVP_SET_SIZE, + RKCIF_DVP_SCL_CTRL, + RKCIF_DVP_CROP, + RKCIF_DVP_FRAME_STATUS, + RKCIF_DVP_LAST_LINE, + RKCIF_DVP_LAST_PIX, + RKCIF_DVP_REGISTER_MAX +}; + +#endif From c348d671697b556d2198c7d2e49e95390dc33e66 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:20 +0100 Subject: [PATCH 248/249] media: rockchip: rkcif: add support for rk3568 vicap dvp capture The RK3568 Video Capture (VICAP) unit features a Digital Video Port (DVP). Add support for it. Tested-by: Gerald Loacker Reviewed-by: Gerald Loacker Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../rockchip/rkcif/rkcif-capture-dvp.c | 276 ++++++++++++++++++ .../rockchip/rkcif/rkcif-capture-dvp.h | 1 + .../media/platform/rockchip/rkcif/rkcif-dev.c | 1 + 3 files changed, 278 insertions(+) diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c index b40135035ab8..dbaf7636aeeb 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.c @@ -332,6 +332,282 @@ const struct rkcif_dvp_match_data rkcif_px30_vip_dvp_match_data = { }, }; +static const struct rkcif_input_fmt rk3568_dvp_in_fmts[] = { + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_UYVY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_VYUY, + .fmt_type = RKCIF_FMT_TYPE_YUV, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | + RKCIF_FORMAT_INPUT_MODE_BT1120 | + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | + RKCIF_FORMAT_INPUT_MODE_BT1120, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | + RKCIF_FORMAT_INPUT_MODE_BT1120 | + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | + RKCIF_FORMAT_INPUT_MODE_BT1120, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | + RKCIF_FORMAT_INPUT_MODE_BT1120 | + RKCIF_FORMAT_BT1120_YC_SWAP | + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YUYV | + RKCIF_FORMAT_BT1120_YC_SWAP | + RKCIF_FORMAT_INPUT_MODE_BT1120, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | + RKCIF_FORMAT_INPUT_MODE_BT1120 | + RKCIF_FORMAT_BT1120_YC_SWAP | + RKCIF_FORMAT_BT1120_TRANSMIT_PROGRESS, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, + .dvp_fmt_val = RKCIF_FORMAT_YUV_INPUT_422 | + RKCIF_FORMAT_YUV_INPUT_ORDER_YVYU | + RKCIF_FORMAT_BT1120_YC_SWAP | + RKCIF_FORMAT_INPUT_MODE_BT1120, + .field = V4L2_FIELD_INTERLACED, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_RGB888_1X24, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y8_1X8, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_8, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y10_1X10, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_10, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, + { + .mbus_code = MEDIA_BUS_FMT_Y12_1X12, + .dvp_fmt_val = RKCIF_FORMAT_INPUT_MODE_RAW | + RKCIF_FORMAT_RAW_DATA_WIDTH_12, + .fmt_type = RKCIF_FMT_TYPE_RAW, + .field = V4L2_FIELD_NONE, + }, +}; + +static void rk3568_dvp_grf_setup(struct rkcif_device *rkcif) +{ + u32 con1 = RK3568_GRF_WRITE_ENABLE(RK3568_GRF_VI_CON1_CIF_DATAPATH | + RK3568_GRF_VI_CON1_CIF_CLK_DELAYNUM); + + if (!rkcif->grf) + return; + + con1 |= rkcif->interfaces[RKCIF_DVP].dvp.dvp_clk_delay & + RK3568_GRF_VI_CON1_CIF_CLK_DELAYNUM; + + if (rkcif->interfaces[RKCIF_DVP].vep.bus.parallel.flags & + V4L2_MBUS_PCLK_SAMPLE_DUALEDGE) + con1 |= RK3568_GRF_VI_CON1_CIF_DATAPATH; + + regmap_write(rkcif->grf, RK3568_GRF_VI_CON1, con1); +} + +const struct rkcif_dvp_match_data rkcif_rk3568_vicap_dvp_match_data = { + .in_fmts = rk3568_dvp_in_fmts, + .in_fmts_num = ARRAY_SIZE(rk3568_dvp_in_fmts), + .out_fmts = dvp_out_fmts, + .out_fmts_num = ARRAY_SIZE(dvp_out_fmts), + .setup = rk3568_dvp_grf_setup, + .has_scaler = false, + .regs = { + [RKCIF_DVP_CTRL] = 0x00, + [RKCIF_DVP_INTEN] = 0x04, + [RKCIF_DVP_INTSTAT] = 0x08, + [RKCIF_DVP_FOR] = 0x0c, + [RKCIF_DVP_LINE_NUM_ADDR] = 0x2c, + [RKCIF_DVP_FRM0_ADDR_Y] = 0x14, + [RKCIF_DVP_FRM0_ADDR_UV] = 0x18, + [RKCIF_DVP_FRM1_ADDR_Y] = 0x1c, + [RKCIF_DVP_FRM1_ADDR_UV] = 0x20, + [RKCIF_DVP_VIR_LINE_WIDTH] = 0x24, + [RKCIF_DVP_SET_SIZE] = 0x28, + [RKCIF_DVP_CROP] = 0x34, + [RKCIF_DVP_FRAME_STATUS] = 0x3c, + [RKCIF_DVP_LAST_LINE] = 0x44, + [RKCIF_DVP_LAST_PIX] = 0x48, + }, +}; + static inline unsigned int rkcif_dvp_get_addr(struct rkcif_device *rkcif, unsigned int index) { diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h index 7b2da11497c3..a4ed37833bd6 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-dvp.h @@ -14,6 +14,7 @@ #include "rkcif-common.h" extern const struct rkcif_dvp_match_data rkcif_px30_vip_dvp_match_data; +extern const struct rkcif_dvp_match_data rkcif_rk3568_vicap_dvp_match_data; int rkcif_dvp_register(struct rkcif_device *rkcif); diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c index 207802073fd3..addc118ff8bf 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -48,6 +48,7 @@ static const char *const rk3568_vicap_clks[] = { static const struct rkcif_match_data rk3568_vicap_match_data = { .clks = rk3568_vicap_clks, .clks_num = ARRAY_SIZE(rk3568_vicap_clks), + .dvp = &rkcif_rk3568_vicap_dvp_match_data, }; static const struct of_device_id rkcif_plat_of_match[] = { From 1f2353f5a1af995efbf7bea44341aa0d03460b28 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Fri, 14 Nov 2025 16:20:21 +0100 Subject: [PATCH 249/249] media: rockchip: rkcif: add support for rk3568 vicap mipi capture The RK3568 Video Capture (VICAP) unit features a MIPI CSI-2 capture interface. Add support for the MIPI capture interface in general and for the RK3568 VICAP MIPI capture in particular. Signed-off-by: Michael Riesch Reviewed-by: Bryan O'Donoghue Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch Signed-off-by: Sakari Ailus Signed-off-by: Hans Verkuil --- .../media/platform/rockchip/rkcif/Makefile | 1 + .../rockchip/rkcif/rkcif-capture-mipi.c | 777 ++++++++++++++++++ .../rockchip/rkcif/rkcif-capture-mipi.h | 23 + .../platform/rockchip/rkcif/rkcif-common.h | 29 + .../media/platform/rockchip/rkcif/rkcif-dev.c | 12 + .../platform/rockchip/rkcif/rkcif-regs.h | 22 + 6 files changed, 864 insertions(+) create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c create mode 100644 drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h diff --git a/drivers/media/platform/rockchip/rkcif/Makefile b/drivers/media/platform/rockchip/rkcif/Makefile index a36e294d569d..dca2bf45159f 100644 --- a/drivers/media/platform/rockchip/rkcif/Makefile +++ b/drivers/media/platform/rockchip/rkcif/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_VIDEO_ROCKCHIP_CIF) += rockchip-cif.o rockchip-cif-objs += rkcif-capture-dvp.o +rockchip-cif-objs += rkcif-capture-mipi.o rockchip-cif-objs += rkcif-dev.o rockchip-cif-objs += rkcif-interface.o rockchip-cif-objs += rkcif-stream.o diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c new file mode 100644 index 000000000000..1b81bcc067ef --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c @@ -0,0 +1,777 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "rkcif-capture-mipi.h" +#include "rkcif-common.h" +#include "rkcif-interface.h" +#include "rkcif-regs.h" +#include "rkcif-stream.h" + +#define RK3568_MIPI_CTRL0_HIGH_ALIGN BIT(31) +#define RK3568_MIPI_CTRL0_UV_SWAP_EN BIT(7) +#define RK3568_MIPI_CTRL0_COMPACT_EN BIT(6) +#define RK3568_MIPI_CTRL0_CROP_EN BIT(5) +#define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1) + +#define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10) +#define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8) +#define RKCIF_MIPI_CTRL0_CAP_EN BIT(0) + +#define RKCIF_MIPI_INT_FRAME0_END(id) BIT(8 + (id) * 2 + 0) +#define RKCIF_MIPI_INT_FRAME1_END(id) BIT(8 + (id) * 2 + 1) + +static const struct rkcif_output_fmt mipi_out_fmts[] = { + /* YUV formats */ + { + .fourcc = V4L2_PIX_FMT_YUYV, + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, + .depth = 16, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_YUV422_8B, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_UYVY, + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, + .depth = 16, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_YUV422_8B, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_YVYU, + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, + .depth = 16, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_YUV422_8B, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_VYUY, + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, + .depth = 16, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_YUV422_8B, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + /* RGB formats */ + { + .fourcc = V4L2_PIX_FMT_RGB24, + .mbus_code = MEDIA_BUS_FMT_RGB888_1X24, + .depth = 24, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RGB888, + .type = RKCIF_MIPI_TYPE_RGB888, + }, + }, + { + .fourcc = V4L2_PIX_FMT_BGR24, + .mbus_code = MEDIA_BUS_FMT_BGR888_1X24, + .depth = 24, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RGB888, + .type = RKCIF_MIPI_TYPE_RGB888, + }, + }, + /* Bayer formats */ + { + .fourcc = V4L2_PIX_FMT_SBGGR8, + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, + .depth = 8, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW8, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG8, + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, + .depth = 8, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW8, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG8, + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, + .depth = 8, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW8, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB8, + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, + .depth = 8, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW8, + .type = RKCIF_MIPI_TYPE_RAW8, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR10, + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR10P, + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG10, + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG10P, + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG10, + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG10P, + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB10, + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB10P, + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + .depth = 10, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW10, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW10, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR12, + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SBGGR12P, + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG12, + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGBRG12P, + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG12, + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SGRBG12P, + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB12, + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, + { + .fourcc = V4L2_PIX_FMT_SRGGB12P, + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + .depth = 12, + .cplanes = 1, + .mipi = { + .dt = MIPI_CSI2_DT_RAW12, + .compact = true, + .type = RKCIF_MIPI_TYPE_RAW12, + }, + }, +}; + +static const struct rkcif_input_fmt mipi_in_fmts[] = { + /* YUV formats */ + { + .mbus_code = MEDIA_BUS_FMT_YUYV8_1X16, + }, + { + .mbus_code = MEDIA_BUS_FMT_UYVY8_1X16, + }, + { + .mbus_code = MEDIA_BUS_FMT_YVYU8_1X16, + }, + { + .mbus_code = MEDIA_BUS_FMT_VYUY8_1X16, + }, + /* RGB formats */ + { + .mbus_code = MEDIA_BUS_FMT_RGB888_1X24, + }, + { + .mbus_code = MEDIA_BUS_FMT_BGR888_1X24, + }, + /* Bayer formats */ + { + .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR10_1X10, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG10_1X10, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG10_1X10, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB10_1X10, + }, + { + .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGBRG12_1X12, + }, + { + .mbus_code = MEDIA_BUS_FMT_SGRBG12_1X12, + }, + { + .mbus_code = MEDIA_BUS_FMT_SRGGB12_1X12, + }, +}; + +static u32 +rkcif_rk3568_mipi_ctrl0(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt) +{ + u32 ctrl0 = 0; + + ctrl0 |= RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); + ctrl0 |= RKCIF_MIPI_CTRL0_CAP_EN; + ctrl0 |= RK3568_MIPI_CTRL0_CROP_EN; + + if (active_out_fmt->mipi.compact) + ctrl0 |= RK3568_MIPI_CTRL0_COMPACT_EN; + + switch (active_out_fmt->mipi.type) { + case RKCIF_MIPI_TYPE_RAW8: + break; + case RKCIF_MIPI_TYPE_RAW10: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RAW12: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x2); + break; + case RKCIF_MIPI_TYPE_RGB888: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x3); + break; + case RKCIF_MIPI_TYPE_YUV422SP: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x4); + break; + case RKCIF_MIPI_TYPE_YUV420SP: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x5); + break; + case RKCIF_MIPI_TYPE_YUV400: + ctrl0 |= RK3568_MIPI_CTRL0_WRDDR(0x6); + break; + default: + break; + } + + return ctrl0; +} + +const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data = { + .mipi_num = 1, + .mipi_ctrl0 = rkcif_rk3568_mipi_ctrl0, + .regs = { + [RKCIF_MIPI_CTRL] = 0x20, + [RKCIF_MIPI_INTEN] = 0xa4, + [RKCIF_MIPI_INTSTAT] = 0xa8, + }, + .regs_id = { + [RKCIF_ID0] = { + [RKCIF_MIPI_CTRL0] = 0x00, + [RKCIF_MIPI_CTRL1] = 0x04, + [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x24, + [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x2c, + [RKCIF_MIPI_FRAME0_VLW_Y] = 0x34, + [RKCIF_MIPI_FRAME0_VLW_UV] = 0x3c, + [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x28, + [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x30, + [RKCIF_MIPI_FRAME1_VLW_Y] = 0x38, + [RKCIF_MIPI_FRAME1_VLW_UV] = 0x40, + [RKCIF_MIPI_CROP_START] = 0xbc, + }, + [RKCIF_ID1] = { + [RKCIF_MIPI_CTRL0] = 0x08, + [RKCIF_MIPI_CTRL1] = 0x0c, + [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x44, + [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x4c, + [RKCIF_MIPI_FRAME0_VLW_Y] = 0x54, + [RKCIF_MIPI_FRAME0_VLW_UV] = 0x5c, + [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x48, + [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x50, + [RKCIF_MIPI_FRAME1_VLW_Y] = 0x58, + [RKCIF_MIPI_FRAME1_VLW_UV] = 0x60, + [RKCIF_MIPI_CROP_START] = 0xc0, + }, + [RKCIF_ID2] = { + [RKCIF_MIPI_CTRL0] = 0x10, + [RKCIF_MIPI_CTRL1] = 0x14, + [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x64, + [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x6c, + [RKCIF_MIPI_FRAME0_VLW_Y] = 0x74, + [RKCIF_MIPI_FRAME0_VLW_UV] = 0x7c, + [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x68, + [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x70, + [RKCIF_MIPI_FRAME1_VLW_Y] = 0x78, + [RKCIF_MIPI_FRAME1_VLW_UV] = 0x80, + [RKCIF_MIPI_CROP_START] = 0xc4, + }, + [RKCIF_ID3] = { + [RKCIF_MIPI_CTRL0] = 0x18, + [RKCIF_MIPI_CTRL1] = 0x1c, + [RKCIF_MIPI_FRAME0_ADDR_Y] = 0x84, + [RKCIF_MIPI_FRAME0_ADDR_UV] = 0x8c, + [RKCIF_MIPI_FRAME0_VLW_Y] = 0x94, + [RKCIF_MIPI_FRAME0_VLW_UV] = 0x9c, + [RKCIF_MIPI_FRAME1_ADDR_Y] = 0x88, + [RKCIF_MIPI_FRAME1_ADDR_UV] = 0x90, + [RKCIF_MIPI_FRAME1_VLW_Y] = 0x98, + [RKCIF_MIPI_FRAME1_VLW_UV] = 0xa0, + [RKCIF_MIPI_CROP_START] = 0xc8, + }, + }, + .blocks = { + { + .offset = 0x80, + }, + }, +}; + +static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *interface, + unsigned int index) +{ + struct rkcif_device *rkcif = interface->rkcif; + unsigned int block, offset, reg; + + block = interface->index - RKCIF_MIPI_BASE; + + if (WARN_ON_ONCE(block > RKCIF_MIPI_MAX - RKCIF_MIPI_BASE) || + WARN_ON_ONCE(index > RKCIF_MIPI_REGISTER_MAX)) + return RKCIF_REGISTER_NOTSUPPORTED; + + offset = rkcif->match_data->mipi->blocks[block].offset; + reg = rkcif->match_data->mipi->regs[index]; + if (reg == RKCIF_REGISTER_NOTSUPPORTED) + return reg; + + return offset + reg; +} + +static inline unsigned int rkcif_mipi_id_get_reg(struct rkcif_stream *stream, + unsigned int index) +{ + struct rkcif_device *rkcif = stream->rkcif; + unsigned int block, id, offset, reg; + + block = stream->interface->index - RKCIF_MIPI_BASE; + id = stream->id; + + if (WARN_ON_ONCE(block > RKCIF_MIPI_MAX - RKCIF_MIPI_BASE) || + WARN_ON_ONCE(id > RKCIF_ID_MAX) || + WARN_ON_ONCE(index > RKCIF_MIPI_ID_REGISTER_MAX)) + return RKCIF_REGISTER_NOTSUPPORTED; + + offset = rkcif->match_data->mipi->blocks[block].offset; + reg = rkcif->match_data->mipi->regs_id[id][index]; + if (reg == RKCIF_REGISTER_NOTSUPPORTED) + return reg; + + return offset + reg; +} + +static inline __maybe_unused void +rkcif_mipi_write(struct rkcif_interface *interface, unsigned int index, u32 val) +{ + unsigned int addr = rkcif_mipi_get_reg(interface, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return; + + writel(val, interface->rkcif->base_addr + addr); +} + +static inline __maybe_unused void +rkcif_mipi_stream_write(struct rkcif_stream *stream, unsigned int index, + u32 val) +{ + unsigned int addr = rkcif_mipi_id_get_reg(stream, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return; + + writel(val, stream->rkcif->base_addr + addr); +} + +static inline __maybe_unused u32 +rkcif_mipi_read(struct rkcif_interface *interface, unsigned int index) +{ + unsigned int addr = rkcif_mipi_get_reg(interface, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return 0; + + return readl(interface->rkcif->base_addr + addr); +} + +static inline __maybe_unused u32 +rkcif_mipi_stream_read(struct rkcif_stream *stream, unsigned int index) +{ + unsigned int addr = rkcif_mipi_id_get_reg(stream, index); + + if (addr == RKCIF_REGISTER_NOTSUPPORTED) + return 0; + + return readl(stream->rkcif->base_addr + addr); +} + +static void rkcif_mipi_queue_buffer(struct rkcif_stream *stream, + unsigned int index) +{ + struct rkcif_buffer *buffer = stream->buffers[index]; + u32 frm_addr_y, frm_addr_uv; + + frm_addr_y = index ? RKCIF_MIPI_FRAME1_ADDR_Y : + RKCIF_MIPI_FRAME0_ADDR_Y; + frm_addr_uv = index ? RKCIF_MIPI_FRAME1_ADDR_UV : + RKCIF_MIPI_FRAME0_ADDR_UV; + + rkcif_mipi_stream_write(stream, frm_addr_y, + buffer->buff_addr[RKCIF_PLANE_Y]); + rkcif_mipi_stream_write(stream, frm_addr_uv, + buffer->buff_addr[RKCIF_PLANE_UV]); +} + +static int rkcif_mipi_start_streaming(struct rkcif_stream *stream) +{ + struct rkcif_interface *interface = stream->interface; + const struct rkcif_output_fmt *active_out_fmt; + const struct rkcif_mipi_match_data *match_data; + struct v4l2_subdev_state *state; + u32 ctrl0 = 0, ctrl1 = 0, int_temp = 0, int_mask = 0, vlw = 0; + u16 height, width; + int ret = -EINVAL; + + state = v4l2_subdev_lock_and_get_active_state(&interface->sd); + + active_out_fmt = rkcif_stream_find_output_fmt(stream, false, + stream->pix.pixelformat); + if (!active_out_fmt) + goto out; + + height = stream->pix.height; + width = stream->pix.width; + vlw = stream->pix.plane_fmt[0].bytesperline; + + match_data = stream->rkcif->match_data->mipi; + if (match_data->mipi_ctrl0) + ctrl0 = match_data->mipi_ctrl0(stream, active_out_fmt); + + ctrl1 = RKCIF_XY_COORD(width, height); + + int_mask |= RKCIF_MIPI_INT_FRAME0_END(stream->id); + int_mask |= RKCIF_MIPI_INT_FRAME1_END(stream->id); + + int_temp = rkcif_mipi_read(interface, RKCIF_MIPI_INTEN); + int_temp |= int_mask; + rkcif_mipi_write(interface, RKCIF_MIPI_INTEN, int_temp); + + int_temp = rkcif_mipi_read(interface, RKCIF_MIPI_INTSTAT); + int_temp &= ~int_mask; + rkcif_mipi_write(interface, RKCIF_MIPI_INTSTAT, int_temp); + + rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME0_VLW_Y, vlw); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME1_VLW_Y, vlw); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME0_VLW_UV, vlw); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_FRAME1_VLW_UV, vlw); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_CROP_START, 0x0); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0); + + ret = 0; + +out: + v4l2_subdev_unlock_state(state); + return ret; +} + +static void rkcif_mipi_stop_streaming(struct rkcif_stream *stream) +{ + struct rkcif_interface *interface = stream->interface; + struct v4l2_subdev_state *state; + u32 int_temp = 0, int_mask = 0; + + state = v4l2_subdev_lock_and_get_active_state(&interface->sd); + + rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, 0); + + int_mask |= RKCIF_MIPI_INT_FRAME0_END(stream->id); + int_mask |= RKCIF_MIPI_INT_FRAME1_END(stream->id); + + int_temp = rkcif_mipi_read(interface, RKCIF_MIPI_INTEN); + int_temp &= ~int_mask; + rkcif_mipi_write(interface, RKCIF_MIPI_INTEN, int_temp); + + int_temp = rkcif_mipi_read(interface, RKCIF_MIPI_INTSTAT); + int_temp &= ~int_mask; + rkcif_mipi_write(interface, RKCIF_MIPI_INTSTAT, int_temp); + + stream->stopping = false; + + v4l2_subdev_unlock_state(state); +} + +static void rkcif_mipi_set_crop(struct rkcif_stream *stream, u16 left, u16 top) +{ + u32 val; + + val = RKCIF_XY_COORD(left, top); + rkcif_mipi_stream_write(stream, RKCIF_MIPI_CROP_START, val); +} + +irqreturn_t rkcif_mipi_isr(int irq, void *ctx) +{ + struct device *dev = ctx; + struct rkcif_device *rkcif = dev_get_drvdata(dev); + irqreturn_t ret = IRQ_NONE; + u32 intstat; + + for (unsigned int i = 0; i < rkcif->match_data->mipi->mipi_num; i++) { + enum rkcif_interface_index index = RKCIF_MIPI_BASE + i; + struct rkcif_interface *interface = &rkcif->interfaces[index]; + + intstat = rkcif_mipi_read(interface, RKCIF_MIPI_INTSTAT); + rkcif_mipi_write(interface, RKCIF_MIPI_INTSTAT, intstat); + + for (unsigned int j = 0; j < interface->streams_num; j++) { + struct rkcif_stream *stream = &interface->streams[j]; + + if (intstat & RKCIF_MIPI_INT_FRAME0_END(stream->id) || + intstat & RKCIF_MIPI_INT_FRAME1_END(stream->id)) { + ret = IRQ_HANDLED; + + if (stream->stopping) { + rkcif_mipi_stop_streaming(stream); + wake_up(&stream->wq_stopped); + continue; + } + + rkcif_stream_pingpong(stream); + } + } + } + + return ret; +} + +int rkcif_mipi_register(struct rkcif_device *rkcif) +{ + int ret; + + if (!rkcif->match_data->mipi) + return 0; + + for (unsigned int i = 0; i < rkcif->match_data->mipi->mipi_num; i++) { + enum rkcif_interface_index index = RKCIF_MIPI_BASE + i; + struct rkcif_interface *interface = &rkcif->interfaces[index]; + + interface->index = index; + interface->type = RKCIF_IF_MIPI; + interface->in_fmts = mipi_in_fmts; + interface->in_fmts_num = ARRAY_SIZE(mipi_in_fmts); + interface->set_crop = rkcif_mipi_set_crop; + interface->streams_num = 0; + ret = rkcif_interface_register(rkcif, interface); + if (ret) + continue; + + for (unsigned int j = 0; j < RKCIF_ID_MAX; j++) { + struct rkcif_stream *stream = &interface->streams[j]; + + stream->id = j; + stream->interface = interface; + stream->out_fmts = mipi_out_fmts; + stream->out_fmts_num = ARRAY_SIZE(mipi_out_fmts); + stream->queue_buffer = rkcif_mipi_queue_buffer; + stream->start_streaming = rkcif_mipi_start_streaming; + stream->stop_streaming = rkcif_mipi_stop_streaming; + ret = rkcif_stream_register(rkcif, stream); + if (ret) + goto err; + interface->streams_num++; + } + } + + return 0; + +err: + for (unsigned int i = 0; i < rkcif->match_data->mipi->mipi_num; i++) { + enum rkcif_interface_index index = RKCIF_MIPI_BASE + i; + struct rkcif_interface *interface = &rkcif->interfaces[index]; + + for (unsigned int j = 0; j < interface->streams_num; j++) + rkcif_stream_unregister(&interface->streams[j]); + + rkcif_interface_unregister(interface); + } + return ret; +} + +void rkcif_mipi_unregister(struct rkcif_device *rkcif) +{ + if (!rkcif->match_data->mipi) + return; + + for (unsigned int i = 0; i < rkcif->match_data->mipi->mipi_num; i++) { + enum rkcif_interface_index index = RKCIF_MIPI_BASE + i; + struct rkcif_interface *interface = &rkcif->interfaces[index]; + + for (unsigned int j = 0; j < interface->streams_num; j++) + rkcif_stream_unregister(&interface->streams[j]); + + rkcif_interface_unregister(interface); + } +} diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h new file mode 100644 index 000000000000..7f16eadc474c --- /dev/null +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Rockchip Camera Interface (CIF) Driver + * + * Copyright (C) 2018 Rockchip Electronics Co., Ltd. + * Copyright (C) 2025 Michael Riesch + * Copyright (C) 2025 Collabora, Ltd. + */ + +#ifndef _RKCIF_CAPTURE_MIPI_H +#define _RKCIF_CAPTURE_MIPI_H + +#include "rkcif-common.h" + +extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_data; + +int rkcif_mipi_register(struct rkcif_device *rkcif); + +void rkcif_mipi_unregister(struct rkcif_device *rkcif); + +irqreturn_t rkcif_mipi_isr(int irq, void *ctx); + +#endif diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers/media/platform/rockchip/rkcif/rkcif-common.h index c6ec578e1049..dd92cfbc879f 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -73,6 +73,17 @@ enum rkcif_interface_type { RKCIF_IF_MIPI, }; +enum rkcif_mipi_format_type { + RKCIF_MIPI_TYPE_INVALID, + RKCIF_MIPI_TYPE_RAW8, + RKCIF_MIPI_TYPE_RAW10, + RKCIF_MIPI_TYPE_RAW12, + RKCIF_MIPI_TYPE_RGB888, + RKCIF_MIPI_TYPE_YUV422SP, + RKCIF_MIPI_TYPE_YUV420SP, + RKCIF_MIPI_TYPE_YUV400, +}; + struct rkcif_buffer { struct vb2_v4l2_buffer vb; struct list_head queue; @@ -107,9 +118,15 @@ struct rkcif_output_fmt { u32 fourcc; u32 mbus_code; u8 cplanes; + u8 depth; union { u32 dvp_fmt_val; + struct { + u8 dt; + bool compact; + enum rkcif_mipi_format_type type; + } mipi; }; }; @@ -184,6 +201,17 @@ struct rkcif_interface { void (*set_crop)(struct rkcif_stream *stream, u16 left, u16 top); }; +struct rkcif_mipi_match_data { + unsigned int mipi_num; + unsigned int regs[RKCIF_MIPI_REGISTER_MAX]; + unsigned int regs_id[RKCIF_ID_MAX][RKCIF_MIPI_ID_REGISTER_MAX]; + u32 (*mipi_ctrl0)(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt); + struct { + unsigned int offset; + } blocks[RKCIF_MIPI_MAX - RKCIF_MIPI_BASE]; +}; + struct rkcif_dvp_match_data { const struct rkcif_input_fmt *in_fmts; unsigned int in_fmts_num; @@ -199,6 +227,7 @@ struct rkcif_match_data { const char *const *clks; unsigned int clks_num; const struct rkcif_dvp_match_data *dvp; + const struct rkcif_mipi_match_data *mipi; }; struct rkcif_device { diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c index addc118ff8bf..b4cf1146f131 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -24,6 +24,7 @@ #include #include "rkcif-capture-dvp.h" +#include "rkcif-capture-mipi.h" #include "rkcif-common.h" static const char *const px30_vip_clks[] = { @@ -49,6 +50,7 @@ static const struct rkcif_match_data rk3568_vicap_match_data = { .clks = rk3568_vicap_clks, .clks_num = ARRAY_SIZE(rk3568_vicap_clks), .dvp = &rkcif_rk3568_vicap_dvp_match_data, + .mipi = &rkcif_rk3568_vicap_mipi_match_data, }; static const struct of_device_id rkcif_plat_of_match[] = { @@ -72,14 +74,21 @@ static int rkcif_register(struct rkcif_device *rkcif) if (ret && ret != -ENODEV) goto err; + ret = rkcif_mipi_register(rkcif); + if (ret && ret != -ENODEV) + goto err_dvp_unregister; + return 0; +err_dvp_unregister: + rkcif_dvp_unregister(rkcif); err: return ret; } static void rkcif_unregister(struct rkcif_device *rkcif) { + rkcif_mipi_unregister(rkcif); rkcif_dvp_unregister(rkcif); } @@ -128,6 +137,9 @@ static irqreturn_t rkcif_isr(int irq, void *ctx) if (rkcif_dvp_isr(irq, ctx) == IRQ_HANDLED) ret = IRQ_HANDLED; + if (rkcif_mipi_isr(irq, ctx) == IRQ_HANDLED) + ret = IRQ_HANDLED; + return ret; } diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-regs.h b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h index 91d42d31fd10..3cf7ee19de30 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-regs.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-regs.h @@ -128,4 +128,26 @@ enum rkcif_dvp_register_index { RKCIF_DVP_REGISTER_MAX }; +enum rkcif_mipi_register_index { + RKCIF_MIPI_CTRL, + RKCIF_MIPI_INTEN, + RKCIF_MIPI_INTSTAT, + RKCIF_MIPI_REGISTER_MAX +}; + +enum rkcif_mipi_id_register_index { + RKCIF_MIPI_CTRL0, + RKCIF_MIPI_CTRL1, + RKCIF_MIPI_FRAME0_ADDR_Y, + RKCIF_MIPI_FRAME0_ADDR_UV, + RKCIF_MIPI_FRAME0_VLW_Y, + RKCIF_MIPI_FRAME0_VLW_UV, + RKCIF_MIPI_FRAME1_ADDR_Y, + RKCIF_MIPI_FRAME1_ADDR_UV, + RKCIF_MIPI_FRAME1_VLW_Y, + RKCIF_MIPI_FRAME1_VLW_UV, + RKCIF_MIPI_CROP_START, + RKCIF_MIPI_ID_REGISTER_MAX +}; + #endif