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KVM: x86/pmu: Expose CPUIDs feature bits PDCM, DS, DTES64 

The CPUID features PDCM, DS and DTES64 are required for PEBS feature.
KVM would expose CPUID feature PDCM, DS and DTES64 to guest when PEBS
is supported in the KVM on the Ice Lake server platforms.

Originally-by: Andi Kleen <ak@linux.intel.com>
Co-developed-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Co-developed-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Like Xu <likexu@tencent.com>
Message-Id: <20220411101946.20262-18-likexu@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Like Xu 2022-04-11 18:19:46 +08:00 committed by Paolo Bonzini
parent 59cc99f6e9
commit cf8e55fe50
2 changed files with 32 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
arch/x86/kvm/vmx/capabilities.h
View File

@ -6,6 +6,7 @@
#include "lapic.h" #include "lapic.h"
#include "x86.h" #include "x86.h"
#include "pmu.h"
extern bool __read_mostly enable_vpid; extern bool __read_mostly enable_vpid;
extern bool __read_mostly flexpriority_enabled; extern bool __read_mostly flexpriority_enabled;
@ -398,23 +399,28 @@ static inline bool vmx_pt_mode_is_host_guest(void)
return pt_mode == PT_MODE_HOST_GUEST; return pt_mode == PT_MODE_HOST_GUEST;
} }
static inline bool vmx_pebs_supported(void)
{
return boot_cpu_has(X86_FEATURE_PEBS) && kvm_pmu_cap.pebs_ept;
}
static inline u64 vmx_get_perf_capabilities(void) static inline u64 vmx_get_perf_capabilities(void)
{ {
u64 perf_cap = 0; u64 perf_cap = PMU_CAP_FW_WRITES;
u64 host_perf_cap = 0;
if (!enable_pmu)
return perf_cap;
if (boot_cpu_has(X86_FEATURE_PDCM)) if (boot_cpu_has(X86_FEATURE_PDCM))
rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_cap); rdmsrl(MSR_IA32_PERF_CAPABILITIES, host_perf_cap);
perf_cap &= PMU_CAP_LBR_FMT; perf_cap |= host_perf_cap & PMU_CAP_LBR_FMT;
/* if (vmx_pebs_supported()) {
* Since counters are virtualized, KVM would support full perf_cap |= host_perf_cap & PERF_CAP_PEBS_MASK;
* width counting unconditionally, even if the host lacks it. if ((perf_cap & PERF_CAP_PEBS_FORMAT) < 4)
*/ perf_cap &= ~PERF_CAP_PEBS_BASELINE;
return PMU_CAP_FW_WRITES | perf_cap; }
return perf_cap;
} }
static inline u64 vmx_supported_debugctl(void) static inline u64 vmx_supported_debugctl(void)

15
arch/x86/kvm/vmx/vmx.c
View File

@ -2245,6 +2245,17 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
if (!cpuid_model_is_consistent(vcpu)) if (!cpuid_model_is_consistent(vcpu))
return 1; return 1;
} }
if (data & PERF_CAP_PEBS_FORMAT) {
if ((data & PERF_CAP_PEBS_MASK) !=
(vmx_get_perf_capabilities() & PERF_CAP_PEBS_MASK))
return 1;
if (!guest_cpuid_has(vcpu, X86_FEATURE_DS))
return 1;
if (!guest_cpuid_has(vcpu, X86_FEATURE_DTES64))
return 1;
if (!cpuid_model_is_consistent(vcpu))
return 1;
}
ret = kvm_set_msr_common(vcpu, msr_info); ret = kvm_set_msr_common(vcpu, msr_info);
break; break;
@ -7517,6 +7528,10 @@ static __init void vmx_set_cpu_caps(void)
kvm_cpu_cap_clear(X86_FEATURE_INVPCID); kvm_cpu_cap_clear(X86_FEATURE_INVPCID);
if (vmx_pt_mode_is_host_guest()) if (vmx_pt_mode_is_host_guest())
kvm_cpu_cap_check_and_set(X86_FEATURE_INTEL_PT); kvm_cpu_cap_check_and_set(X86_FEATURE_INTEL_PT);
if (vmx_pebs_supported()) {
kvm_cpu_cap_check_and_set(X86_FEATURE_DS);
kvm_cpu_cap_check_and_set(X86_FEATURE_DTES64);
}
if (!enable_sgx) { if (!enable_sgx) {
kvm_cpu_cap_clear(X86_FEATURE_SGX); kvm_cpu_cap_clear(X86_FEATURE_SGX);