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dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindings
Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/nuvoton,ma35d1-nand.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton MA35D1 NAND Flash Interface (NFI) Controller
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maintainers:
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- Hui-Ping Chen <hpchen0nvt@gmail.com>
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allOf:
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- $ref: nand-controller.yaml#
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properties:
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compatible:
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enum:
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- nuvoton,ma35d1-nand-controller
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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patternProperties:
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"^nand@[a-f0-9]$":
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type: object
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$ref: raw-nand-chip.yaml
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properties:
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reg:
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minimum: 0
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maximum: 1
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nand-ecc-step-size:
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enum: [512, 1024]
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nand-ecc-strength:
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enum: [8, 12, 24]
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required:
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- reg
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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nand-controller@401A0000 {
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compatible = "nuvoton,ma35d1-nand-controller";
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reg = <0x0 0x401A0000 0x0 0x1000>;
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interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk NAND_GATE>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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nand-on-flash-bbt;
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nand-ecc-step-size = <512>;
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nand-ecc-strength = <8>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot@0 {
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label = "nand-uboot";
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read-only;
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reg = <0x0 0x300000>;
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};
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};
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};
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};
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};
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...
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