mirror of https://github.com/torvalds/linux.git
powerpc: Remove DCR_MMIO and the DCR generic layer
The Cell blade support was the last user of DCR_MMIO, so it can now be removed. That only leaves DCR_NATIVE, meaning the DCR generic layer which allows using either DCR_NATIVE or DCR_MMIO is also unnecessary, remove it too. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20241218105523.416573-7-mpe@ellerman.id.au
This commit is contained in:
Michael Ellerman
Madhavan Srinivasan
parent
41cc49efff
commit
bd4a83428b
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@ -412,12 +412,9 @@ config ARCH_HAS_ADD_PAGES
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config PPC_DCR_NATIVE
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bool
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config PPC_DCR_MMIO
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bool
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config PPC_DCR
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bool
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depends on PPC_DCR_NATIVE || PPC_DCR_MMIO
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depends on PPC_DCR_NATIVE
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default y
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config PPC_PCI_OF_BUS_MAP
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@ -1,36 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*/
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#ifndef _ASM_POWERPC_DCR_GENERIC_H
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#define _ASM_POWERPC_DCR_GENERIC_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID};
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typedef struct {
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enum host_type_t type;
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union {
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dcr_host_mmio_t mmio;
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dcr_host_native_t native;
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} host;
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} dcr_host_t;
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extern bool dcr_map_ok_generic(dcr_host_t host);
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extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n,
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unsigned int dcr_c);
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extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c);
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extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n);
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extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value);
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_DCR_GENERIC_H */
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@ -1,44 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*/
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#ifndef _ASM_POWERPC_DCR_MMIO_H
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#define _ASM_POWERPC_DCR_MMIO_H
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#ifdef __KERNEL__
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#include <asm/io.h>
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typedef struct {
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void __iomem *token;
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unsigned int stride;
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unsigned int base;
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} dcr_host_mmio_t;
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static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host)
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{
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return host.token != NULL;
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}
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extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
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unsigned int dcr_n,
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unsigned int dcr_c);
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extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c);
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static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n)
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{
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return in_be32(host.token + ((host.base + dcr_n) * host.stride));
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}
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static inline void dcr_write_mmio(dcr_host_mmio_t host,
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unsigned int dcr_n,
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u32 value)
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{
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out_be32(host.token + ((host.base + dcr_n) * host.stride), value);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_DCR_MMIO_H */
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@ -10,46 +10,14 @@
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_PPC_DCR
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#ifdef CONFIG_PPC_DCR_NATIVE
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#include <asm/dcr-native.h>
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#endif
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#ifdef CONFIG_PPC_DCR_MMIO
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#include <asm/dcr-mmio.h>
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#endif
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/* Indirection layer for providing both NATIVE and MMIO support. */
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#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
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#include <asm/dcr-generic.h>
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#define DCR_MAP_OK(host) dcr_map_ok_generic(host)
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#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c)
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#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c)
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#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n)
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#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value)
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#else
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#ifdef CONFIG_PPC_DCR_NATIVE
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typedef dcr_host_native_t dcr_host_t;
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#define DCR_MAP_OK(host) dcr_map_ok_native(host)
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#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c)
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#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c)
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#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n)
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#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value)
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#else
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typedef dcr_host_mmio_t dcr_host_t;
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#define DCR_MAP_OK(host) dcr_map_ok_mmio(host)
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#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c)
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#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c)
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#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n)
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#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value)
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#endif
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#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
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/*
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* additional helpers to read the DCR * base from the device-tree
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@ -11,107 +11,6 @@
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#include <linux/of_address.h>
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#include <asm/dcr.h>
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#ifdef CONFIG_PPC_DCR_MMIO
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static struct device_node *find_dcr_parent(struct device_node *node)
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{
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struct device_node *par, *tmp;
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const u32 *p;
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for (par = of_node_get(node); par;) {
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if (of_property_read_bool(par, "dcr-controller"))
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break;
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p = of_get_property(par, "dcr-parent", NULL);
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tmp = par;
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if (p == NULL)
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par = of_get_parent(par);
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else
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par = of_find_node_by_phandle(*p);
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of_node_put(tmp);
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}
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return par;
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}
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#endif
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#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
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bool dcr_map_ok_generic(dcr_host_t host)
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{
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if (host.type == DCR_HOST_NATIVE)
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return dcr_map_ok_native(host.host.native);
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else if (host.type == DCR_HOST_MMIO)
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return dcr_map_ok_mmio(host.host.mmio);
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else
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return false;
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}
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EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
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dcr_host_t dcr_map_generic(struct device_node *dev,
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unsigned int dcr_n,
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unsigned int dcr_c)
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{
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dcr_host_t host;
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struct device_node *dp;
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const char *prop;
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host.type = DCR_HOST_INVALID;
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dp = find_dcr_parent(dev);
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if (dp == NULL)
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return host;
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prop = of_get_property(dp, "dcr-access-method", NULL);
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pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
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if (!strcmp(prop, "native")) {
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host.type = DCR_HOST_NATIVE;
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host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
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} else if (!strcmp(prop, "mmio")) {
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host.type = DCR_HOST_MMIO;
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host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
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}
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of_node_put(dp);
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return host;
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}
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EXPORT_SYMBOL_GPL(dcr_map_generic);
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void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
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{
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if (host.type == DCR_HOST_NATIVE)
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dcr_unmap_native(host.host.native, dcr_c);
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else if (host.type == DCR_HOST_MMIO)
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dcr_unmap_mmio(host.host.mmio, dcr_c);
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else /* host.type == DCR_HOST_INVALID */
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WARN_ON(true);
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}
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EXPORT_SYMBOL_GPL(dcr_unmap_generic);
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u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
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{
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if (host.type == DCR_HOST_NATIVE)
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return dcr_read_native(host.host.native, dcr_n);
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else if (host.type == DCR_HOST_MMIO)
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return dcr_read_mmio(host.host.mmio, dcr_n);
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else /* host.type == DCR_HOST_INVALID */
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WARN_ON(true);
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return 0;
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}
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EXPORT_SYMBOL_GPL(dcr_read_generic);
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void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
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{
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if (host.type == DCR_HOST_NATIVE)
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dcr_write_native(host.host.native, dcr_n, value);
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else if (host.type == DCR_HOST_MMIO)
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dcr_write_mmio(host.host.mmio, dcr_n, value);
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else /* host.type == DCR_HOST_INVALID */
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WARN_ON(true);
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}
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EXPORT_SYMBOL_GPL(dcr_write_generic);
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#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
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unsigned int dcr_resource_start(const struct device_node *np,
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unsigned int index)
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{
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@ -137,86 +36,5 @@ unsigned int dcr_resource_len(const struct device_node *np, unsigned int index)
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}
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EXPORT_SYMBOL_GPL(dcr_resource_len);
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#ifdef CONFIG_PPC_DCR_MMIO
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static u64 of_translate_dcr_address(struct device_node *dev,
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unsigned int dcr_n,
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unsigned int *out_stride)
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{
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struct device_node *dp;
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const u32 *p;
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unsigned int stride;
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u64 ret = OF_BAD_ADDR;
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dp = find_dcr_parent(dev);
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if (dp == NULL)
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return OF_BAD_ADDR;
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/* Stride is not properly defined yet, default to 0x10 for Axon */
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p = of_get_property(dp, "dcr-mmio-stride", NULL);
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stride = (p == NULL) ? 0x10 : *p;
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/* XXX FIXME: Which property name is to use of the 2 following ? */
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p = of_get_property(dp, "dcr-mmio-range", NULL);
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if (p == NULL)
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p = of_get_property(dp, "dcr-mmio-space", NULL);
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if (p == NULL)
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goto done;
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/* Maybe could do some better range checking here */
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ret = of_translate_address(dp, p);
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if (ret != OF_BAD_ADDR)
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ret += (u64)(stride) * (u64)dcr_n;
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if (out_stride)
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*out_stride = stride;
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done:
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of_node_put(dp);
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return ret;
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}
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dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
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unsigned int dcr_n,
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unsigned int dcr_c)
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{
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dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
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u64 addr;
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pr_debug("dcr_map(%pOF, 0x%x, 0x%x)\n",
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dev, dcr_n, dcr_c);
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addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
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pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
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(unsigned long long) addr, ret.stride);
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if (addr == OF_BAD_ADDR)
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return ret;
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pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
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ret.token = ioremap(addr, dcr_c * ret.stride);
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if (ret.token == NULL)
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return ret;
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pr_debug("mapped at 0x%p -> base is 0x%p\n",
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ret.token, ret.token - dcr_n * ret.stride);
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ret.token -= dcr_n * ret.stride;
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return ret;
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}
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EXPORT_SYMBOL_GPL(dcr_map_mmio);
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void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
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{
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dcr_host_mmio_t h = host;
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if (h.token == NULL)
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return;
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h.token += host.base * h.stride;
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iounmap(h.token);
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h.token = NULL;
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}
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EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
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#endif /* defined(CONFIG_PPC_DCR_MMIO) */
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#ifdef CONFIG_PPC_DCR_NATIVE
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DEFINE_SPINLOCK(dcr_ind_lock);
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EXPORT_SYMBOL_GPL(dcr_ind_lock);
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#endif /* defined(CONFIG_PPC_DCR_NATIVE) */
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