mirror of https://github.com/torvalds/linux.git
spi: dw: rename the spi controller to ctlr
Since the designware SPI controller can act as both a target and a host, rename spi_controller member of the dw_spi struct to ctlr instead of host. Similarly, rename the functions handling the controller, using controller instead of host as the suffix. No functional changes intended. Signed-off-by: Benoît Monin <benoit.monin@bootlin.com> Link: https://patch.msgid.link/20251002-spi-dw-target-v1-1-993e91c1a712@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Benoît Monin
Mark Brown
parent
3d66d3dbd5
commit
b926b15547
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@ -288,7 +288,7 @@ static int dw_spi_bt1_probe(struct platform_device *pdev)
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pm_runtime_enable(&pdev->dev);
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ret = dw_spi_add_host(&pdev->dev, dws);
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ret = dw_spi_add_controller(&pdev->dev, dws);
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if (ret) {
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pm_runtime_disable(&pdev->dev);
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return ret;
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@ -303,7 +303,7 @@ static void dw_spi_bt1_remove(struct platform_device *pdev)
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{
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struct dw_spi_bt1 *dwsbt1 = platform_get_drvdata(pdev);
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dw_spi_remove_host(&dwsbt1->dws);
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dw_spi_remove_controller(&dwsbt1->dws);
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pm_runtime_disable(&pdev->dev);
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}
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@ -63,7 +63,7 @@ static void dw_spi_debugfs_init(struct dw_spi *dws)
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{
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char name[32];
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snprintf(name, 32, "dw_spi%d", dws->host->bus_num);
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snprintf(name, 32, "dw_spi%d", dws->ctlr->bus_num);
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dws->debugfs = debugfs_create_dir(name, NULL);
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dws->regset.regs = dw_spi_dbgfs_regs;
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@ -185,25 +185,25 @@ int dw_spi_check_status(struct dw_spi *dws, bool raw)
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irq_status = dw_readl(dws, DW_SPI_ISR);
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if (irq_status & DW_SPI_INT_RXOI) {
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dev_err(&dws->host->dev, "RX FIFO overflow detected\n");
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dev_err(&dws->ctlr->dev, "RX FIFO overflow detected\n");
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ret = -EIO;
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}
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if (irq_status & DW_SPI_INT_RXUI) {
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dev_err(&dws->host->dev, "RX FIFO underflow detected\n");
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dev_err(&dws->ctlr->dev, "RX FIFO underflow detected\n");
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ret = -EIO;
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}
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if (irq_status & DW_SPI_INT_TXOI) {
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dev_err(&dws->host->dev, "TX FIFO overflow detected\n");
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dev_err(&dws->ctlr->dev, "TX FIFO overflow detected\n");
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ret = -EIO;
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}
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/* Generically handle the erroneous situation */
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if (ret) {
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dw_spi_reset_chip(dws);
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if (dws->host->cur_msg)
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dws->host->cur_msg->status = ret;
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if (dws->ctlr->cur_msg)
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dws->ctlr->cur_msg->status = ret;
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}
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return ret;
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@ -215,7 +215,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws)
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u16 irq_status = dw_readl(dws, DW_SPI_ISR);
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if (dw_spi_check_status(dws, false)) {
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spi_finalize_current_transfer(dws->host);
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spi_finalize_current_transfer(dws->ctlr);
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return IRQ_HANDLED;
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}
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@ -229,7 +229,7 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws)
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dw_reader(dws);
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if (!dws->rx_len) {
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dw_spi_mask_intr(dws, 0xff);
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spi_finalize_current_transfer(dws->host);
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spi_finalize_current_transfer(dws->ctlr);
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} else if (dws->rx_len <= dw_readl(dws, DW_SPI_RXFTLR)) {
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dw_writel(dws, DW_SPI_RXFTLR, dws->rx_len - 1);
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}
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@ -250,14 +250,14 @@ static irqreturn_t dw_spi_transfer_handler(struct dw_spi *dws)
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static irqreturn_t dw_spi_irq(int irq, void *dev_id)
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{
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struct spi_controller *host = dev_id;
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struct dw_spi *dws = spi_controller_get_devdata(host);
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struct spi_controller *ctlr = dev_id;
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struct dw_spi *dws = spi_controller_get_devdata(ctlr);
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u16 irq_status = dw_readl(dws, DW_SPI_ISR) & DW_SPI_INT_MASK;
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if (!irq_status)
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return IRQ_NONE;
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if (!host->cur_msg) {
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if (!ctlr->cur_msg) {
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dw_spi_mask_intr(dws, 0xff);
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return IRQ_HANDLED;
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}
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@ -410,11 +410,11 @@ static int dw_spi_poll_transfer(struct dw_spi *dws,
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return 0;
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}
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static int dw_spi_transfer_one(struct spi_controller *host,
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static int dw_spi_transfer_one(struct spi_controller *ctlr,
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struct spi_device *spi,
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struct spi_transfer *transfer)
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{
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struct dw_spi *dws = spi_controller_get_devdata(host);
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struct dw_spi *dws = spi_controller_get_devdata(ctlr);
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struct dw_spi_cfg cfg = {
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.tmode = DW_SPI_CTRLR0_TMOD_TR,
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.dfs = transfer->bits_per_word,
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@ -439,7 +439,7 @@ static int dw_spi_transfer_one(struct spi_controller *host,
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transfer->effective_speed_hz = dws->current_freq;
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/* Check if current transfer is a DMA transaction */
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dws->dma_mapped = spi_xfer_is_dma_mapped(host, spi, transfer);
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dws->dma_mapped = spi_xfer_is_dma_mapped(ctlr, spi, transfer);
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/* For poll mode just disable all interrupts */
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dw_spi_mask_intr(dws, 0xff);
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@ -462,10 +462,10 @@ static int dw_spi_transfer_one(struct spi_controller *host,
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return 1;
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}
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static void dw_spi_handle_err(struct spi_controller *host,
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static void dw_spi_handle_err(struct spi_controller *ctlr,
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struct spi_message *msg)
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{
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struct dw_spi *dws = spi_controller_get_devdata(host);
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struct dw_spi *dws = spi_controller_get_devdata(ctlr);
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if (dws->dma_mapped)
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dws->dma_ops->dma_stop(dws);
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@ -574,7 +574,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, struct spi_device *spi)
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while (len) {
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entries = readl_relaxed(dws->regs + DW_SPI_TXFLR);
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if (!entries) {
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dev_err(&dws->host->dev, "CS de-assertion on Tx\n");
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dev_err(&dws->ctlr->dev, "CS de-assertion on Tx\n");
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return -EIO;
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}
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room = min(dws->fifo_len - entries, len);
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@ -594,7 +594,7 @@ static int dw_spi_write_then_read(struct dw_spi *dws, struct spi_device *spi)
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if (!entries) {
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sts = readl_relaxed(dws->regs + DW_SPI_RISR);
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if (sts & DW_SPI_INT_RXOI) {
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dev_err(&dws->host->dev, "FIFO overflow on Rx\n");
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dev_err(&dws->ctlr->dev, "FIFO overflow on Rx\n");
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return -EIO;
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}
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continue;
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@ -635,7 +635,7 @@ static int dw_spi_wait_mem_op_done(struct dw_spi *dws)
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spi_delay_exec(&delay, NULL);
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if (retry < 0) {
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dev_err(&dws->host->dev, "Mem op hanged up\n");
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dev_err(&dws->ctlr->dev, "Mem op hanged up\n");
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return -EIO;
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}
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@ -898,60 +898,60 @@ static const struct spi_controller_mem_caps dw_spi_mem_caps = {
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.per_op_freq = true,
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};
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int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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int dw_spi_add_controller(struct device *dev, struct dw_spi *dws)
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{
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struct spi_controller *host;
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struct spi_controller *ctlr;
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int ret;
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if (!dws)
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return -EINVAL;
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host = spi_alloc_host(dev, 0);
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if (!host)
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ctlr = spi_alloc_host(dev, 0);
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if (!ctlr)
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return -ENOMEM;
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device_set_node(&host->dev, dev_fwnode(dev));
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device_set_node(&ctlr->dev, dev_fwnode(dev));
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dws->host = host;
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dws->ctlr = ctlr;
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dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
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spi_controller_set_devdata(host, dws);
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spi_controller_set_devdata(ctlr, dws);
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/* Basic HW init */
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dw_spi_hw_init(dev, dws);
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ret = request_irq(dws->irq, dw_spi_irq, IRQF_SHARED, dev_name(dev),
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host);
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ctlr);
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if (ret < 0 && ret != -ENOTCONN) {
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dev_err(dev, "can not get IRQ\n");
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goto err_free_host;
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goto err_free_ctlr;
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}
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dw_spi_init_mem_ops(dws);
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host->use_gpio_descriptors = true;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP;
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ctlr->use_gpio_descriptors = true;
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ctlr->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP;
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if (dws->caps & DW_SPI_CAP_DFS32)
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
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ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
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else
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
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host->bus_num = dws->bus_num;
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host->num_chipselect = dws->num_cs;
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host->setup = dw_spi_setup;
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host->cleanup = dw_spi_cleanup;
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ctlr->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 16);
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ctlr->bus_num = dws->bus_num;
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ctlr->num_chipselect = dws->num_cs;
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ctlr->setup = dw_spi_setup;
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ctlr->cleanup = dw_spi_cleanup;
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if (dws->set_cs)
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host->set_cs = dws->set_cs;
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ctlr->set_cs = dws->set_cs;
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else
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host->set_cs = dw_spi_set_cs;
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host->transfer_one = dw_spi_transfer_one;
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host->handle_err = dw_spi_handle_err;
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ctlr->set_cs = dw_spi_set_cs;
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ctlr->transfer_one = dw_spi_transfer_one;
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ctlr->handle_err = dw_spi_handle_err;
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if (dws->mem_ops.exec_op) {
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host->mem_ops = &dws->mem_ops;
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host->mem_caps = &dw_spi_mem_caps;
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ctlr->mem_ops = &dws->mem_ops;
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ctlr->mem_caps = &dw_spi_mem_caps;
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}
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host->max_speed_hz = dws->max_freq;
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host->flags = SPI_CONTROLLER_GPIO_SS;
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host->auto_runtime_pm = true;
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ctlr->max_speed_hz = dws->max_freq;
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ctlr->flags = SPI_CONTROLLER_GPIO_SS;
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ctlr->auto_runtime_pm = true;
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/* Get default rx sample delay */
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device_property_read_u32(dev, "rx-sample-delay-ns",
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@ -964,14 +964,14 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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} else if (ret) {
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dev_warn(dev, "DMA init failed\n");
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} else {
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host->can_dma = dws->dma_ops->can_dma;
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host->flags |= SPI_CONTROLLER_MUST_TX;
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ctlr->can_dma = dws->dma_ops->can_dma;
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ctlr->flags |= SPI_CONTROLLER_MUST_TX;
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}
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}
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ret = spi_register_controller(host);
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ret = spi_register_controller(ctlr);
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if (ret) {
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dev_err_probe(dev, ret, "problem registering spi host\n");
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dev_err_probe(dev, ret, "problem registering spi controller\n");
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goto err_dma_exit;
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}
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@ -983,47 +983,47 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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dws->dma_ops->dma_exit(dws);
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dw_spi_enable_chip(dws, 0);
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err_free_irq:
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free_irq(dws->irq, host);
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err_free_host:
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spi_controller_put(host);
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free_irq(dws->irq, ctlr);
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err_free_ctlr:
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spi_controller_put(ctlr);
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return ret;
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}
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EXPORT_SYMBOL_NS_GPL(dw_spi_add_host, "SPI_DW_CORE");
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EXPORT_SYMBOL_NS_GPL(dw_spi_add_controller, "SPI_DW_CORE");
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void dw_spi_remove_host(struct dw_spi *dws)
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void dw_spi_remove_controller(struct dw_spi *dws)
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{
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dw_spi_debugfs_remove(dws);
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spi_unregister_controller(dws->host);
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spi_unregister_controller(dws->ctlr);
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if (dws->dma_ops && dws->dma_ops->dma_exit)
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dws->dma_ops->dma_exit(dws);
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dw_spi_shutdown_chip(dws);
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free_irq(dws->irq, dws->host);
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free_irq(dws->irq, dws->ctlr);
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}
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EXPORT_SYMBOL_NS_GPL(dw_spi_remove_host, "SPI_DW_CORE");
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EXPORT_SYMBOL_NS_GPL(dw_spi_remove_controller, "SPI_DW_CORE");
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int dw_spi_suspend_host(struct dw_spi *dws)
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int dw_spi_suspend_controller(struct dw_spi *dws)
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{
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int ret;
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ret = spi_controller_suspend(dws->host);
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ret = spi_controller_suspend(dws->ctlr);
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if (ret)
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return ret;
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dw_spi_shutdown_chip(dws);
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return 0;
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}
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EXPORT_SYMBOL_NS_GPL(dw_spi_suspend_host, "SPI_DW_CORE");
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EXPORT_SYMBOL_NS_GPL(dw_spi_suspend_controller, "SPI_DW_CORE");
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int dw_spi_resume_host(struct dw_spi *dws)
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int dw_spi_resume_controller(struct dw_spi *dws)
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{
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dw_spi_hw_init(&dws->host->dev, dws);
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return spi_controller_resume(dws->host);
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dw_spi_hw_init(&dws->ctlr->dev, dws);
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return spi_controller_resume(dws->ctlr);
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}
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EXPORT_SYMBOL_NS_GPL(dw_spi_resume_host, "SPI_DW_CORE");
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EXPORT_SYMBOL_NS_GPL(dw_spi_resume_controller, "SPI_DW_CORE");
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MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
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MODULE_DESCRIPTION("Driver for DesignWare SPI controller core");
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@ -139,8 +139,8 @@ static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
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if (!dws->txchan)
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goto free_rxchan;
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dws->host->dma_rx = dws->rxchan;
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dws->host->dma_tx = dws->txchan;
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dws->ctlr->dma_rx = dws->rxchan;
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dws->ctlr->dma_tx = dws->txchan;
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init_completion(&dws->dma_completion);
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@ -183,8 +183,8 @@ static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
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goto free_rxchan;
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}
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dws->host->dma_rx = dws->rxchan;
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dws->host->dma_tx = dws->txchan;
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dws->ctlr->dma_rx = dws->rxchan;
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dws->ctlr->dma_tx = dws->txchan;
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init_completion(&dws->dma_completion);
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@ -242,10 +242,10 @@ static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes)
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}
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}
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static bool dw_spi_can_dma(struct spi_controller *host,
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static bool dw_spi_can_dma(struct spi_controller *ctlr,
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struct spi_device *spi, struct spi_transfer *xfer)
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{
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struct dw_spi *dws = spi_controller_get_devdata(host);
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struct dw_spi *dws = spi_controller_get_devdata(ctlr);
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enum dma_slave_buswidth dma_bus_width;
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if (xfer->len <= dws->fifo_len)
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@ -271,7 +271,7 @@ static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed)
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msecs_to_jiffies(ms));
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if (ms == 0) {
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dev_err(&dws->host->cur_msg->spi->dev,
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dev_err(&dws->ctlr->cur_msg->spi->dev,
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"DMA transaction timed out\n");
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return -ETIMEDOUT;
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}
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@ -299,7 +299,7 @@ static int dw_spi_dma_wait_tx_done(struct dw_spi *dws,
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spi_delay_exec(&delay, xfer);
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if (retry < 0) {
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dev_err(&dws->host->dev, "Tx hanged up\n");
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dev_err(&dws->ctlr->dev, "Tx hanged up\n");
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return -EIO;
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}
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@ -400,7 +400,7 @@ static int dw_spi_dma_wait_rx_done(struct dw_spi *dws)
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spi_delay_exec(&delay, NULL);
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if (retry < 0) {
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dev_err(&dws->host->dev, "Rx hanged up\n");
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dev_err(&dws->ctlr->dev, "Rx hanged up\n");
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return -EIO;
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}
|
||||
|
||||
|
|
@ -656,13 +656,13 @@ static int dw_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (dws->host->cur_msg->status == -EINPROGRESS) {
|
||||
if (dws->ctlr->cur_msg->status == -EINPROGRESS) {
|
||||
ret = dw_spi_dma_wait_tx_done(dws, xfer);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (xfer->rx_buf && dws->host->cur_msg->status == -EINPROGRESS)
|
||||
if (xfer->rx_buf && dws->ctlr->cur_msg->status == -EINPROGRESS)
|
||||
ret = dw_spi_dma_wait_rx_done(dws);
|
||||
|
||||
return ret;
|
||||
|
|
|
|||
|
|
@ -382,7 +382,7 @@ static int dw_spi_mmio_probe(struct platform_device *pdev)
|
|||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
|
||||
ret = dw_spi_add_host(&pdev->dev, dws);
|
||||
ret = dw_spi_add_controller(&pdev->dev, dws);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
|
|
@ -401,7 +401,7 @@ static void dw_spi_mmio_remove(struct platform_device *pdev)
|
|||
{
|
||||
struct dw_spi_mmio *dwsmmio = platform_get_drvdata(pdev);
|
||||
|
||||
dw_spi_remove_host(&dwsmmio->dws);
|
||||
dw_spi_remove_controller(&dwsmmio->dws);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
reset_control_assert(dwsmmio->rstc);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -127,7 +127,7 @@ static int dw_spi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *en
|
|||
goto err_free_irq_vectors;
|
||||
}
|
||||
|
||||
ret = dw_spi_add_host(&pdev->dev, dws);
|
||||
ret = dw_spi_add_controller(&pdev->dev, dws);
|
||||
if (ret)
|
||||
goto err_free_irq_vectors;
|
||||
|
||||
|
|
@ -156,7 +156,7 @@ static void dw_spi_pci_remove(struct pci_dev *pdev)
|
|||
pm_runtime_forbid(&pdev->dev);
|
||||
pm_runtime_get_noresume(&pdev->dev);
|
||||
|
||||
dw_spi_remove_host(dws);
|
||||
dw_spi_remove_controller(dws);
|
||||
pci_free_irq_vectors(pdev);
|
||||
}
|
||||
|
||||
|
|
@ -165,14 +165,14 @@ static int dw_spi_pci_suspend(struct device *dev)
|
|||
{
|
||||
struct dw_spi *dws = dev_get_drvdata(dev);
|
||||
|
||||
return dw_spi_suspend_host(dws);
|
||||
return dw_spi_suspend_controller(dws);
|
||||
}
|
||||
|
||||
static int dw_spi_pci_resume(struct device *dev)
|
||||
{
|
||||
struct dw_spi *dws = dev_get_drvdata(dev);
|
||||
|
||||
return dw_spi_resume_host(dws);
|
||||
return dw_spi_resume_controller(dws);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -142,14 +142,14 @@ struct dw_spi_dma_ops {
|
|||
int (*dma_init)(struct device *dev, struct dw_spi *dws);
|
||||
void (*dma_exit)(struct dw_spi *dws);
|
||||
int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer);
|
||||
bool (*can_dma)(struct spi_controller *host, struct spi_device *spi,
|
||||
bool (*can_dma)(struct spi_controller *ctlr, struct spi_device *spi,
|
||||
struct spi_transfer *xfer);
|
||||
int (*dma_transfer)(struct dw_spi *dws, struct spi_transfer *xfer);
|
||||
void (*dma_stop)(struct dw_spi *dws);
|
||||
};
|
||||
|
||||
struct dw_spi {
|
||||
struct spi_controller *host;
|
||||
struct spi_controller *ctlr;
|
||||
|
||||
u32 ip; /* Synopsys DW SSI IP-core ID */
|
||||
u32 ver; /* Synopsys component version */
|
||||
|
|
@ -288,10 +288,10 @@ extern void dw_spi_set_cs(struct spi_device *spi, bool enable);
|
|||
extern void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi,
|
||||
struct dw_spi_cfg *cfg);
|
||||
extern int dw_spi_check_status(struct dw_spi *dws, bool raw);
|
||||
extern int dw_spi_add_host(struct device *dev, struct dw_spi *dws);
|
||||
extern void dw_spi_remove_host(struct dw_spi *dws);
|
||||
extern int dw_spi_suspend_host(struct dw_spi *dws);
|
||||
extern int dw_spi_resume_host(struct dw_spi *dws);
|
||||
extern int dw_spi_add_controller(struct device *dev, struct dw_spi *dws);
|
||||
extern void dw_spi_remove_controller(struct dw_spi *dws);
|
||||
extern int dw_spi_suspend_controller(struct dw_spi *dws);
|
||||
extern int dw_spi_resume_controller(struct dw_spi *dws);
|
||||
|
||||
#ifdef CONFIG_SPI_DW_DMA
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue