mirror of https://github.com/torvalds/linux.git
irqchip: Switch to irq_domain_create_*()
irq_domain_add_*() interfaces are going away as being obsolete now. Switch to the preferred irq_domain_create_*() ones. Those differ in the node parameter: They take more generic struct fwnode_handle instead of struct device_node. Therefore, of_fwnode_handle() is added around the original parameter. Note some of the users can likely use dev->fwnode directly instead of indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not guaranteed to be set for all, so this has to be investigated on case to case basis (by people who can actually test with the HW). [ tglx: Fix up subject prefix ] Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://lore.kernel.org/all/20250319092951.37667-22-jirislaby@kernel.org
This commit is contained in:
parent
7f68126a87
commit
affdc0d1bd
|
|
@ -180,7 +180,7 @@ static void __init combiner_init(void __iomem *combiner_base,
|
||||||
if (!combiner_data)
|
if (!combiner_data)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
combiner_irq_domain = irq_domain_add_linear(np, nr_irq,
|
combiner_irq_domain = irq_domain_create_linear(of_fwnode_handle(np), nr_irq,
|
||||||
&combiner_irq_domain_ops, combiner_data);
|
&combiner_irq_domain_ops, combiner_data);
|
||||||
if (WARN_ON(!combiner_irq_domain)) {
|
if (WARN_ON(!combiner_irq_domain)) {
|
||||||
pr_warn("%s: irq domain init failed\n", __func__);
|
pr_warn("%s: irq domain init failed\n", __func__);
|
||||||
|
|
|
||||||
|
|
@ -139,7 +139,7 @@ static int al_fic_register(struct device_node *node,
|
||||||
struct irq_chip_generic *gc;
|
struct irq_chip_generic *gc;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
fic->domain = irq_domain_add_linear(node,
|
fic->domain = irq_domain_create_linear(of_fwnode_handle(node),
|
||||||
NR_FIC_IRQS,
|
NR_FIC_IRQS,
|
||||||
&irq_generic_chip_ops,
|
&irq_generic_chip_ops,
|
||||||
fic);
|
fic);
|
||||||
|
|
|
||||||
|
|
@ -205,9 +205,8 @@ static int alpine_msix_init_domains(struct alpine_msix_data *priv,
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
middle_domain = irq_domain_add_hierarchy(gic_domain, 0, 0, NULL,
|
middle_domain = irq_domain_create_hierarchy(gic_domain, 0, 0, NULL,
|
||||||
&alpine_msix_middle_domain_ops,
|
&alpine_msix_middle_domain_ops, priv);
|
||||||
priv);
|
|
||||||
if (!middle_domain) {
|
if (!middle_domain) {
|
||||||
pr_err("Failed to create the MSIX middle domain\n");
|
pr_err("Failed to create the MSIX middle domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -348,7 +348,7 @@ static int __init mpic_msi_init(struct mpic *mpic, struct device_node *node,
|
||||||
mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK;
|
mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK;
|
||||||
}
|
}
|
||||||
|
|
||||||
mpic->msi_inner_domain = irq_domain_add_linear(NULL, mpic->msi_doorbell_size,
|
mpic->msi_inner_domain = irq_domain_create_linear(NULL, mpic->msi_doorbell_size,
|
||||||
&mpic_msi_domain_ops, mpic);
|
&mpic_msi_domain_ops, mpic);
|
||||||
if (!mpic->msi_inner_domain)
|
if (!mpic->msi_inner_domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
@ -861,7 +861,7 @@ static int __init mpic_of_init(struct device_node *node, struct device_node *par
|
||||||
if (!mpic_is_ipi_available(mpic))
|
if (!mpic_is_ipi_available(mpic))
|
||||||
nr_irqs = MPIC_PER_CPU_IRQS_NR;
|
nr_irqs = MPIC_PER_CPU_IRQS_NR;
|
||||||
|
|
||||||
mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, mpic);
|
mpic->domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irqs, &mpic_irq_ops, mpic);
|
||||||
if (!mpic->domain) {
|
if (!mpic->domain) {
|
||||||
pr_err("%pOF: Unable to add IRQ domain\n", node);
|
pr_err("%pOF: Unable to add IRQ domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -82,7 +82,7 @@ static int __init aspeed_i2c_ic_of_init(struct device_node *node,
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
i2c_ic->irq_domain = irq_domain_add_linear(node, ASPEED_I2C_IC_NUM_BUS,
|
i2c_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), ASPEED_I2C_IC_NUM_BUS,
|
||||||
&aspeed_i2c_ic_irq_domain_ops,
|
&aspeed_i2c_ic_irq_domain_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!i2c_ic->irq_domain) {
|
if (!i2c_ic->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -102,7 +102,7 @@ static int __init aspeed_intc_ic_of_init(struct device_node *node,
|
||||||
writel(0xffffffff, intc_ic->base + INTC_INT_STATUS_REG);
|
writel(0xffffffff, intc_ic->base + INTC_INT_STATUS_REG);
|
||||||
writel(0x0, intc_ic->base + INTC_INT_ENABLE_REG);
|
writel(0x0, intc_ic->base + INTC_INT_ENABLE_REG);
|
||||||
|
|
||||||
intc_ic->irq_domain = irq_domain_add_linear(node, INTC_IRQS_PER_WORD,
|
intc_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), INTC_IRQS_PER_WORD,
|
||||||
&aspeed_intc_ic_irq_domain_ops, intc_ic);
|
&aspeed_intc_ic_irq_domain_ops, intc_ic);
|
||||||
if (!intc_ic->irq_domain) {
|
if (!intc_ic->irq_domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -165,7 +165,7 @@ static int aspeed_scu_ic_of_init_common(struct aspeed_scu_ic *scu_ic,
|
||||||
goto err;
|
goto err;
|
||||||
}
|
}
|
||||||
|
|
||||||
scu_ic->irq_domain = irq_domain_add_linear(node, scu_ic->num_irqs,
|
scu_ic->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), scu_ic->num_irqs,
|
||||||
&aspeed_scu_ic_domain_ops,
|
&aspeed_scu_ic_domain_ops,
|
||||||
scu_ic);
|
scu_ic);
|
||||||
if (!scu_ic->irq_domain) {
|
if (!scu_ic->irq_domain) {
|
||||||
|
|
|
||||||
|
|
@ -211,8 +211,8 @@ static int __init avic_of_init(struct device_node *node,
|
||||||
set_handle_irq(avic_handle_irq);
|
set_handle_irq(avic_handle_irq);
|
||||||
|
|
||||||
/* Register our domain */
|
/* Register our domain */
|
||||||
vic->dom = irq_domain_add_simple(node, NUM_IRQS, 0,
|
vic->dom = irq_domain_create_simple(of_fwnode_handle(node), NUM_IRQS, 0,
|
||||||
&avic_dom_ops, vic);
|
&avic_dom_ops, vic);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -147,7 +147,7 @@ static int __init ath79_misc_intc_of_init(
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, ATH79_MISC_IRQ_COUNT,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), ATH79_MISC_IRQ_COUNT,
|
||||||
&misc_irq_domain_ops, base);
|
&misc_irq_domain_ops, base);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("Failed to add MISC irqdomain\n");
|
pr_err("Failed to add MISC irqdomain\n");
|
||||||
|
|
@ -188,7 +188,7 @@ void __init ath79_misc_irq_init(void __iomem *regs, int irq,
|
||||||
else
|
else
|
||||||
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
|
ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(NULL, ATH79_MISC_IRQ_COUNT,
|
domain = irq_domain_create_legacy(NULL, ATH79_MISC_IRQ_COUNT,
|
||||||
irq_base, 0, &misc_irq_domain_ops, regs);
|
irq_base, 0, &misc_irq_domain_ops, regs);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to create MISC irqdomain");
|
panic("Failed to create MISC irqdomain");
|
||||||
|
|
|
||||||
|
|
@ -228,7 +228,7 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, nchips * 32, ops, aic);
|
domain = irq_domain_create_linear(of_fwnode_handle(node), nchips * 32, ops, aic);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_free_aic;
|
goto err_free_aic;
|
||||||
|
|
|
||||||
|
|
@ -173,8 +173,8 @@ static int mip_init_domains(struct mip_priv *mip, struct device_node *np)
|
||||||
{
|
{
|
||||||
struct irq_domain *middle;
|
struct irq_domain *middle;
|
||||||
|
|
||||||
middle = irq_domain_add_hierarchy(mip->parent, 0, mip->num_msis, np,
|
middle = irq_domain_create_hierarchy(mip->parent, 0, mip->num_msis, of_fwnode_handle(np),
|
||||||
&mip_middle_domain_ops, mip);
|
&mip_middle_domain_ops, mip);
|
||||||
if (!middle)
|
if (!middle)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -144,7 +144,7 @@ static int __init armctrl_of_init(struct device_node *node,
|
||||||
if (!base)
|
if (!base)
|
||||||
panic("%pOF: unable to map IC registers\n", node);
|
panic("%pOF: unable to map IC registers\n", node);
|
||||||
|
|
||||||
intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0),
|
intc.domain = irq_domain_create_linear(of_fwnode_handle(node), MAKE_HWIRQ(NR_BANKS, 0),
|
||||||
&armctrl_ops, NULL);
|
&armctrl_ops, NULL);
|
||||||
if (!intc.domain)
|
if (!intc.domain)
|
||||||
panic("%pOF: unable to create IRQ domain\n", node);
|
panic("%pOF: unable to create IRQ domain\n", node);
|
||||||
|
|
|
||||||
|
|
@ -325,7 +325,7 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
|
||||||
|
|
||||||
bcm2835_init_local_timer_frequency();
|
bcm2835_init_local_timer_frequency();
|
||||||
|
|
||||||
intc.domain = irq_domain_add_linear(node, LAST_IRQ + 1,
|
intc.domain = irq_domain_create_linear(of_fwnode_handle(node), LAST_IRQ + 1,
|
||||||
&bcm2836_arm_irqchip_intc_ops,
|
&bcm2836_arm_irqchip_intc_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!intc.domain)
|
if (!intc.domain)
|
||||||
|
|
|
||||||
|
|
@ -316,7 +316,7 @@ static int __init bcm6345_l1_of_init(struct device_node *dn,
|
||||||
|
|
||||||
raw_spin_lock_init(&intc->lock);
|
raw_spin_lock_init(&intc->lock);
|
||||||
|
|
||||||
intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words,
|
intc->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * intc->n_words,
|
||||||
&bcm6345_l1_domain_ops,
|
&bcm6345_l1_domain_ops,
|
||||||
intc);
|
intc);
|
||||||
if (!intc->domain) {
|
if (!intc->domain) {
|
||||||
|
|
|
||||||
|
|
@ -416,7 +416,7 @@ static int __init bcm7038_l1_of_init(struct device_node *dn,
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
intc->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * intc->n_words,
|
intc->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * intc->n_words,
|
||||||
&bcm7038_l1_domain_ops,
|
&bcm7038_l1_domain_ops,
|
||||||
intc);
|
intc);
|
||||||
if (!intc->domain) {
|
if (!intc->domain) {
|
||||||
|
|
|
||||||
|
|
@ -264,7 +264,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,
|
||||||
goto out_free_l1_data;
|
goto out_free_l1_data;
|
||||||
}
|
}
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(dn, IRQS_PER_WORD * data->n_words,
|
data->domain = irq_domain_create_linear(of_fwnode_handle(dn), IRQS_PER_WORD * data->n_words,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -182,7 +182,7 @@ static int __init brcmstb_l2_intc_of_init(struct device_node *np,
|
||||||
goto out_unmap;
|
goto out_unmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(np, 32,
|
data->domain = irq_domain_create_linear(of_fwnode_handle(np), 32,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -184,8 +184,8 @@ static int __init _clps711x_intc_init(struct device_node *np,
|
||||||
clps711x_intc->ops.map = clps711x_intc_irq_map;
|
clps711x_intc->ops.map = clps711x_intc_irq_map;
|
||||||
clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
|
clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
|
||||||
clps711x_intc->domain =
|
clps711x_intc->domain =
|
||||||
irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs),
|
irq_domain_create_legacy(of_fwnode_handle(np), ARRAY_SIZE(clps711x_irqs), 0, 0,
|
||||||
0, 0, &clps711x_intc->ops, NULL);
|
&clps711x_intc->ops, NULL);
|
||||||
if (!clps711x_intc->domain) {
|
if (!clps711x_intc->domain) {
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
goto out_irqfree;
|
goto out_irqfree;
|
||||||
|
|
|
||||||
|
|
@ -351,10 +351,8 @@ static int __init irqcrossbar_init(struct device_node *node,
|
||||||
if (err)
|
if (err)
|
||||||
return err;
|
return err;
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, cb->max_crossbar_sources,
|
||||||
cb->max_crossbar_sources,
|
of_fwnode_handle(node), &crossbar_domain_ops, NULL);
|
||||||
node, &crossbar_domain_ops,
|
|
||||||
NULL);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: failed to allocated domain\n", node);
|
pr_err("%pOF: failed to allocated domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -114,7 +114,7 @@ ck_intc_init_comm(struct device_node *node, struct device_node *parent)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(node, nr_irq,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irq,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!root_domain) {
|
if (!root_domain) {
|
||||||
pr_err("C-SKY Intc irq_domain_add failed.\n");
|
pr_err("C-SKY Intc irq_domain_add failed.\n");
|
||||||
|
|
|
||||||
|
|
@ -255,7 +255,7 @@ csky_mpintc_init(struct device_node *node, struct device_node *parent)
|
||||||
writel_relaxed(BIT(0), INTCG_base + INTCG_ICTLR);
|
writel_relaxed(BIT(0), INTCG_base + INTCG_ICTLR);
|
||||||
}
|
}
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(node, nr_irq, &csky_irqdomain_ops,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irq, &csky_irqdomain_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!root_domain)
|
if (!root_domain)
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
|
|
|
||||||
|
|
@ -204,8 +204,10 @@ static int __init davinci_cp_intc_do_init(struct resource *res, unsigned int num
|
||||||
return irq_base;
|
return irq_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
davinci_cp_intc_irq_domain = irq_domain_add_legacy(node, num_irqs, irq_base, 0,
|
davinci_cp_intc_irq_domain = irq_domain_create_legacy(of_fwnode_handle(node), num_irqs,
|
||||||
&davinci_cp_intc_irq_domain_ops, NULL);
|
irq_base, 0,
|
||||||
|
&davinci_cp_intc_irq_domain_ops,
|
||||||
|
NULL);
|
||||||
|
|
||||||
if (!davinci_cp_intc_irq_domain) {
|
if (!davinci_cp_intc_irq_domain) {
|
||||||
pr_err("%s: unable to create an interrupt domain\n", __func__);
|
pr_err("%s: unable to create an interrupt domain\n", __func__);
|
||||||
|
|
|
||||||
|
|
@ -95,7 +95,7 @@ static int __init digicolor_of_init(struct device_node *node,
|
||||||
regmap_write(ucregs, UC_IRQ_CONTROL, 1);
|
regmap_write(ucregs, UC_IRQ_CONTROL, 1);
|
||||||
|
|
||||||
digicolor_irq_domain =
|
digicolor_irq_domain =
|
||||||
irq_domain_add_linear(node, 64, &irq_generic_chip_ops, NULL);
|
irq_domain_create_linear(of_fwnode_handle(node), 64, &irq_generic_chip_ops, NULL);
|
||||||
if (!digicolor_irq_domain) {
|
if (!digicolor_irq_domain) {
|
||||||
pr_err("%pOF: unable to create IRQ domain\n", node);
|
pr_err("%pOF: unable to create IRQ domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -173,7 +173,7 @@ static int __init dw_apb_ictl_init(struct device_node *np,
|
||||||
else
|
else
|
||||||
nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));
|
nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L));
|
||||||
|
|
||||||
domain = irq_domain_add_linear(np, nrirqs, domain_ops, NULL);
|
domain = irq_domain_create_linear(of_fwnode_handle(np), nrirqs, domain_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: unable to add irq domain\n", np);
|
pr_err("%pOF: unable to add irq domain\n", np);
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -180,8 +180,9 @@ static int __init ft010_of_init_irq(struct device_node *node,
|
||||||
writel(0, FT010_IRQ_MASK(f->base));
|
writel(0, FT010_IRQ_MASK(f->base));
|
||||||
writel(0, FT010_FIQ_MASK(f->base));
|
writel(0, FT010_FIQ_MASK(f->base));
|
||||||
|
|
||||||
f->domain = irq_domain_add_simple(node, FT010_NUM_IRQS, 0,
|
f->domain = irq_domain_create_simple(of_fwnode_handle(node),
|
||||||
&ft010_irqdomain_ops, f);
|
FT010_NUM_IRQS, 0,
|
||||||
|
&ft010_irqdomain_ops, f);
|
||||||
set_handle_irq(ft010_irqchip_handle_irq);
|
set_handle_irq(ft010_irqchip_handle_irq);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
||||||
|
|
@ -101,10 +101,9 @@ static int __init goldfish_pic_of_init(struct device_node *of_node,
|
||||||
irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0,
|
irq_setup_generic_chip(gc, IRQ_MSK(GFPIC_NR_IRQS), 0,
|
||||||
IRQ_NOPROBE | IRQ_LEVEL, 0);
|
IRQ_NOPROBE | IRQ_LEVEL, 0);
|
||||||
|
|
||||||
gfpic->irq_domain = irq_domain_add_legacy(of_node, GFPIC_NR_IRQS,
|
gfpic->irq_domain = irq_domain_create_legacy(of_fwnode_handle(of_node), GFPIC_NR_IRQS,
|
||||||
GFPIC_IRQ_BASE, 0,
|
GFPIC_IRQ_BASE, 0, &goldfish_irq_domain_ops,
|
||||||
&goldfish_irq_domain_ops,
|
NULL);
|
||||||
NULL);
|
|
||||||
if (!gfpic->irq_domain) {
|
if (!gfpic->irq_domain) {
|
||||||
pr_err("Failed to add irqdomain!\n");
|
pr_err("Failed to add irqdomain!\n");
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -386,10 +386,8 @@ hip04_of_init(struct device_node *node, struct device_node *parent)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
hip04_data.domain = irq_domain_add_legacy(node, nr_irqs, irq_base,
|
hip04_data.domain = irq_domain_create_legacy(of_fwnode_handle(node), nr_irqs, irq_base, 0,
|
||||||
0,
|
&hip04_irq_domain_ops, &hip04_data);
|
||||||
&hip04_irq_domain_ops,
|
|
||||||
&hip04_data);
|
|
||||||
if (WARN_ON(!hip04_data.domain))
|
if (WARN_ON(!hip04_data.domain))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -313,8 +313,8 @@ struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
|
||||||
|
|
||||||
init_8259A(0);
|
init_8259A(0);
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(node, 16, I8259A_IRQ_BASE, 0,
|
domain = irq_domain_create_legacy(of_fwnode_handle(node), 16, I8259A_IRQ_BASE, 0,
|
||||||
&i8259A_ops, NULL);
|
&i8259A_ops, NULL);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
panic("Failed to add i8259 IRQ domain");
|
panic("Failed to add i8259 IRQ domain");
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -72,7 +72,7 @@ static int idt_pic_init(struct device_node *of_node, struct device_node *parent)
|
||||||
goto out_unmap_irq;
|
goto out_unmap_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(of_node, IDT_PIC_NR_IRQS,
|
domain = irq_domain_create_linear(of_fwnode_handle(of_node), IDT_PIC_NR_IRQS,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("Failed to add irqdomain!\n");
|
pr_err("Failed to add irqdomain!\n");
|
||||||
|
|
|
||||||
|
|
@ -372,7 +372,7 @@ static int pdc_intc_probe(struct platform_device *pdev)
|
||||||
priv->syswake_irq = irq;
|
priv->syswake_irq = irq;
|
||||||
|
|
||||||
/* Set up an IRQ domain */
|
/* Set up an IRQ domain */
|
||||||
priv->domain = irq_domain_add_linear(node, 16, &irq_generic_chip_ops,
|
priv->domain = irq_domain_create_linear(of_fwnode_handle(node), 16, &irq_generic_chip_ops,
|
||||||
priv);
|
priv);
|
||||||
if (unlikely(!priv->domain)) {
|
if (unlikely(!priv->domain)) {
|
||||||
dev_err(&pdev->dev, "cannot add IRQ domain\n");
|
dev_err(&pdev->dev, "cannot add IRQ domain\n");
|
||||||
|
|
|
||||||
|
|
@ -240,8 +240,8 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node,
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, GPC_MAX_IRQS,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, GPC_MAX_IRQS,
|
||||||
node, &gpcv2_irqchip_data_domain_ops, cd);
|
of_fwnode_handle(node), &gpcv2_irqchip_data_domain_ops, cd);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
iounmap(cd->gpc_base);
|
iounmap(cd->gpc_base);
|
||||||
kfree(cd);
|
kfree(cd);
|
||||||
|
|
|
||||||
|
|
@ -254,7 +254,7 @@ static int imx_intmux_probe(struct platform_device *pdev)
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(np, 32, &imx_intmux_domain_ops,
|
domain = irq_domain_create_linear(of_fwnode_handle(np), 32, &imx_intmux_domain_ops,
|
||||||
&data->irqchip_data[i]);
|
&data->irqchip_data[i]);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -212,7 +212,7 @@ static int imx_irqsteer_probe(struct platform_device *pdev)
|
||||||
/* steer all IRQs into configured channel */
|
/* steer all IRQs into configured channel */
|
||||||
writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
|
writel_relaxed(BIT(data->channel), data->regs + CHANCTRL);
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(np, data->reg_num * 32,
|
data->domain = irq_domain_create_linear(of_fwnode_handle(np), data->reg_num * 32,
|
||||||
&imx_irqsteer_domain_ops, data);
|
&imx_irqsteer_domain_ops, data);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
dev_err(&pdev->dev, "failed to create IRQ domain\n");
|
dev_err(&pdev->dev, "failed to create IRQ domain\n");
|
||||||
|
|
|
||||||
|
|
@ -114,8 +114,8 @@ static int __init ingenic_tcu_irq_init(struct device_node *np,
|
||||||
|
|
||||||
tcu->nb_parent_irqs = irqs;
|
tcu->nb_parent_irqs = irqs;
|
||||||
|
|
||||||
tcu->domain = irq_domain_add_linear(np, 32, &irq_generic_chip_ops,
|
tcu->domain = irq_domain_create_linear(of_fwnode_handle(np), 32, &irq_generic_chip_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!tcu->domain) {
|
if (!tcu->domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_free_tcu;
|
goto err_free_tcu;
|
||||||
|
|
|
||||||
|
|
@ -90,8 +90,8 @@ static int __init ingenic_intc_of_init(struct device_node *node,
|
||||||
goto out_unmap_irq;
|
goto out_unmap_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, num_chips * 32,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), num_chips * 32,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
goto out_unmap_base;
|
goto out_unmap_base;
|
||||||
|
|
|
||||||
|
|
@ -107,9 +107,8 @@ static int __init aic_irq_of_init(struct device_node *node,
|
||||||
if (ret < 0)
|
if (ret < 0)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(node, dom_sz - min_irq, min_irq, min_irq,
|
domain = irq_domain_create_legacy(of_fwnode_handle(node), dom_sz - min_irq, min_irq,
|
||||||
&jcore_aic_irqdomain_ops,
|
min_irq, &jcore_aic_irqdomain_ops, &jcore_aic);
|
||||||
&jcore_aic);
|
|
||||||
if (!domain)
|
if (!domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -157,8 +157,8 @@ static int keystone_irq_probe(struct platform_device *pdev)
|
||||||
kirq->chip.irq_mask = keystone_irq_setmask;
|
kirq->chip.irq_mask = keystone_irq_setmask;
|
||||||
kirq->chip.irq_unmask = keystone_irq_unmask;
|
kirq->chip.irq_unmask = keystone_irq_unmask;
|
||||||
|
|
||||||
kirq->irqd = irq_domain_add_linear(np, KEYSTONE_N_IRQ,
|
kirq->irqd = irq_domain_create_linear(of_fwnode_handle(np), KEYSTONE_N_IRQ,
|
||||||
&keystone_irq_ops, kirq);
|
&keystone_irq_ops, kirq);
|
||||||
if (!kirq->irqd) {
|
if (!kirq->irqd) {
|
||||||
dev_err(dev, "IRQ domain registration failed\n");
|
dev_err(dev, "IRQ domain registration failed\n");
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -210,8 +210,8 @@ static int __init lpc32xx_of_ic_init(struct device_node *node,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
irqc->domain = irq_domain_add_linear(node, NR_LPC32XX_IC_IRQS,
|
irqc->domain = irq_domain_create_linear(of_fwnode_handle(node), NR_LPC32XX_IC_IRQS,
|
||||||
&lpc32xx_irq_domain_ops, irqc);
|
&lpc32xx_irq_domain_ops, irqc);
|
||||||
if (!irqc->domain) {
|
if (!irqc->domain) {
|
||||||
pr_err("unable to add irq domain\n");
|
pr_err("unable to add irq domain\n");
|
||||||
iounmap(irqc->base);
|
iounmap(irqc->base);
|
||||||
|
|
|
||||||
|
|
@ -208,8 +208,8 @@ ls_extirq_of_init(struct device_node *node, struct device_node *parent)
|
||||||
of_device_is_compatible(node, "fsl,ls1043a-extirq");
|
of_device_is_compatible(node, "fsl,ls1043a-extirq");
|
||||||
raw_spin_lock_init(&priv->lock);
|
raw_spin_lock_init(&priv->lock);
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, priv->nirq, of_fwnode_handle(node),
|
||||||
&extirq_domain_ops, priv);
|
&extirq_domain_ops, priv);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_add_hierarchy;
|
goto err_add_hierarchy;
|
||||||
|
|
|
||||||
|
|
@ -215,10 +215,10 @@ static void ls_scfg_msi_irq_handler(struct irq_desc *desc)
|
||||||
static int ls_scfg_msi_domains_init(struct ls_scfg_msi *msi_data)
|
static int ls_scfg_msi_domains_init(struct ls_scfg_msi *msi_data)
|
||||||
{
|
{
|
||||||
/* Initialize MSI domain parent */
|
/* Initialize MSI domain parent */
|
||||||
msi_data->parent = irq_domain_add_linear(NULL,
|
msi_data->parent = irq_domain_create_linear(NULL,
|
||||||
msi_data->irqs_num,
|
msi_data->irqs_num,
|
||||||
&ls_scfg_msi_domain_ops,
|
&ls_scfg_msi_domain_ops,
|
||||||
msi_data);
|
msi_data);
|
||||||
if (!msi_data->parent) {
|
if (!msi_data->parent) {
|
||||||
dev_err(&msi_data->pdev->dev, "failed to create IRQ domain\n");
|
dev_err(&msi_data->pdev->dev, "failed to create IRQ domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -126,8 +126,8 @@ static int __init ls1x_intc_of_init(struct device_node *node,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set up an IRQ domain */
|
/* Set up an IRQ domain */
|
||||||
priv->domain = irq_domain_add_linear(node, 32, &irq_generic_chip_ops,
|
priv->domain = irq_domain_create_linear(of_fwnode_handle(node), 32, &irq_generic_chip_ops,
|
||||||
NULL);
|
NULL);
|
||||||
if (!priv->domain) {
|
if (!priv->domain) {
|
||||||
pr_err("ls1x-irq: cannot add IRQ domain\n");
|
pr_err("ls1x-irq: cannot add IRQ domain\n");
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -248,8 +248,9 @@ static int mchp_eic_init(struct device_node *node, struct device_node *parent)
|
||||||
eic->irqs[i] = irq.args[1];
|
eic->irqs[i] = irq.args[1];
|
||||||
}
|
}
|
||||||
|
|
||||||
eic->domain = irq_domain_add_hierarchy(parent_domain, 0, MCHP_EIC_NIRQ,
|
eic->domain = irq_domain_create_hierarchy(parent_domain, 0, MCHP_EIC_NIRQ,
|
||||||
node, &mchp_eic_domain_ops, eic);
|
of_fwnode_handle(node), &mchp_eic_domain_ops,
|
||||||
|
eic);
|
||||||
if (!eic->domain) {
|
if (!eic->domain) {
|
||||||
pr_err("%pOF: Failed to add domain\n", node);
|
pr_err("%pOF: Failed to add domain\n", node);
|
||||||
ret = -ENODEV;
|
ret = -ENODEV;
|
||||||
|
|
|
||||||
|
|
@ -238,11 +238,9 @@ static void mips_cpu_register_ipi_domain(struct device_node *of_node)
|
||||||
struct cpu_ipi_domain_state *ipi_domain_state;
|
struct cpu_ipi_domain_state *ipi_domain_state;
|
||||||
|
|
||||||
ipi_domain_state = kzalloc(sizeof(*ipi_domain_state), GFP_KERNEL);
|
ipi_domain_state = kzalloc(sizeof(*ipi_domain_state), GFP_KERNEL);
|
||||||
ipi_domain = irq_domain_add_hierarchy(irq_domain,
|
ipi_domain = irq_domain_create_hierarchy(irq_domain, IRQ_DOMAIN_FLAG_IPI_SINGLE, 2,
|
||||||
IRQ_DOMAIN_FLAG_IPI_SINGLE,
|
of_fwnode_handle(of_node),
|
||||||
2, of_node,
|
&mips_cpu_ipi_chip_ops, ipi_domain_state);
|
||||||
&mips_cpu_ipi_chip_ops,
|
|
||||||
ipi_domain_state);
|
|
||||||
if (!ipi_domain)
|
if (!ipi_domain)
|
||||||
panic("Failed to add MIPS CPU IPI domain");
|
panic("Failed to add MIPS CPU IPI domain");
|
||||||
irq_domain_update_bus_token(ipi_domain, DOMAIN_BUS_IPI);
|
irq_domain_update_bus_token(ipi_domain, DOMAIN_BUS_IPI);
|
||||||
|
|
@ -260,9 +258,8 @@ static void __init __mips_cpu_irq_init(struct device_node *of_node)
|
||||||
clear_c0_status(ST0_IM);
|
clear_c0_status(ST0_IM);
|
||||||
clear_c0_cause(CAUSEF_IP);
|
clear_c0_cause(CAUSEF_IP);
|
||||||
|
|
||||||
irq_domain = irq_domain_add_legacy(of_node, 8, MIPS_CPU_IRQ_BASE, 0,
|
irq_domain = irq_domain_create_legacy(of_fwnode_handle(of_node), 8, MIPS_CPU_IRQ_BASE, 0,
|
||||||
&mips_cpu_intc_irq_domain_ops,
|
&mips_cpu_intc_irq_domain_ops, NULL);
|
||||||
NULL);
|
|
||||||
if (!irq_domain)
|
if (!irq_domain)
|
||||||
panic("Failed to add irqdomain for MIPS CPU");
|
panic("Failed to add irqdomain for MIPS CPU");
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -841,10 +841,10 @@ static int gic_register_ipi_domain(struct device_node *node)
|
||||||
struct irq_domain *gic_ipi_domain;
|
struct irq_domain *gic_ipi_domain;
|
||||||
unsigned int v[2], num_ipis;
|
unsigned int v[2], num_ipis;
|
||||||
|
|
||||||
gic_ipi_domain = irq_domain_add_hierarchy(gic_irq_domain,
|
gic_ipi_domain = irq_domain_create_hierarchy(gic_irq_domain, IRQ_DOMAIN_FLAG_IPI_PER_CPU,
|
||||||
IRQ_DOMAIN_FLAG_IPI_PER_CPU,
|
GIC_NUM_LOCAL_INTRS + gic_shared_intrs,
|
||||||
GIC_NUM_LOCAL_INTRS + gic_shared_intrs,
|
of_fwnode_handle(node), &gic_ipi_domain_ops,
|
||||||
node, &gic_ipi_domain_ops, NULL);
|
NULL);
|
||||||
if (!gic_ipi_domain) {
|
if (!gic_ipi_domain) {
|
||||||
pr_err("Failed to add IPI domain");
|
pr_err("Failed to add IPI domain");
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
|
|
@ -963,9 +963,10 @@ static int __init gic_of_init(struct device_node *node,
|
||||||
gic_irq_dispatch);
|
gic_irq_dispatch);
|
||||||
}
|
}
|
||||||
|
|
||||||
gic_irq_domain = irq_domain_add_simple(node, GIC_NUM_LOCAL_INTRS +
|
gic_irq_domain = irq_domain_create_simple(of_fwnode_handle(node),
|
||||||
gic_shared_intrs, 0,
|
GIC_NUM_LOCAL_INTRS +
|
||||||
&gic_irq_domain_ops, NULL);
|
gic_shared_intrs, 0,
|
||||||
|
&gic_irq_domain_ops, NULL);
|
||||||
if (!gic_irq_domain) {
|
if (!gic_irq_domain) {
|
||||||
pr_err("Failed to add IRQ domain");
|
pr_err("Failed to add IRQ domain");
|
||||||
return -ENXIO;
|
return -ENXIO;
|
||||||
|
|
|
||||||
|
|
@ -261,9 +261,9 @@ static int __init mmp_init_bases(struct device_node *node)
|
||||||
}
|
}
|
||||||
|
|
||||||
icu_data[0].virq_base = 0;
|
icu_data[0].virq_base = 0;
|
||||||
icu_data[0].domain = irq_domain_add_linear(node, nr_irqs,
|
icu_data[0].domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irqs,
|
||||||
&mmp_irq_domain_ops,
|
&mmp_irq_domain_ops,
|
||||||
&icu_data[0]);
|
&icu_data[0]);
|
||||||
for (irq = 0; irq < nr_irqs; irq++) {
|
for (irq = 0; irq < nr_irqs; irq++) {
|
||||||
ret = irq_create_mapping(icu_data[0].domain, irq);
|
ret = irq_create_mapping(icu_data[0].domain, irq);
|
||||||
if (!ret) {
|
if (!ret) {
|
||||||
|
|
@ -391,9 +391,9 @@ static int __init mmp2_mux_of_init(struct device_node *node,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
icu_data[i].virq_base = 0;
|
icu_data[i].virq_base = 0;
|
||||||
icu_data[i].domain = irq_domain_add_linear(node, nr_irqs,
|
icu_data[i].domain = irq_domain_create_linear(of_fwnode_handle(node), nr_irqs,
|
||||||
&mmp_irq_domain_ops,
|
&mmp_irq_domain_ops,
|
||||||
&icu_data[i]);
|
&icu_data[i]);
|
||||||
for (irq = 0; irq < nr_irqs; irq++) {
|
for (irq = 0; irq < nr_irqs; irq++) {
|
||||||
ret = irq_create_mapping(icu_data[i].domain, irq);
|
ret = irq_create_mapping(icu_data[i].domain, irq);
|
||||||
if (!ret) {
|
if (!ret) {
|
||||||
|
|
|
||||||
|
|
@ -132,8 +132,8 @@ static int __init vcoreiii_irq_init(struct device_node *node,
|
||||||
if (!parent_irq)
|
if (!parent_irq)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, p->n_irq,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), p->n_irq,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOFn: unable to add irq domain\n", node);
|
pr_err("%pOFn: unable to add irq domain\n", node);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -273,8 +273,8 @@ static int __init mst_intc_of_init(struct device_node *dn,
|
||||||
raw_spin_lock_init(&cd->lock);
|
raw_spin_lock_init(&cd->lock);
|
||||||
cd->irq_start = irq_start;
|
cd->irq_start = irq_start;
|
||||||
cd->nr_irqs = irq_end - irq_start + 1;
|
cd->nr_irqs = irq_end - irq_start + 1;
|
||||||
domain = irq_domain_add_hierarchy(domain_parent, 0, cd->nr_irqs, dn,
|
domain = irq_domain_create_hierarchy(domain_parent, 0, cd->nr_irqs, of_fwnode_handle(dn),
|
||||||
&mst_intc_domain_ops, cd);
|
&mst_intc_domain_ops, cd);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
iounmap(cd->base);
|
iounmap(cd->base);
|
||||||
kfree(cd);
|
kfree(cd);
|
||||||
|
|
|
||||||
|
|
@ -336,9 +336,8 @@ static int __init mtk_cirq_of_init(struct device_node *node,
|
||||||
cirq_data->offsets = match->data;
|
cirq_data->offsets = match->data;
|
||||||
|
|
||||||
irq_num = cirq_data->ext_irq_end - cirq_data->ext_irq_start + 1;
|
irq_num = cirq_data->ext_irq_end - cirq_data->ext_irq_start + 1;
|
||||||
domain = irq_domain_add_hierarchy(domain_parent, 0,
|
domain = irq_domain_create_hierarchy(domain_parent, 0, irq_num, of_fwnode_handle(node),
|
||||||
irq_num, node,
|
&cirq_domain_ops, cirq_data);
|
||||||
&cirq_domain_ops, cirq_data);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto out_unmap;
|
goto out_unmap;
|
||||||
|
|
|
||||||
|
|
@ -207,8 +207,8 @@ static int __init mtk_sysirq_of_init(struct device_node *node,
|
||||||
chip_data->which_word[i] = word;
|
chip_data->which_word[i] = word;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
|
domain = irq_domain_create_hierarchy(domain_parent, 0, intpol_num, of_fwnode_handle(node),
|
||||||
&sysirq_domain_ops, chip_data);
|
&sysirq_domain_ops, chip_data);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto out_free_which_word;
|
goto out_free_which_word;
|
||||||
|
|
|
||||||
|
|
@ -150,8 +150,8 @@ static int mvebu_pic_probe(struct platform_device *pdev)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
pic->domain = irq_domain_add_linear(node, PIC_MAX_IRQS,
|
pic->domain = irq_domain_create_linear(of_fwnode_handle(node), PIC_MAX_IRQS,
|
||||||
&mvebu_pic_domain_ops, pic);
|
&mvebu_pic_domain_ops, pic);
|
||||||
if (!pic->domain) {
|
if (!pic->domain) {
|
||||||
dev_err(&pdev->dev, "Failed to allocate irq domain\n");
|
dev_err(&pdev->dev, "Failed to allocate irq domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -162,8 +162,8 @@ static const struct irq_domain_ops icoll_irq_domain_ops = {
|
||||||
static void __init icoll_add_domain(struct device_node *np,
|
static void __init icoll_add_domain(struct device_node *np,
|
||||||
int num)
|
int num)
|
||||||
{
|
{
|
||||||
icoll_domain = irq_domain_add_linear(np, num,
|
icoll_domain = irq_domain_create_linear(of_fwnode_handle(np), num,
|
||||||
&icoll_irq_domain_ops, NULL);
|
&icoll_irq_domain_ops, NULL);
|
||||||
|
|
||||||
if (!icoll_domain)
|
if (!icoll_domain)
|
||||||
panic("%pOF: unable to create irq domain", np);
|
panic("%pOF: unable to create irq domain", np);
|
||||||
|
|
|
||||||
|
|
@ -90,7 +90,7 @@ static int __init nvic_of_init(struct device_node *node,
|
||||||
irqs = NVIC_MAX_IRQ;
|
irqs = NVIC_MAX_IRQ;
|
||||||
|
|
||||||
nvic_irq_domain =
|
nvic_irq_domain =
|
||||||
irq_domain_add_linear(node, irqs, &nvic_irq_domain_ops, NULL);
|
irq_domain_create_linear(of_fwnode_handle(node), irqs, &nvic_irq_domain_ops, NULL);
|
||||||
|
|
||||||
if (!nvic_irq_domain) {
|
if (!nvic_irq_domain) {
|
||||||
pr_warn("Failed to allocate irq domain\n");
|
pr_warn("Failed to allocate irq domain\n");
|
||||||
|
|
|
||||||
|
|
@ -248,7 +248,7 @@ static int __init omap_init_irq_of(struct device_node *node)
|
||||||
if (WARN_ON(!omap_irq_base))
|
if (WARN_ON(!omap_irq_base))
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, omap_nr_irqs,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), omap_nr_irqs,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
|
|
||||||
omap_irq_soft_reset();
|
omap_irq_soft_reset();
|
||||||
|
|
@ -274,7 +274,7 @@ static int __init omap_init_irq_legacy(u32 base, struct device_node *node)
|
||||||
irq_base = 0;
|
irq_base = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_legacy(node, omap_nr_irqs, irq_base, 0,
|
domain = irq_domain_create_legacy(of_fwnode_handle(node), omap_nr_irqs, irq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
|
|
||||||
omap_irq_soft_reset();
|
omap_irq_soft_reset();
|
||||||
|
|
|
||||||
|
|
@ -144,8 +144,8 @@ static int __init or1k_pic_init(struct device_node *node,
|
||||||
/* Disable all interrupts until explicitly requested */
|
/* Disable all interrupts until explicitly requested */
|
||||||
mtspr(SPR_PICMR, (0UL));
|
mtspr(SPR_PICMR, (0UL));
|
||||||
|
|
||||||
root_domain = irq_domain_add_linear(node, 32, &or1k_irq_domain_ops,
|
root_domain = irq_domain_create_linear(of_fwnode_handle(node), 32, &or1k_irq_domain_ops,
|
||||||
pic);
|
pic);
|
||||||
|
|
||||||
set_handle_irq(or1k_pic_handle_irq);
|
set_handle_irq(or1k_pic_handle_irq);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -59,7 +59,7 @@ static int __init orion_irq_init(struct device_node *np,
|
||||||
/* count number of irq chips by valid reg addresses */
|
/* count number of irq chips by valid reg addresses */
|
||||||
num_chips = of_address_count(np);
|
num_chips = of_address_count(np);
|
||||||
|
|
||||||
orion_irq_domain = irq_domain_add_linear(np,
|
orion_irq_domain = irq_domain_create_linear(of_fwnode_handle(np),
|
||||||
num_chips * ORION_IRQS_PER_CHIP,
|
num_chips * ORION_IRQS_PER_CHIP,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!orion_irq_domain)
|
if (!orion_irq_domain)
|
||||||
|
|
@ -146,8 +146,8 @@ static int __init orion_bridge_irq_init(struct device_node *np,
|
||||||
/* get optional number of interrupts provided */
|
/* get optional number of interrupts provided */
|
||||||
of_property_read_u32(np, "marvell,#interrupts", &nrirqs);
|
of_property_read_u32(np, "marvell,#interrupts", &nrirqs);
|
||||||
|
|
||||||
domain = irq_domain_add_linear(np, nrirqs,
|
domain = irq_domain_create_linear(of_fwnode_handle(np), nrirqs,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOFn: unable to add irq domain\n", np);
|
pr_err("%pOFn: unable to add irq domain\n", np);
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -323,8 +323,8 @@ static int __init owl_sirq_init(const struct owl_sirq_params *params,
|
||||||
owl_sirq_clear_set_extctl(chip_data, 0, INTC_EXTCTL_CLK_SEL, i);
|
owl_sirq_clear_set_extctl(chip_data, 0, INTC_EXTCTL_CLK_SEL, i);
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, NUM_SIRQ, node,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, NUM_SIRQ, of_fwnode_handle(node),
|
||||||
&owl_sirq_domain_ops, chip_data);
|
&owl_sirq_domain_ops, chip_data);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: failed to add domain\n", node);
|
pr_err("%pOF: failed to add domain\n", node);
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -227,9 +227,9 @@ static int __init pic32_of_init(struct device_node *node,
|
||||||
goto err_iounmap;
|
goto err_iounmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
evic_irq_domain = irq_domain_add_linear(node, nchips * 32,
|
evic_irq_domain = irq_domain_create_linear(of_fwnode_handle(node), nchips * 32,
|
||||||
&pic32_irq_domain_ops,
|
&pic32_irq_domain_ops,
|
||||||
priv);
|
priv);
|
||||||
if (!evic_irq_domain) {
|
if (!evic_irq_domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto err_free_priv;
|
goto err_free_priv;
|
||||||
|
|
|
||||||
|
|
@ -555,8 +555,8 @@ static int pruss_intc_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
mutex_init(&intc->lock);
|
mutex_init(&intc->lock);
|
||||||
|
|
||||||
intc->domain = irq_domain_add_linear(dev->of_node, max_system_events,
|
intc->domain = irq_domain_create_linear(of_fwnode_handle(dev->of_node), max_system_events,
|
||||||
&pruss_intc_irq_domain_ops, intc);
|
&pruss_intc_irq_domain_ops, intc);
|
||||||
if (!intc->domain)
|
if (!intc->domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -162,7 +162,7 @@ static int __init realtek_rtl_of_init(struct device_node *node, struct device_no
|
||||||
else if (!parent_irq)
|
else if (!parent_irq)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, RTL_ICTL_NUM_INPUTS, &irq_domain_ops, NULL);
|
domain = irq_domain_create_linear(of_fwnode_handle(node), RTL_ICTL_NUM_INPUTS, &irq_domain_ops, NULL);
|
||||||
if (!domain)
|
if (!domain)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -513,8 +513,10 @@ static int intc_irqpin_probe(struct platform_device *pdev)
|
||||||
irq_chip->irq_set_wake = intc_irqpin_irq_set_wake;
|
irq_chip->irq_set_wake = intc_irqpin_irq_set_wake;
|
||||||
irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND;
|
irq_chip->flags = IRQCHIP_MASK_ON_SUSPEND;
|
||||||
|
|
||||||
p->irq_domain = irq_domain_add_simple(dev->of_node, nirqs, 0,
|
p->irq_domain = irq_domain_create_simple(of_fwnode_handle(dev->of_node),
|
||||||
&intc_irqpin_irq_domain_ops, p);
|
nirqs, 0,
|
||||||
|
&intc_irqpin_irq_domain_ops,
|
||||||
|
p);
|
||||||
if (!p->irq_domain) {
|
if (!p->irq_domain) {
|
||||||
ret = -ENXIO;
|
ret = -ENXIO;
|
||||||
dev_err(dev, "cannot initialize irq domain\n");
|
dev_err(dev, "cannot initialize irq domain\n");
|
||||||
|
|
|
||||||
|
|
@ -168,8 +168,8 @@ static int irqc_probe(struct platform_device *pdev)
|
||||||
|
|
||||||
p->cpu_int_base = p->iomem + IRQC_INT_CPU_BASE(0); /* SYS-SPI */
|
p->cpu_int_base = p->iomem + IRQC_INT_CPU_BASE(0); /* SYS-SPI */
|
||||||
|
|
||||||
p->irq_domain = irq_domain_add_linear(dev->of_node, p->number_of_irqs,
|
p->irq_domain = irq_domain_create_linear(of_fwnode_handle(dev->of_node), p->number_of_irqs,
|
||||||
&irq_generic_chip_ops, p);
|
&irq_generic_chip_ops, p);
|
||||||
if (!p->irq_domain) {
|
if (!p->irq_domain) {
|
||||||
ret = -ENXIO;
|
ret = -ENXIO;
|
||||||
dev_err(dev, "cannot initialize irq domain\n");
|
dev_err(dev, "cannot initialize irq domain\n");
|
||||||
|
|
|
||||||
|
|
@ -231,9 +231,9 @@ static int rza1_irqc_probe(struct platform_device *pdev)
|
||||||
priv->chip.irq_set_type = rza1_irqc_set_type;
|
priv->chip.irq_set_type = rza1_irqc_set_type;
|
||||||
priv->chip.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
|
priv->chip.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE;
|
||||||
|
|
||||||
priv->irq_domain = irq_domain_add_hierarchy(parent, 0, IRQC_NUM_IRQ,
|
priv->irq_domain = irq_domain_create_hierarchy(parent, 0, IRQC_NUM_IRQ,
|
||||||
np, &rza1_irqc_domain_ops,
|
of_fwnode_handle(np), &rza1_irqc_domain_ops,
|
||||||
priv);
|
priv);
|
||||||
if (!priv->irq_domain) {
|
if (!priv->irq_domain) {
|
||||||
dev_err(dev, "cannot initialize irq domain\n");
|
dev_err(dev, "cannot initialize irq domain\n");
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -574,9 +574,9 @@ static int rzg2l_irqc_common_init(struct device_node *node, struct device_node *
|
||||||
|
|
||||||
raw_spin_lock_init(&rzg2l_irqc_data->lock);
|
raw_spin_lock_init(&rzg2l_irqc_data->lock);
|
||||||
|
|
||||||
irq_domain = irq_domain_add_hierarchy(parent_domain, 0, IRQC_NUM_IRQ,
|
irq_domain = irq_domain_create_hierarchy(parent_domain, 0, IRQC_NUM_IRQ,
|
||||||
node, &rzg2l_irqc_domain_ops,
|
of_fwnode_handle(node), &rzg2l_irqc_domain_ops,
|
||||||
rzg2l_irqc_data);
|
rzg2l_irqc_data);
|
||||||
if (!irq_domain) {
|
if (!irq_domain) {
|
||||||
pm_runtime_put(dev);
|
pm_runtime_put(dev);
|
||||||
return dev_err_probe(dev, -ENOMEM, "failed to add irq domain\n");
|
return dev_err_probe(dev, -ENOMEM, "failed to add irq domain\n");
|
||||||
|
|
|
||||||
|
|
@ -514,8 +514,9 @@ static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p
|
||||||
|
|
||||||
raw_spin_lock_init(&rzv2h_icu_data->lock);
|
raw_spin_lock_init(&rzv2h_icu_data->lock);
|
||||||
|
|
||||||
irq_domain = irq_domain_add_hierarchy(parent_domain, 0, ICU_NUM_IRQ, node,
|
irq_domain = irq_domain_create_hierarchy(parent_domain, 0, ICU_NUM_IRQ,
|
||||||
&rzv2h_icu_domain_ops, rzv2h_icu_data);
|
of_fwnode_handle(node), &rzv2h_icu_domain_ops,
|
||||||
|
rzv2h_icu_data);
|
||||||
if (!irq_domain) {
|
if (!irq_domain) {
|
||||||
dev_err(&pdev->dev, "failed to add irq domain\n");
|
dev_err(&pdev->dev, "failed to add irq domain\n");
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -162,7 +162,7 @@ void __init sa11x0_init_irq_nodt(int irq_start, resource_size_t io_start)
|
||||||
*/
|
*/
|
||||||
writel_relaxed(1, iobase + ICCR);
|
writel_relaxed(1, iobase + ICCR);
|
||||||
|
|
||||||
sa1100_normal_irqdomain = irq_domain_add_simple(NULL,
|
sa1100_normal_irqdomain = irq_domain_create_simple(NULL,
|
||||||
32, irq_start,
|
32, irq_start,
|
||||||
&sa1100_normal_irqdomain_ops, NULL);
|
&sa1100_normal_irqdomain_ops, NULL);
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -253,8 +253,8 @@ static int __init exiu_dt_init(struct device_node *node,
|
||||||
if (IS_ERR(data))
|
if (IS_ERR(data))
|
||||||
return PTR_ERR(data);
|
return PTR_ERR(data);
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, NUM_IRQS, node,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, NUM_IRQS, of_fwnode_handle(node),
|
||||||
&exiu_domain_ops, data);
|
&exiu_domain_ops, data);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: failed to allocate domain\n", node);
|
pr_err("%pOF: failed to allocate domain\n", node);
|
||||||
goto out_unmap;
|
goto out_unmap;
|
||||||
|
|
|
||||||
|
|
@ -256,8 +256,8 @@ static int __init sp_intc_init_dt(struct device_node *node, struct device_node *
|
||||||
writel_relaxed(~0, REG_INTR_CLEAR + i * 4);
|
writel_relaxed(~0, REG_INTR_CLEAR + i * 4);
|
||||||
}
|
}
|
||||||
|
|
||||||
sp_intc.domain = irq_domain_add_linear(node, SP_INTC_NR_IRQS,
|
sp_intc.domain = irq_domain_create_linear(of_fwnode_handle(node), SP_INTC_NR_IRQS,
|
||||||
&sp_intc_dm_ops, &sp_intc);
|
&sp_intc_dm_ops, &sp_intc);
|
||||||
if (!sp_intc.domain) {
|
if (!sp_intc.domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto out_unmap1;
|
goto out_unmap1;
|
||||||
|
|
|
||||||
|
|
@ -158,8 +158,8 @@ static int __init starfive_intc_init(struct device_node *intc,
|
||||||
|
|
||||||
raw_spin_lock_init(&irqc->lock);
|
raw_spin_lock_init(&irqc->lock);
|
||||||
|
|
||||||
irqc->domain = irq_domain_add_linear(intc, STARFIVE_INTC_SRC_IRQ_NUM,
|
irqc->domain = irq_domain_create_linear(of_fwnode_handle(intc), STARFIVE_INTC_SRC_IRQ_NUM,
|
||||||
&starfive_intc_domain_ops, irqc);
|
&starfive_intc_domain_ops, irqc);
|
||||||
if (!irqc->domain) {
|
if (!irqc->domain) {
|
||||||
pr_err("Unable to create IRQ domain\n");
|
pr_err("Unable to create IRQ domain\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -344,8 +344,8 @@ static int __init stm32_exti_init(const struct stm32_exti_drv_data *drv_data,
|
||||||
if (!host_data)
|
if (!host_data)
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, drv_data->bank_nr * IRQS_PER_BANK,
|
domain = irq_domain_create_linear(of_fwnode_handle(node), drv_data->bank_nr * IRQS_PER_BANK,
|
||||||
&irq_exti_domain_ops, NULL);
|
&irq_exti_domain_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOFn: Could not register interrupt domain.\n",
|
pr_err("%pOFn: Could not register interrupt domain.\n",
|
||||||
node);
|
node);
|
||||||
|
|
|
||||||
|
|
@ -682,10 +682,9 @@ static int stm32mp_exti_probe(struct platform_device *pdev)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, drv_data->bank_nr * IRQS_PER_BANK,
|
||||||
drv_data->bank_nr * IRQS_PER_BANK,
|
of_fwnode_handle(np), &stm32mp_exti_domain_ops,
|
||||||
np, &stm32mp_exti_domain_ops,
|
host_data);
|
||||||
host_data);
|
|
||||||
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
dev_err(dev, "Could not register exti domain\n");
|
dev_err(dev, "Could not register exti domain\n");
|
||||||
|
|
|
||||||
|
|
@ -133,7 +133,7 @@ static int __init sun4i_of_init(struct device_node *node,
|
||||||
/* Configure the external interrupt source type */
|
/* Configure the external interrupt source type */
|
||||||
writel(0x00, irq_ic_data->irq_base + SUN4I_IRQ_NMI_CTRL_REG);
|
writel(0x00, irq_ic_data->irq_base + SUN4I_IRQ_NMI_CTRL_REG);
|
||||||
|
|
||||||
irq_ic_data->irq_domain = irq_domain_add_linear(node, 3 * 32,
|
irq_ic_data->irq_domain = irq_domain_create_linear(of_fwnode_handle(node), 3 * 32,
|
||||||
&sun4i_irq_ops, NULL);
|
&sun4i_irq_ops, NULL);
|
||||||
if (!irq_ic_data->irq_domain)
|
if (!irq_ic_data->irq_domain)
|
||||||
panic("%pOF: unable to create IRQ domain\n", node);
|
panic("%pOF: unable to create IRQ domain\n", node);
|
||||||
|
|
|
||||||
|
|
@ -338,8 +338,8 @@ static int __init sun6i_r_intc_init(struct device_node *node,
|
||||||
return PTR_ERR(base);
|
return PTR_ERR(base);
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, 0, node,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, 0, of_fwnode_handle(node),
|
||||||
&sun6i_r_intc_domain_ops, NULL);
|
&sun6i_r_intc_domain_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: Failed to allocate domain\n", node);
|
pr_err("%pOF: Failed to allocate domain\n", node);
|
||||||
iounmap(base);
|
iounmap(base);
|
||||||
|
|
|
||||||
|
|
@ -159,7 +159,7 @@ static int __init sunxi_sc_nmi_irq_init(struct device_node *node,
|
||||||
struct irq_domain *domain;
|
struct irq_domain *domain;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(node, 1, &irq_generic_chip_ops, NULL);
|
domain = irq_domain_create_linear(of_fwnode_handle(node), 1, &irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("Could not register interrupt domain.\n");
|
pr_err("Could not register interrupt domain.\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -121,13 +121,13 @@ static int __init of_tb10x_init_irq(struct device_node *ictl,
|
||||||
goto ioremap_fail;
|
goto ioremap_fail;
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_linear(ictl, AB_IRQCTL_MAXIRQ,
|
domain = irq_domain_create_linear(of_fwnode_handle(ictl), AB_IRQCTL_MAXIRQ,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
pr_err("%pOFn: Could not register interrupt domain.\n",
|
pr_err("%pOFn: Could not register interrupt domain.\n",
|
||||||
ictl);
|
ictl);
|
||||||
goto irq_domain_add_fail;
|
goto irq_domain_create_fail;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = irq_alloc_domain_generic_chips(domain, AB_IRQCTL_MAXIRQ,
|
ret = irq_alloc_domain_generic_chips(domain, AB_IRQCTL_MAXIRQ,
|
||||||
|
|
@ -174,7 +174,7 @@ static int __init of_tb10x_init_irq(struct device_node *ictl,
|
||||||
|
|
||||||
gc_alloc_fail:
|
gc_alloc_fail:
|
||||||
irq_domain_remove(domain);
|
irq_domain_remove(domain);
|
||||||
irq_domain_add_fail:
|
irq_domain_create_fail:
|
||||||
iounmap(reg_base);
|
iounmap(reg_base);
|
||||||
ioremap_fail:
|
ioremap_fail:
|
||||||
release_mem_region(mem.start, resource_size(&mem));
|
release_mem_region(mem.start, resource_size(&mem));
|
||||||
|
|
|
||||||
|
|
@ -330,9 +330,8 @@ static int __init tegra_ictlr_init(struct device_node *node,
|
||||||
node, num_ictlrs, soc->num_ictlrs);
|
node, num_ictlrs, soc->num_ictlrs);
|
||||||
|
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, num_ictlrs * 32,
|
domain = irq_domain_create_hierarchy(parent_domain, 0, num_ictlrs * 32,
|
||||||
node, &tegra_ictlr_domain_ops,
|
of_fwnode_handle(node), &tegra_ictlr_domain_ops, lic);
|
||||||
lic);
|
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
pr_err("%pOF: failed to allocated domain\n", node);
|
pr_err("%pOF: failed to allocated domain\n", node);
|
||||||
err = -ENOMEM;
|
err = -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -701,9 +701,9 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
|
|
||||||
domain = irq_domain_add_linear(dev_of_node(dev),
|
domain = irq_domain_create_linear(of_fwnode_handle(dev_of_node(dev)),
|
||||||
ti_sci_get_num_resources(inta->vint),
|
ti_sci_get_num_resources(inta->vint),
|
||||||
&ti_sci_inta_irq_domain_ops, inta);
|
&ti_sci_inta_irq_domain_ops, inta);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
dev_err(dev, "Failed to allocate IRQ domain\n");
|
dev_err(dev, "Failed to allocate IRQ domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -274,8 +274,9 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev)
|
||||||
return PTR_ERR(intr->out_irqs);
|
return PTR_ERR(intr->out_irqs);
|
||||||
}
|
}
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(parent_domain, 0, 0, dev_of_node(dev),
|
domain = irq_domain_create_hierarchy(parent_domain, 0, 0,
|
||||||
&ti_sci_intr_irq_domain_ops, intr);
|
of_fwnode_handle(dev_of_node(dev)),
|
||||||
|
&ti_sci_intr_irq_domain_ops, intr);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
dev_err(dev, "Failed to allocate IRQ domain\n");
|
dev_err(dev, "Failed to allocate IRQ domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -125,7 +125,7 @@ static int ts4800_ic_probe(struct platform_device *pdev)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
data->domain = irq_domain_add_linear(node, 8, &ts4800_ic_ops, data);
|
data->domain = irq_domain_create_linear(of_fwnode_handle(node), 8, &ts4800_ic_ops, data);
|
||||||
if (!data->domain) {
|
if (!data->domain) {
|
||||||
dev_err(&pdev->dev, "cannot add IRQ domain\n");
|
dev_err(&pdev->dev, "cannot add IRQ domain\n");
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
|
|
|
||||||
|
|
@ -176,8 +176,8 @@ static void __init fpga_irq_init(void __iomem *base, int parent_irq,
|
||||||
f);
|
f);
|
||||||
}
|
}
|
||||||
|
|
||||||
f->domain = irq_domain_add_linear(node, fls(valid),
|
f->domain = irq_domain_create_linear(of_fwnode_handle(node), fls(valid),
|
||||||
&fpga_irqdomain_ops, f);
|
&fpga_irqdomain_ops, f);
|
||||||
|
|
||||||
/* This will allocate all valid descriptors in the linear case */
|
/* This will allocate all valid descriptors in the linear case */
|
||||||
for (i = 0; i < fls(valid); i++)
|
for (i = 0; i < fls(valid); i++)
|
||||||
|
|
|
||||||
|
|
@ -209,9 +209,9 @@ static int __init vf610_mscm_ir_of_init(struct device_node *node,
|
||||||
regmap_read(mscm_cp_regmap, MSCM_CPxNUM, &cpuid);
|
regmap_read(mscm_cp_regmap, MSCM_CPxNUM, &cpuid);
|
||||||
mscm_ir_data->cpu_mask = 0x1 << cpuid;
|
mscm_ir_data->cpu_mask = 0x1 << cpuid;
|
||||||
|
|
||||||
domain = irq_domain_add_hierarchy(domain_parent, 0,
|
domain = irq_domain_create_hierarchy(domain_parent, 0, MSCM_IRSPRC_NUM,
|
||||||
MSCM_IRSPRC_NUM, node,
|
of_fwnode_handle(node), &mscm_irq_domain_ops,
|
||||||
&mscm_irq_domain_ops, mscm_ir_data);
|
mscm_ir_data);
|
||||||
if (!domain) {
|
if (!domain) {
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto out_unmap;
|
goto out_unmap;
|
||||||
|
|
|
||||||
|
|
@ -289,8 +289,9 @@ static void __init vic_register(void __iomem *base, unsigned int parent_irq,
|
||||||
vic_handle_irq_cascaded, v);
|
vic_handle_irq_cascaded, v);
|
||||||
}
|
}
|
||||||
|
|
||||||
v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
|
v->domain = irq_domain_create_simple(of_fwnode_handle(node),
|
||||||
&vic_irqdomain_ops, v);
|
fls(valid_sources), irq,
|
||||||
|
&vic_irqdomain_ops, v);
|
||||||
/* create an IRQ mapping for each valid IRQ */
|
/* create an IRQ mapping for each valid IRQ */
|
||||||
for (i = 0; i < fls(valid_sources); i++)
|
for (i = 0; i < fls(valid_sources); i++)
|
||||||
if (valid_sources & (1 << i))
|
if (valid_sources & (1 << i))
|
||||||
|
|
|
||||||
|
|
@ -154,7 +154,7 @@ static int __init wpcm450_aic_of_init(struct device_node *node,
|
||||||
|
|
||||||
set_handle_irq(wpcm450_aic_handle_irq);
|
set_handle_irq(wpcm450_aic_handle_irq);
|
||||||
|
|
||||||
aic->domain = irq_domain_add_linear(node, AIC_NUM_IRQS, &wpcm450_aic_ops, aic);
|
aic->domain = irq_domain_create_linear(of_fwnode_handle(node), AIC_NUM_IRQS, &wpcm450_aic_ops, aic);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -212,8 +212,8 @@ static int __init xilinx_intc_of_init(struct device_node *intc,
|
||||||
xintc_write(irqc, MER, MER_HIE | MER_ME);
|
xintc_write(irqc, MER, MER_HIE | MER_ME);
|
||||||
}
|
}
|
||||||
|
|
||||||
irqc->root_domain = irq_domain_add_linear(intc, irqc->nr_irq,
|
irqc->root_domain = irq_domain_create_linear(of_fwnode_handle(intc), irqc->nr_irq,
|
||||||
&xintc_irq_domain_ops, irqc);
|
&xintc_irq_domain_ops, irqc);
|
||||||
if (!irqc->root_domain) {
|
if (!irqc->root_domain) {
|
||||||
pr_err("irq-xilinx: Unable to create IRQ domain\n");
|
pr_err("irq-xilinx: Unable to create IRQ domain\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
|
|
|
||||||
|
|
@ -167,8 +167,7 @@ static void __init xtensa_mx_init_common(struct irq_domain *root_domain)
|
||||||
int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent)
|
int __init xtensa_mx_init_legacy(struct device_node *interrupt_parent)
|
||||||
{
|
{
|
||||||
struct irq_domain *root_domain =
|
struct irq_domain *root_domain =
|
||||||
irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
|
irq_domain_create_legacy(NULL, NR_IRQS - 1, 1, 0, &xtensa_mx_irq_domain_ops,
|
||||||
&xtensa_mx_irq_domain_ops,
|
|
||||||
&xtensa_mx_irq_chip);
|
&xtensa_mx_irq_chip);
|
||||||
xtensa_mx_init_common(root_domain);
|
xtensa_mx_init_common(root_domain);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
@ -178,7 +177,7 @@ static int __init xtensa_mx_init(struct device_node *np,
|
||||||
struct device_node *interrupt_parent)
|
struct device_node *interrupt_parent)
|
||||||
{
|
{
|
||||||
struct irq_domain *root_domain =
|
struct irq_domain *root_domain =
|
||||||
irq_domain_add_linear(np, NR_IRQS, &xtensa_mx_irq_domain_ops,
|
irq_domain_create_linear(of_fwnode_handle(np), NR_IRQS, &xtensa_mx_irq_domain_ops,
|
||||||
&xtensa_mx_irq_chip);
|
&xtensa_mx_irq_chip);
|
||||||
xtensa_mx_init_common(root_domain);
|
xtensa_mx_init_common(root_domain);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
||||||
|
|
@ -85,7 +85,7 @@ static struct irq_chip xtensa_irq_chip = {
|
||||||
int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
|
int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
|
||||||
{
|
{
|
||||||
struct irq_domain *root_domain =
|
struct irq_domain *root_domain =
|
||||||
irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
|
irq_domain_create_legacy(NULL, NR_IRQS - 1, 1, 0,
|
||||||
&xtensa_irq_domain_ops, &xtensa_irq_chip);
|
&xtensa_irq_domain_ops, &xtensa_irq_chip);
|
||||||
irq_set_default_domain(root_domain);
|
irq_set_default_domain(root_domain);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
@ -95,7 +95,7 @@ static int __init xtensa_pic_init(struct device_node *np,
|
||||||
struct device_node *interrupt_parent)
|
struct device_node *interrupt_parent)
|
||||||
{
|
{
|
||||||
struct irq_domain *root_domain =
|
struct irq_domain *root_domain =
|
||||||
irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops,
|
irq_domain_create_linear(of_fwnode_handle(np), NR_IRQS, &xtensa_irq_domain_ops,
|
||||||
&xtensa_irq_chip);
|
&xtensa_irq_chip);
|
||||||
irq_set_default_domain(root_domain);
|
irq_set_default_domain(root_domain);
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
||||||
|
|
@ -92,8 +92,8 @@ static int __init zevio_of_init(struct device_node *node,
|
||||||
zevio_init_irq_base(zevio_irq_io + IO_IRQ_BASE);
|
zevio_init_irq_base(zevio_irq_io + IO_IRQ_BASE);
|
||||||
zevio_init_irq_base(zevio_irq_io + IO_FIQ_BASE);
|
zevio_init_irq_base(zevio_irq_io + IO_FIQ_BASE);
|
||||||
|
|
||||||
zevio_irq_domain = irq_domain_add_linear(node, MAX_INTRS,
|
zevio_irq_domain = irq_domain_create_linear(of_fwnode_handle(node), MAX_INTRS,
|
||||||
&irq_generic_chip_ops, NULL);
|
&irq_generic_chip_ops, NULL);
|
||||||
BUG_ON(!zevio_irq_domain);
|
BUG_ON(!zevio_irq_domain);
|
||||||
|
|
||||||
ret = irq_alloc_domain_generic_chips(zevio_irq_domain, MAX_INTRS, 1,
|
ret = irq_alloc_domain_generic_chips(zevio_irq_domain, MAX_INTRS, 1,
|
||||||
|
|
|
||||||
|
|
@ -239,7 +239,7 @@ static int __init shirq_init(struct spear_shirq **shirq_blocks, int block_nr,
|
||||||
goto err_unmap;
|
goto err_unmap;
|
||||||
}
|
}
|
||||||
|
|
||||||
shirq_domain = irq_domain_add_legacy(np, nr_irqs, virq_base, 0,
|
shirq_domain = irq_domain_create_legacy(of_fwnode_handle(np), nr_irqs, virq_base, 0,
|
||||||
&irq_domain_simple_ops, NULL);
|
&irq_domain_simple_ops, NULL);
|
||||||
if (WARN_ON(!shirq_domain)) {
|
if (WARN_ON(!shirq_domain)) {
|
||||||
pr_warn("%s: irq domain init failed\n", __func__);
|
pr_warn("%s: irq domain init failed\n", __func__);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue