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drm/msm/adreno: fix cast in adreno_get_param() 

These casts need to happen before the shift.  The only time it would
matter would be if "rev.core" is >= 128.  In that case the sign bit
would be extended and we do not want that.

Fixes: afab9d91d8 ("drm/msm/adreno: Expose speedbin to userspace")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20220307133105.GA17534@kili
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Dan Carpenter 2022-03-07 16:31:05 +03:00 committed by Rob Clark
parent 9225b33707
commit aaa743d838
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/msm/adreno/adreno_gpu.c
View File

@ -244,10 +244,10 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
*value = !adreno_is_a650_family(adreno_gpu) ? 0x100000 : 0;
return 0;
case MSM_PARAM_CHIP_ID:
*value = (uint64_t) adreno_gpu->rev.patchid |
(uint64_t) (adreno_gpu->rev.minor << 8) |
(uint64_t) (adreno_gpu->rev.major << 16) |
(uint64_t) (adreno_gpu->rev.core << 24);
*value = (uint64_t)adreno_gpu->rev.patchid |
((uint64_t)adreno_gpu->rev.minor << 8) |
((uint64_t)adreno_gpu->rev.major << 16) |
((uint64_t)adreno_gpu->rev.core << 24);
if (!adreno_gpu->info->revn)
*value |= ((uint64_t) adreno_gpu->speedbin) << 32;
return 0;