mirror of https://github.com/torvalds/linux.git
tools/memory-model: glossary.txt: Fix indents
There are a couple of inconsistent indents around code/literal blocks. Adjust them to make this file easier to parse. Signed-off-by: Akira Yokosawa <akiyks@gmail.com> Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
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@ -15,14 +15,14 @@ Address Dependency: When the address of a later memory access is computed
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3 do_something(p->a);
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3 do_something(p->a);
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4 rcu_read_unlock();
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4 rcu_read_unlock();
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In this case, because the address of "p->a" on line 3 is computed
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In this case, because the address of "p->a" on line 3 is computed
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from the value returned by the rcu_dereference() on line 2, the
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from the value returned by the rcu_dereference() on line 2, the
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address dependency extends from that rcu_dereference() to that
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address dependency extends from that rcu_dereference() to that
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"p->a". In rare cases, optimizing compilers can destroy address
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"p->a". In rare cases, optimizing compilers can destroy address
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dependencies. Please see Documentation/RCU/rcu_dereference.rst
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dependencies. Please see Documentation/RCU/rcu_dereference.rst
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for more information.
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for more information.
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See also "Control Dependency" and "Data Dependency".
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See also "Control Dependency" and "Data Dependency".
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Acquire: With respect to a lock, acquiring that lock, for example,
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Acquire: With respect to a lock, acquiring that lock, for example,
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using spin_lock(). With respect to a non-lock shared variable,
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using spin_lock(). With respect to a non-lock shared variable,
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@ -59,12 +59,12 @@ Control Dependency: When a later store's execution depends on a test
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1 if (READ_ONCE(x))
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1 if (READ_ONCE(x))
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2 WRITE_ONCE(y, 1);
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2 WRITE_ONCE(y, 1);
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Here, the control dependency extends from the READ_ONCE() on
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Here, the control dependency extends from the READ_ONCE() on
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line 1 to the WRITE_ONCE() on line 2. Control dependencies are
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line 1 to the WRITE_ONCE() on line 2. Control dependencies are
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fragile, and can be easily destroyed by optimizing compilers.
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fragile, and can be easily destroyed by optimizing compilers.
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Please see control-dependencies.txt for more information.
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Please see control-dependencies.txt for more information.
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See also "Address Dependency" and "Data Dependency".
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See also "Address Dependency" and "Data Dependency".
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Cycle: Memory-barrier pairing is restricted to a pair of CPUs, as the
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Cycle: Memory-barrier pairing is restricted to a pair of CPUs, as the
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name suggests. And in a great many cases, a pair of CPUs is all
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name suggests. And in a great many cases, a pair of CPUs is all
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@ -72,10 +72,10 @@ Cycle: Memory-barrier pairing is restricted to a pair of CPUs, as the
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extended to additional CPUs, and the result is called a "cycle".
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extended to additional CPUs, and the result is called a "cycle".
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In a cycle, each CPU's ordering interacts with that of the next:
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In a cycle, each CPU's ordering interacts with that of the next:
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CPU 0 CPU 1 CPU 2
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CPU 0 CPU 1 CPU 2
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WRITE_ONCE(x, 1); WRITE_ONCE(y, 1); WRITE_ONCE(z, 1);
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WRITE_ONCE(x, 1); WRITE_ONCE(y, 1); WRITE_ONCE(z, 1);
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smp_mb(); smp_mb(); smp_mb();
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smp_mb(); smp_mb(); smp_mb();
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r0 = READ_ONCE(y); r1 = READ_ONCE(z); r2 = READ_ONCE(x);
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r0 = READ_ONCE(y); r1 = READ_ONCE(z); r2 = READ_ONCE(x);
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CPU 0's smp_mb() interacts with that of CPU 1, which interacts
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CPU 0's smp_mb() interacts with that of CPU 1, which interacts
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with that of CPU 2, which in turn interacts with that of CPU 0
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with that of CPU 2, which in turn interacts with that of CPU 0
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