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SoC fixes for 6.5, part 1 

There are three small fixes that came up sincie the past week:
 
  - an incorrect bit offset in ixp4xx bus driver
 
  - a riscv randconfig regression in the thead platform I merged
 
  - whitespace fixes for some dts files
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Merge tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "There are three small fixes that came up sincie the past week:

   - an incorrect bit offset in ixp4xx bus driver

   - a riscv randconfig regression in the thead platform I merged

   - whitespace fixes for some dts files"

* tag 'soc-fixes-6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  bus: ixp4xx: fix IXP4XX_EXP_T1_MASK
  ARM: dts: st: add missing space before {
  RISC-V: make ARCH_THEAD preclude XIP_KERNEL
This commit is contained in:
Linus Torvalds 2023-07-06 09:56:53 -07:00
parent 0b90730502 6722e46513
commit 9f57c13f7e
13 changed files with 24 additions and 23 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/riscv/Kconfig.socs
View File

@ -43,6 +43,7 @@ config ARCH_SUNXI
config ARCH_THEAD
bool "T-HEAD RISC-V SoCs"
depends on MMU && !XIP_KERNEL
select ERRATA_THEAD
help
This enables support for the RISC-V based T-HEAD SoCs.

2
drivers/bus/intel-ixp4xx-eb.c
View File

@ -33,7 +33,7 @@
#define IXP4XX_EXP_TIMING_STRIDE 0x04
#define IXP4XX_EXP_CS_EN BIT(31)
#define IXP456_EXP_PAR_EN BIT(30) /* Only on IXP45x and IXP46x */
#define IXP4XX_EXP_T1_MASK GENMASK(28, 27)
#define IXP4XX_EXP_T1_MASK GENMASK(29, 28)
#define IXP4XX_EXP_T1_SHIFT 28
#define IXP4XX_EXP_T2_MASK GENMASK(27, 26)
#define IXP4XX_EXP_T2_SHIFT 26