ASoC: Updates for v6.19

This is a very large set of updates, as well as some more extensive
 cleanup work from Morimto-san we've also added a generic SCDA class
 driver for SoundWire devices enabling us to support many chips with
 no custom code.  There's also a batch of new drivers added for both
 SoCs and CODECs.
 
  - Added a SoundWire SCDA generic class driver, pulling in a little
    regmap work to support it.
  - A *lot* of cleaup and API improvement work from Morimoto-san.
  - Lots of work on the existing Cirrus, Intel, Maxim and Qualcomm
    drivers.
  - Support for Allwinner A523, Mediatek MT8189, Qualcomm QCM2290,
    QRB2210 and SM6115, SpacemiT K1, and TI TAS2568, TAS5802, TAS5806,
    TAS5815, TAS5828 and TAS5830.
 
 This also pulls in some gpiolib changes supporting shared GPIOs in the
 core there so we can convert some of the ASoC drivers open coding
 handling of that to the core functionality.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmkt6lUACgkQJNaLcl1U
 h9D7dgf+JP2+yZIeRBud7CEO4Docda2uoRssT7GAIY/Rqrpem5FI0c0pWyZISvhn
 scyjkoCrQfHEoeYrtC3l5bDI7F8o5Tc91hGzhJiCi3mb8jSwi+CaNIpR0Cet3epV
 B9wQgzxlxbmKCxJRUYTPQF3n1uBJWc5EBHSc5QPddTZ0vdUfSlX0FAKHsabpmaOC
 TpkdJnOlH8WUokmP3kP3TpzlflmOSLehnWX4BelJe5Os5O0PQpiKh/JG3oCYHSmc
 yEbzCjOaya80HHn11FShOpy+B4b6sLUMcN+CAmDiLAdNFGvvjgmjpwwZtLYAm09Z
 zFhN7XuVk1vXf+Zx/jHqYKaZtvvAsQ==
 =Xwls
 -----END PGP SIGNATURE-----

Merge tag 'asoc-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Updates for v6.19

This is a very large set of updates, as well as some more extensive
cleanup work from Morimto-san we've also added a generic SCDA class
driver for SoundWire devices enabling us to support many chips with
no custom code.  There's also a batch of new drivers added for both
SoCs and CODECs.

 - Added a SoundWire SCDA generic class driver, pulling in a little
   regmap work to support it.
 - A *lot* of cleaup and API improvement work from Morimoto-san.
 - Lots of work on the existing Cirrus, Intel, Maxim and Qualcomm
   drivers.
 - Support for Allwinner A523, Mediatek MT8189, Qualcomm QCM2290,
   QRB2210 and SM6115, SpacemiT K1, and TI TAS2568, TAS5802, TAS5806,
   TAS5815, TAS5828 and TAS5830.

This also pulls in some gpiolib changes supporting shared GPIOs in the
core there so we can convert some of the ASoC drivers open coding
handling of that to the core functionality.
This commit is contained in:
Takashi Iwai 2025-12-02 07:12:56 +01:00
commit 9747b22a41
802 changed files with 34182 additions and 6637 deletions

View File

@ -438,6 +438,7 @@ Krishna Manikandan <quic_mkrishn@quicinc.com> <mkrishn@codeaurora.org>
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@linaro.org>
Krzysztof Wilczyński <kwilczynski@kernel.org> <krzysztof.wilczynski@linux.com>
Krzysztof Wilczyński <kwilczynski@kernel.org> <kw@linux.com>
Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>

View File

@ -50,18 +50,20 @@ patternProperties:
groups:
description:
Name of the pin group to use for the functions.
$ref: /schemas/types.yaml#/definitions/string
enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
uart0_grp, uart1_grp, uart2_grp, uart3_grp,
pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
items:
enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,
i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,
spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,
spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp,
uart0_grp, uart1_grp, uart2_grp, uart3_grp,
pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp,
pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp,
pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp,
pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp,
pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp,
pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp]
minItems: 1
maxItems: 8
drive-strength:
enum: [2, 4, 6, 8, 16, 24, 32]

View File

@ -74,6 +74,7 @@ patternProperties:
'^conf':
type: object
unevaluatedProperties: false
description:
Pinctrl node's client devices use subnodes for pin configurations,
which in turn use the standard properties below.

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@ -1,60 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,max98363.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices MAX98363 SoundWire Amplifier
maintainers:
- Ryan Lee <ryans.lee@analog.com>
description:
The MAX98363 is a SoundWire input Class D mono amplifier that
supports MIPI SoundWire v1.2-compatible digital interface for
audio and control data.
SoundWire peripheral device ID of MAX98363 is 0x3*019f836300
where * is the peripheral device unique ID decoded from pin.
It supports up to 10 peripheral devices(0x0 to 0x9).
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: sdw3019f836300
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- "#sound-dai-cells"
unevaluatedProperties: false
examples:
- |
soundwire@3250000 {
#address-cells = <2>;
#size-cells = <0>;
reg = <0x3250000 0x2000>;
speaker@0,0 {
compatible = "sdw3019f836300";
reg = <0 0>;
#sound-dai-cells = <0>;
sound-name-prefix = "Speaker Left";
};
speaker@0,1 {
compatible = "sdw3019f836300";
reg = <0 1>;
#sound-dai-cells = <0>;
sound-name-prefix = "Speaker Right";
};
};

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@ -1,19 +0,0 @@
Analog Devices SSM2602, SSM2603 and SSM2604 I2S audio CODEC devices
SSM2602 support both I2C and SPI as the configuration interface,
the selection is made by the MODE strap-in pin.
SSM2603 and SSM2604 only support I2C as the configuration interface.
Required properties:
- compatible : One of "adi,ssm2602", "adi,ssm2603" or "adi,ssm2604"
- reg : the I2C address of the device for I2C, the chip select
number for SPI.
Example:
ssm2602: ssm2602@1a {
compatible = "adi,ssm2602";
reg = <0x1a>;
};

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@ -1,49 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/adi,ssm3515.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices SSM3515 Audio Amplifier
maintainers:
- Martin Povišer <povik+lin@cutebit.org>
description: |
SSM3515 is a mono Class-D audio amplifier with digital input.
https://www.analog.com/media/en/technical-documentation/data-sheets/SSM3515.pdf
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- adi,ssm3515
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@14 {
compatible = "adi,ssm3515";
reg = <0x14>;
#sound-dai-cells = <0>;
sound-name-prefix = "Left Tweeter";
};
};

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@ -33,7 +33,9 @@ properties:
- const: allwinner,sun50i-h6-i2s
- const: allwinner,sun50i-r329-i2s
- items:
- const: allwinner,sun20i-d1-i2s
- enum:
- allwinner,sun20i-d1-i2s
- allwinner,sun55i-a523-i2s
- const: allwinner,sun50i-r329-i2s
reg:

View File

@ -23,6 +23,7 @@ properties:
- const: allwinner,sun8i-h3-spdif
- const: allwinner,sun50i-h6-spdif
- const: allwinner,sun50i-h616-spdif
- const: allwinner,sun55i-a523-spdif
- items:
- const: allwinner,sun8i-a83t-spdif
- const: allwinner,sun8i-h3-spdif
@ -37,14 +38,12 @@ properties:
maxItems: 1
clocks:
items:
- description: Bus Clock
- description: Module Clock
minItems: 2
maxItems: 3
clock-names:
items:
- const: apb
- const: spdif
minItems: 2
maxItems: 3
# Even though it only applies to subschemas under the conditionals,
# not listing them here will trigger a warning because of the
@ -65,6 +64,7 @@ allOf:
- allwinner,sun8i-h3-spdif
- allwinner,sun50i-h6-spdif
- allwinner,sun50i-h616-spdif
- allwinner,sun55i-a523-spdif
then:
required:
@ -98,6 +98,38 @@ allOf:
- const: rx
- const: tx
- if:
properties:
compatible:
contains:
enum:
- allwinner,sun55i-a523-spdif
then:
properties:
clocks:
items:
- description: Bus Clock
- description: TX Clock
- description: RX Clock
clock-names:
items:
- const: apb
- const: tx
- const: rx
else:
properties:
clocks:
items:
- description: Bus Clock
- description: Module Clock
clock-names:
items:
- const: apb
- const: spdif
required:
- "#sound-dai-cells"
- compatible

View File

@ -25,6 +25,16 @@ properties:
reg:
maxItems: 1
clocks:
items:
- description:
Master clock connected to the MCLK pin if MCLK is an input (i.e. no
crystal used).
clock-names:
items:
- const: mclk
spi-cpha: true
spi-cpol: true

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@ -15,10 +15,15 @@ description:
allOf:
- $ref: dai-common.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- cirrus,cs4282
- cirrus,cs4302
- cirrus,cs4304
- cirrus,cs4308
- cirrus,cs5302
- cirrus,cs5304
- cirrus,cs5308
@ -26,6 +31,9 @@ properties:
reg:
maxItems: 1
spi-max-frequency:
maximum: 24000000
'#sound-dai-cells':
const: 1

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@ -1,29 +0,0 @@
CS4265 audio CODEC
This device supports I2C only.
Required properties:
- compatible : "cirrus,cs4265"
- reg : the I2C address of the device for I2C. The I2C address depends on
the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f.
If it is low, the i2c address is 0x4e.
Optional properties:
- reset-gpios : a GPIO spec for the reset pin. If specified, it will be
deasserted before communication to the codec starts.
Examples:
codec_ad0_high: cs4265@4f { /* AD0 Pin is high */
compatible = "cirrus,cs4265";
reg = <0x4f>;
};
codec_ad0_low: cs4265@4e { /* AD0 Pin is low */
compatible = "cirrus,cs4265";
reg = <0x4e>;
};

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@ -1,22 +0,0 @@
Cirrus Logic CS4341 audio DAC
This device supports both I2C and SPI (configured with pin strapping
on the board).
Required properties:
- compatible: "cirrus,cs4341a"
- reg : the I2C address of the device for I2C, the chip select
number for SPI.
For required properties on I2C-bus, please consult
dtschema schemas/i2c/i2c-controller.yaml
For required properties on SPI-bus, please consult
Documentation/devicetree/bindings/spi/spi-bus.txt
Example:
codec: cs4341@0 {
#sound-dai-cells = <0>;
compatible = "cirrus,cs4341a";
reg = <0>;
spi-max-frequency = <6000000>;
};

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@ -1,19 +0,0 @@
CS4349 audio CODEC
Required properties:
- compatible : "cirrus,cs4349"
- reg : the I2C address of the device for I2C
Optional properties:
- reset-gpios : a GPIO spec for the reset pin.
Example:
codec: cs4349@48 {
compatible = "cirrus,cs4349";
reg = <0x48>;
reset-gpios = <&gpio 54 0>;
};

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@ -1,22 +0,0 @@
* Dialog DA9055 Audio CODEC
DA9055 provides Audio CODEC support (I2C only).
The Audio CODEC device in DA9055 has its own I2C address which is configurable,
so the device is instantiated separately from the PMIC (MFD) device.
For details on accompanying PMIC I2C device, see the following:
Documentation/devicetree/bindings/mfd/da9055.txt
Required properties:
- compatible: "dlg,da9055-codec"
- reg: Specifies the I2C slave address
Example:
codec: da9055-codec@1a {
compatible = "dlg,da9055-codec";
reg = <0x1a>;
};

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@ -0,0 +1,178 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mediatek,mt8189-afe-pcm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek Audio Front End PCM controller for MT8189
maintainers:
- Darren Ye <darren.ye@mediatek.com>
- Cyril Chao <cyril.chao@mediatek.com>
properties:
compatible:
const: mediatek,mt8189-afe-pcm
reg:
maxItems: 1
interrupts:
maxItems: 1
memory-region:
maxItems: 1
mediatek,apmixedsys:
$ref: /schemas/types.yaml#/definitions/phandle
description: To set up the apll12 tuner
power-domains:
maxItems: 1
clocks:
items:
- description: mux for audio intbus
- description: mux for audio engen1
- description: mux for audio engen2
- description: mux for audio h
- description: audio apll1 clock
- description: audio apll2 clock
- description: audio apll1 divide4
- description: audio apll2 divide4
- description: audio apll12 divide for i2sin0
- description: audio apll12 divide for i2sin1
- description: audio apll12 divide for i2sout0
- description: audio apll12 divide for i2sout1
- description: audio apll12 divide for fmi2s
- description: audio apll12 divide for tdmout mck
- description: audio apll12 divide for tdmout bck
- description: mux for audio apll1
- description: mux for audio apll2
- description: mux for i2sin0 mck
- description: mux for i2sin1 mck
- description: mux for i2sout0 mck
- description: mux for i2sout1 mck
- description: mux for fmi2s mck
- description: mux for tdmout mck
- description: 26m clock
- description: audio slv clock
- description: audio mst clock
- description: audio intbus clock
clock-names:
items:
- const: top_aud_intbus
- const: top_aud_eng1
- const: top_aud_eng2
- const: top_aud_h
- const: apll1
- const: apll2
- const: apll1_d4
- const: apll2_d4
- const: apll12_div_i2sin0
- const: apll12_div_i2sin1
- const: apll12_div_i2sout0
- const: apll12_div_i2sout1
- const: apll12_div_fmi2s
- const: apll12_div_tdmout_m
- const: apll12_div_tdmout_b
- const: top_apll1
- const: top_apll2
- const: top_i2sin0
- const: top_i2sin1
- const: top_i2sout0
- const: top_i2sout1
- const: top_fmi2s
- const: top_dptx
- const: clk26m
- const: aud_slv_ck_peri
- const: aud_mst_ck_peri
- const: aud_intbus_ck_peri
required:
- compatible
- reg
- interrupts
- memory-region
- power-domains
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
afe@11050000 {
compatible = "mediatek,mt8189-afe-pcm";
reg = <0 0x11050000 0 0x10000>;
interrupts = <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH 0>;
memory-region = <&afe_dma_mem_reserved>;
pinctrl-names = "default";
pinctrl-0 = <&aud_pins_default>;
power-domains = <&scpsys 1>; //MT8189_POWER_DOMAIN_AUDIO
clocks = <&topckgen_clk 23>, //CLK_TOP_AUD_INTBUS_SEL
<&topckgen_clk 39>, //CLK_TOP_AUD_ENGEN1_SEL
<&topckgen_clk 40>, //CLK_TOP_AUD_ENGEN2_SEL
<&topckgen_clk 49>, //CLK_TOP_AUDIO_H_SEL
<&topckgen_clk 146>, //CLK_TOP_APLL1
<&topckgen_clk 151>, //CLK_TOP_APLL2
<&topckgen_clk 148>, //CLK_TOP_APLL1_D4
<&topckgen_clk 153>, //CLK_TOP_APLL2_D4
<&topckgen_clk 93>, //CLK_TOP_APLL12_CK_DIV_I2SIN0
<&topckgen_clk 94>, //CLK_TOP_APLL12_CK_DIV_I2SIN1
<&topckgen_clk 95>, //CLK_TOP_APLL12_CK_DIV_I2SOUT0
<&topckgen_clk 96>, //CLK_TOP_APLL12_CK_DIV_I2SOUT1
<&topckgen_clk 97>, //CLK_TOP_APLL12_CK_DIV_FMI2S
<&topckgen_clk 98>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M
<&topckgen_clk 99>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_B
<&topckgen_clk 44>, //CLK_TOP_AUD_1_SEL
<&topckgen_clk 45>, //CLK_TOP_AUD_2_SEL
<&topckgen_clk 78>, //CLK_TOP_APLL_I2SIN0_MCK_SEL
<&topckgen_clk 79>, //CLK_TOP_APLL_I2SIN1_MCK_SEL
<&topckgen_clk 84>, //CLK_TOP_APLL_I2SOUT0_MCK_SEL
<&topckgen_clk 85>, //CLK_TOP_APLL_I2SOUT1_MCK_SEL
<&topckgen_clk 90>, //CLK_TOP_APLL_FMI2S_MCK_SEL
<&topckgen_clk 91>, //CLK_TOP_APLL_TDMOUT_MCK_SEL
<&topckgen_clk 191>, //CLK_TOP_TCK_26M_MX9
<&pericfg_ao_clk 77>, //CLK_PERAO_AUDIO0
<&pericfg_ao_clk 78>, //CLK_PERAO_AUDIO1
<&pericfg_ao_clk 79>; //CLK_PERAO_AUDIO2
clock-names = "top_aud_intbus",
"top_aud_eng1",
"top_aud_eng2",
"top_aud_h",
"apll1",
"apll2",
"apll1_d4",
"apll2_d4",
"apll12_div_i2sin0",
"apll12_div_i2sin1",
"apll12_div_i2sout0",
"apll12_div_i2sout1",
"apll12_div_fmi2s",
"apll12_div_tdmout_m",
"apll12_div_tdmout_b",
"top_apll1",
"top_apll2",
"top_i2sin0",
"top_i2sin1",
"top_i2sout0",
"top_i2sout1",
"top_fmi2s",
"top_dptx",
"clk26m",
"aud_slv_ck_peri",
"aud_mst_ck_peri",
"aud_intbus_ck_peri";
};
};
...

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@ -0,0 +1,101 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/mediatek,mt8189-nau8825.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT8189 ASoC sound card
maintainers:
- Darren Ye <darren.ye@mediatek.com>
- Cyril Chao <cyril.chao@mediatek.com>
allOf:
- $ref: sound-card-common.yaml#
properties:
compatible:
enum:
- mediatek,mt8189-nau8825
- mediatek,mt8189-rt5650
- mediatek,mt8189-rt5682s
- mediatek,mt8189-rt5682i
- mediatek,mt8189-es8326
mediatek,platform:
$ref: /schemas/types.yaml#/definitions/phandle
description: The phandle of MT8189 ASoC platform.
patternProperties:
"^dai-link-[0-9]+$":
type: object
description:
Container for dai-link level properties and CODEC sub-nodes.
properties:
link-name:
description:
This property corresponds to the name of the BE dai-link to which
we are going to update parameters in this node.
enum:
- TDM_DPTX_BE
- I2SOUT0_BE
- I2SIN0_BE
- I2SOUT1_BE
codec:
description: Holds subnode which indicates codec dai.
type: object
additionalProperties: false
properties:
sound-dai:
minItems: 1
maxItems: 2
required:
- sound-dai
dai-format:
description: audio format.
enum:
- i2s
- right_j
- left_j
- dsp_a
- dsp_b
mediatek,clk-provider:
$ref: /schemas/types.yaml#/definitions/string
description: Indicates dai-link clock master.
enum:
- cpu
- codec
additionalProperties: false
required:
- link-name
required:
- compatible
- mediatek,platform
unevaluatedProperties: false
examples:
- |
sound {
compatible = "mediatek,mt8189-nau8825";
model = "mt8189_rt9123_8825";
mediatek,platform = <&afe>;
dai-link-0 {
link-name = "I2SOUT1_BE";
dai-format = "i2s";
mediatek,clk-provider = "cpu";
codec {
sound-dai = <&nau8825>;
};
};
};
...

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@ -1,40 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nuvoton,nau8540.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Nuvoton Technology Corporation NAU85L40 Audio CODEC
maintainers:
- John Hsu <KCHSU0@nuvoton.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: nuvoton,nau8540
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1c {
compatible = "nuvoton,nau8540";
reg = <0x1c>;
};
};

View File

@ -1,45 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nuvoton,nau8810.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NAU8810/NAU8812/NAU8814 audio CODEC
maintainers:
- David Lin <CTLIN0@nuvoton.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- nuvoton,nau8810
- nuvoton,nau8812
- nuvoton,nau8814
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
#sound-dai-cells = <0>;
compatible = "nuvoton,nau8810";
reg = <0x1a>;
};
};

View File

@ -67,46 +67,72 @@ properties:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
if:
properties:
compatible:
contains:
const: nvidia,tegra210-admaif
allOf:
- if:
properties:
compatible:
contains:
const: nvidia,tegra210-admaif
then:
properties:
dmas:
description:
DMA channel specifiers, equally divided for Tx and Rx.
minItems: 1
maxItems: 20
dma-names:
items:
pattern: "^[rt]x(10|[1-9])$"
description:
Should be "rx1", "rx2" ... "rx10" for DMA Rx channel
Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
minItems: 1
maxItems: 20
interconnects: false
interconnect-names: false
iommus: false
then:
properties:
dmas:
description:
DMA channel specifiers, equally divided for Tx and Rx.
minItems: 1
maxItems: 20
dma-names:
items:
pattern: "^[rt]x(10|[1-9])$"
description:
Should be "rx1", "rx2" ... "rx10" for DMA Rx channel
Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
minItems: 1
maxItems: 20
interconnects: false
interconnect-names: false
iommus: false
- if:
properties:
compatible:
contains:
const: nvidia,tegra186-admaif
then:
properties:
dmas:
description:
DMA channel specifiers, equally divided for Tx and Rx.
minItems: 1
maxItems: 40
dma-names:
items:
pattern: "^[rt]x(1[0-9]|[1-9]|20)$"
description:
Should be "rx1", "rx2" ... "rx20" for DMA Rx channel
Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
minItems: 1
maxItems: 40
else:
properties:
dmas:
description:
DMA channel specifiers, equally divided for Tx and Rx.
minItems: 1
maxItems: 40
dma-names:
items:
pattern: "^[rt]x(1[0-9]|[1-9]|20)$"
description:
Should be "rx1", "rx2" ... "rx20" for DMA Rx channel
Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
minItems: 1
maxItems: 40
- if:
properties:
compatible:
contains:
const: nvidia,tegra264-admaif
then:
properties:
dmas:
description:
DMA channel specifiers, equally divided for Tx and Rx.
minItems: 1
maxItems: 64
dma-names:
items:
pattern: "^[rt]x(3[0-2]|[1-2][0-9]|[1-9])$"
description:
Should be "rx1", "rx2" ... "rx32" for DMA Rx channel
Should be "tx1", "tx2" ... "tx32" for DMA Tx channel
minItems: 1
maxItems: 64
required:
- compatible

View File

@ -1,44 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nxp,tfa9879.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP TFA9879 class-D audio amplifier
maintainers:
- Peter Rosin <peda@axentia.se>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: nxp,tfa9879
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
i2c1 {
#address-cells = <1>;
#size-cells = <0>;
amplifier@6c {
compatible = "nxp,tfa9879";
reg = <0x6c>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
#sound-dai-cells = <0>;
};
};

View File

@ -1,42 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nxp,uda1342.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP uda1342 audio CODECs
maintainers:
- Binbin Zhou <zhoubinbin@loongson.cn>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: nxp,uda1342
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "nxp,uda1342";
reg = <0x1a>;
#sound-dai-cells = <0>;
};
};

View File

@ -1,22 +0,0 @@
Texas Instruments pcm1789 DT bindings
PCM1789 is a simple audio codec that can be connected via
I2C or SPI. Currently, only I2C bus is supported.
Required properties:
- compatible: "ti,pcm1789"
Required properties on I2C:
- reg: the I2C address
- reset-gpios: GPIO to control the RESET pin
Examples:
audio-codec@4c {
compatible = "ti,pcm1789";
reg = <0x4c>;
reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
#sound-dai-cells = <0>;
};

View File

@ -1,27 +0,0 @@
Texas Instruments pcm179x DT bindings
This driver supports both the I2C and SPI bus.
Required properties:
- compatible: "ti,pcm1792a"
For required properties on SPI, please consult
Documentation/devicetree/bindings/spi/spi-bus.txt
Required properties on I2C:
- reg: the I2C address
Examples:
codec_spi: 1792a@0 {
compatible = "ti,pcm1792a";
spi-max-frequency = <600000>;
};
codec_i2c: 1792a@4c {
compatible = "ti,pcm1792a";
reg = <0x4c>;
};

View File

@ -1,42 +0,0 @@
Texas Instruments PCM186x Universal Audio ADC
These devices support both I2C and SPI (configured with pin strapping
on the board).
Required properties:
- compatible : "ti,pcm1862",
"ti,pcm1863",
"ti,pcm1864",
"ti,pcm1865"
- reg : The I2C address of the device for I2C, the chip select
number for SPI.
- avdd-supply: Analog core power supply (3.3v)
- dvdd-supply: Digital core power supply
- iovdd-supply: Digital IO power supply
See regulator/regulator.txt for more information
CODEC input pins:
* VINL1
* VINR1
* VINL2
* VINR2
* VINL3
* VINR3
* VINL4
* VINR4
The pins can be used in referring sound node's audio-routing property.
Example:
pcm186x: audio-codec@4a {
compatible = "ti,pcm1865";
reg = <0x4a>;
avdd-supply = <&reg_3v3_analog>;
dvdd-supply = <&reg_3v3>;
iovdd-supply = <&reg_1v8>;
};

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@ -1,13 +0,0 @@
PCM5102a audio CODECs
These devices does not use I2C or SPI.
Required properties:
- compatible : set as "ti,pcm5102a"
Examples:
pcm5102a: pcm5102a {
compatible = "ti,pcm5102a";
};

View File

@ -14,12 +14,14 @@ properties:
oneOf:
- enum:
- qcom,sc7280-lpass-rx-macro
- qcom,sm6115-lpass-rx-macro
- qcom,sm8250-lpass-rx-macro
- qcom,sm8450-lpass-rx-macro
- qcom,sm8550-lpass-rx-macro
- qcom,sc8280xp-lpass-rx-macro
- items:
- enum:
- qcom,kaanapali-lpass-rx-macro
- qcom,sm8650-lpass-rx-macro
- qcom,sm8750-lpass-rx-macro
- qcom,x1e80100-lpass-rx-macro
@ -80,6 +82,23 @@ allOf:
- const: npl
- const: fsgen
- if:
properties:
compatible:
enum:
- qcom,sm6115-lpass-rx-macro
then:
properties:
clocks:
minItems: 4
maxItems: 4
clock-names:
items:
- const: mclk
- const: npl
- const: dcodec
- const: fsgen
- if:
properties:
compatible:

View File

@ -21,6 +21,7 @@ properties:
- qcom,sc8280xp-lpass-tx-macro
- items:
- enum:
- qcom,kaanapali-lpass-tx-macro
- qcom,sm8650-lpass-tx-macro
- qcom,sm8750-lpass-tx-macro
- qcom,x1e80100-lpass-tx-macro

View File

@ -14,6 +14,7 @@ properties:
oneOf:
- enum:
- qcom,sc7280-lpass-va-macro
- qcom,sm6115-lpass-va-macro
- qcom,sm8250-lpass-va-macro
- qcom,sm8450-lpass-va-macro
- qcom,sm8550-lpass-va-macro
@ -21,6 +22,7 @@ properties:
- items:
- enum:
- qcom,glymur-lpass-va-macro
- qcom,kaanapali-lpass-va-macro
- qcom,sm8650-lpass-va-macro
- qcom,sm8750-lpass-va-macro
- qcom,x1e80100-lpass-va-macro
@ -41,11 +43,7 @@ properties:
clock-names:
minItems: 1
items:
- const: mclk
- const: macro
- const: dcodec
- const: npl
maxItems: 4
clock-output-names:
maxItems: 1
@ -90,16 +88,33 @@ allOf:
clocks:
maxItems: 1
clock-names:
maxItems: 1
items:
- const: mclk
else:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
minItems: 3
maxItems: 3
items:
- const: mclk
- const: macro
- const: dcodec
- if:
properties:
compatible:
contains:
const: qcom,sm6115-lpass-va-macro
then:
properties:
clocks:
minItems: 3
maxItems: 3
clock-names:
items:
- const: mclk
- const: dcodec
- const: npl
- if:
properties:
compatible:
@ -111,8 +126,10 @@ allOf:
minItems: 3
maxItems: 3
clock-names:
minItems: 3
maxItems: 3
items:
- const: mclk
- const: macro
- const: dcodec
- if:
properties:
@ -127,8 +144,11 @@ allOf:
minItems: 4
maxItems: 4
clock-names:
minItems: 4
maxItems: 4
items:
- const: mclk
- const: macro
- const: dcodec
- const: npl
- if:
properties:
@ -142,8 +162,10 @@ allOf:
minItems: 3
maxItems: 3
clock-names:
minItems: 3
maxItems: 3
items:
- const: mclk
- const: macro
- const: dcodec
unevaluatedProperties: false

View File

@ -21,6 +21,7 @@ properties:
- items:
- enum:
- qcom,glymur-lpass-wsa-macro
- qcom,kaanapali-lpass-wsa-macro
- qcom,sm8650-lpass-wsa-macro
- qcom,sm8750-lpass-wsa-macro
- qcom,x1e80100-lpass-wsa-macro

View File

@ -23,6 +23,7 @@ properties:
- const: qcom,sdm845-sndcard
- items:
- enum:
- qcom,kaanapali-sndcard
- qcom,sm8550-sndcard
- qcom,sm8650-sndcard
- qcom,sm8750-sndcard
@ -38,6 +39,7 @@ properties:
- qcom,qcs8275-sndcard
- qcom,qcs9075-sndcard
- qcom,qcs9100-sndcard
- qcom,qrb2210-sndcard
- qcom,qrb4210-rb2-sndcard
- qcom,qrb5165-rb5-sndcard
- qcom,sc7180-qdsp6-sndcard

View File

@ -132,7 +132,7 @@ properties:
$ref: /schemas/gpio/qcom,wcd934x-gpio.yaml#
patternProperties:
"^.*@[0-9a-f]+$":
"@[0-9a-f]+$":
type: object
additionalProperties: true
description: |

View File

@ -0,0 +1,87 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/spacemit,k1-i2s.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: K1 I2S controller
description:
The I2S bus (Inter-IC sound bus) is a serial link for digital
audio data transfer between devices in the system.
maintainers:
- Troy Mitchell <troy.mitchell@linux.spacemit.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: spacemit,k1-i2s
reg:
maxItems: 1
clocks:
items:
- description: clock for I2S sysclk
- description: clock for I2S bclk
- description: clock for I2S bus
- description: clock for I2S controller
clock-names:
items:
- const: sysclk
- const: bclk
- const: bus
- const: func
dmas:
minItems: 1
maxItems: 2
dma-names:
minItems: 1
items:
- const: tx
- const: rx
resets:
maxItems: 1
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
- clocks
- clock-names
- dmas
- dma-names
- resets
- "#sound-dai-cells"
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/spacemit,k1-syscon.h>
i2s@d4026000 {
compatible = "spacemit,k1-i2s";
reg = <0xd4026000 0x30>;
clocks = <&syscon_mpmu CLK_I2S_SYSCLK>,
<&syscon_mpmu CLK_I2S_BCLK>,
<&syscon_apbc CLK_SSPA0_BUS>,
<&syscon_apbc CLK_SSPA0>;
clock-names = "sysclk", "bclk", "bus", "func";
dmas = <&pdma0 21>, <&pdma0 22>;
dma-names = "tx", "rx";
resets = <&syscon_apbc RESET_SSPA0>;
#sound-dai-cells = <0>;
};

View File

@ -0,0 +1,76 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ti,pcm1862.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments PCM186x Universal Audio ADC
maintainers:
- Ranganath V N <vnranganath.20@gmail.com>
description: |
The Texas Instruments PCM186x family are multi-channel audio ADCs
that support both I2C and SPI control interfaces, selected by
pin strapping. These devices include on-chip programmable gain
amplifiers and support differential or single-ended analog inputs.
CODEC input pins:
* VINL1
* VINR1
* VINL2
* VINR2
* VINL3
* VINR3
* VINL4
* VINR4
The pins can be used in referring sound node's audio-routing property.
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- ti,pcm1862
- ti,pcm1863
- ti,pcm1864
- ti,pcm1865
reg:
maxItems: 1
avdd-supply: true
dvdd-supply: true
iovdd-supply: true
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- avdd-supply
- dvdd-supply
- iovdd-supply
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
audio-codec@4a {
compatible = "ti,pcm1865";
reg = <0x4a>;
avdd-supply = <&reg_3v3_analog>;
dvdd-supply = <&reg_3v3>;
iovdd-supply = <&reg_1v8>;
};
};

View File

@ -24,21 +24,26 @@ description: |
Instruments Smart Amp speaker protection algorithm. The
integrated speaker voltage and current sense provides for real time
monitoring of loudspeaker behavior.
The TAS5802/TAS5815/TAS5825/TAS5827/TAS5828 is a stereo, digital input
Class-D audio amplifier optimized for efficiently driving high peak
power into small loudspeakers. An integrated on-chip DSP supports
Texas Instruments Smart Amp speaker protection algorithm.
The TAS5802/TAS5815/TAS5822/TAS5825/TAS5827/TAS5828 is a stereo,
digital input Class-D audio amplifier optimized for efficiently driving
high peak power into small loudspeakers. An integrated on-chip DSP
supports Texas Instruments Smart Amp speaker protection algorithm.
Specifications about the audio amplifier can be found at:
https://www.ti.com/lit/gpn/tas2120
https://www.ti.com/lit/gpn/tas2320
https://www.ti.com/lit/gpn/tas2563
https://www.ti.com/lit/gpn/tas2572
https://www.ti.com/lit/gpn/tas2574
https://www.ti.com/lit/gpn/tas2781
https://www.ti.com/lit/gpn/tas5806m
https://www.ti.com/lit/gpn/tas5806md
https://www.ti.com/lit/gpn/tas5815
https://www.ti.com/lit/gpn/tas5822m
https://www.ti.com/lit/gpn/tas5825m
https://www.ti.com/lit/gpn/tas5827
https://www.ti.com/lit/gpn/tas5828m
https://www.ti.com/lit/gpn/tas5830
properties:
compatible:
@ -57,12 +62,18 @@ properties:
ti,tas2563: 6.1-W Boosted Class-D Audio Amplifier With Integrated
DSP and IV Sense, 16/20/24/32bit stereo I2S or multichannel TDM.
ti,tas2568: 5.3-W Digital Input Smart Amp with I/V Sense and Integrated
10.75-V Class-H Boost
ti,tas2570: 5.8-W Digital Input smart amp with I/V sense and integrated
11-V Class-H Boost
ti,tas2572: 6.6-W Digital Input smart amp with I/V sense and integrated
13-V Class-H Boost
ti,tas2574: 8.5-W Digital Input smart amp with I/V sense and integrated
15-V Class-H Boost
ti,tas2781: 24-V Class-D Amplifier with Real Time Integrated Speaker
Protection and Audio Processing, 16/20/24/32bit stereo I2S or
multichannel TDM.
@ -71,9 +82,20 @@ properties:
Audio Amplifier with 96-Khz Extended Processing and Low Idle Power
Dissipation.
ti,tas5806m: 23-W, Inductor-Less, Digital Input, Stereo, Closed-Loop
Class-D Audio Amplifier with Enhanced Processing and Low Power
Dissipation.
ti,tas5806md: 23-W, Inductor-Less, Digital Input, Stereo, Closed-Loop
Class-D Audio Amplifier with Enhanced Processing and DirectPath(TM)
HP Driver
ti,tas5815: 30-W, Digital Input, Stereo, Closed-loop Class-D Audio
Amplifier with 96 kHz Enhanced Processing
ti,tas5822: 35-W, Digital Input, Stereo, Closed-Loop Class-D Audio
Amplifier with 96 kHz Enhanced Processing
ti,tas5825: 38-W Stereo, Inductor-Less, Digital Input, Closed-Loop 4.5V
to 26.4V Class-D Audio Amplifier with 192-kHz Extended Audio Processing.
@ -82,6 +104,9 @@ properties:
ti,tas5828: 50-W Stereo, Digital Input, High Efficiency Closed-Loop
Class-D Amplifier with Hybrid-Pro Algorithm
ti,tas5830: 65-W Stereo, Digital Input, High Efficiency Closed-Loop
Class-D Amplifier with Class-H Algorithm
oneOf:
- items:
- enum:
@ -90,13 +115,19 @@ properties:
- ti,tas2120
- ti,tas2320
- ti,tas2563
- ti,tas2568
- ti,tas2570
- ti,tas2572
- ti,tas2574
- ti,tas5802
- ti,tas5806m
- ti,tas5806md
- ti,tas5815
- ti,tas5822
- ti,tas5825
- ti,tas5827
- ti,tas5828
- ti,tas5830
- const: ti,tas2781
- enum:
- ti,tas2781
@ -132,6 +163,8 @@ allOf:
- ti,tas2118
- ti,tas2120
- ti,tas2320
- ti,tas2568
- ti,tas2574
then:
properties:
reg:
@ -207,6 +240,22 @@ allOf:
minimum: 0x54
maximum: 0x57
- if:
properties:
compatible:
contains:
enum:
- ti,tas5806m
- ti,tas5806md
- ti,tas5822
then:
properties:
reg:
maxItems: 4
items:
minimum: 0x2c
maximum: 0x2f
- if:
properties:
compatible:
@ -214,6 +263,7 @@ allOf:
enum:
- ti,tas5827
- ti,tas5828
- ti,tas5830
then:
properties:
reg:

View File

@ -0,0 +1,79 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/trivial-codec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Trivial Audio Codec
maintainers:
- Rob Herring <robh@kernel.org>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
# Analog Devices SSM2602 I2S audio CODEC devices
- adi,ssm2602
- adi,ssm2603
- adi,ssm2604
- adi,ssm3515
# Cirrus Logic CS4265 audio DAC
- cirrus,cs4265
- cirrus,cs4341a
- cirrus,cs4349
- dlg,da9055-codec
# Nuvoton Technology Corporation NAU85L40 Audio CODEC
- nuvoton,nau8540
- nuvoton,nau8810
- nuvoton,nau8812
- nuvoton,nau8814
# NXP TFA9879 class-D audio amplifier
- nxp,tfa9879
- nxp,uda1342
- sdw3019f836300
- ti,pcm1789
- ti,pcm1792a
- ti,pcm5102a
- wlf,wm8510
- wlf,wm8523
- wlf,wm8580
- wlf,wm8581
- wlf,wm8711
- wlf,wm8728
- wlf,wm8737
- wlf,wm8750
- wlf,wm8753
- wlf,wm8770
- wlf,wm8776
- wlf,wm8961
- wlf,wm8974
- wlf,wm8987
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
reset-gpios:
maxItems: 1
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8523";
reg = <0x1a>;
};
};

View File

@ -1,41 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8510.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8510 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8510
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8510";
reg = <0x1a>;
};
};

View File

@ -1,40 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8523.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8523 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8523
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8523";
reg = <0x1a>;
};
};

View File

@ -1,42 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8580.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8580 and WM8581 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- wlf,wm8580
- wlf,wm8581
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8580";
reg = <0x1a>;
};
};

View File

@ -1,40 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8711.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8711 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8711
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8711";
reg = <0x1a>;
};
};

View File

@ -1,40 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8728.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8728 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8728
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8728";
reg = <0x1a>;
};
};

View File

@ -1,40 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8737.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8737 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8737
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8737";
reg = <0x1a>;
};
};

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@ -1,42 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8750.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8750 and WM8987 audio CODECs
description: |
These devices support both I2C and SPI (configured with pin strapping
on the board).
maintainers:
- Mark Brown <broonie@kernel.org>
properties:
compatible:
enum:
- wlf,wm8750
- wlf,wm8987
reg:
description:
The I2C address of the device for I2C, the chip select number for SPI
maxItems: 1
additionalProperties: false
required:
- reg
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8750";
reg = <0x1a>;
};
};

View File

@ -1,62 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8753.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8753 audio CODEC
description: |
Pins on the device (for linking into audio routes):
* LOUT1
* LOUT2
* ROUT1
* ROUT2
* MONO1
* MONO2
* OUT3
* OUT4
* LINE1
* LINE2
* RXP
* RXN
* ACIN
* ACOP
* MIC1N
* MIC1
* MIC2N
* MIC2
* Mic Bias
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8753
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8753";
reg = <0x1a>;
};
};

View File

@ -1,41 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8776.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8776 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8776
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8776";
reg = <0x1a>;
};
};

View File

@ -1,43 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8961.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Wolfson WM8961 Ultra-Low Power Stereo CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8961
reg:
maxItems: 1
'#sound-dai-cells':
const: 0
required:
- compatible
- reg
- '#sound-dai-cells'
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
wm8961: codec@4a {
compatible = "wlf,wm8961";
reg = <0x4a>;
#sound-dai-cells = <0>;
};
};

View File

@ -1,41 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/wlf,wm8974.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: WM8974 audio CODEC
maintainers:
- patches@opensource.cirrus.com
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: wlf,wm8974
reg:
maxItems: 1
"#sound-dai-cells":
const: 0
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@1a {
compatible = "wlf,wm8974";
reg = <0x1a>;
};
};

View File

@ -1,16 +0,0 @@
WM8770 audio CODEC
This device supports SPI.
Required properties:
- compatible : "wlf,wm8770"
- reg : the chip select number.
Example:
wm8770: codec@1 {
compatible = "wlf,wm8770";
reg = <1>;
};

View File

@ -400,19 +400,30 @@ can report through the rotational axes (absolute and/or relative rx, ry, rz).
All other axes retain their meaning. A device must not mix
regular directional axes and accelerometer axes on the same event node.
INPUT_PROP_HAPTIC_TOUCHPAD
--------------------------
INPUT_PROP_PRESSUREPAD
----------------------
The INPUT_PROP_PRESSUREPAD property indicates that the device provides
simulated haptic feedback (e.g. a vibrator motor situated below the surface)
instead of physical haptic feedback (e.g. a hinge). This property is only set
if the device:
The INPUT_PROP_HAPTIC_TOUCHPAD property indicates that device:
- supports simple haptic auto and manual triggering
- can differentiate between at least 5 fingers
- uses correct resolution for the X/Y (units and value)
- reports correct force per touch, and correct units for them (newtons or grams)
- follows the MT protocol type B
If the simulated haptic feedback is controllable by userspace the device must:
- support simple haptic auto and manual triggering, and
- report correct force per touch, and correct units for them (newtons or grams), and
- provide the EV_FF FF_HAPTIC force feedback effect.
Summing up, such devices follow the MS spec for input devices in
Win8 and Win8.1, and in addition support the Simple haptic controller HID table,
and report correct units for the pressure.
Win8 and Win8.1, and in addition may support the Simple haptic controller HID
table, and report correct units for the pressure.
Where applicable, this property is set in addition to INPUT_PROP_BUTTONPAD, it
does not replace that property.
Guidelines
==========

View File

@ -54,6 +54,7 @@ to matching WMI devices using a struct wmi_device_id table:
::
static const struct wmi_device_id foo_id_table[] = {
/* Only use uppercase letters! */
{ "936DA01F-9ABD-4D9D-80C7-02AF85C822A8", NULL },
{ }
};

View File

@ -1758,6 +1758,7 @@ S: Supported
W: http://wiki.analog.com/
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/sound/adi,*
F: Documentation/devicetree/bindings/sound/trivial-codec.yaml
F: sound/soc/codecs/ad1*
F: sound/soc/codecs/ad7*
F: sound/soc/codecs/adau*
@ -2397,9 +2398,9 @@ M: Martin Povišer <povik+lin@cutebit.org>
L: asahi@lists.linux.dev
L: linux-sound@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/sound/adi,ssm3515.yaml
F: Documentation/devicetree/bindings/sound/cirrus,cs42l84.yaml
F: Documentation/devicetree/bindings/sound/apple,*
F: Documentation/devicetree/bindings/sound/cirrus,cs42l84.yaml
F: Documentation/devicetree/bindings/sound/trivial-codec.yaml
F: sound/soc/apple/*
F: sound/soc/codecs/cs42l83-i2c.c
F: sound/soc/codecs/cs42l84.*
@ -3926,7 +3927,7 @@ F: crypto/async_tx/
F: include/linux/async_tx.h
AT24 EEPROM DRIVER
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-i2c@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
@ -9266,7 +9267,6 @@ M: Ido Schimmel <idosch@nvidia.com>
L: bridge@lists.linux.dev
L: netdev@vger.kernel.org
S: Maintained
W: http://www.linuxfoundation.org/en/Net:Bridge
F: include/linux/if_bridge.h
F: include/uapi/linux/if_bridge.h
F: include/linux/netfilter_bridge/
@ -10679,7 +10679,7 @@ F: tools/gpio/gpio-sloppy-logic-analyzer.sh
GPIO SUBSYSTEM
M: Linus Walleij <linus.walleij@linaro.org>
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-gpio@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
@ -10696,7 +10696,7 @@ K: GPIOD_FLAGS_BIT_NONEXCLUSIVE
K: devm_gpiod_unhinge
GPIO UAPI
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
R: Kent Gibson <warthog618@gmail.com>
L: linux-gpio@vger.kernel.org
S: Maintained
@ -15310,7 +15310,7 @@ F: drivers/pwm/pwm-max7360.c
F: include/linux/mfd/max7360.h
MAXIM MAX77650 PMIC MFD DRIVER
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/*/*max77650.yaml
@ -16206,7 +16206,7 @@ MEMORY CONTROLLER DRIVERS
M: Krzysztof Kozlowski <krzk@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
B: mailto:krzysztof.kozlowski@linaro.org
B: mailto:krzk@kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git
F: Documentation/devicetree/bindings/memory-controllers/
F: drivers/memory/
@ -18677,7 +18677,7 @@ NXP TFA9879 DRIVER
M: Peter Rosin <peda@axentia.se>
L: linux-sound@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/sound/nxp,tfa9879.yaml
F: Documentation/devicetree/bindings/sound/trivial-codec.yaml
F: sound/soc/codecs/tfa9879*
NXP-NCI NFC DRIVER
@ -18781,6 +18781,10 @@ S: Maintained
F: arch/arm/*omap*/*clock*
OMAP DEVICE TREE SUPPORT
M: Aaro Koskinen <aaro.koskinen@iki.fi>
M: Andreas Kemnade <andreas@kemnade.info>
M: Kevin Hilman <khilman@baylibre.com>
M: Roger Quadros <rogerq@kernel.org>
M: Tony Lindgren <tony@atomide.com>
L: linux-omap@vger.kernel.org
L: devicetree@vger.kernel.org
@ -19900,7 +19904,7 @@ F: drivers/pci/p2pdma.c
F: include/linux/pci-p2pdma.h
PCI POWER CONTROL
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-pci@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
@ -20497,7 +20501,7 @@ F: include/linux/powercap.h
F: kernel/configs/nopm.config
POWER SEQUENCING
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-pm@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
@ -21179,7 +21183,7 @@ F: Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
F: drivers/i2c/busses/i2c-qcom-cci.c
QUALCOMM INTERCONNECT BWMON DRIVER
M: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
M: Krzysztof Kozlowski <krzk@kernel.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
@ -21300,7 +21304,7 @@ F: Documentation/tee/qtee.rst
F: drivers/tee/qcomtee/
QUALCOMM TRUST ZONE MEMORY ALLOCATOR
M: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: drivers/firmware/qcom/qcom_tzmem.c
@ -25668,7 +25672,7 @@ F: Documentation/devicetree/bindings/crypto/ti,am62l-dthev2.yaml
F: drivers/crypto/ti/
TI DAVINCI MACHINE SUPPORT
M: Bartosz Golaszewski <brgl@bgdev.pl>
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git
@ -27668,6 +27672,7 @@ F: Documentation/devicetree/bindings/extcon/wlf,arizona.yaml
F: Documentation/devicetree/bindings/mfd/wlf,arizona.yaml
F: Documentation/devicetree/bindings/mfd/wm831x.txt
F: Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
F: Documentation/devicetree/bindings/sound/trivial-codec.yaml
F: Documentation/devicetree/bindings/sound/wlf,*.yaml
F: Documentation/devicetree/bindings/sound/wm*
F: Documentation/hwmon/wm83??.rst

View File

@ -2,7 +2,7 @@
VERSION = 6
PATCHLEVEL = 18
SUBLEVEL = 0
EXTRAVERSION = -rc6
EXTRAVERSION = -rc7
NAME = Baby Opossum Posse
# *DOCUMENTATION*

View File

@ -1254,3 +1254,17 @@ &emmc {
max-frequency = <25000000>;
bus-width = <4>;
};
/*
* FIXME: rgmii delay is introduced by MAC (configured in u-boot now)
* instead of PCB on fuji board, so the "phy-mode" should be updated to
* "rgmii-[tx|rx]id" when the aspeed-mac driver can handle the delay
* properly.
*/
&mac3 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&ethphy3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii4_default>;
};

View File

@ -55,8 +55,8 @@ &gmac0 {
mdio {
/delete-node/ switch@1e;
bcm54210e: ethernet-phy@0 {
reg = <0>;
bcm54210e: ethernet-phy@25 {
reg = <25>;
};
};
};

View File

@ -259,7 +259,7 @@ &audmux {
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
mux-ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
@ -271,7 +271,7 @@ IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
mux-aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN

View File

@ -136,7 +136,7 @@ touchscreen: touchscreen@38 {
interrupt-parent = <&gpio2>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
report-rate-hz = <6>;
report-rate-hz = <60>;
/* settings valid only for Hycon touchscreen */
touchscreen-size-x = <1280>;
touchscreen-size-y = <800>;

View File

@ -18,11 +18,21 @@
#include "bcm2712-rpi-5-b-ovl-rp1.dts"
/ {
aliases {
ethernet0 = &rp1_eth;
};
};
&pcie2 {
#include "rp1-nexus.dtsi"
};
&rp1_eth {
assigned-clocks = <&rp1_clocks RP1_CLK_ETH_TSU>,
<&rp1_clocks RP1_CLK_ETH>;
assigned-clock-rates = <50000000>,
<125000000>;
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&phy1>;

View File

@ -67,7 +67,6 @@ irqsteer_csi0: irqsteer@58220000 {
power-domains = <&pd IMX_SC_R_CSI_0>;
fsl,channel = <0>;
fsl,num-irqs = <32>;
status = "disabled";
};
gpio0_mipi_csi0: gpio@58222000 {
@ -144,7 +143,6 @@ irqsteer_csi1: irqsteer@58240000 {
power-domains = <&pd IMX_SC_R_CSI_1>;
fsl,channel = <0>;
fsl,num-irqs = <32>;
status = "disabled";
};
gpio0_mipi_csi1: gpio@58242000 {

View File

@ -16,11 +16,20 @@ aliases {
ethernet1 = &eqos;
};
extcon_usbc: usbc {
compatible = "linux,extcon-usb-gpio";
connector {
compatible = "gpio-usb-b-connector", "usb-b-connector";
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
label = "Type-C";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1_id>;
id-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
type = "micro";
vbus-supply = <&reg_usb1_vbus>;
port {
usb_dr_connector: endpoint {
remote-endpoint = <&usb3_dwc>;
};
};
};
leds {
@ -244,9 +253,15 @@ &usb_dwc3_0 {
hnp-disable;
srp-disable;
dr_mode = "otg";
extcon = <&extcon_usbc>;
usb-role-switch;
role-switch-default-mode = "peripheral";
status = "okay";
port {
usb3_dwc: endpoint {
remote-endpoint = <&usb_dr_connector>;
};
};
};
&usb_dwc3_1 {
@ -273,7 +288,6 @@ &usb3_1 {
};
&usb3_phy0 {
vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};

View File

@ -1886,7 +1886,7 @@ pcie0_ep: pcie-ep@4c300000 {
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
msi-map = <0x0 &its 0x98 0x1>;
msi-map = <0x0 &its 0x10 0x1>;
power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
status = "disabled";
};
@ -1963,6 +1963,7 @@ pcie1_ep: pcie-ep@4c380000 {
assigned-clock-rates = <3600000000>, <100000000>, <10000000>;
assigned-clock-parents = <0>, <0>,
<&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>;
msi-map = <0x0 &its 0x98 0x1>;
power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
status = "disabled";
};

View File

@ -42,6 +42,7 @@ phy: ethernet-phy@0 {
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
#phy-cells = <0>;
wakeup-source;
};
};
};

View File

@ -598,7 +598,6 @@ tsadc: tsadc@ff250000 {
pinctrl-2 = <&otp_pin>;
resets = <&cru SRST_TSADC>;
reset-names = "tsadc-apb";
rockchip,grf = <&grf>;
rockchip,hw-tshut-temp = <100000>;
#thermal-sensor-cells = <1>;
status = "disabled";

View File

@ -3,7 +3,7 @@
* Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
*/
#include "rk3399.dtsi"
#include "rk3399-base.dtsi"
/ {
cluster0_opp: opp-table-0 {

View File

@ -45,11 +45,11 @@ cam_avdd_2v8: regulator-cam-avdd-2v8 {
cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
compatible = "regulator-fixed";
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "cam-dovdd-1v8";
vin-supply = <&vcc1v8_video>;
gpio = <&pca9670 3 GPIO_ACTIVE_LOW>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "cam-dovdd-1v8";
vin-supply = <&vcc1v8_video>;
};
cam_dvdd_1v2: regulator-cam-dvdd-1v2 {

View File

@ -120,7 +120,7 @@ vcc3v3_pcie: regulator-vcc3v3-pcie {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
enable-active-high;
gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_drv>;
regulator-always-on;
@ -187,7 +187,7 @@ vcc5v0_usb: regulator-vcc5v0-usb {
vcc5v0_usb2b: regulator-vcc5v0-usb2b {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2b_en>;
regulator-name = "vcc5v0_usb2b";
@ -199,7 +199,7 @@ vcc5v0_usb2b: regulator-vcc5v0-usb2b {
vcc5v0_usb2t: regulator-vcc5v0-usb2t {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb2t_en>;
regulator-name = "vcc5v0_usb2t";

View File

@ -789,7 +789,7 @@ &pmu_io_domains {
vccio1-supply = <&vccio_acodec>;
vccio2-supply = <&vcc_1v8>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio4-supply = <&vcca1v8_pmu>;
vccio5-supply = <&vcc_1v8>;
vccio6-supply = <&vcc1v8_dvp>;
vccio7-supply = <&vcc_3v3>;

View File

@ -482,6 +482,8 @@ &i2s0_8ch {
};
&i2s1_8ch {
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>;
rockchip,trcm-sync-tx-only;
status = "okay";
};

View File

@ -276,12 +276,6 @@ opp-2016000000 {
opp-microvolt = <900000 900000 950000>;
clock-latency-ns = <40000>;
};
opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <950000 950000 950000>;
clock-latency-ns = <40000>;
};
};
cluster1_opp_table: opp-table-cluster1 {
@ -348,12 +342,6 @@ opp-2208000000 {
opp-microvolt = <925000 925000 950000>;
clock-latency-ns = <40000>;
};
opp-2304000000 {
opp-hz = /bits/ 64 <2304000000>;
opp-microvolt = <950000 950000 950000>;
clock-latency-ns = <40000>;
};
};
gpu_opp_table: opp-table-gpu {
@ -2561,8 +2549,6 @@ i2c9: i2c@2ae80000 {
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&i2c9m0_xfer>;
resets = <&cru SRST_I2C9>, <&cru SRST_P_I2C9>;
reset-names = "i2c", "apb";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";

View File

@ -115,7 +115,7 @@ opp-2400000000 {
};
};
gpu_opp_table: opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-300000000 {

View File

@ -382,14 +382,12 @@ &sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
mmc-pwrseq = <&emmc_pwrseq>;
no-sdio;
no-sd;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>;
pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk>;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vcc_1v8_s3>;
status = "okay";

View File

@ -66,7 +66,7 @@ opp-1608000000 {
};
};
gpu_opp_table: opp-table {
gpu_opp_table: opp-table-gpu {
compatible = "operating-points-v2";
opp-300000000 {

View File

@ -14,8 +14,8 @@ vcc3v3_pcie20: regulator-vcc3v3-pcie20 {
gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc3v3_pcie20";
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <50000>;
vin-supply = <&vcc5v0_sys>;
};

View File

@ -1341,7 +1341,7 @@ CONFIG_COMMON_CLK_RS9_PCIE=y
CONFIG_COMMON_CLK_VC3=y
CONFIG_COMMON_CLK_VC5=y
CONFIG_COMMON_CLK_BD718XX=m
CONFIG_CLK_RASPBERRYPI=m
CONFIG_CLK_RASPBERRYPI=y
CONFIG_CLK_IMX8MM=y
CONFIG_CLK_IMX8MN=y
CONFIG_CLK_IMX8MP=y

View File

@ -33,8 +33,8 @@ struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
unsigned long vaddr);
#define vma_alloc_zeroed_movable_folio vma_alloc_zeroed_movable_folio
void tag_clear_highpage(struct page *to);
#define __HAVE_ARCH_TAG_CLEAR_HIGHPAGE
bool tag_clear_highpages(struct page *to, int numpages);
#define __HAVE_ARCH_TAG_CLEAR_HIGHPAGES
#define clear_user_page(page, vaddr, pg) clear_page(page)
#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)

View File

@ -624,6 +624,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
kvm_timer_vcpu_load(vcpu);
kvm_vgic_load(vcpu);
kvm_vcpu_load_debug(vcpu);
kvm_vcpu_load_fgt(vcpu);
if (has_vhe())
kvm_vcpu_load_vhe(vcpu);
kvm_arch_vcpu_load_fp(vcpu);
@ -642,7 +643,6 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
vcpu->arch.hcr_el2 |= HCR_TWI;
vcpu_set_pauth_traps(vcpu);
kvm_vcpu_load_fgt(vcpu);
if (is_protected_kvm_enabled()) {
kvm_call_hyp_nvhe(__pkvm_vcpu_load,

View File

@ -5609,7 +5609,11 @@ int kvm_finalize_sys_regs(struct kvm_vcpu *vcpu)
guard(mutex)(&kvm->arch.config_lock);
if (!irqchip_in_kernel(kvm)) {
/*
* This hacks into the ID registers, so only perform it when the
* first vcpu runs, or the kvm_set_vm_id_reg() helper will scream.
*/
if (!irqchip_in_kernel(kvm) && !kvm_vm_has_ran_once(kvm)) {
u64 val;
val = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;

View File

@ -967,20 +967,21 @@ struct folio *vma_alloc_zeroed_movable_folio(struct vm_area_struct *vma,
return vma_alloc_folio(flags, 0, vma, vaddr);
}
void tag_clear_highpage(struct page *page)
bool tag_clear_highpages(struct page *page, int numpages)
{
/*
* Check if MTE is supported and fall back to clear_highpage().
* get_huge_zero_folio() unconditionally passes __GFP_ZEROTAGS and
* post_alloc_hook() will invoke tag_clear_highpage().
* post_alloc_hook() will invoke tag_clear_highpages().
*/
if (!system_supports_mte()) {
clear_highpage(page);
return;
}
if (!system_supports_mte())
return false;
/* Newly allocated page, shouldn't have been tagged yet */
WARN_ON_ONCE(!try_page_mte_tagging(page));
mte_zero_clear_page_tags(page_address(page));
set_page_mte_tagged(page);
/* Newly allocated pages, shouldn't have been tagged yet */
for (int i = 0; i < numpages; i++, page++) {
WARN_ON_ONCE(!try_page_mte_tagging(page));
mte_zero_clear_page_tags(page_address(page));
set_page_mte_tagged(page);
}
return true;
}

View File

@ -55,6 +55,27 @@ enum cpu_type_enum {
CPU_LAST
};
static inline char *id_to_core_name(unsigned int id)
{
if ((id & PRID_COMP_MASK) != PRID_COMP_LOONGSON)
return "Unknown";
switch (id & PRID_SERIES_MASK) {
case PRID_SERIES_LA132:
return "LA132";
case PRID_SERIES_LA264:
return "LA264";
case PRID_SERIES_LA364:
return "LA364";
case PRID_SERIES_LA464:
return "LA464";
case PRID_SERIES_LA664:
return "LA664";
default:
return "Unknown";
}
}
#endif /* !__ASSEMBLER__ */
/*

View File

@ -10,10 +10,6 @@
#include <linux/types.h>
#ifndef __KERNEL__
#include <stdint.h>
#endif
/*
* For PTRACE_{POKE,PEEK}USR. 0 - 31 are GPRs,
* 32 is syscall's original ARG0, 33 is PC, 34 is BADVADDR.
@ -41,44 +37,44 @@ struct user_pt_regs {
} __attribute__((aligned(8)));
struct user_fp_state {
uint64_t fpr[32];
uint64_t fcc;
uint32_t fcsr;
__u64 fpr[32];
__u64 fcc;
__u32 fcsr;
};
struct user_lsx_state {
/* 32 registers, 128 bits width per register. */
uint64_t vregs[32*2];
__u64 vregs[32*2];
};
struct user_lasx_state {
/* 32 registers, 256 bits width per register. */
uint64_t vregs[32*4];
__u64 vregs[32*4];
};
struct user_lbt_state {
uint64_t scr[4];
uint32_t eflags;
uint32_t ftop;
__u64 scr[4];
__u32 eflags;
__u32 ftop;
};
struct user_watch_state {
uint64_t dbg_info;
__u64 dbg_info;
struct {
uint64_t addr;
uint64_t mask;
uint32_t ctrl;
uint32_t pad;
__u64 addr;
__u64 mask;
__u32 ctrl;
__u32 pad;
} dbg_regs[8];
};
struct user_watch_state_v2 {
uint64_t dbg_info;
__u64 dbg_info;
struct {
uint64_t addr;
uint64_t mask;
uint32_t ctrl;
uint32_t pad;
__u64 addr;
__u64 mask;
__u32 ctrl;
__u32 pad;
} dbg_regs[14];
};

View File

@ -277,7 +277,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int
uint32_t config;
uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);
uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);
const char *core_name = "Unknown";
const char *core_name = id_to_core_name(c->processor_id);
switch (BIT(fls(c->isa_level) - 1)) {
case LOONGARCH_CPU_ISA_LA32R:
@ -291,35 +291,23 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int
break;
}
switch (c->processor_id & PRID_SERIES_MASK) {
case PRID_SERIES_LA132:
core_name = "LA132";
break;
case PRID_SERIES_LA264:
core_name = "LA264";
break;
case PRID_SERIES_LA364:
core_name = "LA364";
break;
case PRID_SERIES_LA464:
core_name = "LA464";
break;
case PRID_SERIES_LA664:
core_name = "LA664";
break;
}
pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name);
if (!cpu_has_iocsr)
if (!cpu_has_iocsr) {
__cpu_full_name[cpu] = "Unknown";
return;
if (!__cpu_full_name[cpu])
__cpu_full_name[cpu] = cpu_full_name;
}
*vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);
*cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);
if (!__cpu_full_name[cpu]) {
if (((char *)vendor)[0] == 0)
__cpu_full_name[cpu] = "Unknown";
else
__cpu_full_name[cpu] = cpu_full_name;
}
config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);
if (config & IOCSRF_CSRIPI)
c->options |= LOONGARCH_CPU_CSRIPI;

View File

@ -237,6 +237,7 @@ void machine_crash_shutdown(struct pt_regs *regs)
#ifdef CONFIG_SMP
crash_smp_send_stop();
#endif
machine_kexec_mask_interrupts();
cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
pr_info("Starting crashdump kernel...\n");
@ -274,6 +275,7 @@ void machine_kexec(struct kimage *image)
/* We do not want to be bothered. */
local_irq_disable();
machine_kexec_mask_interrupts();
pr_notice("EFI boot flag: 0x%lx\n", efi_boot);
pr_notice("Command line addr: 0x%lx\n", cmdline_ptr);

View File

@ -158,35 +158,9 @@ static void __init node_mem_init(unsigned int node)
#ifdef CONFIG_ACPI_NUMA
/*
* add_numamem_region
*
* Add a uasable memory region described by BIOS. The
* routine gets each intersection between BIOS's region
* and node's region, and adds them into node's memblock
* pool.
*
*/
static void __init add_numamem_region(u64 start, u64 end, u32 type)
{
u32 node = pa_to_nid(start);
u64 size = end - start;
static unsigned long num_physpages;
static unsigned long num_physpages;
if (start >= end) {
pr_debug("Invalid region: %016llx-%016llx\n", start, end);
return;
}
num_physpages += (size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
node, type, start, size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
start >> PAGE_SHIFT, end >> PAGE_SHIFT, num_physpages);
memblock_set_node(start, size, &memblock.memory, node);
}
static void __init init_node_memblock(void)
static void __init info_node_memblock(void)
{
u32 mem_type;
u64 mem_end, mem_start, mem_size;
@ -206,12 +180,20 @@ static void __init init_node_memblock(void)
case EFI_BOOT_SERVICES_DATA:
case EFI_PERSISTENT_MEMORY:
case EFI_CONVENTIONAL_MEMORY:
add_numamem_region(mem_start, mem_end, mem_type);
num_physpages += (mem_size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
(u32)pa_to_nid(mem_start), mem_type, mem_start, mem_size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
mem_start >> PAGE_SHIFT, mem_end >> PAGE_SHIFT, num_physpages);
break;
case EFI_PAL_CODE:
case EFI_UNUSABLE_MEMORY:
case EFI_ACPI_RECLAIM_MEMORY:
add_numamem_region(mem_start, mem_end, mem_type);
num_physpages += (mem_size >> PAGE_SHIFT);
pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx Bytes\n",
(u32)pa_to_nid(mem_start), mem_type, mem_start, mem_size);
pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
mem_start >> PAGE_SHIFT, mem_end >> PAGE_SHIFT, num_physpages);
fallthrough;
case EFI_RESERVED_TYPE:
case EFI_RUNTIME_SERVICES_CODE:
@ -249,22 +231,16 @@ int __init init_numa_memory(void)
for (i = 0; i < NR_CPUS; i++)
set_cpuid_to_node(i, NUMA_NO_NODE);
numa_reset_distance();
nodes_clear(numa_nodes_parsed);
nodes_clear(node_possible_map);
nodes_clear(node_online_map);
WARN_ON(memblock_clear_hotplug(0, PHYS_ADDR_MAX));
/* Parse SRAT and SLIT if provided by firmware. */
ret = acpi_disabled ? fake_numa_init() : acpi_numa_init();
if (!acpi_disabled)
ret = numa_memblks_init(acpi_numa_init, false);
else
ret = numa_memblks_init(fake_numa_init, false);
if (ret < 0)
return ret;
node_possible_map = numa_nodes_parsed;
if (WARN_ON(nodes_empty(node_possible_map)))
return -EINVAL;
init_node_memblock();
info_node_memblock();
if (!memblock_validate_numa_coverage(SZ_1M))
return -EINVAL;

View File

@ -17,6 +17,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
{
unsigned long n = (unsigned long) v - 1;
unsigned int isa = cpu_data[n].isa_level;
unsigned int prid = cpu_data[n].processor_id;
unsigned int version = cpu_data[n].processor_id & 0xff;
unsigned int fp_version = cpu_data[n].fpu_vers;
@ -37,6 +38,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "global_id\t\t: %d\n", cpu_data[n].global_id);
seq_printf(m, "CPU Family\t\t: %s\n", __cpu_family[n]);
seq_printf(m, "Model Name\t\t: %s\n", __cpu_full_name[n]);
seq_printf(m, "PRID\t\t\t: %s (%08x)\n", id_to_core_name(prid), prid);
seq_printf(m, "CPU Revision\t\t: 0x%02x\n", version);
seq_printf(m, "FPU Revision\t\t: 0x%02x\n", fp_version);
seq_printf(m, "CPU MHz\t\t\t: %llu.%02llu\n",

View File

@ -1624,6 +1624,9 @@ static int __arch_prepare_bpf_trampoline(struct jit_ctx *ctx, struct bpf_tramp_i
/* Direct jump skips 5 NOP instructions */
else if (is_bpf_text_address((unsigned long)orig_call))
orig_call += LOONGARCH_BPF_FENTRY_NBYTES;
/* Module tracing not supported - cause kernel lockups */
else if (is_module_text_address((unsigned long)orig_call))
return -ENOTSUPP;
if (flags & BPF_TRAMP_F_CALL_ORIG) {
move_addr(ctx, LOONGARCH_GPR_A0, (const u64)im);

View File

@ -50,11 +50,11 @@ static int __init pcibios_init(void)
*/
lsize = cpu_last_level_cache_line_size();
BUG_ON(!lsize);
if (lsize) {
pci_dfl_cache_line_size = lsize >> 2;
pci_dfl_cache_line_size = lsize >> 2;
pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
}
return 0;
}

View File

@ -18,7 +18,7 @@ cpus: cpus {
cpu@0 {
device_type = "cpu";
compatible = "mips,mips24KEc";
compatible = "mips,mips34Kc";
reg = <0>;
};
};

View File

@ -692,7 +692,7 @@ unsigned long mips_stack_top(void)
/* Space for the VDSO, data page & GIC user page */
if (current->thread.abi) {
top -= PAGE_ALIGN(current->thread.abi->vdso->size);
top -= PAGE_SIZE;
top -= VDSO_NR_PAGES * PAGE_SIZE;
top -= mips_gic_present() ? PAGE_SIZE : 0;
/* Space to randomize the VDSO base */

View File

@ -15,6 +15,7 @@
#include <linux/mm.h>
#include <linux/hugetlb.h>
#include <linux/export.h>
#include <linux/sort.h>
#include <asm/cpu.h>
#include <asm/cpu-type.h>
@ -508,54 +509,78 @@ static int __init set_ntlb(char *str)
__setup("ntlb=", set_ntlb);
/* Initialise all TLB entries with unique values */
/* Comparison function for EntryHi VPN fields. */
static int r4k_vpn_cmp(const void *a, const void *b)
{
long v = *(unsigned long *)a - *(unsigned long *)b;
int s = sizeof(long) > sizeof(int) ? sizeof(long) * 8 - 1: 0;
return s ? (v != 0) | v >> s : v;
}
/*
* Initialise all TLB entries with unique values that do not clash with
* what we have been handed over and what we'll be using ourselves.
*/
static void r4k_tlb_uniquify(void)
{
int entry = num_wired_entries();
unsigned long tlb_vpns[1 << MIPS_CONF1_TLBS_SIZE];
int tlbsize = current_cpu_data.tlbsize;
int start = num_wired_entries();
unsigned long vpn_mask;
int cnt, ent, idx, i;
vpn_mask = GENMASK(cpu_vmbits - 1, 13);
vpn_mask |= IS_ENABLED(CONFIG_64BIT) ? 3ULL << 62 : 1 << 31;
htw_stop();
for (i = start, cnt = 0; i < tlbsize; i++, cnt++) {
unsigned long vpn;
write_c0_index(i);
mtc0_tlbr_hazard();
tlb_read();
tlb_read_hazard();
vpn = read_c0_entryhi();
vpn &= vpn_mask & PAGE_MASK;
tlb_vpns[cnt] = vpn;
/* Prevent any large pages from overlapping regular ones. */
write_c0_pagemask(read_c0_pagemask() & PM_DEFAULT_MASK);
mtc0_tlbw_hazard();
tlb_write_indexed();
tlbw_use_hazard();
}
sort(tlb_vpns, cnt, sizeof(tlb_vpns[0]), r4k_vpn_cmp, NULL);
write_c0_pagemask(PM_DEFAULT_MASK);
write_c0_entrylo0(0);
write_c0_entrylo1(0);
while (entry < current_cpu_data.tlbsize) {
unsigned long asid_mask = cpu_asid_mask(&current_cpu_data);
unsigned long asid = 0;
int idx;
idx = 0;
ent = tlbsize;
for (i = start; i < tlbsize; i++)
while (1) {
unsigned long entryhi, vpn;
/* Skip wired MMID to make ginvt_mmid work */
if (cpu_has_mmid)
asid = MMID_KERNEL_WIRED + 1;
entryhi = UNIQUE_ENTRYHI(ent);
vpn = entryhi & vpn_mask & PAGE_MASK;
/* Check for match before using UNIQUE_ENTRYHI */
do {
if (cpu_has_mmid) {
write_c0_memorymapid(asid);
write_c0_entryhi(UNIQUE_ENTRYHI(entry));
} else {
write_c0_entryhi(UNIQUE_ENTRYHI(entry) | asid);
}
mtc0_tlbw_hazard();
tlb_probe();
tlb_probe_hazard();
idx = read_c0_index();
/* No match or match is on current entry */
if (idx < 0 || idx == entry)
if (idx >= cnt || vpn < tlb_vpns[idx]) {
write_c0_entryhi(entryhi);
write_c0_index(i);
mtc0_tlbw_hazard();
tlb_write_indexed();
ent++;
break;
/*
* If we hit a match, we need to try again with
* a different ASID.
*/
asid++;
} while (asid < asid_mask);
if (idx >= 0 && idx != entry)
panic("Unable to uniquify TLB entry %d", idx);
write_c0_index(entry);
mtc0_tlbw_hazard();
tlb_write_indexed();
entry++;
}
} else if (vpn == tlb_vpns[idx]) {
ent++;
} else {
idx++;
}
}
tlbw_use_hazard();
htw_start();
@ -602,6 +627,7 @@ static void r4k_tlb_configure(void)
/* From this point on the ARC firmware is dead. */
r4k_tlb_uniquify();
local_flush_tlb_all();
/* Did I tell you that ARC SUCKS? */
}

View File

@ -241,16 +241,22 @@ void __init prom_init(void)
#endif
/*
* Setup the Malta max (2GB) memory for PCI DMA in host bridge
* in transparent addressing mode.
* Set up memory mapping in host bridge for PCI DMA masters,
* in transparent addressing mode. For EVA use the Malta
* maximum of 2 GiB memory in the alias space at 0x80000000
* as per PHYS_OFFSET. Otherwise use 256 MiB of memory in
* the regular space, avoiding mapping the PCI MMIO window
* for DMA as it seems to confuse the system controller's
* logic, causing PCI MMIO to stop working.
*/
mask = PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH;
MSC_WRITE(MSC01_PCI_BAR0, mask);
MSC_WRITE(MSC01_PCI_HEAD4, mask);
mask = PHYS_OFFSET ? PHYS_OFFSET : 0xf0000000;
MSC_WRITE(MSC01_PCI_BAR0,
mask | PCI_BASE_ADDRESS_MEM_PREFETCH);
MSC_WRITE(MSC01_PCI_HEAD4,
PHYS_OFFSET | PCI_BASE_ADDRESS_MEM_PREFETCH);
mask &= MSC01_PCI_BAR0_SIZE_MSK;
MSC_WRITE(MSC01_PCI_P2SCMSKL, mask);
MSC_WRITE(MSC01_PCI_P2SCMAPL, mask);
MSC_WRITE(MSC01_PCI_P2SCMAPL, PHYS_OFFSET);
/* Don't handle target retries indefinitely. */
if ((data & MSC01_PCI_CFG_MAXRTRY_MSK) ==

View File

@ -7,8 +7,8 @@
#define ANDES_VENDOR_ID 0x31e
#define MICROCHIP_VENDOR_ID 0x029
#define MIPS_VENDOR_ID 0x127
#define SIFIVE_VENDOR_ID 0x489
#define THEAD_VENDOR_ID 0x5b7
#define MIPS_VENDOR_ID 0x722
#endif

View File

@ -648,9 +648,9 @@ int sbi_debug_console_read(char *bytes, unsigned int num_bytes)
void __init sbi_init(void)
{
bool srst_power_off = false;
int ret;
sbi_set_power_off();
ret = sbi_get_spec_version();
if (ret > 0)
sbi_spec_version = ret;
@ -683,6 +683,7 @@ void __init sbi_init(void)
sbi_probe_extension(SBI_EXT_SRST)) {
pr_info("SBI SRST extension detected\n");
register_platform_power_off(sbi_srst_power_off);
srst_power_off = true;
sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
sbi_srst_reboot_nb.priority = 192;
register_restart_handler(&sbi_srst_reboot_nb);
@ -702,4 +703,7 @@ void __init sbi_init(void)
__sbi_send_ipi = __sbi_send_ipi_v01;
__sbi_rfence = __sbi_rfence_v01;
}
if (!srst_power_off)
sbi_set_power_off();
}

View File

@ -1325,8 +1325,6 @@ static void uncore_pci_sub_driver_init(void)
continue;
pmu = &type->pmus[UNCORE_PCI_DEV_IDX(ids->driver_data)];
if (!pmu)
continue;
if (uncore_pci_get_dev_die_info(pci_sub_dev, &die))
continue;

View File

@ -705,7 +705,11 @@ void *svm_alloc_permissions_map(unsigned long size, gfp_t gfp_mask)
static void svm_recalc_lbr_msr_intercepts(struct kvm_vcpu *vcpu)
{
bool intercept = !(to_svm(vcpu)->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK);
struct vcpu_svm *svm = to_svm(vcpu);
bool intercept = !(svm->vmcb->control.virt_ext & LBR_CTL_ENABLE_MASK);
if (intercept == svm->lbr_msrs_intercepted)
return;
svm_set_intercept_for_msr(vcpu, MSR_IA32_LASTBRANCHFROMIP, MSR_TYPE_RW, intercept);
svm_set_intercept_for_msr(vcpu, MSR_IA32_LASTBRANCHTOIP, MSR_TYPE_RW, intercept);
@ -714,6 +718,8 @@ static void svm_recalc_lbr_msr_intercepts(struct kvm_vcpu *vcpu)
if (sev_es_guest(vcpu->kvm))
svm_set_intercept_for_msr(vcpu, MSR_IA32_DEBUGCTLMSR, MSR_TYPE_RW, intercept);
svm->lbr_msrs_intercepted = intercept;
}
void svm_vcpu_free_msrpm(void *msrpm)
@ -1221,6 +1227,7 @@ static int svm_vcpu_create(struct kvm_vcpu *vcpu)
}
svm->x2avic_msrs_intercepted = true;
svm->lbr_msrs_intercepted = true;
svm->vmcb01.ptr = page_address(vmcb01_page);
svm->vmcb01.pa = __sme_set(page_to_pfn(vmcb01_page) << PAGE_SHIFT);

View File

@ -336,6 +336,7 @@ struct vcpu_svm {
bool guest_state_loaded;
bool x2avic_msrs_intercepted;
bool lbr_msrs_intercepted;
/* Guest GIF value, used when vGIF is not enabled */
bool guest_gif;

View File

@ -231,7 +231,7 @@ int sb_set_blocksize(struct super_block *sb, int size)
EXPORT_SYMBOL(sb_set_blocksize);
int sb_min_blocksize(struct super_block *sb, int size)
int __must_check sb_min_blocksize(struct super_block *sb, int size)
{
int minsize = bdev_logical_block_size(sb->s_bdev);
if (size < minsize)

View File

@ -182,6 +182,7 @@ bool einj_initialized __ro_after_init;
static void __iomem *einj_param;
static u32 v5param_size;
static u32 v66param_size;
static bool is_v2;
static void einj_exec_ctx_init(struct apei_exec_context *ctx)
@ -283,6 +284,24 @@ static void check_vendor_extension(u64 paddr,
acpi_os_unmap_iomem(p, sizeof(v));
}
static u32 einjv2_init(struct einjv2_extension_struct *e)
{
if (e->revision != 1) {
pr_info("Unknown v2 extension revision %u\n", e->revision);
return 0;
}
if (e->length < sizeof(*e) || e->length > PAGE_SIZE) {
pr_info(FW_BUG "Bad1 v2 extension length %u\n", e->length);
return 0;
}
if ((e->length - sizeof(*e)) % sizeof(e->component_arr[0])) {
pr_info(FW_BUG "Bad2 v2 extension length %u\n", e->length);
return 0;
}
return (e->length - sizeof(*e)) / sizeof(e->component_arr[0]);
}
static void __iomem *einj_get_parameter_address(void)
{
int i;
@ -310,28 +329,21 @@ static void __iomem *einj_get_parameter_address(void)
v5param_size = sizeof(v5param);
p = acpi_os_map_iomem(pa_v5, sizeof(*p));
if (p) {
int offset, len;
memcpy_fromio(&v5param, p, v5param_size);
acpi5 = 1;
check_vendor_extension(pa_v5, &v5param);
if (is_v2 && available_error_type & ACPI65_EINJV2_SUPP) {
len = v5param.einjv2_struct.length;
offset = offsetof(struct einjv2_extension_struct, component_arr);
max_nr_components = (len - offset) /
sizeof(v5param.einjv2_struct.component_arr[0]);
/*
* The first call to acpi_os_map_iomem above does not include the
* component array, instead it is used to read and calculate maximum
* number of components supported by the system. Below, the mapping
* is expanded to include the component array.
*/
if (available_error_type & ACPI65_EINJV2_SUPP) {
struct einjv2_extension_struct *e;
e = &v5param.einjv2_struct;
max_nr_components = einjv2_init(e);
/* remap including einjv2_extension_struct */
acpi_os_unmap_iomem(p, v5param_size);
offset = offsetof(struct set_error_type_with_address, einjv2_struct);
v5param_size = offset + struct_size(&v5param.einjv2_struct,
component_arr, max_nr_components);
p = acpi_os_map_iomem(pa_v5, v5param_size);
v66param_size = v5param_size - sizeof(*e) + e->length;
p = acpi_os_map_iomem(pa_v5, v66param_size);
}
return p;
}
}
@ -527,6 +539,7 @@ static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
u64 param3, u64 param4)
{
struct apei_exec_context ctx;
u32 param_size = is_v2 ? v66param_size : v5param_size;
u64 val, trigger_paddr, timeout = FIRMWARE_TIMEOUT;
int i, rc;
@ -539,11 +552,11 @@ static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
if (acpi5) {
struct set_error_type_with_address *v5param;
v5param = kmalloc(v5param_size, GFP_KERNEL);
v5param = kmalloc(param_size, GFP_KERNEL);
if (!v5param)
return -ENOMEM;
memcpy_fromio(v5param, einj_param, v5param_size);
memcpy_fromio(v5param, einj_param, param_size);
v5param->type = type;
if (type & ACPI5_VENDOR_BIT) {
switch (vendor_flags) {
@ -601,7 +614,7 @@ static int __einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
break;
}
}
memcpy_toio(einj_param, v5param, v5param_size);
memcpy_toio(einj_param, v5param, param_size);
kfree(v5param);
} else {
rc = apei_exec_run(&ctx, ACPI_EINJ_SET_ERROR_TYPE);
@ -1132,9 +1145,14 @@ static void einj_remove(struct faux_device *fdev)
struct apei_exec_context ctx;
if (einj_param) {
acpi_size size = (acpi5) ?
v5param_size :
sizeof(struct einj_parameter);
acpi_size size;
if (v66param_size)
size = v66param_size;
else if (acpi5)
size = v5param_size;
else
size = sizeof(struct einj_parameter);
acpi_os_unmap_iomem(einj_param, size);
if (vendor_errors.size)

View File

@ -3006,6 +3006,16 @@ int ata_dev_configure(struct ata_device *dev)
}
dev->n_sectors = ata_id_n_sectors(id);
if (ata_id_is_locked(id)) {
/*
* If Security locked, set capacity to zero to prevent
* any I/O, e.g. partition scanning, as any I/O to a
* locked drive will result in user visible errors.
*/
ata_dev_info(dev,
"Security locked, setting capacity to zero\n");
dev->n_sectors = 0;
}
/* get current R/W Multiple count setting */
if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {

View File

@ -992,6 +992,13 @@ static void ata_gen_ata_sense(struct ata_queued_cmd *qc)
return;
}
if (ata_id_is_locked(dev->id)) {
/* Security locked */
/* LOGICAL UNIT ACCESS NOT AUTHORIZED */
ata_scsi_set_sense(dev, cmd, DATA_PROTECT, 0x74, 0x71);
return;
}
if (!(qc->flags & ATA_QCFLAG_RTF_FILLED)) {
ata_dev_dbg(dev,
"Missing result TF: reporting aborted command\n");
@ -4894,8 +4901,10 @@ void ata_scsi_dev_rescan(struct work_struct *work)
spin_unlock_irqrestore(ap->lock, flags);
if (do_resume) {
ret = scsi_resume_device(sdev);
if (ret == -EWOULDBLOCK)
if (ret == -EWOULDBLOCK) {
scsi_device_put(sdev);
goto unlock_scan;
}
dev->flags &= ~ATA_DFLAG_RESUMING;
}
ret = scsi_rescan_device(sdev);

View File

@ -888,12 +888,15 @@ static void device_resume_early(struct device *dev, pm_message_t state, bool asy
TRACE_DEVICE(dev);
TRACE_RESUME(0);
if (dev->power.syscore || dev->power.direct_complete)
if (dev->power.direct_complete)
goto Out;
if (!dev->power.is_late_suspended)
goto Out;
if (dev->power.syscore)
goto Skip;
if (!dpm_wait_for_superior(dev, async))
goto Out;
@ -926,11 +929,11 @@ static void device_resume_early(struct device *dev, pm_message_t state, bool asy
Skip:
dev->power.is_late_suspended = false;
pm_runtime_enable(dev);
Out:
TRACE_RESUME(error);
pm_runtime_enable(dev);
complete_all(&dev->power.completion);
if (error) {
@ -1615,12 +1618,6 @@ static void device_suspend_late(struct device *dev, pm_message_t state, bool asy
TRACE_DEVICE(dev);
TRACE_SUSPEND(0);
/*
* Disable runtime PM for the device without checking if there is a
* pending resume request for it.
*/
__pm_runtime_disable(dev, false);
dpm_wait_for_subordinate(dev, async);
if (READ_ONCE(async_error))
@ -1631,9 +1628,18 @@ static void device_suspend_late(struct device *dev, pm_message_t state, bool asy
goto Complete;
}
if (dev->power.syscore || dev->power.direct_complete)
if (dev->power.direct_complete)
goto Complete;
/*
* Disable runtime PM for the device without checking if there is a
* pending resume request for it.
*/
__pm_runtime_disable(dev, false);
if (dev->power.syscore)
goto Skip;
if (dev->pm_domain) {
info = "late power domain ";
callback = pm_late_early_op(&dev->pm_domain->ops, state);
@ -1664,6 +1670,7 @@ static void device_suspend_late(struct device *dev, pm_message_t state, bool asy
WRITE_ONCE(async_error, error);
dpm_save_failed_dev(dev_name(dev));
pm_dev_err(dev, state, async ? " async late" : " late", error);
pm_runtime_enable(dev);
goto Complete;
}
dpm_propagate_wakeup_to_parent(dev);

View File

@ -15,6 +15,7 @@
struct regmap_mbq_context {
struct device *dev;
struct sdw_slave *sdw;
struct regmap_sdw_mbq_cfg cfg;
@ -46,7 +47,7 @@ static bool regmap_sdw_mbq_deferrable(struct regmap_mbq_context *ctx, unsigned i
static int regmap_sdw_mbq_poll_busy(struct sdw_slave *slave, unsigned int reg,
struct regmap_mbq_context *ctx)
{
struct device *dev = &slave->dev;
struct device *dev = ctx->dev;
int val, ret = 0;
dev_dbg(dev, "Deferring transaction for 0x%x\n", reg);
@ -96,8 +97,7 @@ static int regmap_sdw_mbq_write_impl(struct sdw_slave *slave,
static int regmap_sdw_mbq_write(void *context, unsigned int reg, unsigned int val)
{
struct regmap_mbq_context *ctx = context;
struct device *dev = ctx->dev;
struct sdw_slave *slave = dev_to_sdw_dev(dev);
struct sdw_slave *slave = ctx->sdw;
bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
int mbq_size = regmap_sdw_mbq_size(ctx, reg);
int ret;
@ -156,8 +156,7 @@ static int regmap_sdw_mbq_read_impl(struct sdw_slave *slave,
static int regmap_sdw_mbq_read(void *context, unsigned int reg, unsigned int *val)
{
struct regmap_mbq_context *ctx = context;
struct device *dev = ctx->dev;
struct sdw_slave *slave = dev_to_sdw_dev(dev);
struct sdw_slave *slave = ctx->sdw;
bool deferrable = regmap_sdw_mbq_deferrable(ctx, reg);
int mbq_size = regmap_sdw_mbq_size(ctx, reg);
int ret;
@ -208,6 +207,7 @@ static int regmap_sdw_mbq_config_check(const struct regmap_config *config)
static struct regmap_mbq_context *
regmap_sdw_mbq_gen_context(struct device *dev,
struct sdw_slave *sdw,
const struct regmap_config *config,
const struct regmap_sdw_mbq_cfg *mbq_config)
{
@ -218,6 +218,7 @@ regmap_sdw_mbq_gen_context(struct device *dev,
return ERR_PTR(-ENOMEM);
ctx->dev = dev;
ctx->sdw = sdw;
if (mbq_config)
ctx->cfg = *mbq_config;
@ -228,7 +229,7 @@ regmap_sdw_mbq_gen_context(struct device *dev,
return ctx;
}
struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
struct regmap *__regmap_init_sdw_mbq(struct device *dev, struct sdw_slave *sdw,
const struct regmap_config *config,
const struct regmap_sdw_mbq_cfg *mbq_config,
struct lock_class_key *lock_key,
@ -241,16 +242,16 @@ struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw,
if (ret)
return ERR_PTR(ret);
ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
ctx = regmap_sdw_mbq_gen_context(dev, sdw, config, mbq_config);
if (IS_ERR(ctx))
return ERR_CAST(ctx);
return __regmap_init(&sdw->dev, &regmap_sdw_mbq, ctx,
return __regmap_init(dev, &regmap_sdw_mbq, ctx,
config, lock_key, lock_name);
}
EXPORT_SYMBOL_GPL(__regmap_init_sdw_mbq);
struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
struct regmap *__devm_regmap_init_sdw_mbq(struct device *dev, struct sdw_slave *sdw,
const struct regmap_config *config,
const struct regmap_sdw_mbq_cfg *mbq_config,
struct lock_class_key *lock_key,
@ -263,11 +264,11 @@ struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw,
if (ret)
return ERR_PTR(ret);
ctx = regmap_sdw_mbq_gen_context(&sdw->dev, config, mbq_config);
ctx = regmap_sdw_mbq_gen_context(dev, sdw, config, mbq_config);
if (IS_ERR(ctx))
return ERR_CAST(ctx);
return __devm_regmap_init(&sdw->dev, &regmap_sdw_mbq, ctx,
return __devm_regmap_init(dev, &regmap_sdw_mbq, ctx,
config, lock_key, lock_name);
}
EXPORT_SYMBOL_GPL(__devm_regmap_init_sdw_mbq);

View File

@ -121,11 +121,11 @@ static SUNXI_CCU_GATE_HW(bus_r_ir_rx_clk, "bus-r-ir-rx",
&r_apb0_clk.common.hw, 0x1cc, BIT(0), 0);
static SUNXI_CCU_GATE_HW(bus_r_dma_clk, "bus-r-dma",
&r_apb0_clk.common.hw, 0x1dc, BIT(0), 0);
&r_apb0_clk.common.hw, 0x1dc, BIT(0), CLK_IS_CRITICAL);
static SUNXI_CCU_GATE_HW(bus_r_rtc_clk, "bus-r-rtc",
&r_apb0_clk.common.hw, 0x20c, BIT(0), 0);
static SUNXI_CCU_GATE_HW(bus_r_cpucfg_clk, "bus-r-cpucfg",
&r_apb0_clk.common.hw, 0x22c, BIT(0), 0);
&r_apb0_clk.common.hw, 0x22c, BIT(0), CLK_IS_CRITICAL);
static struct ccu_common *sun55i_a523_r_ccu_clks[] = {
&r_ahb_clk.common,

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