mirror of https://github.com/torvalds/linux.git
ARM: mach-hpe: Rework support and directory structure
Having a platform need a mach-* directory should be seen as a negative, it means the platform needs special non-standard handling. ARM64 support does not allow mach-* directories at all. While we may not get to that given all the non-standard architectures we support, we should still try to get as close as we can and reduce the number of mach directories. The mach-hpe/ directory and files, provides just one "feature": having the kernel print the machine name if the DTB does not also contain a "model" string (which they always do). To reduce the number of mach-* directories let's do without that feature and remove this directory. Note, we drop the l2c_aux_mask = ~0 line, but this is safe as the fallback GENERIC_DT machine has that as the default. Signed-off-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20250813170308.290349-1-afd@ti.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -2728,7 +2728,6 @@ F: Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml
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F: Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml
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F: Documentation/hwmon/gxp-fan-ctrl.rst
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F: arch/arm/boot/dts/hpe/
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F: arch/arm/mach-hpe/
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F: drivers/clocksource/timer-gxp.c
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F: drivers/hwmon/gxp-fan-ctrl.c
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F: drivers/i2c/busses/i2c-gxp.c
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@ -393,8 +393,6 @@ source "arch/arm/mach-highbank/Kconfig"
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source "arch/arm/mach-hisi/Kconfig"
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source "arch/arm/mach-hpe/Kconfig"
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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-ixp4xx/Kconfig"
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@ -87,6 +87,31 @@ config MACH_ASM9260
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help
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Support for Alphascale ASM9260 based platform.
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menuconfig ARCH_HPE
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bool "HPE SoC support"
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depends on ARCH_MULTI_V7
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help
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This enables support for HPE ARM based BMC chips.
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if ARCH_HPE
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config ARCH_HPE_GXP
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bool "HPE GXP SoC"
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depends on ARCH_MULTI_V7
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select ARM_VIC
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select GENERIC_IRQ_CHIP
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select CLKSRC_MMIO
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help
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HPE GXP is the name of the HPE Soc. This SoC is used to implement many
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BMC features at HPE. It supports ARMv7 architecture based on the Cortex
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A9 core. It is capable of using an AXI bus to which a memory controller
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is attached. It has multiple SPI interfaces to connect boot flash and
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BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
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has multiple i2c engines to drive connectivity with a host
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infrastructure.
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endif
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menuconfig ARCH_MOXART
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bool "MOXA ART SoC"
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depends on ARCH_MULTI_V4
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@ -189,7 +189,6 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge
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machine-$(CONFIG_ARCH_GEMINI) += gemini
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machine-$(CONFIG_ARCH_HIGHBANK) += highbank
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machine-$(CONFIG_ARCH_HISI) += hisi
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machine-$(CONFIG_ARCH_HPE) += hpe
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machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx
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machine-$(CONFIG_ARCH_KEYSTONE) += keystone
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machine-$(CONFIG_ARCH_LPC18XX) += lpc18xx
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@ -1,23 +0,0 @@
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menuconfig ARCH_HPE
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bool "HPE SoC support"
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depends on ARCH_MULTI_V7
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help
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This enables support for HPE ARM based BMC chips.
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if ARCH_HPE
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config ARCH_HPE_GXP
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bool "HPE GXP SoC"
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depends on ARCH_MULTI_V7
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select ARM_VIC
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select GENERIC_IRQ_CHIP
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select CLKSRC_MMIO
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help
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HPE GXP is the name of the HPE Soc. This SoC is used to implement many
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BMC features at HPE. It supports ARMv7 architecture based on the Cortex
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A9 core. It is capable of using an AXI bus to which a memory controller
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is attached. It has multiple SPI interfaces to connect boot flash and
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BIOS flash. It uses a 10/100/1000 MAC for network connectivity. It
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has multiple i2c engines to drive connectivity with a host
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infrastructure.
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endif
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@ -1 +0,0 @@
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obj-$(CONFIG_ARCH_HPE_GXP) += gxp.o
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@ -1,15 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
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#include <asm/mach/arch.h>
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static const char * const gxp_board_dt_compat[] = {
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"hpe,gxp",
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NULL,
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};
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DT_MACHINE_START(GXP_DT, "HPE GXP")
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.dt_compat = gxp_board_dt_compat,
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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MACHINE_END
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