dt-bindings: dma: Convert apm,xgene-storm-dma to DT schema

Convert APM X-Gene Storm DMA binding to DT schema format. It's a
straight-forward conversion.

Link: https://patch.msgid.link/20251013213037.684981-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Rob Herring (Arm) 2025-10-13 16:30:35 -05:00
parent a18b0c9248
commit 8b9ef71400
2 changed files with 59 additions and 47 deletions

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/apm,xgene-storm-dma.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: APM X-Gene Storm SoC DMA
maintainers:
- Khuong Dinh <khuong@os.amperecomputing.com>
properties:
compatible:
const: apm,xgene-storm-dma
reg:
items:
- description: DMA control and status registers
- description: Descriptor ring control and status registers
- description: Descriptor ring command registers
- description: SoC efuse registers
interrupts:
items:
- description: DMA error reporting interrupt
- description: DMA channel 0 completion interrupt
- description: DMA channel 1 completion interrupt
- description: DMA channel 2 completion interrupt
- description: DMA channel 3 completion interrupt
clocks:
maxItems: 1
dma-coherent: true
required:
- compatible
- reg
- interrupts
- clocks
additionalProperties: false
examples:
- |
dma@1f270000 {
compatible = "apm,xgene-storm-dma";
reg = <0x1f270000 0x10000>,
<0x1f200000 0x10000>,
<0x1b000000 0x400000>,
<0x1054a000 0x100>;
interrupts = <0x0 0x82 0x4>,
<0x0 0xb8 0x4>,
<0x0 0xb9 0x4>,
<0x0 0xba 0x4>,
<0x0 0xbb 0x4>;
dma-coherent;
clocks = <&dmaclk 0>;
};

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Applied Micro X-Gene SoC DMA nodes
DMA nodes are defined to describe on-chip DMA interfaces in
APM X-Gene SoC.
Required properties for DMA interfaces:
- compatible: Should be "apm,xgene-dma".
- device_type: set to "dma".
- reg: Address and length of the register set for the device.
It contains the information of registers in the following order:
1st - DMA control and status register address space.
2nd - Descriptor ring control and status register address space.
3rd - Descriptor ring command register address space.
4th - Soc efuse register address space.
- interrupts: DMA has 5 interrupts sources. 1st interrupt is
DMA error reporting interrupt. 2nd, 3rd, 4th and 5th interrupts
are completion interrupts for each DMA channels.
- clocks: Reference to the clock entry.
Optional properties:
- dma-coherent : Present if dma operations are coherent
Example:
dmaclk: dmaclk@1f27c000 {
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
clocks = <&socplldiv2 0>;
reg = <0x0 0x1f27c000 0x0 0x1000>;
reg-names = "csr-reg";
clock-output-names = "dmaclk";
};
dma: dma@1f270000 {
compatible = "apm,xgene-storm-dma";
device_type = "dma";
reg = <0x0 0x1f270000 0x0 0x10000>,
<0x0 0x1f200000 0x0 0x10000>,
<0x0 0x1b000000 0x0 0x400000>,
<0x0 0x1054a000 0x0 0x100>;
interrupts = <0x0 0x82 0x4>,
<0x0 0xb8 0x4>,
<0x0 0xb9 0x4>,
<0x0 0xba 0x4>,
<0x0 0xbb 0x4>;
dma-coherent;
clocks = <&dmaclk 0>;
};