crypto: hisilicon/zip - add hashjoin, gather, and UDMA data move features

The new version of the hisilicon zip driver supports the hash join
and gather features, as well as the data move feature (UDMA),
including data copying and memory initialization functions.These
features are registered to the uacce subsystem.

Signed-off-by: Zhushuai Yin <yinzhushuai@huawei.com>
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Zhushuai Yin 2025-08-30 18:27:57 +08:00 committed by Herbert Xu
parent cf79ed6aac
commit 886d698120
4 changed files with 33 additions and 9 deletions

View File

@ -2742,6 +2742,27 @@ static void qm_remove_uacce(struct hisi_qm *qm)
} }
} }
static void qm_uacce_api_ver_init(struct hisi_qm *qm)
{
struct uacce_device *uacce = qm->uacce;
switch (qm->ver) {
case QM_HW_V1:
uacce->api_ver = HISI_QM_API_VER_BASE;
break;
case QM_HW_V2:
uacce->api_ver = HISI_QM_API_VER2_BASE;
break;
case QM_HW_V3:
case QM_HW_V4:
uacce->api_ver = HISI_QM_API_VER3_BASE;
break;
default:
uacce->api_ver = HISI_QM_API_VER5_BASE;
break;
}
}
static int qm_alloc_uacce(struct hisi_qm *qm) static int qm_alloc_uacce(struct hisi_qm *qm)
{ {
struct pci_dev *pdev = qm->pdev; struct pci_dev *pdev = qm->pdev;
@ -2775,13 +2796,6 @@ static int qm_alloc_uacce(struct hisi_qm *qm)
uacce->is_vf = pdev->is_virtfn; uacce->is_vf = pdev->is_virtfn;
uacce->priv = qm; uacce->priv = qm;
if (qm->ver == QM_HW_V1)
uacce->api_ver = HISI_QM_API_VER_BASE;
else if (qm->ver == QM_HW_V2)
uacce->api_ver = HISI_QM_API_VER2_BASE;
else
uacce->api_ver = HISI_QM_API_VER3_BASE;
if (qm->ver == QM_HW_V1) if (qm->ver == QM_HW_V1)
mmio_page_nr = QM_DOORBELL_PAGE_NR; mmio_page_nr = QM_DOORBELL_PAGE_NR;
else if (!test_bit(QM_SUPPORT_DB_ISOLATION, &qm->caps)) else if (!test_bit(QM_SUPPORT_DB_ISOLATION, &qm->caps))
@ -2801,6 +2815,7 @@ static int qm_alloc_uacce(struct hisi_qm *qm)
uacce->qf_pg_num[UACCE_QFRT_DUS] = dus_page_nr; uacce->qf_pg_num[UACCE_QFRT_DUS] = dus_page_nr;
qm->uacce = uacce; qm->uacce = uacce;
qm_uacce_api_ver_init(qm);
INIT_LIST_HEAD(&qm->isolate_data.qm_hw_errs); INIT_LIST_HEAD(&qm->isolate_data.qm_hw_errs);
mutex_init(&qm->isolate_data.isolate_lock); mutex_init(&qm->isolate_data.isolate_lock);

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@ -15,6 +15,7 @@
#define DAE_REG_RD_TMOUT_US USEC_PER_SEC #define DAE_REG_RD_TMOUT_US USEC_PER_SEC
#define DAE_ALG_NAME "hashagg" #define DAE_ALG_NAME "hashagg"
#define DAE_V5_ALG_NAME "hashagg\nudma\nhashjoin\ngather"
/* error */ /* error */
#define DAE_AXI_CFG_OFFSET 0x331000 #define DAE_AXI_CFG_OFFSET 0x331000
@ -82,6 +83,7 @@ int hisi_dae_set_user_domain(struct hisi_qm *qm)
int hisi_dae_set_alg(struct hisi_qm *qm) int hisi_dae_set_alg(struct hisi_qm *qm)
{ {
const char *alg_name;
size_t len; size_t len;
if (!dae_is_support(qm)) if (!dae_is_support(qm))
@ -90,9 +92,14 @@ int hisi_dae_set_alg(struct hisi_qm *qm)
if (!qm->uacce) if (!qm->uacce)
return 0; return 0;
if (qm->ver >= QM_HW_V5)
alg_name = DAE_V5_ALG_NAME;
else
alg_name = DAE_ALG_NAME;
len = strlen(qm->uacce->algs); len = strlen(qm->uacce->algs);
/* A line break may be required */ /* A line break may be required */
if (len + strlen(DAE_ALG_NAME) + 1 >= QM_DEV_ALG_MAX_LEN) { if (len + strlen(alg_name) + 1 >= QM_DEV_ALG_MAX_LEN) {
pci_err(qm->pdev, "algorithm name is too long!\n"); pci_err(qm->pdev, "algorithm name is too long!\n");
return -EINVAL; return -EINVAL;
} }
@ -100,7 +107,7 @@ int hisi_dae_set_alg(struct hisi_qm *qm)
if (len) if (len)
strcat((char *)qm->uacce->algs, "\n"); strcat((char *)qm->uacce->algs, "\n");
strcat((char *)qm->uacce->algs, DAE_ALG_NAME); strcat((char *)qm->uacce->algs, alg_name);
return 0; return 0;
} }

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@ -125,6 +125,7 @@ enum qm_hw_ver {
QM_HW_V2 = 0x21, QM_HW_V2 = 0x21,
QM_HW_V3 = 0x30, QM_HW_V3 = 0x30,
QM_HW_V4 = 0x50, QM_HW_V4 = 0x50,
QM_HW_V5 = 0x51,
}; };
enum qm_fun_type { enum qm_fun_type {

View File

@ -31,6 +31,7 @@ struct hisi_qp_info {
#define HISI_QM_API_VER_BASE "hisi_qm_v1" #define HISI_QM_API_VER_BASE "hisi_qm_v1"
#define HISI_QM_API_VER2_BASE "hisi_qm_v2" #define HISI_QM_API_VER2_BASE "hisi_qm_v2"
#define HISI_QM_API_VER3_BASE "hisi_qm_v3" #define HISI_QM_API_VER3_BASE "hisi_qm_v3"
#define HISI_QM_API_VER5_BASE "hisi_qm_v5"
/* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */ /* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */
#define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) #define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx)