mirror of https://github.com/torvalds/linux.git
EDAC: Remove the legacy EDAC sysfs interface
Commit
1997471069 ("edac: add a new per-dimm API and make the old per-virtual-rank API obsolete")
introduced a new per-DIMM sysfs interface for EDAC making the old
per-virtual-rank sysfs interface obsolete.
Since this new sysfs interface was introduced more than a decade ago, remove
the obsolete legacy interface.
Signed-off-by: Avadhut Naik <avadhut.naik@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/20251106015727.1987246-1-avadhut.naik@amd.com
This commit is contained in:
Avadhut Naik
Borislav Petkov (AMD)
parent
6a85796915
commit
8616025ae6
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@ -406,24 +406,8 @@ index of the MC::
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|->mc2
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....
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Under each ``mcX`` directory each ``csrowX`` is again represented by a
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``csrowX``, where ``X`` is the csrow index::
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.../mc/mc0/
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|
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|->csrow0
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|->csrow2
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|->csrow3
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....
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Notice that there is no csrow1, which indicates that csrow0 is composed
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of a single ranked DIMMs. This should also apply in both Channels, in
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order to have dual-channel mode be operational. Since both csrow2 and
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csrow3 are populated, this indicates a dual ranked set of DIMMs for
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channels 0 and 1.
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Within each of the ``mcX`` and ``csrowX`` directories are several EDAC
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control and attribute files.
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Within each of the ``mcX`` directory are several EDAC control and
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attribute files.
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``mcX`` directories
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-------------------
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@ -569,7 +553,7 @@ this ``X`` memory module:
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- Unbuffered-DDR
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.. [#f5] On some systems, the memory controller doesn't have any logic
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to identify the memory module. On such systems, the directory is called ``rankX`` and works on a similar way as the ``csrowX`` directories.
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to identify the memory module. On such systems, the directory is called ``rankX``.
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On modern Intel memory controllers, the memory controller identifies the
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memory modules directly. On such systems, the directory is called ``dimmX``.
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@ -577,126 +561,6 @@ this ``X`` memory module:
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symlinks inside the sysfs mapping that are automatically created by
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the sysfs subsystem. Currently, they serve no purpose.
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``csrowX`` directories
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----------------------
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When CONFIG_EDAC_LEGACY_SYSFS is enabled, sysfs will contain the ``csrowX``
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directories. As this API doesn't work properly for Rambus, FB-DIMMs and
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modern Intel Memory Controllers, this is being deprecated in favor of
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``dimmX`` directories.
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In the ``csrowX`` directories are EDAC control and attribute files for
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this ``X`` instance of csrow:
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- ``ue_count`` - Total Uncorrectable Errors count attribute file
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This attribute file displays the total count of uncorrectable
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errors that have occurred on this csrow. If panic_on_ue is set
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this counter will not have a chance to increment, since EDAC
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will panic the system.
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- ``ce_count`` - Total Correctable Errors count attribute file
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This attribute file displays the total count of correctable
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errors that have occurred on this csrow. This count is very
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important to examine. CEs provide early indications that a
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DIMM is beginning to fail. This count field should be
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monitored for non-zero values and report such information
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to the system administrator.
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- ``size_mb`` - Total memory managed by this csrow attribute file
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This attribute file displays, in count of megabytes, the memory
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that this csrow contains.
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- ``mem_type`` - Memory Type attribute file
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This attribute file will display what type of memory is currently
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on this csrow. Normally, either buffered or unbuffered memory.
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Examples:
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- Registered-DDR
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- Unbuffered-DDR
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- ``edac_mode`` - EDAC Mode of operation attribute file
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This attribute file will display what type of Error detection
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and correction is being utilized.
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- ``dev_type`` - Device type attribute file
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This attribute file will display what type of DRAM device is
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being utilized on this DIMM.
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Examples:
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- x1
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- x2
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- x4
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- x8
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- ``ch0_ce_count`` - Channel 0 CE Count attribute file
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This attribute file will display the count of CEs on this
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DIMM located in channel 0.
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- ``ch0_ue_count`` - Channel 0 UE Count attribute file
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This attribute file will display the count of UEs on this
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DIMM located in channel 0.
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- ``ch0_dimm_label`` - Channel 0 DIMM Label control file
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This control file allows this DIMM to have a label assigned
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to it. With this label in the module, when errors occur
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the output can provide the DIMM label in the system log.
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This becomes vital for panic events to isolate the
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cause of the UE event.
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DIMM Labels must be assigned after booting, with information
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that correctly identifies the physical slot with its
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silk screen label. This information is currently very
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motherboard specific and determination of this information
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must occur in userland at this time.
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- ``ch1_ce_count`` - Channel 1 CE Count attribute file
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This attribute file will display the count of CEs on this
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DIMM located in channel 1.
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- ``ch1_ue_count`` - Channel 1 UE Count attribute file
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This attribute file will display the count of UEs on this
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DIMM located in channel 0.
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- ``ch1_dimm_label`` - Channel 1 DIMM Label control file
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This control file allows this DIMM to have a label assigned
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to it. With this label in the module, when errors occur
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the output can provide the DIMM label in the system log.
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This becomes vital for panic events to isolate the
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cause of the UE event.
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DIMM Labels must be assigned after booting, with information
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that correctly identifies the physical slot with its
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silk screen label. This information is currently very
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motherboard specific and determination of this information
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must occur in userland at this time.
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System Logging
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--------------
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@ -917,7 +917,6 @@ CONFIG_MMC=y
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CONFIG_MMC_LOONGSON2=m
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CONFIG_INFINIBAND=m
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CONFIG_EDAC=y
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# CONFIG_EDAC_LEGACY_SYSFS is not set
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CONFIG_EDAC_LOONGSON=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_EFI=y
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@ -23,14 +23,6 @@ menuconfig EDAC
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if EDAC
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config EDAC_LEGACY_SYSFS
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bool "EDAC legacy sysfs"
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default y
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help
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Enable the compatibility sysfs nodes.
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Use 'Y' if your edac utilities aren't ported to work with the newer
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structures.
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config EDAC_DEBUG
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bool "Debugging"
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select DEBUG_FS
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@ -115,401 +115,6 @@ static const char * const edac_caps[] = {
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[EDAC_S16ECD16ED] = "S16ECD16ED"
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};
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#ifdef CONFIG_EDAC_LEGACY_SYSFS
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/*
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* EDAC sysfs CSROW data structures and methods
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*/
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#define to_csrow(k) container_of(k, struct csrow_info, dev)
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/*
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* We need it to avoid namespace conflicts between the legacy API
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* and the per-dimm/per-rank one
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*/
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#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
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static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
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struct dev_ch_attribute {
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struct device_attribute attr;
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unsigned int channel;
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};
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#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
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static struct dev_ch_attribute dev_attr_legacy_##_name = \
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{ __ATTR(_name, _mode, _show, _store), (_var) }
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#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
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/* Set of more default csrow<id> attribute show/store functions */
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static ssize_t csrow_ue_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sysfs_emit(data, "%u\n", csrow->ue_count);
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}
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static ssize_t csrow_ce_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sysfs_emit(data, "%u\n", csrow->ce_count);
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}
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static ssize_t csrow_size_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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int i;
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u32 nr_pages = 0;
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for (i = 0; i < csrow->nr_channels; i++)
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nr_pages += csrow->channels[i]->dimm->nr_pages;
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return sysfs_emit(data, "%u\n", PAGES_TO_MiB(nr_pages));
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}
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static ssize_t csrow_mem_type_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sysfs_emit(data, "%s\n", edac_mem_types[csrow->channels[0]->dimm->mtype]);
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}
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static ssize_t csrow_dev_type_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sysfs_emit(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
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}
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static ssize_t csrow_edac_mode_show(struct device *dev,
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struct device_attribute *mattr,
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char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sysfs_emit(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
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}
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/* show/store functions for DIMM Label attributes */
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static ssize_t channel_dimm_label_show(struct device *dev,
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struct device_attribute *mattr,
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char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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/* if field has not been initialized, there is nothing to send */
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if (!rank->dimm->label[0])
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return 0;
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return sysfs_emit(data, "%s\n", rank->dimm->label);
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}
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static ssize_t channel_dimm_label_store(struct device *dev,
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struct device_attribute *mattr,
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const char *data, size_t count)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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size_t copy_count = count;
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if (count == 0)
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return -EINVAL;
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if (data[count - 1] == '\0' || data[count - 1] == '\n')
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copy_count -= 1;
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if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label))
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return -EINVAL;
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memcpy(rank->dimm->label, data, copy_count);
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rank->dimm->label[copy_count] = '\0';
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return count;
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}
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/* show function for dynamic chX_ce_count attribute */
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static ssize_t channel_ce_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned int chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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return sysfs_emit(data, "%u\n", rank->ce_count);
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}
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/* cwrow<id>/attribute files */
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DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
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DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
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DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
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DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
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DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
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DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
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/* default attributes of the CSROW<id> object */
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static struct attribute *csrow_attrs[] = {
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&dev_attr_legacy_dev_type.attr,
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&dev_attr_legacy_mem_type.attr,
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&dev_attr_legacy_edac_mode.attr,
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&dev_attr_legacy_size_mb.attr,
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&dev_attr_legacy_ue_count.attr,
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&dev_attr_legacy_ce_count.attr,
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NULL,
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};
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static const struct attribute_group csrow_attr_grp = {
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.attrs = csrow_attrs,
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};
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static const struct attribute_group *csrow_attr_groups[] = {
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&csrow_attr_grp,
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NULL
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};
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static const struct device_type csrow_attr_type = {
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.groups = csrow_attr_groups,
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};
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/*
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* possible dynamic channel DIMM Label attribute files
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*
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*/
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DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 0);
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DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 1);
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DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 2);
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DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 3);
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DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 4);
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DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 5);
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DEVICE_CHANNEL(ch6_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 6);
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DEVICE_CHANNEL(ch7_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 7);
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DEVICE_CHANNEL(ch8_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 8);
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DEVICE_CHANNEL(ch9_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 9);
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DEVICE_CHANNEL(ch10_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 10);
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DEVICE_CHANNEL(ch11_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 11);
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DEVICE_CHANNEL(ch12_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 12);
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DEVICE_CHANNEL(ch13_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 13);
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DEVICE_CHANNEL(ch14_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 14);
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DEVICE_CHANNEL(ch15_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 15);
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/* Total possible dynamic DIMM Label attribute file table */
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static struct attribute *dynamic_csrow_dimm_attr[] = {
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&dev_attr_legacy_ch0_dimm_label.attr.attr,
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&dev_attr_legacy_ch1_dimm_label.attr.attr,
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&dev_attr_legacy_ch2_dimm_label.attr.attr,
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&dev_attr_legacy_ch3_dimm_label.attr.attr,
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&dev_attr_legacy_ch4_dimm_label.attr.attr,
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&dev_attr_legacy_ch5_dimm_label.attr.attr,
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&dev_attr_legacy_ch6_dimm_label.attr.attr,
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&dev_attr_legacy_ch7_dimm_label.attr.attr,
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&dev_attr_legacy_ch8_dimm_label.attr.attr,
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&dev_attr_legacy_ch9_dimm_label.attr.attr,
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&dev_attr_legacy_ch10_dimm_label.attr.attr,
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&dev_attr_legacy_ch11_dimm_label.attr.attr,
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&dev_attr_legacy_ch12_dimm_label.attr.attr,
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&dev_attr_legacy_ch13_dimm_label.attr.attr,
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&dev_attr_legacy_ch14_dimm_label.attr.attr,
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&dev_attr_legacy_ch15_dimm_label.attr.attr,
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NULL
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};
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/* possible dynamic channel ce_count attribute files */
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DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 0);
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DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 1);
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DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 2);
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DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 3);
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DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 4);
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DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 5);
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DEVICE_CHANNEL(ch6_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 6);
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DEVICE_CHANNEL(ch7_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 7);
|
||||
DEVICE_CHANNEL(ch8_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 8);
|
||||
DEVICE_CHANNEL(ch9_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 9);
|
||||
DEVICE_CHANNEL(ch10_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 10);
|
||||
DEVICE_CHANNEL(ch11_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 11);
|
||||
DEVICE_CHANNEL(ch12_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 12);
|
||||
DEVICE_CHANNEL(ch13_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 13);
|
||||
DEVICE_CHANNEL(ch14_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 14);
|
||||
DEVICE_CHANNEL(ch15_ce_count, S_IRUGO,
|
||||
channel_ce_count_show, NULL, 15);
|
||||
|
||||
/* Total possible dynamic ce_count attribute file table */
|
||||
static struct attribute *dynamic_csrow_ce_count_attr[] = {
|
||||
&dev_attr_legacy_ch0_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch1_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch2_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch3_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch4_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch5_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch6_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch7_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch8_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch9_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch10_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch11_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch12_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch13_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch14_ce_count.attr.attr,
|
||||
&dev_attr_legacy_ch15_ce_count.attr.attr,
|
||||
NULL
|
||||
};
|
||||
|
||||
static umode_t csrow_dev_is_visible(struct kobject *kobj,
|
||||
struct attribute *attr, int idx)
|
||||
{
|
||||
struct device *dev = kobj_to_dev(kobj);
|
||||
struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
|
||||
|
||||
if (idx >= csrow->nr_channels)
|
||||
return 0;
|
||||
|
||||
if (idx >= ARRAY_SIZE(dynamic_csrow_ce_count_attr) - 1) {
|
||||
WARN_ONCE(1, "idx: %d\n", idx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Only expose populated DIMMs */
|
||||
if (!csrow->channels[idx]->dimm->nr_pages)
|
||||
return 0;
|
||||
|
||||
return attr->mode;
|
||||
}
|
||||
|
||||
|
||||
static const struct attribute_group csrow_dev_dimm_group = {
|
||||
.attrs = dynamic_csrow_dimm_attr,
|
||||
.is_visible = csrow_dev_is_visible,
|
||||
};
|
||||
|
||||
static const struct attribute_group csrow_dev_ce_count_group = {
|
||||
.attrs = dynamic_csrow_ce_count_attr,
|
||||
.is_visible = csrow_dev_is_visible,
|
||||
};
|
||||
|
||||
static const struct attribute_group *csrow_dev_groups[] = {
|
||||
&csrow_dev_dimm_group,
|
||||
&csrow_dev_ce_count_group,
|
||||
NULL
|
||||
};
|
||||
|
||||
static void csrow_release(struct device *dev)
|
||||
{
|
||||
/*
|
||||
* Nothing to do, just unregister sysfs here. The mci
|
||||
* device owns the data and will also release it.
|
||||
*/
|
||||
}
|
||||
|
||||
static inline int nr_pages_per_csrow(struct csrow_info *csrow)
|
||||
{
|
||||
int chan, nr_pages = 0;
|
||||
|
||||
for (chan = 0; chan < csrow->nr_channels; chan++)
|
||||
nr_pages += csrow->channels[chan]->dimm->nr_pages;
|
||||
|
||||
return nr_pages;
|
||||
}
|
||||
|
||||
/* Create a CSROW object under specified edac_mc_device */
|
||||
static int edac_create_csrow_object(struct mem_ctl_info *mci,
|
||||
struct csrow_info *csrow, int index)
|
||||
{
|
||||
int err;
|
||||
|
||||
csrow->dev.type = &csrow_attr_type;
|
||||
csrow->dev.groups = csrow_dev_groups;
|
||||
csrow->dev.release = csrow_release;
|
||||
device_initialize(&csrow->dev);
|
||||
csrow->dev.parent = &mci->dev;
|
||||
csrow->mci = mci;
|
||||
dev_set_name(&csrow->dev, "csrow%d", index);
|
||||
dev_set_drvdata(&csrow->dev, csrow);
|
||||
|
||||
err = device_add(&csrow->dev);
|
||||
if (err) {
|
||||
edac_dbg(1, "failure: create device %s\n", dev_name(&csrow->dev));
|
||||
put_device(&csrow->dev);
|
||||
return err;
|
||||
}
|
||||
|
||||
edac_dbg(0, "device %s created\n", dev_name(&csrow->dev));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Create a CSROW object under specified edac_mc_device */
|
||||
static int edac_create_csrow_objects(struct mem_ctl_info *mci)
|
||||
{
|
||||
int err, i;
|
||||
struct csrow_info *csrow;
|
||||
|
||||
for (i = 0; i < mci->nr_csrows; i++) {
|
||||
csrow = mci->csrows[i];
|
||||
if (!nr_pages_per_csrow(csrow))
|
||||
continue;
|
||||
err = edac_create_csrow_object(mci, mci->csrows[i], i);
|
||||
if (err < 0)
|
||||
goto error;
|
||||
}
|
||||
return 0;
|
||||
|
||||
error:
|
||||
for (--i; i >= 0; i--) {
|
||||
if (device_is_registered(&mci->csrows[i]->dev))
|
||||
device_unregister(&mci->csrows[i]->dev);
|
||||
}
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < mci->nr_csrows; i++) {
|
||||
if (device_is_registered(&mci->csrows[i]->dev))
|
||||
device_unregister(&mci->csrows[i]->dev);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Per-dimm (or per-rank) devices
|
||||
*/
|
||||
|
|
@ -989,12 +594,6 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
|
|||
goto fail;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_EDAC_LEGACY_SYSFS
|
||||
err = edac_create_csrow_objects(mci);
|
||||
if (err < 0)
|
||||
goto fail;
|
||||
#endif
|
||||
|
||||
edac_create_debugfs_nodes(mci);
|
||||
return 0;
|
||||
|
||||
|
|
@ -1019,9 +618,6 @@ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
|
|||
#ifdef CONFIG_EDAC_DEBUG
|
||||
edac_debugfs_remove_recursive(mci->debugfs);
|
||||
#endif
|
||||
#ifdef CONFIG_EDAC_LEGACY_SYSFS
|
||||
edac_delete_csrow_objects(mci);
|
||||
#endif
|
||||
|
||||
mci_for_each_dimm(mci, dimm) {
|
||||
if (!device_is_registered(&dimm->dev))
|
||||
|
|
|
|||
Loading…
Reference in New Issue