mirror of https://github.com/torvalds/linux.git
Added support for EcoNet platform
Added support for parallel CPU bring up on EyeQ Other cleanups and fixes -----BEGIN PGP SIGNATURE----- iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmhCkBcaHHRzYm9nZW5k QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHDdzQ//RUuUrNQ2ItcrnoBqdjGt AgQr6N1h7FkKKxhW7dR8CTFNskrH9p1E8sQXaVLaeEh22U7DVdVnqIwrGPEKwsr4 UDuYawat+KEo076IHAlzbT0Uphk6n8lucReVDDPe8Crv2ySJsMNEJtmqWSgecoi2 vCDuJokMnwrrTJg/zLHziJZMqKpvBrp/9OJIa8RsKZC+CdVZtfwp/I6uxF/gZRc1 gLfaqOaUftq6bk0bFccng2Mmb2EjROy8AF9z4aFa3WzZRyn7dZjlY6moeS/IZJJi DsnXJnuagHKZE65kU4kQXEHM4IPeyQ1Q1uvARElluUJMqKXGeD0zu7wc67oMlAiu LABsLn+P935N11uLQ68BzMfEHhcWIrTMOz+dJY//ViuPW2C9Ix7x0zYZAKDdWDuI utOhdsiSakYYfoZcG6HCkaT5w2w+ag4/Cl0Z5+CFbcc1w8Jk+uHGeEjcuK+pbsNR pYzSEi+Svx3q6k4+w8bDGLEKpJVviH2LBsBMZLcvQCTwo2dF6JQ9pAOnRQAu94H4 VyKMSHVqdoy2yBJzmsPlQCtquc7yaVGx1ykiAokEULT8eM0Sj8qY9Y95XFNTr7PM wheOkShQGupBB7EtitNoazcWfBIAilKJPzC4Xhf/hysKQDF/sQLGs1fs3F0L+AP+ J0d1ZUiHZRYEahNpsO3d+10= =Ag5K -----END PGP SIGNATURE----- Merge tag 'mips_6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - Added support for EcoNet platform - Added support for parallel CPU bring up on EyeQ - Other cleanups and fixes * tag 'mips_6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (23 commits) MIPS: loongson2ef: lemote-2f: add missing function prototypes MIPS: loongson2ef: cs5536: add missing function prototypes MIPS: SMP: Move the AP sync point before the calibration delay mips: econet: Fix incorrect Kconfig dependencies MAINTAINERS: Add entry for newly added EcoNet platform. mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board dt-bindings: vendor-prefixes: Add SmartFiber mips: Add EcoNet MIPS platform support dt-bindings: mips: Add EcoNet platform binding MIPS: bcm63xx: nvram: avoid inefficient use of crc32_le_combine() mips: dts: pic32: pic32mzda: Rename the sdhci nodename to match with common mmc-controller binding MIPS: SMP: Move the AP sync point before the non-parallel aware functions MIPS: Replace strcpy() with strscpy() in vpe_elfload() MIPS: BCM63XX: Replace strcpy() with strscpy() in board_prom_init() mips: ptrace: Improve code formatting and indentation MIPS: SMP: Implement parallel CPU bring up for EyeQ mips: Add -std= flag specified in KBUILD_CFLAGS to vdso CFLAGS MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a mips: dts: realtek: Add MDIO controller MIPS: txx9: gpio: use new line value setter callbacks ...
This commit is contained in:
Linus Torvalds
commit
67faad7435
|
|
@ -0,0 +1,26 @@
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|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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||||
$id: http://devicetree.org/schemas/mips/econet.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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|
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title: EcoNet MIPS SoCs
|
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||||
maintainers:
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||||
- Caleb James DeLisle <cjd@cjdns.fr>
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|
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properties:
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$nodename:
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const: '/'
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||||
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compatible:
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oneOf:
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- description: Boards with EcoNet EN751221 family SoC
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items:
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- enum:
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- smartfiber,xp8421-b
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- const: econet,en751221
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additionalProperties: true
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||||
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...
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@ -1406,6 +1406,8 @@ patternProperties:
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description: SKOV A/S
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"^skyworks,.*":
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description: Skyworks Solutions, Inc.
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"^smartfiber,.*":
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description: ShenZhen Smartfiber Technology Co, Ltd.
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"^smartlabs,.*":
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description: SmartLabs LLC
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"^smartrg,.*":
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|
|
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12
MAINTAINERS
12
MAINTAINERS
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@ -8477,6 +8477,18 @@ W: https://linuxtv.org
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Q: http://patchwork.linuxtv.org/project/linux-media/list/
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F: drivers/media/dvb-frontends/ec100*
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ECONET MIPS PLATFORM
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M: Caleb James DeLisle <cjd@cjdns.fr>
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L: linux-mips@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/interrupt-controller/econet,en751221-intc.yaml
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F: Documentation/devicetree/bindings/mips/econet.yaml
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F: Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml
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F: arch/mips/boot/dts/econet/
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F: arch/mips/econet/
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F: drivers/clocksource/timer-econet-en751221.c
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F: drivers/irqchip/irq-econet-en751221.c
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|
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ECRYPT FILE SYSTEM
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M: Tyler Hicks <code@tyhicks.com>
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L: ecryptfs@vger.kernel.org
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|
|
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@ -11,6 +11,7 @@ platform-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon/
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platform-$(CONFIG_EYEQ) += mobileye/
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platform-$(CONFIG_MIPS_COBALT) += cobalt/
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platform-$(CONFIG_MACH_DECSTATION) += dec/
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platform-$(CONFIG_ECONET) += econet/
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platform-$(CONFIG_MIPS_GENERIC) += generic/
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platform-$(CONFIG_MACH_JAZZ) += jazz/
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platform-$(CONFIG_LANTIQ) += lantiq/
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|
|
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@ -391,6 +391,31 @@ config MACH_DECSTATION
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otherwise choose R3000.
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config ECONET
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bool "EcoNet MIPS family"
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select BOOT_RAW
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select CPU_BIG_ENDIAN
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select DEBUG_ZBOOT if DEBUG_KERNEL
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select EARLY_PRINTK_8250
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select ECONET_EN751221_TIMER
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select SERIAL_8250
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select SERIAL_OF_PLATFORM
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select SYS_SUPPORTS_BIG_ENDIAN
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select SYS_HAS_CPU_MIPS32_R1
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select SYS_HAS_CPU_MIPS32_R2
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select SYS_HAS_EARLY_PRINTK
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select SYS_SUPPORTS_32BIT_KERNEL
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select SYS_SUPPORTS_MIPS16
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select SYS_SUPPORTS_ZBOOT_UART16550
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select USE_GENERIC_EARLY_PRINTK_8250
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select USE_OF
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help
|
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EcoNet EN75xx MIPS devices are big endian MIPS machines used
|
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in XPON (fiber) and DSL applications. They have SPI, PCI, USB,
|
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GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores.
|
||||
Don't confuse these with the Airoha ARM devices sometimes referred
|
||||
to as "EcoNet", this family is for MIPS based devices only.
|
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|
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config MACH_JAZZ
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bool "Jazz family of machines"
|
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select ARC_MEMORY
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|
|
@ -617,6 +642,7 @@ config EYEQ
|
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select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
|
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select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
|
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select USE_OF
|
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select HOTPLUG_PARALLEL if SMP
|
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help
|
||||
Select this to build a kernel supporting EyeQ SoC from Mobileye.
|
||||
|
||||
|
|
@ -1020,6 +1046,7 @@ source "arch/mips/ath79/Kconfig"
|
|||
source "arch/mips/bcm47xx/Kconfig"
|
||||
source "arch/mips/bcm63xx/Kconfig"
|
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source "arch/mips/bmips/Kconfig"
|
||||
source "arch/mips/econet/Kconfig"
|
||||
source "arch/mips/generic/Kconfig"
|
||||
source "arch/mips/ingenic/Kconfig"
|
||||
source "arch/mips/jazz/Kconfig"
|
||||
|
|
@ -2287,6 +2314,7 @@ config MIPS_CPS
|
|||
select MIPS_CM
|
||||
select MIPS_CPS_PM if HOTPLUG_CPU
|
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select SMP
|
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select HOTPLUG_SMT if HOTPLUG_PARALLEL
|
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select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
|
||||
select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
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select SYS_SUPPORTS_HOTPLUG_CPU
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||||
|
|
|
|||
|
|
@ -119,9 +119,11 @@ static int alchemy_gpic_get(struct gpio_chip *chip, unsigned int off)
|
|||
return !!au1300_gpio_get_value(off + AU1300_GPIO_BASE);
|
||||
}
|
||||
|
||||
static void alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)
|
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static int alchemy_gpic_set(struct gpio_chip *chip, unsigned int off, int v)
|
||||
{
|
||||
au1300_gpio_set_value(off + AU1300_GPIO_BASE, v);
|
||||
|
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return 0;
|
||||
}
|
||||
|
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static int alchemy_gpic_dir_input(struct gpio_chip *chip, unsigned int off)
|
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|
|
@ -145,7 +147,7 @@ static struct gpio_chip au1300_gpiochip = {
|
|||
.direction_input = alchemy_gpic_dir_input,
|
||||
.direction_output = alchemy_gpic_dir_output,
|
||||
.get = alchemy_gpic_get,
|
||||
.set = alchemy_gpic_set,
|
||||
.set_rv = alchemy_gpic_set,
|
||||
.to_irq = alchemy_gpic_gpio_to_irq,
|
||||
.base = AU1300_GPIO_BASE,
|
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.ngpio = AU1300_GPIO_NUM,
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||||
|
|
|
|||
|
|
@ -764,7 +764,7 @@ void __init board_prom_init(void)
|
|||
snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
|
||||
}
|
||||
} else {
|
||||
strcpy(cfe_version, "unknown");
|
||||
strscpy(cfe_version, "unknown");
|
||||
}
|
||||
pr_info("CFE version: %s\n", cfe_version);
|
||||
|
||||
|
|
|
|||
|
|
@ -35,8 +35,7 @@ static void bcm63xx_gpio_out_low_reg_init(void)
|
|||
static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
|
||||
static u32 gpio_out_low, gpio_out_high;
|
||||
|
||||
static void bcm63xx_gpio_set(struct gpio_chip *chip,
|
||||
unsigned gpio, int val)
|
||||
static int bcm63xx_gpio_set(struct gpio_chip *chip, unsigned int gpio, int val)
|
||||
{
|
||||
u32 reg;
|
||||
u32 mask;
|
||||
|
|
@ -62,6 +61,8 @@ static void bcm63xx_gpio_set(struct gpio_chip *chip,
|
|||
*v &= ~mask;
|
||||
bcm_gpio_writel(*v, reg);
|
||||
spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
|
||||
|
|
@ -130,7 +131,7 @@ static struct gpio_chip bcm63xx_gpio_chip = {
|
|||
.direction_input = bcm63xx_gpio_direction_input,
|
||||
.direction_output = bcm63xx_gpio_direction_output,
|
||||
.get = bcm63xx_gpio_get,
|
||||
.set = bcm63xx_gpio_set,
|
||||
.set_rv = bcm63xx_gpio_set,
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.base = 0,
|
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};
|
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|
||||
|
|
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|||
|
|
@ -20,6 +20,11 @@
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|||
#define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset))
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#endif
|
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|
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#ifdef CONFIG_ECONET
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#define EN75_UART_BASE 0x1fbf0003
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#define PORT(offset) (CKSEG1ADDR(EN75_UART_BASE) + (4 * (offset)))
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#endif
|
||||
|
||||
#ifndef IOTYPE
|
||||
#define IOTYPE char
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
subdir-$(CONFIG_BMIPS_GENERIC) += brcm
|
||||
subdir-$(CONFIG_CAVIUM_OCTEON_SOC) += cavium-octeon
|
||||
subdir-$(CONFIG_ECONET) += econet
|
||||
subdir-$(CONFIG_EYEQ) += mobileye
|
||||
subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += img
|
||||
subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON) += img
|
||||
|
|
|
|||
|
|
@ -0,0 +1,2 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
dtb-$(CONFIG_DTB_ECONET_SMARTFIBER_XP8421_B) += en751221_smartfiber_xp8421-b.dtb
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "econet,en751221";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
hpt_clock: clock {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <200000000>; /* 200 MHz */
|
||||
};
|
||||
|
||||
cpus: cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "mips,mips24KEc";
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
cpuintc: interrupt-controller {
|
||||
compatible = "mti,cpu-interrupt-controller";
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
intc: interrupt-controller@1fb40000 {
|
||||
compatible = "econet,en751221-intc";
|
||||
reg = <0x1fb40000 0x100>;
|
||||
interrupt-parent = <&cpuintc>;
|
||||
interrupts = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
|
||||
};
|
||||
|
||||
uart: serial@1fbf0000 {
|
||||
compatible = "ns16550";
|
||||
reg = <0x1fbf0000 0x30>;
|
||||
reg-io-width = <4>;
|
||||
reg-shift = <2>;
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <0>;
|
||||
/*
|
||||
* Conversion of baud rate to clock frequency requires a
|
||||
* computation that is not in the ns16550 driver, so this
|
||||
* uart is fixed at 115200 baud.
|
||||
*/
|
||||
clock-frequency = <1843200>;
|
||||
};
|
||||
|
||||
timer_hpt: timer@1fbf0400 {
|
||||
compatible = "econet,en751221-timer";
|
||||
reg = <0x1fbf0400 0x100>;
|
||||
|
||||
interrupt-parent = <&intc>;
|
||||
interrupts = <30>;
|
||||
clocks = <&hpt_clock>;
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
/dts-v1/;
|
||||
|
||||
#include "en751221.dtsi"
|
||||
|
||||
/ {
|
||||
model = "SmartFiber XP8421-B";
|
||||
compatible = "smartfiber,xp8421-b", "econet,en751221";
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x1c000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "/serial@1fbf0000:115200";
|
||||
linux,usable-memory-range = <0x00020000 0x1bfe0000>;
|
||||
};
|
||||
};
|
||||
|
|
@ -29,6 +29,7 @@ msi: msi-controller@2ff00000 {
|
|||
compatible = "loongson,pch-msi-1.0";
|
||||
reg = <0 0x2ff00000 0 0x8>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
msi-controller;
|
||||
loongson,msi-base-vec = <64>;
|
||||
loongson,msi-num-vecs = <64>;
|
||||
|
|
|
|||
|
|
@ -225,7 +225,7 @@ gpio9: gpio9@1f860900 {
|
|||
gpio-ranges = <&pic32_pinctrl 0 144 16>;
|
||||
};
|
||||
|
||||
sdhci: sdhci@1f8ec000 {
|
||||
sdhci: mmc@1f8ec000 {
|
||||
compatible = "microchip,pic32mzda-sdhci";
|
||||
reg = <0x1f8ec000 0x100>;
|
||||
interrupts = <191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -69,6 +69,39 @@ i2c1: i2c@388 {
|
|||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio_controller: mdio-controller@ca00 {
|
||||
compatible = "realtek,rtl9301-mdio";
|
||||
reg = <0xca00 0x200>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
|
||||
mdio0: mdio-bus@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
mdio1: mdio-bus@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
mdio2: mdio-bus@2 {
|
||||
reg = <2>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
mdio3: mdio-bus@3 {
|
||||
reg = <3>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@18000000 {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,48 @@
|
|||
# SPDX-License-Identifier: GPL-2.0
|
||||
if ECONET
|
||||
|
||||
choice
|
||||
prompt "EcoNet SoC selection"
|
||||
default SOC_ECONET_EN751221
|
||||
help
|
||||
Select EcoNet MIPS SoC type. Individual SoCs within a family are
|
||||
very similar, so is it enough to select the right family, and
|
||||
then customize to the specific SoC using the device tree only.
|
||||
|
||||
config SOC_ECONET_EN751221
|
||||
bool "EN751221 family"
|
||||
select COMMON_CLK
|
||||
select ECONET_EN751221_INTC
|
||||
select IRQ_MIPS_CPU
|
||||
select SMP
|
||||
select SMP_UP
|
||||
select SYS_SUPPORTS_SMP
|
||||
help
|
||||
The EN751221 family includes EN7512, RN7513, EN7521, EN7526.
|
||||
They are based on single core MIPS 34Kc processors. To boot
|
||||
this kernel, you will need a device tree such as
|
||||
MIPS_RAW_APPENDED_DTB=y, and a root filesystem.
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Devicetree selection"
|
||||
default DTB_ECONET_NONE
|
||||
help
|
||||
Select the devicetree.
|
||||
|
||||
config DTB_ECONET_NONE
|
||||
bool "None"
|
||||
|
||||
config DTB_ECONET_SMARTFIBER_XP8421_B
|
||||
bool "EN751221 SmartFiber XP8421-B"
|
||||
depends on SOC_ECONET_EN751221
|
||||
select BUILTIN_DTB
|
||||
help
|
||||
The SmartFiber XP8421-B is a device based on the EN751221 SoC.
|
||||
It has 512MB of memory and 256MB of NAND flash. This kernel
|
||||
needs only an appended initramfs to boot. It can be loaded
|
||||
through XMODEM and booted from memory in the bootloader, or
|
||||
it can be packed in tclinux.trx format and written to flash.
|
||||
endchoice
|
||||
|
||||
endif
|
||||
|
|
@ -0,0 +1,2 @@
|
|||
|
||||
obj-y := init.o
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
# To address a 7.2MB kernel size limit in the EcoNet SDK bootloader,
|
||||
# we put the load address well above where the bootloader loads and then use
|
||||
# zboot. So please set CONFIG_ZBOOT_LOAD_ADDRESS to the address where your
|
||||
# bootloader actually places the kernel.
|
||||
load-$(CONFIG_ECONET) += 0xffffffff81000000
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* EcoNet setup code
|
||||
*
|
||||
* Copyright (C) 2025 Caleb James DeLisle <cjd@cjdns.fr>
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/of_clk.h>
|
||||
#include <linux/irqchip.h>
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/smp-ops.h>
|
||||
#include <asm/reboot.h>
|
||||
|
||||
#define CR_AHB_RSTCR ((void __iomem *)CKSEG1ADDR(0x1fb00040))
|
||||
#define RESET BIT(31)
|
||||
|
||||
#define UART_BASE CKSEG1ADDR(0x1fbf0003)
|
||||
#define UART_REG_SHIFT 2
|
||||
|
||||
static void hw_reset(char *command)
|
||||
{
|
||||
iowrite32(RESET, CR_AHB_RSTCR);
|
||||
}
|
||||
|
||||
/* 1. Bring up early printk. */
|
||||
void __init prom_init(void)
|
||||
{
|
||||
setup_8250_early_printk_port(UART_BASE, UART_REG_SHIFT, 0);
|
||||
_machine_restart = hw_reset;
|
||||
}
|
||||
|
||||
/* 2. Parse the DT and find memory */
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
void *dtb;
|
||||
|
||||
set_io_port_base(KSEG1);
|
||||
|
||||
dtb = get_fdt();
|
||||
if (!dtb)
|
||||
panic("no dtb found");
|
||||
|
||||
__dt_setup_arch(dtb);
|
||||
|
||||
early_init_dt_scan_memory();
|
||||
}
|
||||
|
||||
/* 3. Overload __weak device_tree_init(), add SMP_UP ops */
|
||||
void __init device_tree_init(void)
|
||||
{
|
||||
unflatten_and_copy_device_tree();
|
||||
|
||||
register_up_smp_ops();
|
||||
}
|
||||
|
||||
const char *get_system_type(void)
|
||||
{
|
||||
return "EcoNet-EN75xx";
|
||||
}
|
||||
|
||||
/* 4. Initialize the IRQ subsystem */
|
||||
void __init arch_init_irq(void)
|
||||
{
|
||||
irqchip_init();
|
||||
}
|
||||
|
||||
/* 5. Timers */
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
timer_probe();
|
||||
}
|
||||
|
|
@ -12,12 +12,32 @@
|
|||
#ifndef _CS5536_PCI_H
|
||||
#define _CS5536_PCI_H
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci_regs.h>
|
||||
|
||||
extern void cs5536_pci_conf_write4(int function, int reg, u32 value);
|
||||
extern u32 cs5536_pci_conf_read4(int function, int reg);
|
||||
|
||||
extern void pci_ehci_write_reg(int reg, u32 value);
|
||||
extern u32 pci_ehci_read_reg(int reg);
|
||||
|
||||
extern void pci_ide_write_reg(int reg, u32 value);
|
||||
extern u32 pci_ide_read_reg(int reg);
|
||||
|
||||
extern void pci_acc_write_reg(int reg, u32 value);
|
||||
extern u32 pci_acc_read_reg(int reg);
|
||||
|
||||
extern void pci_ohci_write_reg(int reg, u32 value);
|
||||
extern u32 pci_ohci_read_reg(int reg);
|
||||
|
||||
extern void pci_isa_write_bar(int n, u32 value);
|
||||
extern u32 pci_isa_read_bar(int n);
|
||||
extern void pci_isa_write_reg(int reg, u32 value);
|
||||
extern u32 pci_isa_read_reg(int reg);
|
||||
|
||||
extern int __init init_mfgpt_clocksource(void);
|
||||
|
||||
#define CS5536_ACC_INTR 9
|
||||
#define CS5536_IDE_INTR 14
|
||||
#define CS5536_USB_INTR 11
|
||||
|
|
|
|||
|
|
@ -18,6 +18,9 @@ extern void bonito_irq_init(void);
|
|||
extern void mach_prepare_reboot(void);
|
||||
extern void mach_prepare_shutdown(void);
|
||||
|
||||
/* machine-specific PROM functions */
|
||||
extern void __init mach_prom_init_machtype(void);
|
||||
|
||||
/* environment arguments from bootloader */
|
||||
extern u32 cpu_clock_freq;
|
||||
extern u32 memsize, highmemsize;
|
||||
|
|
@ -45,6 +48,12 @@ extern void __init mach_init_irq(void);
|
|||
extern void mach_irq_dispatch(unsigned int pending);
|
||||
extern int mach_i8259_irq(void);
|
||||
|
||||
/* power management functions */
|
||||
extern void setup_wakeup_events(void);
|
||||
extern int wakeup_loongson(void);
|
||||
extern void __weak mach_suspend(void);
|
||||
extern void __weak mach_resume(void);
|
||||
|
||||
/* We need this in some places... */
|
||||
#define delay() ({ \
|
||||
int x; \
|
||||
|
|
|
|||
|
|
@ -16,6 +16,9 @@
|
|||
#define topology_core_id(cpu) (cpu_core(&cpu_data[cpu]))
|
||||
#define topology_core_cpumask(cpu) (&cpu_core_map[cpu])
|
||||
#define topology_sibling_cpumask(cpu) (&cpu_sibling_map[cpu])
|
||||
|
||||
extern struct cpumask __cpu_primary_thread_mask;
|
||||
#define cpu_primary_thread_mask ((const struct cpumask *)&__cpu_primary_thread_mask)
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_TOPOLOGY_H */
|
||||
|
|
|
|||
|
|
@ -32,14 +32,16 @@ static void txx9_gpio_set_raw(unsigned int offset, int value)
|
|||
__raw_writel(val, &txx9_pioptr->dout);
|
||||
}
|
||||
|
||||
static void txx9_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
static int txx9_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
unsigned long flags;
|
||||
spin_lock_irqsave(&txx9_gpio_lock, flags);
|
||||
txx9_gpio_set_raw(offset, value);
|
||||
mmiowb();
|
||||
spin_unlock_irqrestore(&txx9_gpio_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset)
|
||||
|
|
@ -68,7 +70,7 @@ static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset,
|
|||
|
||||
static struct gpio_chip txx9_gpio_chip = {
|
||||
.get = txx9_gpio_get,
|
||||
.set = txx9_gpio_set,
|
||||
.set_rv = txx9_gpio_set,
|
||||
.direction_input = txx9_gpio_dir_in,
|
||||
.direction_output = txx9_gpio_dir_out,
|
||||
.label = "TXx9",
|
||||
|
|
|
|||
|
|
@ -922,11 +922,13 @@ static const struct pt_regs_offset regoffset_table[] = {
|
|||
*/
|
||||
int regs_query_register_offset(const char *name)
|
||||
{
|
||||
const struct pt_regs_offset *roff;
|
||||
for (roff = regoffset_table; roff->name != NULL; roff++)
|
||||
if (!strcmp(roff->name, name))
|
||||
return roff->offset;
|
||||
return -EINVAL;
|
||||
const struct pt_regs_offset *roff;
|
||||
|
||||
for (roff = regoffset_table; roff->name != NULL; roff++)
|
||||
if (!strcmp(roff->name, name))
|
||||
return roff->offset;
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
|
||||
|
|
@ -937,7 +939,7 @@ static const struct user_regset mips_regsets[] = {
|
|||
.n = ELF_NGREG,
|
||||
.size = sizeof(unsigned int),
|
||||
.align = sizeof(unsigned int),
|
||||
.regset_get = gpr32_get,
|
||||
.regset_get = gpr32_get,
|
||||
.set = gpr32_set,
|
||||
},
|
||||
[REGSET_DSP] = {
|
||||
|
|
@ -945,7 +947,7 @@ static const struct user_regset mips_regsets[] = {
|
|||
.n = NUM_DSP_REGS + 1,
|
||||
.size = sizeof(u32),
|
||||
.align = sizeof(u32),
|
||||
.regset_get = dsp32_get,
|
||||
.regset_get = dsp32_get,
|
||||
.set = dsp32_set,
|
||||
.active = dsp_active,
|
||||
},
|
||||
|
|
@ -955,7 +957,7 @@ static const struct user_regset mips_regsets[] = {
|
|||
.n = ELF_NFPREG,
|
||||
.size = sizeof(elf_fpreg_t),
|
||||
.align = sizeof(elf_fpreg_t),
|
||||
.regset_get = fpr_get,
|
||||
.regset_get = fpr_get,
|
||||
.set = fpr_set,
|
||||
},
|
||||
[REGSET_FP_MODE] = {
|
||||
|
|
@ -963,7 +965,7 @@ static const struct user_regset mips_regsets[] = {
|
|||
.n = 1,
|
||||
.size = sizeof(int),
|
||||
.align = sizeof(int),
|
||||
.regset_get = fp_mode_get,
|
||||
.regset_get = fp_mode_get,
|
||||
.set = fp_mode_set,
|
||||
},
|
||||
#endif
|
||||
|
|
@ -973,7 +975,7 @@ static const struct user_regset mips_regsets[] = {
|
|||
.n = NUM_FPU_REGS + 1,
|
||||
.size = 16,
|
||||
.align = 16,
|
||||
.regset_get = msa_get,
|
||||
.regset_get = msa_get,
|
||||
.set = msa_set,
|
||||
},
|
||||
#endif
|
||||
|
|
@ -997,7 +999,7 @@ static const struct user_regset mips64_regsets[] = {
|
|||
.n = ELF_NGREG,
|
||||
.size = sizeof(unsigned long),
|
||||
.align = sizeof(unsigned long),
|
||||
.regset_get = gpr64_get,
|
||||
.regset_get = gpr64_get,
|
||||
.set = gpr64_set,
|
||||
},
|
||||
[REGSET_DSP] = {
|
||||
|
|
@ -1005,7 +1007,7 @@ static const struct user_regset mips64_regsets[] = {
|
|||
.n = NUM_DSP_REGS + 1,
|
||||
.size = sizeof(u64),
|
||||
.align = sizeof(u64),
|
||||
.regset_get = dsp64_get,
|
||||
.regset_get = dsp64_get,
|
||||
.set = dsp64_set,
|
||||
.active = dsp_active,
|
||||
},
|
||||
|
|
@ -1015,7 +1017,7 @@ static const struct user_regset mips64_regsets[] = {
|
|||
.n = 1,
|
||||
.size = sizeof(int),
|
||||
.align = sizeof(int),
|
||||
.regset_get = fp_mode_get,
|
||||
.regset_get = fp_mode_get,
|
||||
.set = fp_mode_set,
|
||||
},
|
||||
[REGSET_FPR] = {
|
||||
|
|
@ -1023,7 +1025,7 @@ static const struct user_regset mips64_regsets[] = {
|
|||
.n = ELF_NFPREG,
|
||||
.size = sizeof(elf_fpreg_t),
|
||||
.align = sizeof(elf_fpreg_t),
|
||||
.regset_get = fpr_get,
|
||||
.regset_get = fpr_get,
|
||||
.set = fpr_set,
|
||||
},
|
||||
#endif
|
||||
|
|
@ -1033,7 +1035,7 @@ static const struct user_regset mips64_regsets[] = {
|
|||
.n = NUM_FPU_REGS + 1,
|
||||
.size = 16,
|
||||
.align = 16,
|
||||
.regset_get = msa_get,
|
||||
.regset_get = msa_get,
|
||||
.set = msa_set,
|
||||
},
|
||||
#endif
|
||||
|
|
@ -1351,7 +1353,7 @@ asmlinkage long syscall_trace_enter(struct pt_regs *regs)
|
|||
*/
|
||||
asmlinkage void syscall_trace_leave(struct pt_regs *regs)
|
||||
{
|
||||
/*
|
||||
/*
|
||||
* We may come here right after calling schedule_user()
|
||||
* or do_notify_resume(), in which case we can be in RCU
|
||||
* user mode.
|
||||
|
|
|
|||
|
|
@ -236,6 +236,7 @@ static void __init cps_smp_setup(void)
|
|||
/* Use the number of VPEs in cluster 0 core 0 for smp_num_siblings */
|
||||
if (!cl && !c)
|
||||
smp_num_siblings = core_vpes;
|
||||
cpumask_set_cpu(nvpes, &__cpu_primary_thread_mask);
|
||||
|
||||
for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) {
|
||||
cpu_set_cluster(&cpu_data[nvpes + v], cl);
|
||||
|
|
@ -368,6 +369,7 @@ static void __init cps_prepare_cpus(unsigned int max_cpus)
|
|||
cl = cpu_cluster(¤t_cpu_data);
|
||||
c = cpu_core(¤t_cpu_data);
|
||||
cluster_bootcfg = &mips_cps_cluster_bootcfg[cl];
|
||||
cpu_smt_set_num_threads(core_vpes, core_vpes);
|
||||
core_bootcfg = &cluster_bootcfg->core_config[c];
|
||||
bitmap_set(cluster_bootcfg->core_power, cpu_core(¤t_cpu_data), 1);
|
||||
atomic_set(&core_bootcfg->vpe_mask, 1 << cpu_vpe_id(¤t_cpu_data));
|
||||
|
|
|
|||
|
|
@ -56,8 +56,10 @@ EXPORT_SYMBOL(cpu_sibling_map);
|
|||
cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
|
||||
EXPORT_SYMBOL(cpu_core_map);
|
||||
|
||||
#ifndef CONFIG_HOTPLUG_PARALLEL
|
||||
static DECLARE_COMPLETION(cpu_starting);
|
||||
static DECLARE_COMPLETION(cpu_running);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* A logical cpu mask containing only one VPE per core to
|
||||
|
|
@ -74,6 +76,8 @@ static cpumask_t cpu_core_setup_map;
|
|||
|
||||
cpumask_t cpu_coherent_mask;
|
||||
|
||||
struct cpumask __cpu_primary_thread_mask __read_mostly;
|
||||
|
||||
unsigned int smp_max_threads __initdata = UINT_MAX;
|
||||
|
||||
static int __init early_nosmt(char *s)
|
||||
|
|
@ -367,6 +371,9 @@ asmlinkage void start_secondary(void)
|
|||
* to an option instead of something based on .cputype
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_PARALLEL
|
||||
cpuhp_ap_sync_alive();
|
||||
#endif
|
||||
calibrate_delay();
|
||||
cpu_data[cpu].udelay_val = loops_per_jiffy;
|
||||
|
||||
|
|
@ -376,8 +383,10 @@ asmlinkage void start_secondary(void)
|
|||
cpumask_set_cpu(cpu, &cpu_coherent_mask);
|
||||
notify_cpu_starting(cpu);
|
||||
|
||||
#ifndef CONFIG_HOTPLUG_PARALLEL
|
||||
/* Notify boot CPU that we're starting & ready to sync counters */
|
||||
complete(&cpu_starting);
|
||||
#endif
|
||||
|
||||
synchronise_count_slave(cpu);
|
||||
|
||||
|
|
@ -386,11 +395,13 @@ asmlinkage void start_secondary(void)
|
|||
|
||||
calculate_cpu_foreign_map();
|
||||
|
||||
#ifndef CONFIG_HOTPLUG_PARALLEL
|
||||
/*
|
||||
* Notify boot CPU that we're up & online and it can safely return
|
||||
* from __cpu_up
|
||||
*/
|
||||
complete(&cpu_running);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* irq will be enabled in ->smp_finish(), enabling it too early
|
||||
|
|
@ -447,6 +458,12 @@ void __init smp_prepare_boot_cpu(void)
|
|||
set_cpu_online(0, true);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_PARALLEL
|
||||
int arch_cpuhp_kick_ap_alive(unsigned int cpu, struct task_struct *tidle)
|
||||
{
|
||||
return mp_ops->boot_secondary(cpu, tidle);
|
||||
}
|
||||
#else
|
||||
int __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
||||
{
|
||||
int err;
|
||||
|
|
@ -466,6 +483,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
|||
wait_for_completion(&cpu_running);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PROFILING
|
||||
/* Not really SMP stuff ... */
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/vmalloc.h>
|
||||
#include <linux/elf.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/syscalls.h>
|
||||
#include <linux/moduleloader.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
|
@ -582,7 +583,7 @@ static int vpe_elfload(struct vpe *v)
|
|||
struct module mod; /* so we can re-use the relocations code */
|
||||
|
||||
memset(&mod, 0, sizeof(struct module));
|
||||
strcpy(mod.name, "VPE loader");
|
||||
strscpy(mod.name, "VPE loader");
|
||||
|
||||
hdr = (Elf_Ehdr *) v->pbuffer;
|
||||
len = v->plen;
|
||||
|
|
|
|||
|
|
@ -105,13 +105,15 @@ static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
|
|||
/*
|
||||
* Set output GPIO level
|
||||
*/
|
||||
static void rb532_gpio_set(struct gpio_chip *chip,
|
||||
unsigned offset, int value)
|
||||
static int rb532_gpio_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
struct rb532_gpio_chip *gpch;
|
||||
|
||||
gpch = gpiochip_get_data(chip);
|
||||
rb532_set_bit(value, offset, gpch->regbase + GPIOD);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -162,7 +164,7 @@ static struct rb532_gpio_chip rb532_gpio_chip[] = {
|
|||
.direction_input = rb532_gpio_direction_input,
|
||||
.direction_output = rb532_gpio_direction_output,
|
||||
.get = rb532_gpio_get,
|
||||
.set = rb532_gpio_set,
|
||||
.set_rv = rb532_gpio_set,
|
||||
.to_irq = rb532_gpio_to_irq,
|
||||
.base = 0,
|
||||
.ngpio = 32,
|
||||
|
|
|
|||
|
|
@ -603,8 +603,8 @@ static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
|
|||
return !!(data->cur_val & (1 << offset));
|
||||
}
|
||||
|
||||
static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
static int txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
|
||||
int value)
|
||||
{
|
||||
struct txx9_iocled_data *data = gpiochip_get_data(chip);
|
||||
unsigned long flags;
|
||||
|
|
@ -616,6 +616,8 @@ static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
|
|||
writeb(data->cur_val, data->mmioaddr);
|
||||
mmiowb();
|
||||
spin_unlock_irqrestore(&txx9_iocled_lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
|
||||
|
|
@ -653,7 +655,7 @@ void __init txx9_iocled_init(unsigned long baseaddr,
|
|||
if (!iocled->mmioaddr)
|
||||
goto out_free;
|
||||
iocled->chip.get = txx9_iocled_get;
|
||||
iocled->chip.set = txx9_iocled_set;
|
||||
iocled->chip.set_rv = txx9_iocled_set;
|
||||
iocled->chip.direction_input = txx9_iocled_dir_in;
|
||||
iocled->chip.direction_output = txx9_iocled_dir_out;
|
||||
iocled->chip.label = "iocled";
|
||||
|
|
|
|||
|
|
@ -27,6 +27,7 @@ endif
|
|||
# offsets.
|
||||
cflags-vdso := $(ccflags-vdso) \
|
||||
$(filter -W%,$(filter-out -Wa$(comma)%,$(KBUILD_CFLAGS))) \
|
||||
$(filter -std=%,$(KBUILD_CFLAGS)) \
|
||||
-O3 -g -fPIC -fno-strict-aliasing -fno-common -fno-builtin -G 0 \
|
||||
-mrelax-pic-calls $(call cc-option, -mexplicit-relocs) \
|
||||
-fno-stack-protector -fno-jump-tables -DDISABLE_BRANCH_PROFILING \
|
||||
|
|
|
|||
|
|
@ -81,25 +81,21 @@ static int __maybe_unused bcm963xx_nvram_checksum(
|
|||
const struct bcm963xx_nvram *nvram,
|
||||
u32 *expected_out, u32 *actual_out)
|
||||
{
|
||||
const u32 zero = 0;
|
||||
u32 expected, actual;
|
||||
size_t len;
|
||||
|
||||
if (nvram->version <= 4) {
|
||||
expected = nvram->checksum_v4;
|
||||
len = BCM963XX_NVRAM_V4_SIZE - sizeof(u32);
|
||||
len = BCM963XX_NVRAM_V4_SIZE;
|
||||
} else {
|
||||
expected = nvram->checksum_v5;
|
||||
len = BCM963XX_NVRAM_V5_SIZE - sizeof(u32);
|
||||
len = BCM963XX_NVRAM_V5_SIZE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Calculate the CRC32 value for the nvram with a checksum value
|
||||
* of 0 without modifying or copying the nvram by combining:
|
||||
* - The CRC32 of the nvram without the checksum value
|
||||
* - The CRC32 of a zero checksum value (which is also 0)
|
||||
*/
|
||||
actual = crc32_le_combine(
|
||||
crc32_le(~0, (u8 *)nvram, len), 0, sizeof(u32));
|
||||
/* Calculate the CRC32 of the nvram with the checksum field set to 0. */
|
||||
actual = crc32_le(~0, nvram, len - sizeof(u32));
|
||||
actual = crc32_le(actual, &zero, sizeof(u32));
|
||||
|
||||
if (expected_out)
|
||||
*expected_out = expected;
|
||||
|
|
|
|||
Loading…
Reference in New Issue