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drm-misc-next-fixes for v6.19: 

- Restrict the pointer size of flush pages to prevent a regression.
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Merge tag 'drm-misc-next-fixes-2025-11-26' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next

drm-misc-next-fixes for v6.19:
- Restrict the pointer size of flush pages to prevent a regression.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patch.msgid.link/0090a4fc-9cc4-4c03-bfe5-d1b1f0cc7e05@linux.intel.com
This commit is contained in:
Dave Airlie 2025-11-28 08:40:47 +10:00
parent 1a22e175b3 31d3354f42
commit 62433efe0b
6 changed files with 16 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c
View File

@ -279,7 +279,7 @@ nvkm_fb_ctor(const struct nvkm_fb_func *func, struct nvkm_device *device,
mutex_init(&fb->tags.mutex);
if (func->sysmem.flush_page_init) {
fb->sysmem.flush_page = alloc_page(GFP_KERNEL | __GFP_ZERO);
fb->sysmem.flush_page = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
if (!fb->sysmem.flush_page)
return -ENOMEM;

3
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb100.c
View File

@ -15,6 +15,9 @@ gb100_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
const u32 hshub = DRF_LO(NV_PFB_HSHUB0);
struct nvkm_device *device = fb->subdev.device;
// Ensure that the address is within hardware limits
WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(52));
nvkm_wr32(device, hshub + NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_HI, addr_hi);
nvkm_wr32(device, hshub + NV_PFB_HSHUB_PCIE_FLUSH_SYSMEM_ADDR_LO, addr_lo);
nvkm_wr32(device, hshub + NV_PFB_HSHUB_EG_PCIE_FLUSH_SYSMEM_ADDR_HI, addr_hi);

3
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gb202.c
View File

@ -13,6 +13,9 @@ gb202_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
struct nvkm_device *device = fb->subdev.device;
const u64 addr = fb->sysmem.flush_page_addr;
// Ensure that the address is within hardware limits
WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(52));
nvkm_wr32(device, NV_PFB_FBHUB0_PCIE_FLUSH_SYSMEM_ADDR_HI, upper_32_bits(addr));
nvkm_wr32(device, NV_PFB_FBHUB0_PCIE_FLUSH_SYSMEM_ADDR_LO, lower_32_bits(addr));
}

3
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gf100.c
View File

@ -80,6 +80,9 @@ gf100_fb_init_page(struct nvkm_fb *fb)
void
gf100_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
{
// Ensure that the address can actually fit in the register
WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(40));
nvkm_wr32(fb->subdev.device, 0x100c10, fb->sysmem.flush_page_addr >> 8);
}

3
drivers/gpu/drm/nouveau/nvkm/subdev/fb/gh100.c
View File

@ -13,6 +13,9 @@ gh100_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
const u64 addr = fb->sysmem.flush_page_addr >> NV_PFB_NISO_FLUSH_SYSMEM_ADDR_SHIFT;
struct nvkm_device *device = fb->subdev.device;
// Ensure that the address is within hardware limits
WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(52));
nvkm_wr32(device, NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_HI, upper_32_bits(addr));
nvkm_wr32(device, NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_LO, lower_32_bits(addr));
}

3
drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv50.c
View File

@ -214,6 +214,9 @@ nv50_fb_tags(struct nvkm_fb *base)
static void
nv50_fb_sysmem_flush_page_init(struct nvkm_fb *fb)
{
// Ensure that the address can actually fit in the register
WARN_ON(fb->sysmem.flush_page_addr > DMA_BIT_MASK(40));
nvkm_wr32(fb->subdev.device, 0x100c08, fb->sysmem.flush_page_addr >> 8);
}